Fusing mechanism of nichrome thin films

Fusing mechanism of nichrome thin films

World Abstracts on Microelectronics and Reliability System characterisation of planar source diffusion. J. MONKOWSrd and J. STACH. Solid St. Technol...

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World Abstracts on Microelectronics and Reliability

System characterisation of planar source diffusion. J. MONKOWSrd and J. STACH. Solid St. Technol. p. 31 (November 1976). The properties of planar source diffusion systems are studied as a function of ambient flow rate, ambient composition, and system geometry. It is found that with low flow rates and high wafer stacking densities, sheet resistance can be controlled within _+2% across the wafer and _+4% from run to run. The roles of diffusivity and vapor pressure in the planar source system are outlined. Methods to control these parameters are then described. Cleanliness and the cleaning of silicon wafers. J. A. AMUCK. Solid St. Technol. p. 47 (November 1976). The nature of contaminants encountered in the processing of silicon devices is outlined along with analytical methods for monitoring and characterizing them. Procedures for removal of these impurities are described based on the current state-of-the-art. The importance of clean water and clean drying techniques is cited and levels of inadvertent impurities that can be tolerated in device processing are discussed from a theoretical standpoint. Fusing mechanism of nichrome thin films. J. L. DAVIDSON, J. D. GmSON, S. A. HARRIS and T. J. ROSSITER. Proc. IEEE Reliah. Phys. p. 173 (April 1976). Nichrome fusible link programmable read-only memories, PROM's, have been developed and utilized for over 7 years. The physical mechanism of fusing these resistors has been generally described as melting, but only in the last 2 years, with the advent of a successful transmission electron microscopy technique, has detailed information on the structure of the programmed fuse gap become available. These observations, coupled with electrical and thermodynamic characterization of the fusing event, have led to a clearer understanding of this phenomena with concurrent definition of programming conditions for reliable operation of programmed PROM's. AI2Os as a radiation-tolerant CMOS dielectric. K. M. SCHLESIER, J. M. SHAW and C. W. DENVON JR. R C A Review 37, p. 358 (September 1976). Complementary-symmetry M O S circuits with their high noise immunity and low power consumption are excellent candidates for many stringent military and aerospace applications. However, their sensitivity to high-energy ionizing radiation often restricts their use. By employing A1203 as the gate dielectric, CMOS circuits that withstand up to l0 s rads (Si) of ionizing radiation can be made. A1203 has been applied to bulk CMOS circuits with aluminum gates and to CMOS in silicon-on-sapphire with both aluminum gates and selfaligned polysilicon gates. In this paper the fabrication, characterization, and limitations of A120 3 as a gate dielectric are presented. We also present an evaluation of A120 3 as a radiation-hard dielectric as compared to other hardening approaches, which are based on improving the standard SiO 2 gate dielectric.

Rigid-flexible Multilayer Circuit Boards: Three-dimensional printed circuits enable a further miniaturization and increase the reliability. D. ACKERMANN and H. NITSCH. FeinwkTech. Messtechnik 84 (7), 317 (1976). (In German). The circuit board for carrying and electrically connecting the highly integrated components is becoming an increasingly complex structure provided with components in a steadily increasing packing density. The development of printcd circuits has proceeded from an arrangement of conductors in a single plane via metallized-through circuitry exposed in two planes to the multilayer circuit board. In accordance with the latest state of the art, a plurality of multilayer circuit boards are mechanically and electrically interconnected by flexible elements, which also carry current so that a structure having an extremely high packing density and conductors extending in three dimension results.

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Automatic detection of semiconductor mask defects. ZBICrNIEW MARCIN W6JCIK. Mieroelectron. Reliab. 15, 585 (1976). This paper presents the method and device for the detection of mask defects, referring to the masks used for semiconductor production. A brief outline of the method is as follows: the examined mask image is approximated to the set of M × N points by means of the set of converters. Each point acquires the value 0 or 1, according to the degree of lightness of the corresponding sector of the image. Then, the formal criteria of belonging to the category of interferences and defects or to the group of correct images are set for each point of the image. Detection of the defects is performed independently of the examined mask positions, rotations or shifts in the field of the device lens. The results of the developed algorithm action on the mask graphic images are also presented. An idea of the specialist system construction for the automatic detection of mask defects is also presented. Application of aluminium oxide to integrated circuits fabrication. H. HARADA, S. SATOH and M. YOSHIDA. IEEE Trans. Reliab. R-25 (5), 290 (December 1976). Formation characteristics of an aluminum oxide grown by an "aluminum + water reaction" method are reviewed and its etching rates in some solutions are reported. The aluminum oxide protects the AI against some chemicals, and serves, by covering the A1 surface with the aluminum oxide, to reduce the frequency of integrated circuit (1C) failures due to aluminum corrosion. Application to epoxyencapsulated ICs shows that it greatly reduces the frequency of failures in a steam pressure test. Another application to IC chips with gold bumps shows that it drastically reduces the incidence of A1 corrosion which otherwise occurs during bump formation. This method is simple, requires no change in conventional processing, and gave satisfactory results in spite of the presence of glass defects. Effects of varying base and collector doping on high current behaviour in bipolar epitaxial transistors. R. E. THOMASand K. H. SAYEED. Int. J. Electronics 42 (2), 121 (1977). High current effects in bipolar epitaxial transistors of different relative base and epitaxial collector doping are studied by dividing the active base into incremental devices which are simulated in one dimension and the solutions combined to give a quasi two-dimensional solution. Increasing the collector/base doping ratio is shown to make base conductivity modulation dominate the current gain degradation at high current densities, while lower ratios make 'base widening' dominate. The cut-off frequency fv degrades, due to base widening for all cases, falling off at lower current densities for more lightly doped collectors. The seriousness of, and the rate at which emitter crowding occurs, are shown to be less in a device with lower base doping where base conductivity modulation more significantly reduces ohmic drop due to lateral base current flow. The quasi 2-D approach is shown to predict transistor terminal characteristics with reasonable accuracy. Photomask/resist capability~n approach to assessment. CHARLES E. VOLK and KENNETH A. SHAW. Microelectron. Reliab. 15, 469 (1976). The current activity in LSI and high density semiconductor memory development has increased emphasis on the need for the reduction of process-induced defects. An appreciable number of these defects is associated with photofabrication steps due to photomask and/or photoresist variations. In order to minimize defects caused by these steps, it is necessary to determine the type and density of photomask/resist faults that result in any given device defect. The evaluation techniques used should not require highly sophisticated and expensive equipment that would prevent their use in a normal production environment.