GaAs LPE growth and its application to FET

GaAs LPE growth and its application to FET

Journal of Crystal Growth 45 (1978) 272—276 © North-Holland Publishing Company GaAs LPE GROWTH AND ITS APPLICATIONS TO FET Y. NANISHI, K. TAKAHEI and...

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Journal of Crystal Growth 45 (1978) 272—276 © North-Holland Publishing Company

GaAs LPE GROWTH AND ITS APPLICATIONS TO FET Y. NANISHI, K. TAKAHEI and K. KUROIWA Musashino Electrical Communication Laboratory, Nippon Telegraph and Telephone Public Corporation, 3-9-11 Midori-cho, Musashino-shi, Tokyo 180, Japan

Residual impurities and deep levels in the LPE GaAs layers grown by a sliding boat method were studied. Residual impurities were investigated by monitoring oxygen and water vapor contents in the exhaust gas during heat treatment. The results are satisfactorily explained by assuming oxygen as a 3 were not observed in dominant residual impurity. Electron traps with a density higher than 5 X 1012 cm the LPE layers, whereas in VPE layers, 0.82 eV electron traps were always observed. LPE double layers (high purity buffer layer and active layer) were fabricated into FET’s. GaAs FET’s with a 1 ~m gate showed no hysteresis loops in the I— V characteristics and had fairly good high-frequency characteristic (fn,~= 70 GHz, NF = 2.4 dB at 10.4 GHz).

1. Introduction

Secondly, deep levels in the LPE layers are studied and compared with WE layers by using a deep-level transient spectroscopy (DLTS) method [4] and a constant capacitance method [5]. Electron traps with a density higher than 5 X 1012 cm3 were not observed in the LPE layers in accordance with the reports previously published [6—8],whereas in WE layers, electron traps with an activation energy of 0.82 eV were always observed. High purity LPE layers with small amount of electron traps would offer good buffer layers for majority carrier devices on Cr-doped substrates such as GaAs FET’s. LPE double layers, grown by the sliding boat method, were fabricated into GaAs FET’s. High frequency characteristics of these FET’s are demonstrated at the last part of this paper.

Most GaAs field effect transistors (FET’s) are currently fabricated utilizing double layers (buffer layer and submicron active layer) prepared by vapor phase epitaxy (VPE). In order to fabricate improved GaAs FET’s with high mutual conductance and low noise, high quality epitaxial layers with low density of residual impurities and deep traps, are strongly demanded. An attempt is made in this study to grow high quality liquid phase epitaxial (LPE) double layers for fabrication of improved GaAs FET’s. First, experiments to investigate residual impurities in the grown layer for high purity buffer layer are described. High purity LPE layers have been reported by several authors using a dipping [1] or a tilting boat method [2]. It is, however, difficult to grow thin and multiple layers, as required for GaAs FET’s, by using these methods. A sliding boat method, which is developed for thin and multiple layer growth, is employed for high purity LPE growth in this study. Morkoc and Eastman [3] have reported the purity of LPE layers grown by the sliding boat method, and concluded that C was the dominant residual impurity, A special feature of the present experiment is to monitor water and oxygen contents in the exhaust gas during the LPE growth to investigate residual impurities.

2. Experimental procedures and results 2.1. Residual impurity in the LPE layer

In this experiment, substrates were loaded after the purification stage, in which only the Ga solution was heated at high temperature, so that the substrates would not be subjected to heat treatments. The temperature versus time program is shown in fig. 1. Several kinds of gases were used in the purifica272

/ GaAs LPE growth and

Y. Nanishi et al.

850 ~

750

PURGE

Go+source GaAs —

H

20

doo BAKING and GR~M/THnH2

~

02

___________________

_______

°

273

Table 2 Purity of the gases used in the experiment.

PREHEATED in H2,Ar, He,(He+H2)

400

its applications to FET

GROWTH 1t/mifl

__________

DP (°C)

(ppm)

1-12

—76.6

0.94

Ar He

—76.5 —76.8

0.95 0.

(ppm) ——

0.06

0.

0.05 — 0.07 0.03—0.06

PURGE

were not observed when inert gases were used, water

/~KlNG ~

Substrate

/ TIME(hour)

Fig. 1. Temperature program for LPE growth. Purification stage is shown in the upper half. Growth stage is shown in the lower half.

tion stage, while only H2 gas was introduced in the growth stage. Purification temperature (Tp) and growth temperature (TG) were fixed at 850 and 750°C,respectively, Electrical properties of the grown layers measured by the Van der Pauw method are shown in table 1. A purification effect was observed whenorthe solution 3/min) mixed gas was pre-heated in H2 (800 cm (H 3/min: 800 cm3/min) prior to the 2: He On = 800 cm hand, no purification effect was growth. the other observed when Ar (800 cm3/min) or He (800 cm3! mm) gas was used. Every gas is purified before introducing to the reactor. The purity of the gases is shown in table 2. No noticeable differences in purity between these gases were observed. In order to investigate why purification effects Table 1 Electrical properties of the grown layers; several kinds of gas were used in the purification stage; the purification temperature (Tp) and growth temperature (TG) were 850 and 750°C; respectively. Gas flow

nRT3) (cm

(cm3) ‘~77 K

(cm2/V ~L77 K . see)

1.6 x lOiS 1.0 X io’~ 9.8 1016

5 1.5 x io~~ 7.8 xX iO’ 7.6 1015

24000 40400 21000

1.8 x 1015

1.6 >< 1015

38000

vapor and oxygen contents in the exhaust gas were monitored during the heat treatment, by hygrometer and oxygen meter directly connected to the outlet of the reactor. The system was heated at 850°Cfor 4 h in Ar or H2 gas, then cooled to room temperature. Additional heat treatment at 850°C for 2 h followed without the reactor being opened, during which only H2 gas was introduced. The results are shown in fig. 2. The dotted curve shows the result when the system was heated in H2 gas without Ga or graphite boat. The solid curve shows the result when the system was heated in H2 gas with Ga loaded in the graphite boat. The difference the in solid curveofand the dotted curve can be between understood terms water vapor which comes out of the Ga and the graphite boat. No noticeable peak was observed during the additional heat treatment, when the first heat treatment was carried out in H 2 gas. On the other hand, a fairly large peak of water vapor content was observed

~

——~~‘~a (WItho~tG~BOAT)

~

——Ar (Go’BOAT)

N,~’~” (BOAT) N-....~,

~

~,,

—~

~

02

-~

H 2 Ar He He + H 2 _______

-__________________

2.5 ~

~

‘rikaftrsErñNG(ht~~rr~

85OC~ATEM1—85O~

‘° 105

0

Fig. 2. Water,vapor and oxygen contents in the exhaust gases measured during heat treatments.

274

Y. Nanishi et al.

/ GaAs LPE growth and its applications to FET

Table 3 Electrical properties of the grown layers measured at 77 K; growth temperature (TG) and purification temperature (Tp) were varied

TG

Tp850°C,4h



(°C)

800 750 700

Tp800°C,4h

Tp750°C,4h —-

____________

p77K (cm2/V sec)

°77K (cm3)

177K /(cm2/V . see)

n77K (cm3)

/-177K (cm2/V see)

~77K (cm3)

52300 40400 36600

4.2 x 1014 1.5 x 1015 3.8 x 1015

44600 41600 32300

5.1 x 1014 2.0 x 4.0 X lO~

38800 29100

2.2 x io’~ 4.9 X 1015

during the additional heat treatment in H 2 gas, when the first heat treatment was carried out in Ar gas instead of H2 gas. This shows that water vapor or oxygen is not sufficiently driven out, by the heat treatment in Ar gas, at 850°Cfor 4 h. The peak was also observed even when the heat treatment was carried out with only the graphite boat. This result indicates that water vapor or oxygen adsorbed by the porous graphite boat cannot be easily desorbed by the heat treatment in Ar. Another experiment, carried out to investigate residual impurities in the grown layer, is concerned with the carrier concentration dependence on growth

/

16

800’C

io U

Z

7ocrc

75uj

.~2 LU

z K(0

~‘

~

iD3LL.

z

o z

temperature. Epitaxial layers were grown changing purification temperature (Tp) and growth temperature (TG) by using the temperature versus time program shown in fig. 1. Purified H2 gas was used all through this experiment. The results are shown in table 3. The room ternperature carrier concentration dependence on the growth temperature for various pre-heat temperature is shown in fig. 3. The temperature dependence of effective distribution coefficient of oxygen, reported by Otsubo et al. [2], is shown in the same figure. The carrier concentration and effective oxygen distribution coefficient have almost the same dependence on growth temperature. The above two experimental results are satisfactorily by assuming dominant explained residual impurity, whichoxygen behavesas asthea In thedonor actualin high shallow LPE purity layers buffer [9]. layer growth, care was taken not to introduce oxygen in the grown layer. A glove-box, purged by continuous flow of N 2 gas, was used to suppress adsorption of H20, 02 and



0

S

1

high purity LPE

3 range, by selecting growth ternother gases bycm porous graphite during the substrate layers reproducibly carrier concentrations in(Tp) the perature (TG) andwith purification temperature (1—3) X 1014

~

at

m

(1)

id~

to grow

~ z

0 LU U

•750C 4hr PRE-HEATED A801YC 4hr • 850C 4hr

°

loading. It became possible

l.O’~

800 and 850°C,respectively. 2.2. Deep levels

9

Q95 1O~!T(K~) GROWTH TEMPERATURE Fig. 3. Room temperature carrier concentrations and effective distribution coefficients for oxygen reported by Otsubo et al. [2] versus growth temperature. Epitaxial layers denoted by u, ~ and. are grown from solutions pre-heated at 750, 800 and 850°C, respectively, for 4 h.

It

is well known that the densities of electron traps

in n-type LPE layers are much less than those in WE layers [6—8]. To confirm that there are no measurable electron traps in the LPE buffer layers

Y, Nanishi et aL

VPE

FET

275

t11t2~msec)

~ -150

/ GaAs LFE growth and its applications to

~

-100

-50

~

io

i~o

i~o

TEMPERATURE (C)

Fig. 4. Typical DLTS spectra for VPE and LPE GaAs.

fabricate GaAs FET’s, majority carrier traps (electron traps) in the high purity LPE layers were studied using a DLTS method [4} and a constant capacitance method [5], and were compared with those in VPE layers. Detectable limit of the deep-level densities by the DLTS method was estimated to be 5 X 1012 cm3 in our experiment, Typical DLTS spectra for LPE and VPE GaAs are shown in fig. 4. Carrier concentration and mobility at 77K of the LPE layer shown in fig. 4 are 2.2 X 1014 cm3 and 56400 cm2/V ‘see, respectively, and those of the VPE layer are 2.0 X 1015 cm3 and 51400 cm2/V sec, respectively. The activation energy determined from the DLTS spectra shown in fig. 4 was 0.82 eV, which agreed with the result obtained by the constant capacitance method. The concentration of the electron traps in this VPE layer was estimated to be 2.3 X 1014 cm3. This electron trap with 0.82 eV activation energy was observed in every WE layer measured. On the other hand, electron traps were not observed in the LPE layers, as expected. used to



Fig. 5. I—V characteristics of a GaAs FET prepared with continuously grown LPE layer. Horizontal axis: 1 V/division; vertical axis: 5 mA/division; gate bias voltage: —0.5 V/step.

purity buffer layers (n = 1 X l0~ cm3) and submicron active layers (n = 1 X iO~~ cm3) were grown by the sliding boat method. A steep carrier concentration profile, from the active layer to the buffer layer, was obtained with the carrier concentration decreasing an order of magnitude over a distance of about 0.07 pm. One of the difficulties encountered in using LPE layers for fabricating GaAs FET’s is to control submicron thicknesses of the active layers. Anodic oxidation [10,11] was employed for the submicron thickness control prior to device fabrication. Owing to this technology, the active layer thickness could be ____________________________

30

~\U.G.

~2O

MSG

2.3. Application to GaAs FET’s 6~ 10

LPE layers with carrier concentrations as low as (1—3) X 1014 cm3 could be obtained reproducibly, as pointed out in the previous section. These high purity LPE layers with comparatively small amount of electron traps offer good buffer layers for majority carrier devices such as GaAs FET’s. Selecting Sn as a dopant for active layers, high

4 LL

NF@ 2 0

I

I

FREQUENCY(GHz)

00

Fig. 6. Unilateral gain and maximum stable gain versus frequency. Noise figure at 10.4 GHz is also included.

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Y. Nanishi etal.

/ GaAs LPE growth and its applications to FET

reduced with high accuracy from the original 0.70 ± 0.15 pm to 0.20 ±0.01 pm. GaAs FET’s with a 1 pm gate were fabricated from the LPE double layer structures. Hysteresis loops were not observed in the I—V curves, as shown in fig. 5. The maximum oscillation frequency, finax, and noise figure at 10.4 GHz were 70 GHz and 2.4 dB, respectively, as shown in fig. 6.

Although most GaAs FET’s are currently fabricated from VPE material, LEP growth by the sliding boat method coupled with the use of anodic oxidation appears to be a promising technology, especially for low noise, high gain FET’s. Furthermore, LPE layers can supply high quality buffer layers for other majority carrier devices on Cr-doped substrates. Acknowledgement

3. Discussion and conclusion Residual impurities in the LPE layers were investigated by monitoring oxygen and water vapor contents in the exhaust gas. Residual impurities were investigated also by the changing pre-heat temperature and growth temperature. Oxygen, which behaves as a shallow donor in LPE layers, is conluded to be a dominant residual impurity. Electron traps were not observed in the LPE layers prepared, whereas in VPE layers, electron traps with an activation energy of 0.82 eV were always observed. It was assumed in a previously published paper [6], that this electron trap was connected in some way to the presence of oxygen, presumably oxygen and Ga—vacancy complex, for the reason that this trap was usually observed in melt grown, oxygen doped GaAs. Itis consistent with the assumption that most of the oxygen in Ga-rich LPE layers act as shallow donors and only a few act as electron traps.

High purity LPE layers with carrier concentrations

3 and with comparatively as low as (1—3) X 1014 cm small amounts of electron traps were expected to offer high quality buffer layers for majority carrier devices. GaAs FET’s with a 1 pm gate were fabricated from the LPE double layer structure. There were no hysteresis loops in the I— V characteristics, showing no indication of deep levels. Fairly good highfrequency characteristics (f~~ = 70 GHz, NF = 2.4 dB at 10.4 GHz) were obtained as expected.

Appreciation is expressed to Mr. K. Asai for FET fabrication and Mr. M. Ida for high-frequency measurements. Helpful discussions with Mr. T. Amano,

Mr. T. Aoki and Dr. H. Asahi are gratefully acknowledged. The authors also would like to thank Drs. H. Toyoda, M. Watanabe, Y. Sato, M. Fujimoto, S. Maruyama, and T. Ikegami for their encouragement and suggestions.

References [1] H.G.B. Hicks and P.D. Greene, in: Proc. 3rd Intern. Symp. on GaAs, 1970, p. 92. [2] M. Otsubo, K. Segawa and Fl. Miki, Japan. J. App!. 12(1973) [3] Phys. Fl. Morkoc and 797. L.F. Eastman, J. Crystal Growth 36 (1976) 109. [4] D.V. Lang, J. Appi. Phys. 45 (1974) 3023. [5] G. Goto, S. Yanagisawa, 0. Wada and H. Takanashi, Japan. J. Appl. Phys. 13 (1974) 1127. [6] and A. AppI.Electron. Phys. 8(1975)15. [7] A. F. Mircea Hasegawa andMitonneau, A. Majerfeld, Letters 11 (1975) 286. [8] T. Okumura, M. Takikawa and T. Ikoma, Appi. Phys. 11(1976)187.

[9] R. Solomon, in: Proc. 2nd Intern. Symp. on GaAs, [10] DL. ‘Rode, B. Schwartz and J.V. DiLorenzo, SolidState Electron. 17 (1974) 1119. [11] Si-I. Spitzer, B. Schwartz and G.D. Weigle, J. E!ectrochem. Soc. 122 (1975) 397.