Generalized block constant modulus algorithm and its VLSI architecture

Engineering Information Abstracts (Part I) hancements are planned to further improve the pricerperformance of the system. In English ŽAuthor abstract . 8 Refs. EI Order Number: 98054179516 Keywords: Imaging systems; Personal computers; High speed cameras; Signal filtering and prediction; Digital signal processing; Computer software; Image enhancement; Algorithms; Data acquisition; Image quality Title: SYNCHRONOUS CORRECT OF THE PITCH BY USING THE TMS320C50 Author(s): Jingli, Zhou; Hongwei, Lu; Shengsheng, Yu Source: Midwest Symposium on Circuits and Systems Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 2 Žof 2. Aug 3-6 1997 v 2 Sacramento, CA, USA. Sponsored by: IEEE 2 IEEE Piscataway NJ USA. p 861-864 CODEN: MSCSDL Publication Year: 1997 Abstract: Each pitch of the normal musical signal is corresponding to a fixed frequency. If the singer deviates from this frequency, it will cause ‘abnormal pitch’. This paper studies the method for correcting the abnormal pitch by using the DSP technology and its realization in high speed processor of TMS320C50. In English ŽAuthor abstract . 3 Refs. EI Order Number: 98054179502 Keywords: Digital signal processing; Real time systems; Natural frequencies; Analog to digital conversion Title: TWO POLYPHASE FILTER ARCHITECTURES FOR MPEG AUDIO Author(s): Ling, Nam; Shih, Chen-Wei Source: Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 2 Žof 2. Aug 3-6 1997 v 2 Sacramento, CA, USA. Sponsored by: IEEE Piscataway NJ USA. p 853-856 CODEN: MSCSDL Publication Year: 1997 Abstract: Polyphase subband filtering is a computational-intensive operation in MPEG audio coding. In this paper, we present two fast architectures by using a fast IDCT algorithm with and without recursive formula for polyphase analysis subband filtering. Our basic approach is to use only one adderrsubtractor and one multiplier, but each has its own data bus, and a process controller is used to control the overall processing. We compare our design by using timing constraints, memory size, circuit complexities, and the number of operations. Low cost adderrsubtractor and multiplier in VLSI implementation can be designed for real-time applications. In English ŽAuthor abstract . 11 Refs. EI Order Number: 98054179496 Keywords: Signal filtering and prediction; Acoustic signal processing; Signal encoding; Algorithms; Digital arithmetic; VLSI circuits; Real time systems; Adders; Multiplying circuits; Recursive functions Title: GENERALIZED BLOCK CONSTANT MODULUS ALGORITHM AND ITS VLSI ARCHITECTURE Author(s): Ochi, Hiroshi; Onaga, Ken; Kinjo, Sigenori Source: Proceedings of the 1997 40th Midwest Symposium on

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Circuits and Systems. Part 2 Žof 2. Aug 3-6 1997 v 2 Sacramento, CA, USA. Sponsored by: IEEE Piscataway NJ USA. p 853-856 CODEN: MSCSDL Publication Year: 1997 Abstract: This correspondence proposes a generalized block CMAŽConstant Modulus Algorithm., which enable us fast convergence and low power consumption, for blind adaptive equalizers. The gradient vector for adaptive weights updating is obtained by using block processing so that the accuracy of the gradient estimation is improved. This results in better performance over the conventional CMA. Some computer simulations show the effectiveness of the proposed algorithm. The architecture in terms of the proposed algorithm for VLSI design is also shown. In English ŽAuthor abstract . 6 Refs. EI Order Number: 98054179494 Keywords: Adaptive filtering; VLSI circuits; Adaptive algorithms; Computer simulation; Convergence of numerical methods; Equalizers; Vectors; Digital signal processing Title: DSPS INTERCONNECTION USING OPTICAL FIBER CABLES Author(s): Furuya, Noritsuna; e Silva, Jorge Luiz; Filliettaz, Osvaldo M.; Saito, Jose Hiroki Source: Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 2 Žof 2. Aug 3-6 1997 v 2 Sacramento, CA, USA. Sponsored by: IEEE Piscataway NJ USA. p 831-834 CODEN: MSCSDL Publication Year: 1997 Abstract: This paper reports the proposal of an optical fiber cable interface for DSP interconnections, in the implementation of a expandable and efficient large scale Multi-DSP system. It is also presented the resulting Multi-DSP machine diagram and the validation tests of the proposed interface. The resulting interface allows secure and high performance transmission, in the maximum TMS320C40 DSP throughput, to 2.4 m, and make possible the interconnection of several multi-DSP carrier cards, with different power sources. In English ŽAuthor abstract . 8 Refs. EI Order Number: 98054179489 Keywords: Digital signal processing; Optical fibers; Optical cables; Optical interconnects; Microprocessor chips; Interfaces Žcomputer. Title: NEW ROBUST FREQUENCY-DOMAIN ADAPTIVE FILTER WITH COLORED SIGNAL INPUT Author(s): Kinjo, Shigenori; Oshiro, Masafumi; Ochi, Hiroshi Source: Proceedings of the 1997 40th Midwest Symposium on Circuits and Systems. Part 2 Žof 2. Aug 3-6 1997 v 2 Sacramento, CA, USA. Sponsored by: IEEE Piscataway NJ USA. p 823-826 CODEN: MSCSDL Publication Year: 1997 Abstract: A frequency-domain adaptive filter ŽFDAF. with parallel structure and reduced computational complexity for precise adaptive system identification has been proposed. However, the presence of additive noise degrades the performance of the FDAF, and the degradation is conspicuous in case of colored signal input. In this report, we propose a new