Graphite-strip-heater zone-melting recrystallization of Si films

Journal of Crystal Growth 63 (1983) 453—483 North-Holland Publishing Company

453

GRAPHITE-STRIP-HEATER ZONE-MELTING RECRYSTALLIZATION OF Si FILMS John C.C. FAN, B.-Y. TSAUR and M.W. GElS Lincoln Laboratory Massachusetts Institute of Technology, Lexington, Massachusetts 02173, USA Received 23 February 1983; manuscript received in final form 6 May 1983

We have recently developed a zone-melting recrystallization technique for preparing large-area, high-quality Si films on Si0

2. The key feature of this technique is the use of two graphite strip heaters, one ofwhich is movable. The substrates used are bulk fused silica, sapphire, or single-crystal Si wafers that have been overcoated with Si02. Films recrystallized without seeding contain widely-spaced grain boundaries and many sub-boundaries within each grain. Grain boundaries can be eliminated by either multiple-seeding or single-seeding methods. Extensive electrical measurements have been made on films recrystallized without seeding on Si02-coated Si wafers. Sub-boundaries are found to have no significant effect on n-channel MOSFETs, which have characteristics comparable to those of such devices facricated directly on single-crystal Si wafers. High-yield transistor arrays and CMOS circuits have been made in films on 2 inch diameter wafers. Some remaining materials issues, such as film uniformity and wafer flatness, must still be addressed. We believe that most of these issues can be resolved, so that zone-melting recrystallization should become an effective technique for producing high-quality silicon-on-insulator wafers for commercial IC processing.

Contents 1. Introduction 2 Experimental procedures 3 Material properties 3.1. Seeded growth 3.1.1. Multiple seeds, two heaters 3.1.2. Multiple seeds, single heater 3.1.3. Si3N4/SiO2 composite cap 3.1.4. Single seed, two heaters 3.2. Unseeded growth 4. Electrical properties 4.1. Majority-carrier transport 4.2. Minority-carrier generation lifetime 4.3. Effect of thermal Stress 4.4. Radiation hardness 4.5. S0I/CMOS test circuits 5. Conclusion Acknowledgements References

1. Introduction Composite structures consisting of single-crystal or large-grained Si films on foreign substrates are of great interest for device applications. If the substrates are conducting, the Si films can be

fabricated into inexpensive solar cells [1]; if the substrates are insulating, the Si films can be fabricated into microelectronic devices. Two principal types of insulating substrates are utilized. Those of the first type are composites prepared by forming insulating layers on single-crystal Si wafers. Films of Si on these substrates could be used for high-speed, radiation-hardened integrated circuits. The substrates of the second type are bulk transparent insulators, such as sapphire or fused silica, and Si films on these substrates could also be fabricated into high-speed integrated circuits [2] or used for flat plate displays [3]. (For GaAs and InP, semiconductor-on-insulator structures can be prepared by epitaxial growth of a conducting layer on an insulating substrate of the same material. Such structures cannot be prepared for Si, since it has been impossible to make single-crystal Si insulating.) The many advantages of having an insulator beneath the Si film have sustained substantial interest in silicon-on-sapphire (SOS) technology. However, the cost of sapphire substrates and the material problems of the Si layers have restricted the application of this technology. Recently, there

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Graphite-strip-heater ZMR of Si films

has been active interest in novel silicon-on-insulator (SOI) technologies, primarily with SiO2 as the insulating layer upon which the Si film is deposited. (The relative merits of some of these technologies are discussed in a paper by Jastrezbski in this issue.) Direct deposition of Si on amorphous SiO2 generally yields either amorphous or finely polycrystalline Si films. We have developed a zone-melting recrystallization technique with which single-crystal Si films can be obtained on amorphous Si02 or other insulating substrates. Zone-melting recrystallization (ZMR) is accomplished by scanning a molten zone through the Si film. The basic idea of ZMR was proposed in the e~rly1950’s by Leitz [4] as a possible technique for obtaining large-grained or even single-crystal films of ZnS. Experimental work followed with ZMR of Ge [5] and InSb [6,7], utilizing a scanning focused electron beam [5,6] or heated wire [7] as the heat source. In 1974, Laff and Hutchins [8], using a scanned modulated cw argon-ion laser as a heat source, produced large-grained Si islands (grain size about 5 pm) on fused silica. Using a scanned cw Nd-YAG laser beam, Fan and Zeiger crystallized large-area (— 0.25 cm x 0.5 cm) Si films on sapphire and fused silica [1,9,10], and GaAs films on fused silica [10]. The Si grains were about 25 m across, while the GaAs grains were as large as a few hundred micrometers. The crystallized GaAs films had a preferred <110> orientation. On the basis of these experiments, which employed overlapping laser scans and a heated substrate platform, slit-like energy beams were proposed [1,9,10] as the preferred heat sources for ZMR. A few years later, using a scanned cw argon-ion laser as a heat source, Geis et al. [11] obtained well-oriented Si fihns on fused silica substrates with surface-relief structure. This technique graphoepitaxy was also shown [12] to work with stationary graphite heaters. An encapsulating Si02 layer was found necessary to induce <100> crystallographié texture in graphoepitaxy [12]. Meanwhile, using a scanned cw Nd-YAG laser of large aspect ratio, Fan et al. [13] obtained well-oriented Ge films by crystallization on fused silica substrates without any surface-relief structures, We have subsequently developed a ZMR technique that produces large-area, large-grained or —

—

even single-crystal Si films on SiO2 without the use of surface relief structures. This technique cornbines certain features of our earlier work, specifically the use of an encapsulating layer [12], a scanned long narrow heated zone [1,9,13], and graphite heaters [12]. In this paper, we will review both the material properties and electrical characteristics of Si films recrystalized by this technique.

2. Experimental procedures In the new ZMR technique, as first reported [14] in 1980, we use two graphite heaters: a stationary sheet and a narrow movable bar. The advantages of graphite heaters include their ready scalability in area to conventional wafer size and their low capital cost [15]. They are energy efficient and easily machinable to various shapes. In addition, these heaters can provide easily programmable temperature-versus-time profiles, which are important for many applications. By adjusting the peak temperature, which is easily controllable, we can heat the surface of a semiconductor wafer to either above or below the melting point. Graphite strips are quite inert; however, oxygen will attack heated graphite. This is easily prevented by evacuating the heater chamber and refilling it with an inert gas such as Ar or N2. Several ZMR systems have been constructed. The most recent one [16] can routinely recrystallize samples up to 3 inches in diameter. This system employs a standard 18 inch diameter vacuum chamber with eight 2.5 inch diameter ports that allow easy access. The top of the chamber has a 5 inch diameter optical quartz window for visually monitoring the recrystallization process. The top, bottom, and side wall of the chamber are water cooled. The bottom graphite heater is about 18 cm long, 10 cm wide, and 0.1 cm thick, while the dimensions of the upper heater are about 11 X 0.25 X 0.1 cm. A sample wafer is placed at the center of the lower heater. The upper heater is located about 1 mm above the wafer surface, with its 0.25 cm dimension normal to the surface. Both heaters are resistively heated by alternating currents (or more recently, by direct currents) up to a

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few hundred amperes that are monitored and controlled by a microprocessor. Temperatures at the center and edges of the wafer are measured by three Pt/Pt—13% Rh thermocouples imbedded in the lower heater, The substrates we use are mostly single-crystal <100> Si wafers that have been overcoated with thermal Si02 0.2—1 ~tm thick. An amorphous or

3. Material properties

finely-polycrystalline Si film 0.5—0.8 ,zm thick is deposited at 610°C over the entire substrate by chemical vapor deposition (CVD) followed by a 2 ~tm thick CVD Si02 layer. A 30 nm thick film of Si3N4 is RF-sputtered over the Si02 cap. The role of such a dual dielectric (Si3N4/Si02) encapsulating layer will be discussed later. A typical recrystallization process begins by placing the sample in the middle of the bottom heater, with the Si film facing up. The recrystallization chamber is evacuated by a mechanical pump and then filled with Ar gas. Recrystallization is carried out in flowing Ar at atmospheric pressure. The bottom heater is raised to a temperature of about 1100°C.The upper heater, which is initially located above one edge of the sample wafer, is heated until the suface of the Si film begins to melt, forming a narrow molten zone. The upper heater is then scanned across the wafer at a speed of 1—2 mm/s by means of a computer-controlled motor. The entire Si film is recrystallized by a single scan. The recrystallization procedure has been developed to the point that films covering 3 inch diameter samples can be recrystallized over more than 90% of their area, with no substantial warping. (Warping has been measured [17] to be about 10 ~sm over 3 inch diameter recrystallized wafers mounted on a vacuum chuck.) The recrystallized films are examined by a variety of material characterization techniques, including optical microscopy, an etch-pit technique [18], transmission electron microscopy (TEM), scanning electron microscopy (SEM), reflection-high-energy-electron diffraction (RHEED) and Rutherford backscattering (RBS). The electrical properties are obtained by Hall measurements, resistivity measurements, MOS capacitor measurements, and measurements on MOSFETs. We will first discuss the material properties of the recrystallized films, and then consider their electrical properties.

3.1. Seeded growth

Although the basic recrystallization process is the same for all our growth techniques, the material properties of the films produced by these techniques do vary somewhat. We will first discuss seeded growth, followed by unseeded growth.

3.1.1. Multiple seeds, two heaters For seeded growth, we first used [14,19] samples with parallel stripe openings in the insulating layer. Single-crystal Si wafers were overcoated with 0.2 ~tm thick CVD SiO2 or Si3N4. Stripes 3.5 ~.tm wide and 50 ~smapart, perpendicular to the <110> direction, were opened in the SiO2 or Si3N4 were then recrystallized in the manner described earlier, with the upper graphite heater moved in the direc-

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tion parallel to the stripe openings in the growth mask. Most of the experiments were performed on

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J. C.C. Fan ci a!. / Graphite -strip - heater ZMR of Si films

capped films, although the uncapped films were found to be slightly oxidized and have rougher surfaces. Only results for capped samples are discussed here. To prepare these samples for characterization, the Si02 cap was removed by etching with HF. A few samples were subsequently etched with a mixture of I-1N03, HF and HAc, which removed about 1000 A of the Si film, in order to delineate the crystal defects, Our characterization results show that along the trailing edge of the molten zone the solidification process began within each stripe opening, where single-crystal growth was seeded by the Si substrate. Growth within the opening was followed by lateral growth over the insulating layer on both sides, which continued until the growth fronts met the fronts originating from the adjacent openings. Growth is driven by the extraction of the heat of fusion through the substrate. This process, which we call the LESS technique [19] (lateral epitaxy by seeded solidification), yielded single-crystal films in whichBetween few crystal defects were by etching. the openings these revealed films were smooth except for some surface features formed midway between adjacent openings at the intersections between growth fronts. Fig. 2a is an optical interference micrograph of the as-solidified surface of such a film. The parallel stripes show that the depresssions in the film surface located over the stripe openings in the SiO 2 were retained during melting and solidification. The surface features midway between the openings are either linear or circular. The linear features were found by TEM to be formed by dislocations, probably caused by a very slight misorientation of the adjacent fronts. The circular features are dislocation clusters probably caused by the volume expansion that occurs when molten Si freezes. Fig. 2b is a RHEED pattern obtained for another typical Si film crystallized in the same manner. The sharp Kikuchi lines in this pattern, which were generated by a region of the film that grew over the SiO2, indicate that the film is of good crystalline quality. This finding is confirmed 4 + by results of RBS experiments on the same film.theThe diameter of the He ion beam used in these experiments was about 1 mm, so that each measurement characterizes a region of the film .

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produced by growth originating within about 20 stripe openings. The data for two such measurements are shown in fig. 3, where the open and closed circles show the backscattering spectra obtamed when the beam was incident in a random crystallographic direction and in the <100) channeling direction, respectively. The minimum channeling yield (Xmin) is about 5.4%, only slightly higher than the value of 4% obtained for bulk single-crystal Si. The RBS results suggest that the recrystallized Si films are very well oriented. This is in contrast to recrystallized Si films obtained either with a single seed or without seeding. For the latter films,

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J. C. C. Fan ci a!. / Graphite-strip - heater ZMR of Si films

which contain subgrains, no ion channeling can be obtained. (The subgrains will be discussed in a later section.) The absence of subgrains in the multiply seeded films was confirmed by etch delineation. In a number of experiments where the upper strip heater was moved parallel to the stripe openings in the growth mask, as described above, the LESS technique was successfully applied to other types of samples. In these experiments continuous single-crystal Si films were grown over SiO2 or Si3N4 masks with openings 500 p.m apart on <100)Si substrates. The results obtained [14,19] with Si3 N4 masks are especially interesting, since ~ingle-crystal growth was observed in some areas for distances up to 4 mm beyond the stripe openings. The growth was still limited since during zone melting the Si films has a tendency to agglomerate (bead up) in regions outside the stripe openings, frequently causing lateral overgrowth to be interrupted and making the surface very rough. The presence of stripe openings stops the agglomeration. The Si3 N4 mask also apparently reduces the tendency of Si to agglomerate. Unfor-

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tunately, the electrical properties of an Si—Si3N4 interface are inferior to those of an Si—SiO2 interface [20]. In a few of the LESS experiments on samples incorporating SiO2 growth masks with stripe openings 50 ~tm apart on (100)Si substrates, the upper strip heater was moved in the direction perpendicular to the openings. In these experiments singlecrystal films were grown over the SiO2 by seeded lateral solidification associated with the formation of a molten zone parallel to the openings. Solidification between two adjacent openings took place by the motion of a single growth front that originated within one of the openings and moved in the same direction as the moving strip. Therefore suface features were not formed midway between the two openings, as they were when the upper heater was moved parallel to the openings. Fig. 4 is an optical micrograph of one area of a LESS sample obtained in this manner. There are no surface features except near the edges of the stripe openings, where some mass-transport features are barely visible. Very few defects are revealed by etching.

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Fig. 4. Optical micrograph of a single-crystal Si film obtained by using the LESS technique with the upper stripe heater moving in the direction perpendicular to the stripe openings.

J.C.C. Fan ci a!. / Graphite-strip -heater ZMR of Si films

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3.1.2. Multiple seeds, single heater In addition to using the two-heater technique, we have also performed LESS experiments with a single stationary graphite heater [21]. Fig. 5 shows a stationary graphite-heater configuration and the cross-sectional diagram of a typical sample. The sample was placed on a graphite sheet with the Si film facing down. The graphite sheet was in turn placed on a woven graphite cloth that was clamped

Si substrate was restricted to a thin surface layer, and reproducible growth was obtained. The Si films obtained by the single-heater technique were quite smooth, except for some features formed at the intersections of the growth fronts from adjacent openings. Such features are shown in fig. 6a, which is an optical micrograph of an as-solidified film taken after removal of the Si02 cap. The linear features are similar to those

between the two electrodes. The low thermal mass of the graphite cloth allows rapid heating and cooling, but because of its woven pattern the cloth is not uniform in temperature. Use of the graphite sheet greatly reduces the temperature variation across the sample. A typical time—temperature profile used for LESS processing is shown at the lower right of fig. 5. The temperature was measured by a thermocouple embedded in the graphite cloth. Stepped heating and cooling were used to reduce the formation of slip planes, which were produced when heating and cooling were abrupt. The sample was observed visually during heating and cooling. With the time—temperature profile used, any melting of the

observed in the two-heater LESS technique, except that they are usually not midway between the adjacent openings. In some areas even delineation etching did not reveal intersections betwen adjacent fronts. In these areas solidification of the film between adjacent openings probably took place by the motion of a single front that originated within one opening and moved to the other opening, in the same manner as in those two-heater LESS experiments in which the upper strip heater was moved perpendicular to the long axis of the openings. Note, however, that the single-heater technique involves the simultaneous melting of the entire Si film; directional solidification is due to preferred nucleation on the exposed areas of the

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substrate and the presence of lateral temperature gradients in the film, rather than to the controlled motion of a molten zone. Thus the single-heater method is not actually a ZMR technique. We describe it in this paper because of its close experimental relationship to the multiply seeded, twoheater LESS technique. For the recrystallized Si films which have been etched to delinate crystalline defects, optical micrographs show that in some areas there are a few microtwins originating within the stripe openings and propagating along <110) directions over the SiO2 layer. These twins are shown by TEM observations to be bordered by (111) planes. Other

than the twins and the dislocations formed near intersections between the fronts, very few defects were revealed by either TEM or etching. The depressions in the Si film surface located over the stripe openings were retained during melting and solidification. This is demonstrated in fig. 6b, which is a SEM micrograph of a cleaved cross section of the sample of fig. 6a, that had been etched with HF in order to delineate the SiO2 mask. It is apparent that the mask retained its integrity during the LESS processing. About half the 2 p.m thick Si02 cap remained after the HF etch. The Si film is about 0.6 p.m thick. Other SEM micrographs show that the surface of the Si film near the stripe openings is smooth except at the intersections between the growth fronts, where there are ridges a few hundred angstroms high. The Si films prepared by the one-heater technique have also been characterized by RBS measurements. Fig. 7 shows the results of such a measurement made on the film of fig. 6 in an area where intersections between the fronts were observed. The open and closed circles show the spectra obtained when the beam was incident in a random crystallographic direction and in the <100> channeling direction, respectively. The minimum channeling yield at the surface (Xmin) is about 6%, not much higher than the value of 4% obtained for bulk single-crystal Si (also shown in fig. 7) and comparable to values measured for samples prepared by the two-heater LESS technique. The channeling yield increases to about 10% at the Si—Si02 interface. The dip in the random spectrum near 0.75 MeV is due to the presence of the Si02 mask, which has a lower Si concentration than elemental Si. At the position of this dip the aligned yield is a little lower than the random yield because of the single-crystal Si located within the stripe openings. Fig. 7 also shows the channeling spectrum for the 0.6 p.m thick Si film of a commercial siliconon-sapphire (SOS) sample. While X mm is only about 8%, the channel yield increases to over 50% at the Si—sapphire interface, much larger than that at the Si—SiO2 interface in the LESS sample. This mdicates that the crystal quality is better at the Si—SiO2 interface than at the Si—sapphire interface. Furthermore, the yield at the Si—Si02 interface for the

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LESS sample is about a factor of 2 lower than the value reported for an SOS sample with a Si film, 0.6 p.m thick, that had been improved by ion implantation followed by thermal annealing [22]. 3.1.3. Si3N4 / Si02 composite cap Both the one-heater and two-heater LESS techniques result in the growth of single-crystal Si films over SiO2, and smooth LESS films are obtamed over closely-spaced stripe openings. However, the distances of seeded growth away from the stripe openings are still limited to a few millimeters over Si3N4, and less over SiO2, primarily because of agglomeration. Agglomeration is eliminated by means of a composite Si3 N4/SiO2

cap [23]. The effectiveness of this type of cap was discovered in an experiment in which it was intended to coat the Si film with a thin Si 3N4 film and then with a 2 p.m thick Si02 cap, but the deposition sequence was reversed. Since the Si 3N4 is separated from the Si film, there is no Si3 N4—Si interface problem. The role of the Si3N4 film in preventing agglomeration is not well understood. Pinizzotto et al. [24] have reported that only a 2 p.m thick Si02 cap without Si3N4 is needed for ZMR using procedures very similar to ours (although nitrogen has been detected [25] in their SiO2). We have used Auger electron microscopy to examine several composite caps before and after

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ZMR. As-deposited samples showed distinct layers of Si3N4, SiO2 and Si, with a small amount of oxygen on the Si3 N4 surface. Figs. 8a and 8b show the Auger profiles of different areas of a good Si3 N4/Si02 cap after ZMR. The profile of fig. 8a was taken in a region (labeled D in the optical micrograph of fig. 9) where the sample had been heated to about 1000°C. This profile is almost identical to the as-deposited profile of the same cap determined in a separate experiment. The profile of fig. 8b was taken in a region (labeled A

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the cap had been heated above the melting point of Si (— 1420°C).The Si peak-to-peak amplitude in Si 3N4 is much reduced and the underlying Si02 is much closer to the surface. It is not clear whether a thin layer of Si3N4 (— 10 nm) was vaporized during ZMR, or whether oxygen diffused into Si3N4 from Si02 and nitrogen diffused into SiO2 from Si3N4. However, since the N peak-to-peak amplitudes near the surface are the same in figs. 8a and 8b, the vaporization hypothesis is more likely. The Auger profiles for regions B and C of fig. 9 are very similar to the profile of region A, but there is considerably more carbon on the Si3N4 surface in region B. It should be noted that no Si melting had occured in region C, while region B is the transition region between the melted region and the unmelted region. (The upper graphite heater was scanned from right to left and stopped between A and B.) The four distinct regions (A, B, C and D) are always observed in our samples. From our experience, the best Si3 N4 layers for the composite caps are RF-sputtered and Si rich in composition, a!-

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Si3N4/Si02 cap after ZMR. The Si3N4 layer ( — 30 nm thick) was deposited by RF sputtering and the SiO2 layer by CVD. The profiles shown in (a) and (b) were taken in the regions D and A, respectively, illustrated in fig. 9. The profiling was done with Ar-ion sputtering. Only peak-to-peak amplitudes are plotted, and the background values for C and N after 3—4 mm of sputtering are due to instrument noise,

changes in the composite caps occur during ZMR, and additional studies may provide further insights into the role of the composite cap. Although we have speculated [26] on different possible

mechanisms, we currently feel that the Si3N4 layer enhances the mechanical strength and stability of the 2 p.m thick Si02 layer. It appears that even thin layers of Si-rich RF-sputtered Si3N4 must be very strong. (We have found that 30—40 nm is a

good thickness range for the Si3 N4 layers, although layers as thin as 10—20 nm have been quite

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effective.) It seems unlikely that incorporation of N or C into the SiO2 cap layer is responsible for increasing its stability, since these elements were not detected by Auger analysis even when we sputtered this layer all the way to the Si02/Si interface. However, because of the surface roughness induced by the Ar ion-beam sputtering, we cannot eliminate the possibility that N or C is present in a very thin region at the interface, 3.1.4. Single seed, two heaters Whatever the reason for the effectiveness of the composite cap, the utilization of this cap has allowed us to introduce three new seeding techniques. Fig. 11 shows the heater configuration and two of

the three seeding procedures used [27]. The first procedure, which accomplishes seeding by means of a single stripe opening in a recessed SiO2 growth mask, employs the sample structure shown in fig. ha. The processing steps used to obtain the recessed structure have been described elsewhere [27]. The sample structure for the second seeding, procedure, which employs an external Si seed, is shown in fig. lib. This structure is similar to the one shown in fig. ha except that the <100) Si substrate was completely masked with thermal Si02 before deposition of the poly-Si film, the Si3N4/SiO2 cap was etched away along one edge of the sample to expose the poly-Si film, and a narrow strip cut from a <100) single-crystal Si

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The new LESS experiments were performed similarly to those described earlier. In each run the bottom graphite sheet was heated to 1000—1100°C. The upper graphite strip, which has its long axis parallel to the long direction of the stripe, was then scanned across the sample at a speed of 1—2 mm/s, causing the molten zone to traverse the sample. The Si films prepared by both single-seed procedures have mirror-smooth surfaces. To confirm

.

seeding procedures used in the LESS process for growth of large-area Si sheets over SiO2.

/

J. C. C. Fan ci aL

Graphite-strip - heater ZMR of Si films

465

the Si film by using an anisotropic chemical etch [28]. Fig. 12 is an optical micrograph showing the

that the films have very few other crystallographic defects. The use of a recessed SiO2 layer adjacent

grid obtained for a LESS film prepared by the single-seed procedure with recessed SiO2. The square shape of the pits indicates the <100) texture, and the diagonals of the pits are parallel to <100) directions. The micrograph shows that seeding is very effective, and no large-angle grain boundaries are observed. Although grain boundaries are not present in these LESS samples, etch delineation does reveal many fine-line defects, typically spaced 20—30 p.m apart, that run parallel to the direction of moltenzone motion (see fig. 13). TEM analysis indicates

to the stripe opening (fig. ha) seems to reduce twin formation, which is occasionally observed near the stripe openings if the Si02 layer is not recessed. Fig. 14 shows a bright-field TEM micrograph for a recrystallized film. Strong (100) bend contours are observed throughout the entire film. In some locations these contours exhibit discontinuities indicating the presence of low-angle boundaries. The defects, which are the fine-line defects shown in fig. 13, are dislocation arrays (see fig. 15) that are associated with angular deviations in orientation of the order of one degree or less.

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f.C.C. Fan et a!. / Graphite- strip - heater ZMR of Si films

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They are thus subgrain boundaries, or subboundaries. Sub-boundaries were also found by .

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Pinizzotto et al. [24] in samples recrystallized in the same manner. In addition, they reported observing SiC particles by bright-field TEM. These particles were eliminated by coating their upper graphite heater with SiC [25]. Although our upper graphite is not coated in this manner, we have not observed such particles. Secondary-ion-mass-spectroscopic (SIMS) analysis of one of our recrystallized Si films showed C and 0 concentrations 17 18 —3 between 10 —10 cm while the N concentration was less than iO~cm3.

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(Other mechanisms that have been proposed for We believe that the sub-boundaries are caused the formation of sub-boundaries are discussed in a by paper faceting by Pinizzotto at the liquid—solid in this issue.) interface Fig. 16[26,29]. is an optical micrograph of a film for which the molten zone was quenched during ZMR, thereby revealing the general morphology of the liquid-solid interface. The sub-boundaries are seen to originate at the interior corners of the faceted interface; .

thus if the lateral locations of the facets can be fixed, the sub-boundaries can be aligned along lines parallel to the scanning direction. Such an

f.C.C. Fan et aL

/

Graphite-strl~i- heater ZMR of Si films

467

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entrainment of the sub-boundaries has been accomplished [29] by using a periodic grating on the surface of the cap to spatially modulate the temperature in the recrystallized film. Normally, no entrainment is used, and sub-boundaries appear as in fig. 13. Because of the presence of subgrains, no RBS channeling is observed for the singly seeded films. Patterns obtained for such films by RHEED, which samples much larger areas than TEM, contain multiple diffraction spots. As discussed earlier. recrystallized Si films over closely spaced stripe openings show good RBS channeling and excellent RHEED patterns, As an alternative to etch delineation, subgrains can be revealed non-destructively by scanning electron microscopy operating in the backscattering mode. The misorientations between the subgrains result in distinct contrasts, as illustrated in the micrograph of fig. 17. This micrograph also shows protrusions, several micrometers across and less than 1—2 p.m high, that are located along the sub-boundaries. The sample was selected for illustration because of the presence of relatively large protrusions. Generally, protrusions are much

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smaller. Sub-boundaries and protrusions are usually absent from a band about 50 p.m wide at the begining of the seeded region [16]. (This explains the absence of such defects from films recrystallized by the technique employing closely spaced parallel stripe openings, as described earlier.) Although sub-boundaries always occur after the mitial band, in some filn* protrusions are absent over the entire sample surface. Protrusions are present much less frequently in samples recrystallized in our earlier, smaller system than in our enlarged system. However, samples with very few protrusions have been obtained even in the new system. The origin of protrusions is still not well understood, but we believe that they are related to mass transport effects resulting from the thermal distribution in the samples during zone melting.

468

f.C.C. Fan et aL

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Graphite -strip - heater ZMR of Si films

The third new seeding procedure consists of simply scribing a -narrow opening, near one end of the sample, that extends through the Si3N4/Si02

opening and the nearer edge of the sample. When the heater is scanned across the opening, contact is established between the molten film formed just beyond the opening and the exposed surface of the Si wafer, which seeds the solidification of the melt as the heater moves away. After recrystallization the sample wafers are not visibly warped, and warping is measured [17] by interferometer to be about 10 p.m over 3 inch diameter recrystallized wafers mounted on a vacuum chuck. Because of the thermal stress inherent in ZMR, however, the Si wafers often show slip planes although the recrystallized Si films themselves do not. These slip planes occur during sample cooling after ZMR, and the presence of the Si02 layer apparently prevents them from propagating into the recrystallized films. Also, the Si films are so thin that slip would not be expected to originate in the films. While the presence of slip planes in the Si wafers does not interfere with our device processing procedures, slip planes can in-

cap, the Si film, and the Si02 layer to the
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f.C.C. Fan et aL

/

Graphite. strip -heater ZMR of Si films

crease sample breakage during handling, and careful thermal cycling must be used to minimize their formation. We have not succeeded in completely elminating the occurrence of slip planes over 3 inch diameter Si wafers during ZMR. The recrystallized films remain visually mirror smooth, but they differ in reflectivity from the as-deposited films. This difference is apparent in the photograph of fig. 18, where it can be seen that almost all of the film was recrystallized (over 95% of the wafer area), with only regions at the beginning of the heater scan and around the edge of the sample remaining unaffected. As in the two other procedures using a single seed, sub-

469

boundaries are always observed and protrusions are sometimes present. Almost all’-our seeding experiments have been performed on <100) Si wafers. However, a few preliminary experiments have been carried out on <111) Si wafers that were mechanically scribed with a stylus. Within a narrow region (a few tens of micrometers) near the scribe opening, part of the recrystallized Si film has <111) orientation, but then the film quickly twins to approximately <100) orientation (see fig. 19), suggesting that the the composite cap has drastic effect on the texture of the recrystallized films. The effect of the cap on film texture is, however, most clearly demon-

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470

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Graphite-strip.heater ZMR of Si films

films with almost no preferred orientation. These experiments were carried out in an Ar atmosphere. When Si films were recrystallized in ambient air, however, a distinct <100) texture was obtained [11], Auger analysis showed that an oxide layer, about 100 nm thick, was formed on the Si surface during laser heating in air. It appeared that the thin 5i02 layer played a key role in obtaining film

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strated when ZMR is performed without seeding [26]. 3.2. Unseeded growth In our early experiments on unseeded laser recrystallization of Si films on fused silica substrates, without [9] or with [hi] surface relief structures, we obtained large-gramned polycrystalline

(a)

cap, together with surface relief structures on fused silica substrates to orient the textured crystallites in the substrate plane, graphoepitaxy was achieved [12]. An alternative method [9,30] for achieving orientation in the plane of the substrate is to use a scanning slit-like energy beam (see fig. 20). This concept has been well demonstrated [23,31] in our unseeded ZMR experiments using the two-heater technique. The sample configuration is similar to

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texture. This was confirmed by a later experiment, in which Si films coated with a 90 nm thick CVD Si02 layer also showed <100) texture upon recrystallization in an Ar atmosphere. By using the Si02

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Fig. 21. Optical micrographs of the starting end of a region recrystallized by the two-heater technique. A grid array of etch pits has been etched into the Si film, which has also been etched to reveal the grain boundaries and sub-boundaries. (a) Highly magnified view and (b) low-magnification micrograph. Reflection of the light beam from facets of the etch pits makes crystals with different orientations stand out distinctly.

f.C.C. Fan et aL

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Graphite. strip - heater ZMR of Si films

the basic configuration used for seeded ZMR growth: a <100)Si wafer is coated successively with a thermal Si02 layer (1 p.m thick), a Si film (0.5—0.6 p.m thick), a CVD Si02 cap (2 p.m thick) and a Si3 N4 cap (30 nm thick). However, there is no seeding from the underlying Si wafer or from an external seed. After unseeded ZMR, the surface of the Si films remains smooth, except in some instances near the beginning and end of recrystallized regions. (Also, like the seeded films, some of the unseeded films have protrusions.) Fig. 21a is a high-magnification optical micrograph showing the starting end of a recrystallized film that has an etch pit grid and has also been etched to delineate grain boundaries and other defects. Three areas are clearly discernible: an area of very fine grained Si that was not melted, a transition region with larger grains, and an area where the Si film was completely melted and recrystallized. The square shape of the pits indicates the <100) texture, and the diagonals of the pits are parallel to <100) directions. Away from the transition region there are two large grains, both with <100) texture, that are rotated to one another by about 45° in the plane of the substrate. The fine-line defects within the grains are the sub-boundaries. Fig. 21b is a micrograph showing a larger area of the same recrystallized sample. The variation in the intensity of light reflected from the facets of the etch pits makes the individual grains stand out distinctly. This figure shows that recrystallization is seeded from the transition region. Within a few millimeters of this region, grains that have <100) texture and have their [100] direction, or <100) axes, close to the scanning direction of the upper strip heater dominate the film. A few millimeters away from the transition region, fig. 2ha shows a boundary region between two grains, and the angle between the diagonals of the etch pits in the two grains is the grain-boundary angle. As can be observed in fig. 2hb, the grains grow to a few millimeters in width within a short distance from the transition region, after which their width remains relatively constant and their length increases rndefimtely as long as growth is not interrupted. These larger grains are generally oriented within 20°of each other in the plane of the

471

substrate. Fig. 22 shows the measured distribution of the angles between the <100) axes of the vanous grains and--the scanning direction of the upper heater as a function of distance from the transition region [31]. These data were obtained from the alignment of the etch pits in the grid array. Clearly, the angular distribution narrows a few millimeters beyond the transition region. In contrast, when the pit-grid technique is applied to seeded ZMR samples, the square pits are found to be aligned immediately after seeding (see fig. 23) and reflected light shows little contrast, indicating the absence of grain boundaries. However, as stated above, sub-boundaries are present in areas more than about 30—50 p.m away from the seeds.

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472

f.C.C. Fan et aL

/

Graphite- strip - heater ZMR of Si films

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i.C.C. Fan et aL

/

- -

Graphite strip heater ZMR of Si films

The well-oriented growth of unseeded ZMR films in large measure depends on the formation of the (100) texture. The Si3N4/Si02 cap is important, therefore, not only because it minimizes contamination and stops the Si films from agglomeration, as in seeded growth, but also because it provides a smooth surface and induces the (100) texture. The first two functions have been discussed earlier. The smoothness of the film surface depends strongly on the thickness of the Si02 cap layer and on the width and velocity of the molten zone. In our experiments, the width of the molten zone is about 1 mm and the upper graphite heater is generally scanned at 1—2 mm/s. A much faster scanning speed makes visual control of the recrystallization process difficult and also causes dendritic growth; a much slower speed decreases the throughput and makes it difficult to avoid overheating the samples. At the optimum scanning

473

speed of about 1 mm/s, a 2 ~tm thick Si02 cap layer is very effective in providing a smooth recrystallized surface. Fig. 24 shows optical micrographs of recrystallized Si films obtained with two thicknesses of the Si 3N4/Si02 cap [26]. The thickness of the Si3N4 layer was kept at 30 nm. For a 0.2 ~tm thick Si02 layer, the surface of the Si film is highly faceted; the film is still mostly (100) textured, though not as well as in the case of a 2 ~im thick cap. The surface of the recrystallized film is smooth for the 2 ~tm thick Si02 cap. As discussed earlier, the Si solidification front tends to be faceted in the plane of the Si film (see fig. 16). The thicker cap apparently prevents the surface of the Si from becoming faceted as well. The exact manner in which the cap induces texture is not well understood. (Note that the Si02 cap alone can induce texture, while the Si3N4/Si02 composite cap is required to avoid agglomeration.)

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474

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Graphite. strip -heater ZMR of Si films

The <100) texture is observed [26] both for the material solidified from the molten zone and for the adjacent transition region (see fig. 2ha), typically between 0.1 mm and a few millimeters wide, that is formed between the fine-grained polycrystalline Si (grain size <0.5 p.m) and the initial molten zone. Seeds for solidification of the molten zone are provided by the transition region. The predominance of <100) texture in the transition region was established by X-ray diffraction [26]. The ratio of the film volume having <100) texture to the volume with (110) texture was determined from the magnitudes of the (400) and (220) X-ray peaks after correction for the Si film thickness. This ratio is 80 in the transition region but less than 1 for the fine-grained polycrystalline Si adjacent to the transition region. The <100) texture predominates in the transition region even for encapsulating layers as thin as 0.1 p.m. One possible explanation for the <100) texture is that the interfacial free energy between Si and Si0 2 may be a minimum for the ~h00} planes. Another is the presence of thermal stress that is inherent between Si and Si02. Texturing observed in evaporated or attributed Cu films deposited on stress glass substrates has Au been to thermal occurring during evaporation [32]. Another possibility is that the stress produced in the Si film (in the vicinity of liquid—solid interface) transverse to the long axis of the molten zone could provide the elastic strain energy to induce the (100) texture during solidification, as well as to orient the recrystallized grains in the plane of the substrate. As early as 1975, we proposed [9] that a scanning slit-shaped heat source such as a laser could produce the stress effect leading to oriented growth. In summary, seeded and unseeded ZMR Si films have similar material properties. Both types of films, except those seeded by closely spaced stripe openings, contain large numbers of subboundaries and in some instances protrusions. The unseeded films also contain grain boundaries, However, these are spaced too far apart to have a significant effect on the properties of our test devices and circuits. For convenience, therefore, we have made all our electrical and device measurements on unseeded samples that were selected to have few protrusions. Our devices were fabri—

cated on 2 inch diameter or smaller samples, and the small amount of warping did not have any significant effect on our processing procedures or yields. We are currently developing processing procedures for 3 inch diameter samples.

4. Electrical properties 4.1. Majority-carrier transport Sub-boundaries are the predominant defects in ZMR Si films. We have studied their effects on carrier transport by experiments on thin-film resistors and n-channel MOSFETs [33]. Thin-film resistors with dimensions of 18 x 180 p.m were fabricated in n-type recrystallized films with carnier concentrations of 1 or 2 x 10i7 cm3 obtained by implantation of p + ions. The resistor bars were oriented with their long axis either parallel or perpendicular to the sub-boundaries. Resistance measurements were carried out over the temperatune range between —20 and 80°C. For resistors parallel to the sub-boundaries, the resistance is 3~2,the same temperature depenproportional to T Si. For resistors perpendicular to dence as for bulk the sub-boundaries, the resistance also increases monotonically with temperature but is slightly higher and has a more complex temperature dependence. The difference in resistance between the perpendicular and parallel devices, which is quite small, is contributed by the sub-boundaries. This contribution has been analyzed [33] by using the charge-trapping model for potential barrier formation. The trapping state density determined for the sub-boundaries is 7 hO~cm2, substantially lower than the values of (2—4) x hO~cm2 observed for grain boundaries in CVD poly-Si films. The effect of sub-boundaries on carrier transport has also been studied by measuring the surface electron mobility in two sets of n-channel, polysilicon-gate MOSFETs with configurations such that electron transport is parallel to the subboundaries in one set and perpendicular to the sub-boundaries in the other. Each set has about 100 devices. The fabrication procedures have been described elsewhere [33]. The gate oxide is about 100 nm of thermal Si0 2. The uniform <100> tex—

X

f.C.C. Fan et al.

/

Graphite -strip - heater ZMR of Si films

ture obtained in ZMR permits the growth uniform thermal oxide layers necessary for reproducible device performance. devices haveboron a gatedoping length and width of 45 p.mThe and channel concentration of 5 10~cm ~. The devices with electron transport parallel to the sub-boundaries exhibit an average mobility of 647 cm2/V. s, while the corresponding values of the other set are 635 cm2/V. s. The difference in mobility is small, consistent with the sub-boundary parameters determined from the data for thin-film resistors. Since the electron concentration in the strongly inverted surface layer of MOSFETs is quite high (>lois cm3), the sub-boundary resistance in this layer is quite small. Consequently, the mobilities observed in these devices are comparable to those in single-crystal Si devices with the same doping concentration. Although sub-boundaries do not have a significant effect on majority-carrier transport, MOSFET performance might be degraded by enhanced dopant diffusion occurring along the subboundaries during device fabrication. For narrow-channel MOSFETs fabricated in laser-recrystallized Si films, dopant diffusion along grain boundaries has been found to result in shorting between source and drain or in high source-to-drain leakage currents [34]. We have fabricated n-channel MOSFETs with gate lengths ranging from 2 to

X

45 p.m in ZMR films. Source and drain dopant activation was accomplished by annealing at 900° for 30 mm. The surface mobilities these 2/V. for s. Fig. 25devices shows are between 600 andleakage 650 cmcurrent as a function the source-to-drain of gate length. The leakage current is extremely low (— (4—5) x h0 i3 A) and nearly independent of gate length down to 2 p.m, the shortest gates that we have fabricated. This result indicates that dopant diffusion is not greatly enhanced by the sub-boundaries. The lower interface between the recrystallized Si and the thermal SiO2 has been studied by measuring the back-channel transistor characteristics. The back surface mobility is found to be similar to that of the front surface, and the oxide charge density at the lower interface is quite low (— 1 X hO~ cm _2), These results are consistent with our earlier results for n-channel deep-deple-

475

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lion MOSFETs, fabricated in ZMR Si films, where the device channels were lightly doped to electron concentrations of (1—3) x 3. By driving cm and accumuthese MOSFETs into both 10i5 depletion lation modes, we have found [35] that the surface mobilities are nearly constant all the way down to the lower Si—Si0 2 interface. For deep-depletion devices fabricated on commercial SOS samples the high density of crystal defects at the Si—sapphire interface results in a sharp decrease in mobility from about 400 cm2/V. s near the surface to less than 100 cm2/V’ s at the interface. The difference in quality between the Si—Si0 2 and Si—sapphire interfaces is consistent with our RBS results shown in fig. 7. The lower Si—Si02 interface is thus device-worthy, and it should be suitable for the fabrication of three-dimensional devices an important application of SOl technology. Although we have not studied the effects of grain boundaries on the electrical and device properties, Maby and Antoniadis [36] have examined these defects in their films recrystallized in the same manner. They found that the grain boundaries, unlike the sub-boundaries, do cause a significant reduction in conductivity and produce detrimental effects in MOSFETs. —

476

f.C.C. Fan et al.

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Graphite- strip - heater ZMR of Si films

4.2. Minority-carrier generation lifetime

to values of 2p.s for similarly doped layers grown on single-crystal Si(100> wafers prepared in a parallel run. The sub-boundaries in the recrystallized Si films and epilayers do not seriously degrade the lifetime, although devices with higher sub-boundary densities appear to have smaller lifetimes. The relatively high lifetime values indicate that ZMR does not introduce significant amounts of impurities into the Si films despite its high processing temperature. The lifetime values also suggest the possibility of bipolar device applications utilizing SOI structures prepared by ZMR, although the presence of sub-boundaries does cause uneven growth in the Si epitaxial layers. —

Planar MOS capacitors have been fabricated [27] in ZMR Si films and in epitaxial Si layers grown by CVD on top of the recrystallized films, Fig. 26 shows a photomicrograph and schematic cross-section diagram of a capacitor fabricated in an epilayer. The pulsed MOS capacitor method was used to measure the minority-carrier generalion lifetimes. For n-type recrystallized films with a carrier concentration of 1 h0’~cm3, the lifetimes are 0.2—0.5 p.s. For n-type recrystallized films epilayers with a carrier concentration of 2 X 3, the lifetimes are 0.8—1.3 p.5, compared 10i5 cm

X

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Graphite-strip-heater ZMR of Si films

4.3. Effect of thermal stress

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ZMR of poly-Si films deposited on SiO2-coated Si substrates. We have also utilized the two-heater technique for ZMR of poly-Si films deposited on SiO2-coated fused silica and sapphire substrates [38]. Because their substrates are transparent, these types of samples should be especially useful for flat-panel displays. The crystallographic properties of the recrystallized films are similar to those of the films on Si substrates. However, since the thermal expansion coefficient of Si is 5—10 times that of fused silica but only 40—50% that of sapphire, the Si films recrystallized on fused silica substrates are under a large tensile stress while compressive stress (see fig. 27). The thermal stress those on sapphire substrates are under a large parallel to the surface, as determined from lattice constant measurements made by X-ray diffraction analysis on several films of each type, averages + 9.6 kbar for films on fused silica and 10.2 kbar for those on sapphire, where the “+“ sign denotes tensile stress [38]. The films recrystallized on Si02-coated Si substrates are nearly stress free, as expected. The Hall mobilities of majority carrier have been measured by the Van der Pauw technique on n- and p-type films that doped by implanta2 ~were and B~ions, respec tion offollowed 5 x 10~~ tively, bycm furnace annealing at 950°Cfor 30 mm. Implantation and annealing did not cause a detectable change in either surface morphology or stress in the films. Fig. 28 shows the Hall mobility as a function of thermal stress. For the films on fused silica, the electron mobility is 74% higher and the hole mobility 14% lower than the corresponding values in unstressed Si films. For —

mobility the sign, films withof 10% onelectron sapphire, higher than thethose changes 35% of unstressed lower are opposite and hole in Because the largemobility stress enhancement, the films. electron mobility in the films on fused silica, 870 cm2/V’ s, is even higher than the value of — 750 cm2/V’s measured for bulk single-crystal Si with the same carrier concentration. Since the recrystallized Si films have (100> texture and a high degree of in-plane orientation,

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their electrical properties can by expected to approximate those of (100> Si single-crystal films that are under isotropic two-dimensional stress. For such a single-crystal film the relative change in -_____________________________________ 1200

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478

f.C.C. Fan et al.

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Graphite-strip -heater ZMR of Si films

mobility can be calculated from known piezoresistance coefficients. These mobility values (solid curves in fig. 28) are in agreement [38] with the experimental results, The large mobility enchancement for electrons in recrystallized films on fused silica has been confirmed by the characteristics of n-channel

circuits, we have investigated the effects of irradiation with 1.5 MeV electrons and Co-60)’ rays on their leakage current and threshold voltage. Very promising results have been obtained [43] by irradiation and operation with a negative bias applied to the Si substrate in order to reduce the effect of charge trapping in the SiO2 layer on the

MOSFETs. The2/V. surface s forelectron devices mobilities fabricatedare in about cmsilica, while devices fabricated in films on1050 fused films on 5i0 2-coated Si substrates havearesurface 2/V. s, which cornmobilitiestoof about 620 cmfor single-crystal Si deparable those obtained vices. These results indicate that the stress induced in the ZMR films does not relax significantly during device processing, and this fact has been confirmed by Raman scattering measurements [39]. For n-MOSFETs fabricated in ZMR films on fused silica, the large tensile stress improves device performance, but the stress can crack the films as they are cooled after recrystallization. Cracks were not detected if samples were heated only to — 1000°C. Therefore slow, controlled cooling rates must be used after ZMR to minimize cracking. An alternative method to reduce cracking is to pattern the Si films into islands prior to ZMR to relieve the stress [40].

substrate. (Aforsimilar biasingsince procedure would be impractical SOS devices, it would require extremely high voltages because of the thickness of

4.4. Radiation hardness Silicon-on-insulator MOS devices have several advantages over their bulk Si counterparts as components for radiation-hardened circuits: reduced transient photocurrent, elimination of latchup, increased speed and packing density. Conse quently, SOS devices are used extensively in such circuits. However, SOS n-channel MOSFETs also have an important disadvantage, since ionizing radiation can produce a significant back-channel leak:g: current, which occurs becauseaconduct~ trapped in the sapphire near the Si—sapphire interface [41]. In recently developed SOS materials, the effect of ionizing radiation of the backchannel leakage current is much reduced [42]. To evaluate MOSFETs fabricated in ZMR Si films on Si02-coated Si substrates as possible alternatives to SOS devices for radiation-hardened

theFig. sapphire 29 issubstrate.) a schematic diagram showing the structure of the recrystallized-Si MOSFETs and the bias conditions used during irradiation and characterization. The drain, gate, and substrate biases with respect to ground are represented by VD, VG, and VB, respectively. For comparison, similar devices were fabricated in the Si films (0.5 p.m thick) of commercial SOS wafers. The active region in all the devices was defined by a complete Si island etch isolation. The device channel was doped by ion implantation with 60 keY B + ions to dose of 5 2. There was also a deep 10~~ channel implant ofcm 200 keV B~ions to a dose of 4 2, The gate oxidation was carried out 10i2 C cm at 1000° in a dry 02 ambient containing 3% HC1 and followed by annealing at 1000°Cin N 2 for 2 mm, our standard procedure for MOS fabrication. No attempt was made to prepare radiationhardened oxide. The gate oxide thickness was gen-

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Graphite -strip -heater ZMR of Si films

479

erally 100 nm. The gate width W was 50 p.m. The MOSFETs were irradiated with a 1.5 MeV electron beam from a Van de Graaff generator.

turned off even with a large negative gate bias. For the same dose the subthreshold slope of the devices with V8 —15 V remains sharp and the

Electron doses ranged from 3 x 10~°to 3 x 1013 cm 2 corresponding to ionizing doses from iO~to 106 rad (Si), and bias voltages during irradiation were VD 5 V, VG = 0 V, and VB = 0 or —15 V. Subthreshold leakage current and threshold voltage measurements were performed within 20 mm after exposure. For each device, the VD and VB values were the the same during the measurements as during irradiation, Fig. 30 shows typical subthreshold source—drain I—V characteristics for 6 p.m gate length SOS and recrystallized-Si devices before and after electron irradiation. (Similar results were obtained for exposure to ‘y rays.) For the SOS device, a twoorders-of-magnitude increase in the leakage current and a significant increase in subthreshold slope are observed after 106 rad (Si) irradiation. These results are typical of SOS devices exposed to this dose of ionizing radiation [41]. For the recrystallized-Si devices, the characteristics depend strongly on whether or not the substrate was biased. The devices with VB = 0 become extremely leaky at a dose of 106 rad (Si), and cannot be

leakage current is less than 0.2 pA/p.m (channel width), which is significantly lower than the current after irradiation for the best SOS devices reported. The shifts in threshold voltage in the recrystallized-Si devices are also found [43] to be small. Resistance to radiation should be further increased by using optimized gate oxidation procedures and by reducing the thickness of both the gate oxide and the SiO2 layer (— 1 p.m thick) below the Si film. It should be pointed out that the radiation experiments on the SOI devices were performed under zero gate-bias (VG = 0 V), which is not the worst case for radiation effects. Experiments at other values of gate bias (such as VG = V) are currently under way.

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480

f.C.C. Fan et a!.

/

Graphite-strip - heater ZMR of Si films

capacitance. In order to carry out a more critical evaluation of ZMR films for IC applications, we have designed a CMOS test circuit chip for fabrication in these films. The test chip, which is based on a 5 p.m design rule, contains n- and p-channel transistor arrays, ring oscillators, inverter chains, and various test devices for process control, The objectives of utilizing this design are to assess the uniformity of our SOI films and to determine the speed of SOI/CMOS circuits. Film uniformity is required for obtaining a high yield of functional circuits, while speed is a key parameter in deciding between alternative material technologies for VLSI. The CMOS test chips were fabricated [44] on SOI structures consisting of a 0.5 p.m thick recrystallized Si film, a 1 p.m thick SiO2 layer, and a 1 Q cm p-type Si(100> wafer 2 inches in diameter. The fabrication procedure involves a total of six photomask steps with poly-Si gate and self-aligned ionimplanted source and drain. Fig. 31 is a photomicrograph of a finished SOI/CMOS chip, which measures about 3 x 4 mm. About 100 such chips were fabricated on each of three wafers. A 31-stage ring oscillator with fan in and fan out of one and a 231-stage inverter chain are located at the upper left. A similar circuit, rotated by 90°,is placed at the upper right. The purpose of the rotation is to examine the effects of sub-boundaries on circuit performance. Carrier transport is approximately parallel to these boundaries in one circuit and approximately perpendicular to them in the other. Test transistors, single-stage inverters, gated diodes, capacitors and test patterns are located in the middle portion of the chip. Two n-channel transistor arrays consisting of 360 or 533 parallel devices and a p-channel array consisting of 460 parallel transistors are located at the lower left, Three similar arrays, rotated by 90°,are located at the lower right, To evaluate the uniformity of the recrystallized Si films, we have investigated the performance of all the transistor arrays on a wafer with 98 test chips. Since the transistors in each array are connected in parallel, failure of a single device (such as shorting between source and drain, which is the most common failure mode for such devices) results in failure of the entire array. Of the 588 arrays, 490 were functional while 98 failed because

of source-to-drain short or open circuits. For 62 of the inoperable devices, localized metallization defects such as incomplete etching of the Al (which results in source-to-drain short) or poor contacts (which results in source-to-drain open) were found by microscopic inspection. The total number of transistors in all the arrays is 2.65 1O~.If it is assumed that each of the failed arrays contains one defective device, the transistor failure rate is 3.7 X 1O~,or only 1.4 X iO~if the known fabrication defects are taken into account. The operating characteristics of the functional transistor arrays are quite uniform from chip to chip with small standard deviation (< 3%) [44]. In addition, the arrays in which carrier transport is

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parallel to the boundaries have similar characteristics to those in which carrier transport is perpendicular to the boundaries. Measurements have also been made on all of the 31-stage ring oscillators on the 98-chip wafer. For the two orientations differing by 90°,82 of the 98 oscillators in each set are functional. Again, most of the failures can be attributed to obvious metallization defects. The circuit starts to oscillate at a supply voltage VD of 1.5 V. At VD = 5V, the switching delay time and dissipated power are respectively 2 ns and 0.13 mW per stage, for a power-delay product of 0.26 pJ. The fast operating speed can be attributed to the high carrier mobilities in the recrystallized Si films and the reduced parasitic capacitance of the SOI structure. Again, the two sets of oscillators are very similar. This indicates that the sub-boundaries, despite their large numbers, do not have a significant effect on circuit performance. The yield on inverter chains on the test chips is comparable to the yield of ring oscillators, The performance of the functional chains has been tested by two methods: (1) an input signal is supplied, and the propagated signal is monitored at different output stages, and (2) the input and output are connected together so that the circuit functions as a ring oscillator, The chains exhibit normal inverter characteristics and switching delay times similar to those measured for the ring oscillator circuits, In addition to testing all 98 chips fabricated on one wafer, we have also examined some randomly selected chips fabricated on the

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other two wafers. Their characteristics are similar to those of the first wafer, The high temperatures required for the ZMR process limit the usefulness of this technique for three-dimensional devices. However, if proper care is taken during recrystallization, the process can be employed for some devices of this type, as demonstrated by our success in fabricating dualgate MOSFETs [45].

5. Conclusion A zone-melting recrystallization technique using graphite heaters has been developed for preparing SOl materials. We have already had considerable success in recrystallizing Si films on 3 inch diameter SiO2-coated Si wafers. Our present system can 2/min. recrystallize films at rates of 50—100 Since systemsSiemploying graphite heaters cm can easily by scaled up, we anticipate that even larger wafers can be processed. A composite Si 3N4/SiO2 encapsulating layer is effective in preventing Si from agglomeration, thus ensuring smooth recrystallized surfaces. In addition, the cap induces a strong (100> texture in films recrystallized without seeding. Such films are found to contain widely-spaced grain boundaries and many sub-boundaries within each grain. We have developed various seeding procedures that are succesful in eliminating grain boundaries. With closely spaced stripe openings, sub-boundaries can also be eliminated. We have performed extensive electrical measurements on our recrystallized films. Studies of thin-film resistors and n-channel MOSFETs have shown that the majority-carrier transport properties of ZMR Si films are comparable to those of single-crystal Si. The sub-boundaries, which are the predominant defects in these films, have no significant effect on carrier transport or MOSFET characteristics. As a result of thermal stress, mobility enhancement up to — 75% for electrons and — 10% for holes has been observed in Si films recrystallized on Si02-coated fused silica and sapphire substrates, respectively. Pulsed MOS minority-carrier generation lifetimes are in the microsecond range for both recrystallized Si films and

epitaxial layers grown on these films, On the basis of initial experimental results, the recrystallized films show great promise for radiation-hardened integrated circuits. High yields of functional transistor arrays and ring oscillators with promising speed performance have been obtained for CMOS test circuit chips. Although rapid advances have been achieved since we first reported [14] the ZMR technique in late 1980, some remaining issues must be addressed before this technique can be routinely used to prepare wafers for conventional IC processing. .

Problems such as film uniformity and wafer flatness that are associated with large-area wafers must be resolved. Elimination of protrusions and grain boundaries is essential to attain high IC yields. Although sub-boundaries do not have significant effects on MOSFETs, they do affect epitaxial growthis for devices. Therefore elimination alsobipolar an important objective. their We believe that most of these materials problems can be solved in the near future, and zone-melting recrystallization using graphite heaters should become an effective technique for producing largearea, high-quality SOl samples for commercial IC processing. Other materials such as GaAs or InP may also be recrystallized by this technique. However, satisfactory caps for these materials have not yet been found. In addition, the availability of insulating GaAs and InP substrates eliminates an urgent need for having such recrystallized films on foreign insulators,

Acknowledgements The authors are grateful to many members of MIT Lincoln Laboratory for collaboration and assistance, In particular, we acknowledge R.L. Chapman, C.K. Chen, M.C. Finn, R.P. Gale, R,W. Mountain, P.M. Nitishin, E.B. Owens, J.L. Ryan, D.J. Silversmith, A.J. Strauss, G.W. Turner, and H.J. Zeiger. We also acknowledge D.A. Antoniadis, E.W. Maby and H.I. Smith of MIT. This work was sponsored by the Department of the Air Force and the Defense Advanced Research Projects Agency.

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Graphite - strip - heater ZMR of Si films

References [1] J.C.C. Fan and H.J. Zeiger, US Patent No. 4,059,461 (1977). [2] Hi. Leamy. in: Laser and Electron-Beam Interactions with Solids, Eds. B.R. Appleton and G.K. Celler (Elsevier—North-Holland, New York, 1982) p. 459. [3] TI. Kamins and P.A. Pianetta, IEEE Electron Device Letters EDL-1 (1980) 214. [4] E. Leitz, British Patent No. 691,335 (1953). [5] J. Maserjian, Solid State Electron. 6 (1963) 477. [6] N.F. Teede, Solid State Electron. 10 (1967) 1069. [7]AR. Billings. J. Vacuum Sci. Technol. 6 (1969) 757. [8] R.A. Laff and G.L. Hutchins, IEEE Trans. Electron Dcvices ED-21 (1974) 743. (1974). [9] i.C.C. Fan and H.J. Zeiger, AppI. Phys. Letters 27 (1975) 224. [10] i.C.C. Fan, H.J. Zeiger and P.M. Zavracky, in: Proc. National Workshop on Low Cost Polycrystalline Silicon Solar Cells, Dallas, TX, 1976, Eds. T.L. Chu and S.S. Chu (Southern Methodist University, Dallas, TX, 1976) p. 89. [11] M.W. Geis, D.C. Flanders and H.!. Smith, Appl. Phys. Letters 35 (1979) 71. [12] MW. Geis, D.A. Antoniadis, D.J. Silversmith, R.W. Mountain and HI. Smith, AppI. Phys. Letters 37 (1980) 454. [13] J.C.C. Fan, H.J. Zeiger, R.P. Gale and R.L. Chapman, AppI. Phys. Letters 36 (1980) 158. [14] J.C.C. Fan, MW. Geis and B.-Y. Tsaur, in: Technical Digest, 1980 Intern. Electron Devices Meeting, Washington, DC, 1980 (IEEE, New York, 1980) p. 845. [15] J.C.C. Fan, B.-Y. Tsaur and MW. Geis, in: Laser and Electron-Beam Interactions with Solids, Eds. BR. Appleton and G.K. Celler (Elsevier—North-Holland, New York, 1982) p. 751. [16]i.C.C. Fan, B.-Y. Tsaur, R.L. Chapman and MW. Geis. Appl. Phys. Letters 41 (1982) 186. [17] C.K. Chen, MW. Geis, B.-Y. Tsaur and J.C.C. Fan, in: Proc. High-Speed Growth and Characteristics of Crystals for Solar Cells, Port St. Lucie, FL, 1983, to be published. [18] K.A. Bezzian, H.I. Smith, J.M. Carter and M.W. Geis, j. Electrochem. Soc. 129 (1982) 1848. [19] i.C.C. Fan, M.W. Geis and B.-Y. Tsaur, Appl. Phys. Letters 38 (1981) 365. [20] TI. Kamins, K.F. Lee and J.F. Gibbons, IEEE Electron Device Letters EDL-1 (1980) ~ [21] i.C.C. Fan, B.-Y. Tsaur and MW. Geis, Appl. Phys. Letters 39 (1981) 308. [22] S.S. Lau, S. Matteson, J.W. Mayer, P. Revesz, J. Gyulai, i. Roth, T. W. Sigmon and T. Cass, Appi. Phys. Letters 34 (1979) 76. [23] E.W. Maby, MW. Geis, Y.L. LeCoz, D.J. Silversmith, R.W. Mountain and D.A. Antoniadis, IEEE Electron De vice Letters EDL-2 (1981) 241. [24] R.F. Pinizzotto, H.W. Lam and B.L. Vaandrager, AppI. Phys. Letters 40 (1982) 388. [25] R.F. Pinizzotto, private communication.

483

[26]M.W. Geis, H.I. Smith, B.-Y. Tsaur, J.C.C. Fan, D.J. Silversmith and R.W. Mountain, J. Electrochem. Soc. 129 2813 (1982). [27]B-Y. Tsaur, i.C.C. Fan, M.W. Geis, D.J. Silversmith and R.W. Mountain, Appl. Phys. Letters 39 (1981) 561. [28] K.E. Beam, IEEE Trans. Electron Devices ED-25 (1978) 1185; DL. Kendall, Ann. Rev. Mater. Sci. 9 (1979) 375. [29] M.W. Geis, HI. Smith, B.-Y. Tsaur, J.C.C. Fan, D.J. Silversmith, R.W. Mountain and R.L. Chapman, in: Later—Solid Interactions and Transient Thermal Processing of Materials, Eds. J. Narayan, W.L. Brown and R.A. Lemons (Elsevier—North-Holland, New York, 1983); MW. Geis, H.I. Smith, D.J. Silversmith and R.W. Mountam, J. Electrochem. Soc. 130 (1983) 1178. [30] J.C.C. Fan, H.J. Zeiger, R.P. Gale and R.L. Chapman, in: Conf. Record 14th IEEE Photovaltaic Specialists Conf., San Diego, CA, 1980 (IEEE, New York, 1980) p. 218. [31] MW. Geis, HI. Smith, B.-Y. Tsaur, i.C.C. Fan, E.W. Maby and D.A. Antoniadis, AppI. Phys. Letters 40 (1982) 158. [32] R.W. Vook and F. Witt, J. AppI. Phys. 36 (1965) 2169. [33] B.-Y. Tsaur, J.C.C. Fan, M.W. Geis, D.J. Silversmith and R.W. Mountain, IEEE Electron Device Letters EDL-3 (1982) 79. [34]K.K. Ng, G.K. Celler, El. Povilonis, R.C. Frye, H.J. Leamy and S. M. Sze, IEEE Electron Device Letters EDL-2 (1981) 316. [35] B.-Y. Tsaur, MW. Geis, i.C.C. Fan, D.J. Silversmith and R.W. Mountain, AppI. Phys. Letters 39 (1981) 909. [36] E.W. Maby and D.A. Antoniadis, AppI. Phys. Letters 40 (1982) 691. [37] B.-Y. Tsaur, J.C.C. Fan and MW. Geis, Appl. Phys. Letters 41(1982) 83. [38]B.-Y. Tsaur, i.C.C. Fan and MW. Geis, AppI. Phys. Letters 40 (1982) 322. [39]D.B. Murphy and S.R.J. Brueck, in: Laser Diagnostics and Photochemical Processing for Device Materials, Eds. R. Osgood, S.R.J. Brueck and HR. Schlossberg (Elsevier— North-Holland, New York, 1983). [40] D.K. Biegelsen, N.M. Johnson, D.J. Bartelink and M.D. Moyer, Appl. Phys. Letters 38 (1980) 150. [41] E. Harari and D.J. McGreivy, IEEE Trans. Electron Devices ED-24 (1977) 1277. [42] R.K. Smeltzer, private communication. [43] B-Y. Tsaur, J.C.C. Fan. G.W. Turner and D.J. Silversmith, IEEE Electron Device Letters EDL-3 (1982) 195. [44] B.-Y. Tsaur, J.C.C. Fan, R.L. Chapman, MW. Geis, Di. Silversmith and R.W. Mountain, IEEE Electron Device Letters EDL-3 (1982) 398. [45] B.-Y. Tsaur, i.C.C. Fan, M.W. Geis, R.L. Chapman, S.R.J. Brueck, D.J. Silversmith and R.W. Mountain, in: Laser—Solid Interactions and Transient Thermal Processing of Materials, Eds. J. Narayan, W.L. Brown and R.A. Lemons (Elsevier—North-Holland, New York, 1983) p. 593.