Grid emulator for small scale distributed energy generation laboratory

Grid emulator for small scale distributed energy generation laboratory

Accepted Manuscript Title: Grid Emulator For Small Scale Distributed Energy Generation Laboratory Authors: Sondes Skander-Mustapha, Manel Jebali-Ben G...

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Accepted Manuscript Title: Grid Emulator For Small Scale Distributed Energy Generation Laboratory Authors: Sondes Skander-Mustapha, Manel Jebali-Ben Ghorbal, Marwa Ben Said-Romdhane, Mansour Miladi, Ilhem Slama-Belkhodja PII: DOI: Reference:

S2210-6707(18)31245-9 https://doi.org/10.1016/j.scs.2018.09.007 SCS 1245

To appear in: Received date: Revised date: Accepted date:

27-6-2018 4-9-2018 6-9-2018

Please cite this article as: Skander-Mustapha S, Jebali-Ben Ghorbal M, SaidRomdhane MB, Miladi M, Slama-Belkhodja I, Grid Emulator For Small Scale Distributed Energy Generation Laboratory, Sustainable Cities and Society (2017), https://doi.org/10.1016/j.scs.2018.09.007 This is a PDF file of an unedited manuscript that has been accepted for publication. As a service to our customers we are providing this early version of the manuscript. The manuscript will undergo copyediting, typesetting, and review of the resulting proof before it is published in its final form. Please note that during the production process errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.

Grid Emulator For Small Scale Distributed Energy Generation Laboratory Sondes Skander-Mustaphaa,b*, Manel Jebali-Ben Ghorbala, Marwa Ben Said-Romdhanea Mansour Miladia, Ilhem Slama-Belkhodjaa a

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Université de Tunis El Manar, Ecole Nationale d'Ingénieurs de Tunis, LR11ES15 Laboratoire de Systèmes Electriques, 1002, Tunis, Tunisie b Université de Carthage, Ecole Nationale d'Architecture et d'Urbanisme, 2026, Sidi Bou Said, Tunisie

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[email protected]

Ecole Nationale d'Ingénieurs de Tunis, Laboratoire des Systèmes Electriques-QehnA, B.P.37 1002 Tunis le Bélvédère-Tunisie

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Tel.: +216 71 874 700; fax: +216 71 872 729

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Highlights  Design and implementation aspects of a grid emulator dedicated to test small scale distributed energy generation are proposed.  Developed grid fault emulator can generate common grid faults and line impedance variation.  An algorithm to generate line impedance is presented and supported with simulation and experimental results.  System stability is ensured for proposed control parameters variation by analyzing closed loop poles.

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Abstract

This paper presents the design of a grid emulator dedicated to test small scale distributed energy generation. laboratory The proposed emulator aims to test its performances under different power quality conditions

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considering grid codes and standards. The developed emulator can generate common grid faults and line impedance variations. This last point is an additional feature versus common grid emulators. The paper discusses design and implementation aspects. Emulator performance analysis are investigated under special

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operating conditions. Simulation results are carried out to illustrate theoretical developments and a set of experimental results are provided to demonstrate the effectiveness of the proposed emulator.

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Keywords-Grid emulator, line impedance emulation, equipment under test, distributed energy generation.

1. Introduction Climate change and aspiration for less pollution, better environment and social progress have promoted clean energy sources. Indeed, the growing interest in design of future sustainable societies leads to an energy landscape with an increasing use of 1

distributed energy generation (DEG). (Tanay S. U., Do_gancan B.‚ ikci, 2017; Twaha, Ramli, 2018). Technical and economic impact of large integration of DEG are significant (Pavan Kumar, Bhimasingu, 2017; Fattahi, Schriemer, Bacque, Orr, Hinzer, Haysom, 2016) and many studies have been conducted to cope with. Distributed energy generation

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became a very challenging concern to handle these problems, by the reduction of the expected interruption cost, and the optimize of the operation schedule (Moreira,

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Paredes, de Souza, Marafao, da Silva, 2017; Hashempour, Lee, Savaghebi, Guerrero,

2018; Twaha, Ramli, 2018), since distributed energy generation acts to supply and store energy with or without the intervention of utility grid (Chan, Cameron, Yoon, 2017).

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So to investigate this area, large and also small scale laboratory distributed energy

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generation are continuously under development (Espinoza, Gonzalez, Sempertegui,

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2018; Patrascu, Muntean, Cornea, Hedes, 2016; Titmus, Strickland, & Cross, 2017).

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Hence, it becomes essential to develop an emulator to test the performances of DEG

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laboratory devices under grid fault conditions, their compliance with standards

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(European Standard EN 50438, 2007), local regulations, grid code requirements (GCR) (Swiss Grid,2013; Nordic Grid Code, 2007; E.On Netz, Grid Code) or low voltage right

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through (LVRT) capability requirements (Fathima, Palanisamy, 2015; Döşoğlu,

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Güvenç, Sönmez, Yılmaz, 2018). Indeed, using grid emulator has an important contribution to develop many renewable energy research areas. For example, to develop

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and test the control of doubly fed induction generator coupled with flywheel or supercapacitor energy storage system in order to develop DFIG low voltage ride through characteristics (Sudipta, Sukumar, 2017; Syed, Hui Tariq, Uğur, Ali, Asif, 2017). Also, it can be used develop the control of PV inverter and to study the impact of

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variation of voltage phase and amplitude on the sizing of passive components. (Panos, Vasilis, Nikos, 2017 ;. Hamidreza, Robert Johan, Shibashis, Babak, 2018). Different grid emulator (GE) hardware structures have been reported in the literature. Some of them are based on transformers (Veganzones, Sanchez, Martinez, Platero, Blazquez, Ramirez, Gordillo, 2011) or passive elements (Wessels, Lohde, Fuchs, 2010).

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These structures do not allow LVRT and grid codes requirement tests. However,

topology based on two power converters is the most common structure used to perform

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tests according to standards (Karuppaswamy, Gulur, John, 2014; Lohde, Fuchs, 2009; Si, Cordier, Kennel, 2016 ). In such structure, closed loop design is based on

proportional-resonant controller, to ensure output high dynamics for fast voltage

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reference changes. Generated grid faults that have been widely explored in literature are

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three phase balanced and unbalanced voltage sags, frequency deviations and harmonic

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distortion. In (Eloy-García, Guerrero, Vasquez, 2013) the presented grid faults are

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unbalanced voltages and low-order harmonics distortion, while in (Si, Cordier, Kennel,

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2016) the authors investigate the generation of symmetrical voltage dip.

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In this paper, authors present an improved GE which is intended to test loads, distributed generators, storage systems and the small scale DEG laboratory under

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development shown in Fig.1. The aim of the developed GE is to reproduce voltage

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waveforms required for LVRT and GCR capability tests, related to local ancillary requirements and voltage disturbances according to standards, as EN 50160 for Power

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quality (PQ) requirement, EN 62116, DIN VDE 0126-1-1 and VDE-AR-N 4105 for power generation systems connected to the Low Voltage Distribution Networks or EN 50438 for the Connection of Micro-Generators in Parallel. with Low Voltage Distribution Networks.

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Passive anti-islanding tests, based on line impedance variation detection, are nowadays preferred, due to large PV grid integration. So, the proposed GE will also reproduce such line impedance variation with programmable values, according to standards parameters and local grid line impedance. With respect to the existing bibliography related to small scale laboratory , proposed grid emulators do not offer the emulation of

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line impedance (Karuppaswamy, Gulur, John, 2014; Lohde, Fuchs, 2009; Eloy-García, Guerrero, Vasquez, 2013; Si, Cordier, Kennel, 2016), but for medium-voltage some

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authors as (Gevorgian, Koralewicz , Wallen, Muljadi, 2017; Xiao, Wenzhong, Jianhui, Weihang, Wei , Eduard, Vahan, 2018) propose a grid simulator designed to test wind turbine generators including line impedance emulation , in this case to emulate line

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impedance the output current vector is calculated in real time then the inverter voltage is

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modified by adding an equivalent of voltage drop on the requested impedance, In the

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present paper as it will be explained below, GE reference voltage values are generated

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considering phase shifting relatively to AC grid voltage, and deduced from active and

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reactive power of the equipment under test, proposed method ensures decoupled

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variation range of inductive and resistive impedance component so more flexible tests. The emulation of line impedance is also proposed for studies that deal with transmission

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line as presented by (Bo, Shuoting, Sheng, Yiwei, Fred, Leon, 2016; Shuoting, Bo,

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Sheng, Yiwei, Fei , Leon, 2018) for this application authors consider two ac grids as voltage sources, then as the output is an ac grid the generated power can be fixed by the

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operator and consequently the algorithm calculates line current which will be compared to current references fixed by the master controller, whereas in the proposed study the output power is fixed by load or generator used as EUT, so the algorithm use real-time output current measurement to emulate the impedance line.

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Line impedance variation within a given range is required by standards related to antiislanding. In addition, line impedance based tests are used to study distributed generation responses when injecting active power into grid under diverse line impedance values (Sarkar, Dan, 2016; Vieto, Sun, 2014) and to evaluate performances of current or parallel-connected inverters power sharing controls (Ye, Wang, Li, Sun,

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Han, Zhang, 2017). Indeed, the mismatch of line impedance components, leads to a difference between actual power allocation of the parallel distributed generation

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inverters and the reference value. which leads to instability in the microgrid. (Raj, Gaonkar, Guerrero, 2018; Sajjad, Vahid, 2018).

Such impedance emulation is also useful to calibrate line impedance measuring

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instruments (Roggo, Furrer, Merendaz, 2013).

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GE performances are tested with several load kinds under different working conditions:

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linear and non-linear load, induction motor during starting and battery banks during

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activation.

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The paper is organized as follows: Section 2 presents GE design, Section 3 details

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system control. Line impedance test is investigated in section 4. Then, section 5 focuses on the proposed GE behavior when connected to several types of equipments under test

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(EUT). Finally, a set of experimental results are presented in section 6 to demonstrate

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the effectiveness of the proposed GE.

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Energy storage system DC

DC DC

DC

DC BUS

DC AC

Grid Emulator

AC BUS

Grid

DC

Linear Load

DC AC

Non linear load

Wind turbine emulator

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AC

Intelligent load

DFIG

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Fig. 1 Small scale distributed energy generation laboratory including grid emulator

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2. System design

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The proposed emulator prototype is illustrated in Fig. 2. It consists of a back-to-back

AC/DC Vdc

igb

PI controller

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Vdc

D

igc

igabc

DC/AC

iga

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GRID

Lg

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converter connected to the EUT through a low-pass three-phase LCL filter.

VdC* PF*

LCL i1a

Z1

Z2

i2a

(L1, R1) (L2, R2)

i1b

C

i1c

PR controller

i2b Vc

Equipment under test

i2c

i1abc i2abc Vcabc

Vca* Vcb* Vcc* Fault voltage references

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Fig. 2 Block diagram of a grid emulator system

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The LCL filter is an important element of the GE. Its design has been widely reported in the literature for grid connected converter based distributed generator

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applications (Jayalath, Hanif, 2018), but not well detailed for GE applications. Indeed, LCL filters for grid connected inverters should pass fundamental frequency and attenuate high order harmonics. However, for GE applications, it should eliminate voltage harmonics according to standards, and according to desired tests. So, given voltage harmonics should be eliminated but not specifics others. For example, it should 6

be able to let fundamental but also 5th, 7th and 11th voltage harmonics, at specified levels. Impedances of the LCL filter shown in Fig. 3 are expressed as follows: Z 1  L1 s  R 1

(1)

Z 2  L2 s  R2

(2)

1

(3)

Cs

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Zc 

where C is the capacitor of filter, L1 the converter side inductor, L2 the EUT side

V1

V2

i1

Z1

ZEUT

Vc

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Fig. 3 . Equivalent single phase LCL filter circuit

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Zc

i2

Z2

ic

Vconv

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inductor, R1 and R2 are their equivalent series resistors respectively.

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According to Fig. 3, Vc voltage is given by the following equations : V c  V c o n v  Z 1 i1  Z 2  i2

(5) (6)

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V c   i1  i 2  Z c

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 Z EUT

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Vc 

(4)

Where 𝑉𝑐 and 𝑉𝑐𝑜𝑛𝑣 are capacitor voltage and output converter voltage respectively

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Based on equations (5) and (6) the converter side current i1 can be expressed as follows: Z EUT  Z 2  Z c

(7)

Z c  Z EUT  Z 2 

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i1  V c

So the transfer function of the filter is given by (8) Vc V conv



Z c  Z EUT  Z 2

Zc



 Z 1   Z EU T  Z 2   Z 1.Z c

(8)

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If no EUT is connected to GE, 𝑉𝑐 /𝑉𝑐𝑜𝑛𝑣 voltage ratio is directly deduced from Fig.3 and becomes as expressed by (9). Vc0



V conv

Zc

(9)

Z c  Z1

Current ripples due to converter switching frequency is reduced when L1/L2 ratio is

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higher. In another hand the reduction of L2 value leads to line impedance variations and resonance frequency displacement which leads to instability problems. In order to avoid

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such situation, the ratio between both inductances is chosen equal to one. Consequently, the L and C values are derived from (10) and (11) (Wang, Zhihong, Gautam, &

Vc /

(10)

6 f s 0 .1 5 i n

0 .0 5 S n 2  f nV c

(11)

2

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C 

2

3

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1

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L 

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Xiaoming, 2003):

Where fs is the inverter switching frequency, Sn is the inverter rated power, and fn is the

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operating frequency for healthy conditions. in is the rated current. Resonance frequency

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of the LC filter is expressed is (12). In order to ensure the generation of voltage

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harmonics up to 11th one, the obtained L1 and C values should verify that fres is larger than (11 fn). 1

1

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f res 

2

(12)

L1C

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The Bode plot of the transfer function of the LCL filter (9) at no EUT is presented in Fig. 4. According to the system parameters given in appendix, filter resonance frequency is 4226 rad/sec so filter bandwidth allows the injection of harmonics up to eleven orders. That means that the emulator will be able to test harmonic voltage distortion, which confirms filter parameters choice. 8

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Fig. 4 . Bode plot related to the transfer function of the LCL filter at no EUT

Fig. 5 shows transfer function Bode plot, related to the transfer function of the LC filter

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for different EUT parameters as expressed in (8). This figure illustrates filter

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performances for different EUT. It is to note that impedance magnitude decreases with

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EUT impedance value but system bandwidth does not change.

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Fig. 5. Bode plot related to the transfer function of the LC filter for different EUT parameters

3. System control

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GE control aims to generate VC filtering capacitor voltages reproducing voltage references. Control effectiveness depends on its capability to follow with a minimum error and time delay the proposed voltage reference. The control system is composed of two loops (Fig. 6), outer one for capacitor voltage VC regulation and inner one for

i1

Vc*

PWM Converter

C2 (s)

C1 (s)

Vc

i2

i2

Vconv

Vc

1 R1+L1s

Vc

System

Vc

1/RC+Cs

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Control

1

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Vconv*

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current i1 regulation where i1 is the EUT current.

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Fig. 6 . Control block diagram of the GE DC/AC converter

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A proportional resonant controller (C1) is used to ensure high loop gain at desired

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frequencies: 2n



k



(s  i ) 2

i 1

2

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k 0 n

(13)

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C1 (s) 

aks

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where i, k and n N; i is the resonance frequencies in rad/s; ai are the coefficients computed to obtain the desired margin of stability (r).

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Regulator of the internal loop C2 is chosen as a constant gain (G), which ensures a faster internal loop than the external one. A multi-frequency resonant control is adopted

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in external loop, two resonance frequencies are used (1=0 and 2=50 where 0 =314 rd/s). Bode plot related to (C1) resonant controller is presented in Fig. 7.

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Fig. 7. Bode plot of resonant controller (C1)

To test the robustness of closed loop with resonant controller, equivalent transfer 𝑉

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a 2 s  a1 s  a 0 2

4

3

2

 a 2G ) s  2

 R

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L1 C s  ( R 1  G ) C s  ( L1 C 

1

 G C

2

 a 1G  s  a 0 G

(14)

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T FC L ( s ) 

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𝑐 function ( 𝑉𝑐𝑟𝑒𝑓 ) is given when i2=0 (for no EUT).

Where L1, R1, C are the LCL filter parameters and G is the gain of C2 proportional

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controller.

𝑉

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𝑐 For resistive EUT (Rlo), equivalent transfer function ( 𝑉𝑐𝑟𝑒𝑓 ) is expressed by (15), (16)

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and (17) where L1=L2=L, R1=R2=R, R+Rlo=Rj and R+G=RG. N (s)

(15)

D (s)

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T FC L ( s ) 

N ( s )  a 2 L G s  ( R j a 2 G  a 1 L G ) s  ( a 1G R j  a 0 G L ) s  a 0 G R j 3

D (s)  L C s  LC

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2



 R

G

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 G   LC

  G  RG  

2

2

R 2

 RG  s  (L C  4

j

R

j

 RG

 a

2

2



2

G s  2

  L  R jRGC  s

 L  R

j

RG C  

(16)

3

2



 a 1G s

(17)

 a0G

Flowchart to calculate resonant controller parameters is presented in Fig. 8.

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Start

Choice of wi

Calculate C1

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Choice of the margin of stability r

Identification of the parameters (ak)

minimal oscillations verified

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No

Yes End

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Fig. 8 Flowchart of resonant controller parameters computation

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Discrete time pole-zero map on S-plan is shown in Fig. 9. It can be seen that all closed

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loop poles present negative real values, so that system including control is stable even if stability margin r varied. To select the best value a trade-off between the limit of

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stability (corresponding to zero real value) and less oscillation (corresponding to zero

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imaginary value) must be done.

Fig. 9 . Location of poles of the closed loop system on s-plane

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4. Line impedance emulation description Low voltage distribution line connecting local distributed energy generation to grid can be modeled by an impedance Z. This impedance value depends strongly on grid health. In this work, line impedance emulation is incorporated into the system control and acts

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as a virtual impedance to be programmed according to target tests. Impedance emulation design is based on phasor diagram presented in Fig. 10

I Z Uin

Uout

ZI

d j

2

U

in

e

j



U

in

out

Z

U in U

out

e

  

*

D

in

U  

j (   )

Z

(18)

(19)

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S 

U

*

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Apparent power is expressed as follows:

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Fig. 10 Line impedance and phasor diagram

I in

Uout RI

jXI

q

U

I

S U

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Uin

Z

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Active and reactive power are deducted from (19), voltage magnitude Uout and tan are deduced from (20) and (21) and presented in (22) and (23). Active and reactive power

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values are computed in (24) and (25) using  output current and voltage components. U

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P 

R

U

Q  R

U

out



2

2

 R  U

2

  R U

in

 X

2

in

 X

PX  QR U in s in 

in

U

out

out

cos 



s in   X  U

in

XU

U

out

out

s in  

(20)

c o s   

(21)

(22)

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ta n  

P 

3 2

Q 

3 2

PX  QR

(23)

U in  ( P X  Q R ) 2

( u o u t i o u t  u o u t  i o u t  )

(24)

( u o u t  i o u t  u o u t i o u t  )

(25)

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So as presented in Fig. 11, GE reference voltage values are generated considering phase shifting  relatively to AC grid voltage, measured at GE input, noted Vgabc. Then,

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impedance parameters can be computed by users using measured voltage Uoutabc and

Vgabc and measured output current ioutabc. For the line impedance test ioutabc is equal to

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i2abc (Fig. 2) and Uin is equal to Ugrid (Fig. 11).

DC/AC

LCL

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AC/DC

L1, R1 L2, R2

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vgabc igabc

D vgabc

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Vdc_ref PF_ref

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sind Calculation

RMS

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Ugrid

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Programmed Z

d

tand

tand Computation

P R

X

Ugrid

Q

Vc

Equipment under test

ioutabc uoutabc

Vcabc_ref

Generation of reference values

d

Uout

sind

arctan

C

i1abc i2abc vcabc

PR controller

PI controller

Vdc

i1abc

Vdc

igabc

A

Lg

Uout computation

P

R X

Q

abc

ab

abc

ab

P,Q Calculation

iouta

ioutb uouta uoutb

Fig. 11 GE Line impedance generation

The reference voltage values are generated in function of maximum value Uout and phase shifting  .

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Simulation results are presented in two sets. First, in Fig. 12, reference values parameters (Uout and phase shifting  ) are generated when actual variable line impedances is used. Then comparison between estimated references and measured output voltages are given. Indeed, first graph (a) shows the used resistance and impedance values in ohm: resistance value R change in steps of 1 to 4 and

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impedance value X is equal to 1.5. Second graph (b) shows active and reactive power, tests are done for variable EUT to demonstrate the robustness of the control, active

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power decreases from 15kw to 8kW and reactive power decreases from 3kVAR to

1kVAR. Third graph (c) illustrates difference between measured and estimated cos(),

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difference is about 1%. Last graph (d) presents Uout_ref (maximum magnitude of the

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in the output of the additional line impedance.

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generated reference value), estimated value is in conformity with real signal measured

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(a)

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(c)

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(b)

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(d)

Fig. 12 System response and reference values in case of using real line impedance.

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The second set of simulation results is presented in Fig. 13. In this case there is no real impedance line but GE generates same voltage than with additional real line impedance. So in first graph (a), programmed impedance line components are presented (resistance value R change in steps of 1 to 4 and impedance value X is equal to 1.5). In second graph (b), phase shift  is measured between GE output and AC grid, it decreases from

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11° to 5° according to programmed impedance values. Third graph (c) presents GE

output and reference values. Results with programmed virtual impedance presented in

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Fig. 13 are in conformity with tests using real impedance shown in Fig. 12.

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U

(a)

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A

(b)

EP

TE

D

(c)

Fig. 13 System response in case of using virtual line impedance

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Fig. 14 shows the reference voltage magnitude (Uout_ref), output GE voltage and grid voltage with virtual and real impedances. The corresponding values of Uout to each

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programmed value of impedance components as presented in Fig. 12 and Fig. 13 are 480V-433V-403V-384V. The GE output voltage is in conformity with the programmed voltage profile according to the fixed line impedance.

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Fig. 14 Output voltage with virtual and real impedances

5. EUT analysis effect on GE

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Proposed GE is tested with different kinds of EUT. Simulations are carried out with

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PSIM software. Fig. 15 presents generation of equilibrate voltage drop of 15%.

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Successive connection of different types of EUT is performed: First a resistive EUT is

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connected (power is 1kW), then an inductive EUT at 0.1s. At 0.15s (power is 1kW, 0.5kVAR), a non linear load is added (power is 1kW, 0.5kVAR), an induction motor

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(power is 0.5kVA), at 0.2s and finally, at 0.35s, a battery banks are activated (power is

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1kW, 1kVAR),. The control ensures a perfect voltage curves waveform even under

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wide range of EUT variations. Only, when the capacitor banks is activated a fluctuation of voltage occurs during 0.5ms.

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Reference value and emulator output superposition are shown in Fig. 16, when generating a voltage including fifth harmonic. In this case the emulator is tested for

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different EUT. For voltage test including fifth harmonic when activation of capacitor banks (at 0.25s), voltage presents some oscillations for 0.005s during first period .

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D

M

A

N

U

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Fig. 15 . Output voltage emulator when 15% voltage drop and EUT current for successive EUT introduction

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Fig. 16 .Reference signal and emulator output including fifth order harmonic

The developed GE is able to reproduce voltage waveforms required for LVRT tests, an

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example is presented in Fig. 17, this simulation is curried out with an ideal current

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source, voltage profile generated by the GE drops from 1pu to 0.1pu then at 0.5s it increases to reach its initial value. EUT generator power decreases from 10kW to 1kW

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then it increases when voltage increases. generated current remain fixe as used generator is an ideal current source, this test is useful when testing LVRT capability of the DFIG system according to appropriate GCR. It is to note that as the GE is designed to test the global small scale distributed energy generation laboratory, it is able to

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support high reactive current generated by DFIG system during transient conditions.

Experimental setup

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6

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Fig. 17 .LVRT conditions reproduced by GE when ideal current source is used

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Protection devices are provided to protect GE switches for extreme cases.

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Experimental tests of the proposed GE have been performed on a 20kVA prototype

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(Fig. 18)

20kVA Power converter

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LCL Filter

STM32F4-Discovery

Measurement board

Fig. 18 . GE laboratory prototype

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As shown in Fig. 19, control board is based on STM32F4 Discovery. The used measurement board that provides current and voltage measurements is based on LA25NP and LV25-P sensors. GE experimental setup includes basically two voltage source converters in back-to-back topology. Both converters are a two-level PWM converters with a DC link capacitance of 1100µF. They are 20kVA three phase voltage power

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converters. In addition, an auto transformer is employed in order to vary the AC side

voltage peak magnitude. Device side converter is connected to the EUT through a three

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phase LCL filter selected with L1= 2mH, L2= 2mH and C=30µF. The output inductor (L2) is a high frequency one. DC voltage is controlled to 580 V. Tests are performed with 325V single voltage. Discrete time control frequency as well as PWM switching

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frequency are selected to be 10kHz. Control algorithm is given by Fig. 20. L=2mH 0.1Ώ/20A, C=30uF/600V

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AC/DC

LCL

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GRID 400V 50Hz

EUT

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DC/AC

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Interface Card

STM 32 F4 DISCOVERY

Sensors card

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Fig. 19 GE experimental setup

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interrupt Sampling

Conversion

Main Initialisation : ADC PWM DMA,

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Generate duty cycle

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Generate reference signals

Infinite loop (While(1)) Waiting for interruption

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End interrupt

Fig. 20 Control algorithm

Experimental results presented in this section intend to evaluate proposed GE

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performance in addition to validate simulation results. The equipments under test are :

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firstly, variable three phase 4 kW resistor and secondly, to emulate non linear load, a

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three phase diode rectifier (SEMIKRON) connected to a resistor is used.

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The grid emulator three phase output voltage is shown in Fig. 21, the right figure

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presents the output voltage Vca and its reference (the magnitude is 300V and frequency

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is 50Hz) there is no phase shift. The reference signal is measured from the digital to analog converter (DAC) of the STM.

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In the following, the defaults generated by the GE are overestimated in order to show the efficiency and the robustness of the GE. Fig. 22 presents reference and GE voltage

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output when 100% equilibrate over voltage is applied during 1s (the magnitude is 10V

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then 20V and frequency is 50Hz). Fig. 23 shows the voltage Vca when frequency variation from 50Hz to 25Hz is applied (the magnitude is 20V). Fig. 24 shows the voltage Vca with 20% added harmonics of 5th(a), 7th (b) and 11th (c) harmonic voltages respectively. Fig. 25 illustrates the case of variable resistive EUT. The top curve shows output voltage (the magnitude is 50V), and the bottom one presents EUT current when variation from 32 to 24. It is to note that resistive EUT current variation does not 21

affect GE performances. Fig. 26 points up the case of variable non linear load (three phase diode rectifier connected to a resistor). The top curve presents the output voltage (the magnitude is 20V), and the bottom one shows EUT current. In this case, EUT current presents some harmonics but the voltage is not significantly affected.

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Experimental test presented by Fig. 27 demonstrates the result of programmed phase shift between emulator output and AC grid, measures are taken in the output of the autotransformer. the programmed phase shift is 12 degrees the result is 695s

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equivalent to  equal to 12.51 degrees phase shift.

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Fig. 21 Emulator output voltage for healthy conditions (right figure illustrates the output voltage Vca and its reference taken from the DAC of the STM)

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Switching signals application

Fig. 22 Emulator output voltage for an equilibrate overvoltage of 100% (the top curve presents GE output and lower one presents reference voltage)

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Fig. 23 Emulator output voltage the case of frequency variation from 50Hz to 25Hz ( the top curve presents GE output and the lower one presents reference voltage)

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(a)

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(b)

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(a)

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Fig. 24 Emulator output voltage the case of harmonic distortion (injection of 5th harmonic (a), 7h harmonic (b), 11th harmonic (c) ) (the top curves present the GE output and the bottom ones present the reference voltage)

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Fig. 25 Emulator output voltage(top curve), EUT current ( bottom curve) for three phase variable resistive EUT

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Fig. 26 Emulator output voltage(top curve), current ( bottom curve) for three phase non linear EUT

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GE outputt

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Autotransformer outputt

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Fig. 27 Phase shift between GE output and Auto transformer output (right figure illustrates a 'zoomed-in' view)

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The ability of the proposed control algorithm is verified by means of various test. Testes

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reveal that the control is able to obtain fine results not only in terms of precision of

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programmed impedance parameters but also in terms of robustness in the face of variable load and generator power. Indeed, tests with different kind of EUT demonstrate

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the capability of the proposed control to reproduce the desired voltage profile even their

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active or reactive power fluctuates. In addition, experimental results confirm the

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algorithm accuracy, indeed, difference between programmed and obtained phase shift is 0.5degrees. And to give more details about algorithm accuracy, relative error between

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reference voltage magnitude with both virtual and real impedances in percent is presented in Fig. 28, the value is less than 3% when different impedance values are

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programmed. Furthermore, system stability is ensured for proposed control parameters variation by analyzing closed loop poles (Fig. 9). In another hand the algorithm computation performance is enhanced by the reduction of execution time.

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Conclusions

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Fig. 28 Relative error between Uout_ref with virtual and real impedances in percent

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The grid emulator is an indispensable device to test the performances of DEG

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laboratory equipments under grid fault conditions as well as their compliance with

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standards. This paper presented an improved grid emulator. It is based on a back-toback converter connected to the EUT through a low-pass three phase LCL filter. The

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developed GE generates voltages reproducing grid faults and disturbances. Compared to

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common grid emulators it emulates line impedance variation, with decoupled variation range of inductive and resistive part. The emulator aims to test small scale DEG

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laboratory equipments. Authors detail emulator design and illustrate performance

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analysis results by means of simulation and experimental tests carried out with different loads and under special operating conditions such as induction motor starting and

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capacitor banks activation. The experimental and simulation results show the efficiency and performances of the proposed grid emulator. Indeed comparison between system response in case of using virtual and real line impedance demonstrates a conformity between both output voltages , relative error between reference voltage magnitude with both virtual and real impedances is less than 3%. 26

This paper is an expansion of the paper submitted to IREC2018

Appendix Grid emulator parameters are presented in Table 1

Symbol Sinvnom Srecnom Vg L1 R1 L2 R2 C fs

Value 20 20 400 2 0.1 2 0.1 30 10

Unit kVA kVA V mH Ω mH Ω µF kHz

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Description Inverter Nominal power Rectifier Nominal power Nominal Voltage line-line Converter side filter inductor Converter side filter inductor resistance Device side filter inductor Device side filter inductor resistance Filter capacitor Switching frequency

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Table 1GE parameters

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Acknowledgments This work was supported by the Tunisian Ministry of High Education and Research under Grant LSE-ENIT-LR 11ES15 . References

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