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High aspect ratio and low leakage current carbon nanosheets based high-k nanostructure for energy storage applications
High aspect ratio and low leakage current carbon nanosheets based high-k nanostructure for energy storage applications Mohammad Qaid, M.S. Alsalhi PII: DOI: Reference:
S0167-9317(16)30466-X doi: 10.1016/j.mee.2016.11.013 MEE 10387
To appear in: Received date: Revised date: Accepted date:
2 February 2016 13 September 2016 14 November 2016
Please cite this article as: Mohammad Qaid, M.S. Alsalhi, High aspect ratio and low leakage current carbon nanosheets based high-k nanostructure for energy storage applications, (2016), doi: 10.1016/j.mee.2016.11.013
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ACCEPTED MANUSCRIPT High aspect ratio and low leakage current carbon nanosheets based high-k nanostructure for energy storage applications
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Mohammad Qaid 1,2,3* , M. S. Alsalhi 3,4
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Research Chair, Laser Diagnosis of Cancers,College of Science, King Saud University, Riyadh, 11451, Kingdom of Saudi Arabia.
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KACST-Intel Consortium Center of Excellence in Nano-Manufacturing Applications (CENA), Riyadh, Saudi Arabia. 2 Department of Physics, Taiz University, Taiz, Yemen. 3 Department of Physics and Astronomy, College of Science, King Saud University, Riyadh 11451, Kingdom of Saudi Arabia.
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*Correspondence and requests for materials should be addressed to:
Abstract :
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Mohammad Qaid (email: [email protected])
Carbon nanosheets (CNS) are exploited to fabricate a high aspect ratio strontium titanate (STO) structure with very low leakage current density. CNS are grown by chemical vapor deposition (CVD) on 70nm layer of TiN coated Si wafers. Atomic layer deposition (ALD) is employed as a conformal deposition technique for Sr-rich STO on top of 3D CNS to obtain a conformal STO layer with high area per footprint. The area enhancement resulting from CNS is investigated using electrochemical impedance spectroscopy (EIS) for conformally deposited Al2O3 thin films based TIN blanket and CNS, electrodes. It is investigated by comparing the capacitance enhancement resulted from CNS/Al2O3 capacitors with that obtained from blanket TiN/ Al2O3 capacitors. Our findings show that EIS is very promising for estimating the area increase for different nanostructures. The electrochemical spectroscopy show typical capacitor behavior for CNS based electrochemical capacitors. Moreover, solid-state electrical characterizations for CNS/STO based metal-insulator-metal (MIM) capacitors show very low leakage current density with strong breakdown and excellent area scaling through the potential window [0 V, +10V].
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ACCEPTED MANUSCRIPT 1. Introduction Future advances in nanomaterials and energy applications need more scalable fabrication of complex and surface architecture which is essential for the next generation of micro
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and nano electronic devices. The next generation of energy systems is based on
electronic and optical devices.
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nanotechnology which is the corner stone of high performance and state-of-the-art High aspect ratio (AR) -Surface to volume ratio-
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nanostructures are produced with different techniques and employ several materials. One approach is using high area open volume anodized aluminum oxide as template for thin
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layer of aluminum oxide deposited by atomic layer deposition [1]. In this approach a high area and state-of-the-art solid state supercapacitors were obtained. Other branch of these
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attempts is using micropillars to produce such open volume with high aspect ratio surfaces [2,3]. Recently, nanometer-sized carbon materials have attracted significant
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attention in the scientific community because of their unique features such as open
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volume, high aspect ratio, high conductivity and sharp edges. These unique properties make it good candidate as field emitters and for fuel cell and micro electronic
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technologies [4,5]. Carbon based nonmaterial structures are produced in many forms including carbon nanotubes (CNTs) and carbon nanosheets (CNS). These 3D structures are fabricated to produce large area structures using capillary forming of CNTs using a film of iron catalyst patterned by optical lithography on silicon wafer. CNTs microstructures are made as vertically aligned forests grown by atmospheric pressure thermal chemical vapor deposition (CVD) [6,7]. On the other hand, future microelectronics applications involving metal–insulator–metal (MIM) capacitors will require thin films of high-κ ceramic materials with dielectric constants above 100. Thin films of large dielectric constant, low dielectric loss and exhibiting good high frequency characteristics such as SrTiO3 (STO), are promising candidates for many applications like capacitors in DRAM (dynamic random-access memory) applications [8,9]. STO material appears as promising high-κ dielectric material candidates. The high dielectric permittivity of these materials even in thin films and on 2
ACCEPTED MANUSCRIPT the other hand, the relatively small band gaps (~ 3.2eV) of these materials are so interesting [10]. CNS can be described as graphite sheet nanostructures with edges that are composed of stacks of planar graphene sheets standing almost vertically on the
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substrate (Fig.1a-1c). The sheets form a self-supported network of sheet structures with
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thicknesses in the range from a few nanometers to a few tens of nanometers, and with a high aspect ratio (Fig.1b; 1e). The large surface area and sharp edges of CNS make it
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very useful for a number of different applications [11].
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One model describes the mechanism of growth and structure of CNS in terms of the effect of deposition parameters on the structure and morphology properties [12]. It
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proposes that, atomically thin graphene sheets result from a balance between depositions through surface diffusion and etching by atomic hydrogen. The observed vertical orientation of these sheets results from the interaction of the plasma electric field with
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their anisotropic polarizability. The resulting atomically thin edges require the presence
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of simultaneous etching by atomic hydrogen coupled to a vertical electrical field near the
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substrate surface. The electric field induces the anisotropic dipoles of the graphene sheets help to provide the observed self-aligned vertical orientation [12]. Among plenty of high area structures, CNS is one of the largest area per foot print nanostructures [13-20]. In the literature, the surface areas of graphene sheets are measured by the N2 absorption, Brunauer-Emmett-Teller (BET) method [21]. This method precisely evaluates the area enhancement provided by the three-dimensional morphology of a graphene multi-sheets-like structure. Using CNS as electrode due to their unique properties is very promising for electronic devices. On the other hand, utilizing STO as dielectric is very modern for high performance devices like DRAM and energy storage applications [8,9]. Assembling the both unique features for CNS and STO is much promising to obtain an outstanding structure to be exploited in many state-of-the-art applications. In this work we fabricate 3D high aspect ratio with high area per footprint and open volume nanostructure. This
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ACCEPTED MANUSCRIPT unique structure consists of high conductivity electrode and an insulator with extraordinary dielectric properties.
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Moreover, in this work we determine the area enhancement provided by CNSs to Al2O3based capacitors by comparing the capacitance measurements obtained from
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electrochemical impedance spectroscopy (EIS) for electrochemical capacitors based on
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CNSs, with blanket capacitors based on TiN. The capacitance enhancement calculations lead to the determination of the magnitude of the area enhancement of high aspect ratio
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CNS electrodes.
2. Experimental details
Carbon nanosheets based 3D structure devices were prepared in two stages. In the first
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stage, CNS was grown by Radio frequency plasma enhanced chemical vapor deposition
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(RFPECVD- oxford 800Agile). CNS deposition was deposited on Si/TiN 200mm wafers. TiN thickness is around 70nm deposited by physical vapor deposition (PVD). CNS
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system of 13.56 MHz with Radio frequency power of 300W was coupled through a window into a vacuum chamber through a capacitive coupled plasma (CCP) chamber. CNSs have been grown at high temperature (690
) and low pressure (10-2 torr). In the
CVD system, the substrate temperature was controlled by Rf power. Acetylene C2H2 in H2 atmosphere was used as carbon precursor with flow rate ratios of (10:100) sccm (standard cubic centimeter per minute), for S1 and S2, samples, and (5:200) sccm for S3 and S4, samples. The wafers were grown at temperature 690Cᵒ for 45min for S1 and S2, and 90min for S3 and S4, samples. The details of the deposition conditions for CVD have been reported in other work done by Cott et al [20]. In the second stage, strontium titanate was grown by atomic layer deposition (ALD) at low temperature (200
) on
CNS as dielectric with different thickness due to the number of ALD deposition cycles. The run cycles were 45, 69, 45, and 69 for S1, S2, S3 and S4 wafers respectively. STO obtained thicknesses were around 31nm, 45nm, 18nm, and 45 nm for S1, S2, S3, and S4,
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ACCEPTED MANUSCRIPT respectively. The CNS/STO structures were defined through metal dots deposited by thermal evaporation through Nickel shadow mask.
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Morphological studies were investigated by scanning electron microscopy (SEM). Two instrument models have been used, low resolution (SEM, Philips XL30), and high
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resolution SEM (FEI, and NOVA 200).
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Raman spectroscopy was performed by (WiTec CRM 200) tool at a wavelength of 532nm. This characterization investigated the graphitization of carbon nanosheet grown
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through CVD process.
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The electrochemical characterization of the CNS based capacitors were achieved through electrochemical impedance spectroscopy (EIS) using an electrochemical cell of 2.7 cm diameter and 0.2 M Na2SO4 as the electrolyte. EIS characterizations utilized a three
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controlled by Nova 1.9 software.
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electrode chemical workstation setup connected with a potentiostat PGSTAT302N
Electrochemically, three samples are studied in this work are : D1, D2, and D3 and have
respectively.
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sequence layers of Si/TiN/Al2O3, Si/TiN/CNS/Al2O3 (H2O), and Si/TiN/CNS/Al2O3 (O3), A thin layer of Al2O3 is deposited on top of TiN and CNS layers by ALD using H2O and O3 as oxidants for D2 and D3, respectively. Figure 2 shows the SEM micrograph for the morphology of CNS as deposited (Fig.2a) and Al2O3 deposited on CNS (Fig.2b). The obtained Al2O3 thicknesses for the three samples are 15 nm, 20 nm, 20 nm for D1, D2, and D3, respectively. All work involving ALD and CVD is done inside a state-of-the-art clean-room at IMEC-Belgium.
3. Results and discussion CNS vertically grown sheets are clearly shown in the schematic diagram in the Figures 1a-1c, which clarify the diagram of the single sheets height and thickness. From this 5
ACCEPTED MANUSCRIPT schematic, it is shown that, the sheets represent self-supported network structures. This is due to the growth mechanism of CNS explained before. These parameters – thickness and height- define the aspect ratio of the CNS, and they depend on the deposition time and
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precursor flow rate. Figure 1e, represent the schematic diagram for single sheet which
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indicates how it is vertically grown upward the substrate and contains multi graphene stack sheets. Figure 1b shows a SEM cross-section view of single sheet grown vertically
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with respect to the substrate which is explained by the growth mechanism model
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mentioned previously [12].
Figure 3 shows the first growing stages of CNS. In the Figure 3a, a top view of CNS
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seeds at an amorphous phase is shown. At the beginning of deposition process, the carbon morphology is created by forming tiny amorphous clusters and no vertical sheet-like structure is present at this point of growth process only horizontal layers of amorphous
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carbon supported by the substrate (Fig.3b). At this stage the deposition conditions (flow
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rate, heat, and Plasma power) are now sufficient to form carbon sheets [22]. This is
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corresponding to the growth mechanism which suggests that, graphene sheets grow parallel to the substrate surface until a sufficient level of force develops at the grain boundaries to curl the leading edge of the top layers upward. After the top layers curl up being vertical to the substrate surface, which is along the plasma sheath caused electric field direction, the very high surface mobility of incoming carbon-bearing species, and the induced polarization (of the graphitic layers) associated with the local electric field in the sheath layer, combine to cause the nanosheets to grow higher rather than thicker [12]. Figure 4a is a top view SEM micrograph of CNS morphology. It can be seen that the vertical sheet-like CNS possess crumpled surfaces and the sheets arbitrarily interlace each other with a large surface area. Figure 4b is X-section SEM view for that structure which indicates CNS growth in C2H2/H2 system with ratios of 10/100 on the TiN substrate at 690
. It shows CNS structure growth with height of 1 µm. This kind of
structure can provide high aspect ratio and hence high area enhancement exceeding 50 time enhance for some morphologies for the case of sheet thickness of 5 nm. 6
ACCEPTED MANUSCRIPT Three-dimensional CNS/STO structure is prepared through many steps with specific methods and particular techniques used for each step. Four wafers have been prepared to obtain different structures characteristics. These characteristics include both: CNS
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morphology (height and sheet thickness) and STO (thickness and conformal deposition
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on CNS sheets due to the CVD and ALD growth conditions).
Figure 5 shows the fabrication stages for the samples which include CNS growth by
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CVD, STO deposition by ALD and metal dots addition by thermal evaporation through nickel shadow mask.
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Firstly, 200mm Si/TiN wafers were prepared for the process into cleanroom atmosphere. The second step is the growth of CNS on top of TiN wafers. Carbon nanosheets were
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grown on 200mm Si wafers coated with a 70nm layer of TiN. During the deposition, 300W radio frequency (RF, 13.56 MHz) power was coupled into the deposition chamber.
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A precursor gas acetylene (C2H2) was used as carbon source and mixed with hydrogen H2
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as carrier gas. The flow rates for the gases C2H2/H2 inside the chamber were 10/100 for S1 and S2 wafers and 5/200 sccm for S3 and S4 wafers. The deposition time for the four
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wafers was 45 min for S1 and S2, and 90 min for S3 and S4. The third step is atomic layer deposition for strontium titanate as insulator on top of CNS. ALD was used to obtain conformal deposition of strontium titanate as a thin layer on top of CNS. This technique depends on using precursors to create the desired materials and purging gas (N2) to carry the precursors’ ions and improve the surface during the deposition. For strontium titanate deposition, SrO and TiO2 were used to obtained few tens nanometer strontium titanate thin film at low temperature ~ 250 . Different recipes have been followed to obtain different STO thickness. The thickness for STO was controlled by ALD number cycles during the deposition. The morphology of CNS/STO based 3D structure are controlled by two things. Firstly, CVD recipes for CNS which leads to different CNS morphology (height and thickness). This morphology shows little irregularity and crumple surface due to CNS growth mechanism during CVD process. However, this irregularity is overcome using conformal deposition technique through ALD for the strontium titanate. The second thing is ALD 7
ACCEPTED MANUSCRIPT recipe, which controls the STO deposited thickness and morphology. Figure 6 shows the morphological SEM views for STO coated CNS four wafers, S1, S2, S3, S4. The Figures 6a-6d show four different STO morphologies due to different ALD recipes which yields
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different sheet thicknesses of 70nm, 98nm, 40nm and 95 nm with estimated STO layer
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thicknesses of 30nm, 45nm, 20nm and 44nm, for the samples S1, S2, S3 and S4 , respectively.
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Figure 6a, shows the SEM morphology for sample taken from wafer S1. The height of the sheets for this sample was about 1030 nm, and the sheet thickness is ~ 70nm in
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average. This offers an aspect ratio close to 14 as an estimated value. However, CNS crumpled and overlapped layer make the real value of the enhancement area less than the
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estimated value.
Figure 6b shows top view SEM micrograph for strontium titanate coated CNS of the
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sample S2. The height and sheet thickness are 886 nm and 98 nm respectively. The
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aspect ratio obtained due to these values is 9. This is less than that for S1 which was attributed to the higher thickness for STO for this case than for S1 and also because of the
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small sheet height.
Figure 6c shows top view SEM micrograph for strontium titanate coated CNS for the sample S3. The height and sheet thickness are 1200 nm and 40 nm respectively. The aspect ratio is 30. This value is higher than the other values obtained for S1, S2 and S4 which can be attributed to the small STO layer thickness coated by ALD. The small STO thickness for S3 may provide a high probability of defect formation and un-coated areas in the CNS surfaces which in turn leads to high leakage current for such structure. Figure 6d is top view SEM micrographs of strontium titanate coated CNS for sample S4. The height and sheet thickness are 1400 nm and 95 nm, respectively. The large height for the CNS sheets in this case may be attributed to the region of the wafer in which the sample was taken. This is related to the non-homogeneity of CNS on the wafer which is caused by non-homogeneity of CVD deposition through the whole wafer.
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ACCEPTED MANUSCRIPT The forth step toward fabricating 3D nanostructured devices is making metal dots on STO conformal layers. Au metal dots with diameters ranging from 75 to 500µm are deposited by thermal evaporation through a shadow mask. The sample surface after metal
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dots covering is indicated in the Figure 5.
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The nucleation stages for STO onto CNS through ALD deposition is clearly shown in the Figures 7a-7i. Figures 7a-7f show the top view SEM images for these nucleation stages.
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It is clear that, STO starts to be grown and deposited gradually on the sheets layers and in the interfaces between the sheets. At the first deposition stages, the STO forms grains-
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like structure and non-conformal deposition spots take place which is attributed to the collapsed CNS morphology. More deposition cycles, much STO amount is deposited and
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more regularity appears which lead to perfect conformal and thicker layer. Figures 7g-7i, are tilted SEM views for the CNS/STO sheets. From these Figures we can see that the
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of the sheets, as well.
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nucleation is regularly grown on the sheet surfaces, in between them and on the top edge
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Raman spectroscopy was used to characterize CNS/STO structure. The curves show the spectra of the CNS as reference and those with STO coating CNS. Raman spectroscopy for CNS and STO coated CNS yields the same peaks with small difference in the peaks intensity. These peaks’ intensities represent the G and D peaks (table 1). High clarity for D and G peaks originates from the highly graphitized carbon which also indicates that the grown CNS posses a more nanocrystalline structure and large defects [23]. These characteristics make CNS a perfect electrode for energy storage applications. No peaks were appeared for STO improving the amorphous phase for STO. Figure 8a displays Raman spectra of the four TiN/CNS/STO samples in the region 1200– 1700 cm-1. Three distinct peaks have been observed: a typical graphite vibration mode G-band at 1580 cm-1 , a disordered carbon mode D-band at 1348 cm-1, and a Ď line at 1620 cm-1. The G peak at 1580 cm-1 indicates graphite structures fabrication during growth. The second peak D at 1348 cm-1 resulted from defects in the curved graphite sheets, tube ends, and surviving impurities; the weak peak Ď at 1620 cm-1 corresponds to a maximum in the density of 9
ACCEPTED MANUSCRIPT states of the mid-zone phonon and also reveals a disorder induced behavior similar to that of the signal at 1348 cm-1 . The D and Ď lines resulted from disorder-induced features caused by lattice distortion. The unchanged values for ID/IG shows the crystalline
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structure more consistent for CNS through atomic layer deposition for STO on top of
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CNS (Figure 8b). This also clarified the good graphitization degree of the carbon during CVD growing for CNS. STO films with 63% Sr-rich strontium titanate were grown at which explains disappearing any peaks for STO in Raman spectra because of that
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the onset crystalline temperature for STO is between 530
-570
[9].Solid state
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electrical characterizations for metal-insulator-metal (MIM) capacitor based on CNS/STO/Au shows an ideal capacitor performance with very low leakage current at low
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voltage. Figure 9 shows the leakage current density and the breakdown behavior for this device with different dot sizes. Each dot represents a single MIM capacitor. An excellent
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area scaling and strong breakdown behavior is clearly observed. A very low leakage
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Figure 9 (inset).
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current density around 10-7 A/cm2 is measured in the potential window [0 V, +1V],
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In terms of the geometric parameters (area, thickness) of the capacitors, the capacitance is
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calculated as
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Where 0 and r in equation (1) are the air permittivity and the dielectric permittivity (also called the dielectric constant), respectively, A is the effective area of the surface of
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the capacitor, and d is the thickness of the dielectric layer. According to equation (1), the area enhancement obtained by comparing two capacitors
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with the same dielectric material is given by
Utilizing equation (2), the area enhancement is estimated by comparing the capacitance measured for Al2O3 based blanket TiN/Al2O3, (D1 sample) capacitors with the capacitance measured from those with Al2O3 based CNS/Al2O3 capacitors (D2, D3 samples). Capacitance values are determined from EIS as illustrated in Figure 10. In these Figures the impedance and capacitance are measured through Nyquist plots and the fitted circuits for each electrochemical system are displayed in the inset of each graph. Figure 10a, shows Nyquist plots for electrochemical capacitors of sample D1: TiN/Al2O3 with fitting circuit [RsCs] showed in the inset of this Figure. The fitting circuit parameters are Rs = 175 Ω, Cs = 2.95 µF, and N = 0.985, where the factor N shows the quality of fitting. The value here of N is typical for the fitting parameters C & R. 11
ACCEPTED MANUSCRIPT Figure 10b, shows Nyquist plots for electrochemical capacitors of D2: CNS/Al2O3 (H2O), with the fitting circuit [Rs(RpCp)] shown in the inset of this Figure. The circuit parameters
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are Rs = 380 Ω, Rp = 165 kΩ, Cp = 28 µF, and N = 0.892. Figure 10c, shows Nyquist plots for electrochemical capacitors of D3: CNS/Al2O3 (O3),
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with fitting circuit [Rs(RpCp)]. The circuit parameters are Rs = 668 Ω, Rp = 1.9 MΩ , Cp =
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25 µF, and N = 0.955.
In the Figures 10d, 10e, and 10f, the Bode plots of the capacitors for the three samples are
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shown. The plots show the capacitance behavior for the three capacitors, which is plotted as the phase change dependence on frequency. The capacitors show a stable behavior
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through most of the frequency range (0.01 Hz-10 MHz). At low frequency, the phase angles are 89ᵒ, 70ᵒ, and 84ᵒ for D1, D2, and D3, respectively. These values are
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comparable to the values for typical supercapacitors with aqueous electrolytes [24].
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Area enhancement is obtained by calculating the capacitance enhancement from D1, D2 and D3. The area enhancement (A2/A1) obtained for the case of D2 and D1 with the C
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and d values of C1= 2.95 µF, d1 = 15 nm, C2= 28 µF, and d2 = 20 nm is approximately 1. For the case of (A3/A1) for samples D3 and D1 with the C and d values of C1= 2.95 µF, d1 = 15 nm, C3= 25 µF, d3 = 20 nm, the area enhancements magnitude is 13. As a result of the high aspect ratio of CNSs, the area enhancements expected from CNSs as deposited is very high. However, after ALD deposition on CNS, the high conformity feature of this deposition technique causes most of porous and vacant spots on the surface of the entire CNS to be filled and occupied. This explains the significant reduction of the area per footprint of CNSs after ALD. In the case of a CNS layer after ALD, using the aspect ratio calculations from the CNS dimensions (our CNS samples have sheet heights of approximately 500 nm and Al2O3 thicknesses of 20 nm), the area enhancement is in the range of 16. This value is close to the results obtaining using impedance characterization.
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ACCEPTED MANUSCRIPT 4. Conclusion High aspect ratio and low leakage current CNS based high-k nanostructure is fabricated unitizing the open volume and high area per foot print of CNS. High conformal
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deposition for STO is obtained exploiting ALD which yields an excellent coating on the
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sheets surfaces and in the interfacial spaces which is confirmed through the morphological characterization for CNS/STO surface. MIM capacitors based on
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CNS/STO 3D structures show an ideal capacitor behavior with strong breakdown and very low leakage current density (around 10-7 A/cm2 ). The area enhancement for CNS is
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obtained from CNS based Al2O3 supercapacitors extracted from the electrochemical impedance spectroscopy (EIS). EIS for CNS based supercapacitors reported an area
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enhance of 11 and 13. These calculations are in agreement with those obtained from aspect ratio analyzing. This makes EIS characterization very promising method to
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estimate the area enhancement for different 3D open volume nanostructures rather than
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CNS. Such high area and low leakage current nanostructure is very interesting to be exploited for high and unique performance devices utilized in engineering, electrical and
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electrochemical applications, like DRAM and supercapacitors. 5. Acknowledgements
This Project was Financially supported by King Saud University, Vice Deanship of Research Chairs. We also we would like to thank Dr. Iuliana Radu, Prof. Philippe M. Vereecken and Dr. Dare Cott, for their support and help of the experimental work while hosted at imec-Belgium.
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ACCEPTED MANUSCRIPT References
P. Banerjee, I. Perez, L. Henn-Lecordier, S. B. Lee, G. W. Rubloff. Nature Nanotech. ,
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[1]
4 (2009) 292-296.
S. C. Kilchenmann, E. Rollo, E. Bianchi, C. Guiducci, Sens. Actuators B Chem., 185
RI
[2]
(2013) 713–719.
J.C. Ye, Y.H. An, T.W. Heo, M.M. Biener, R. J. Nikolic, M. Tang, H. Jiang, Y. M.
SC
[3]
Wang. Journal of Power Sources. 248 (2014) 447-456.
J.Y. Wang, T. Ito, Diamond Relat. Mater., 16 ( 2007) 589-593.
[5]
N.G. Shang, F.C.K. Au, X.M. Meng, C.S. Lee, I. Bello, S.T. Lee, Chem. Phys. Lett., 358 (2002) 187.
[6]
S. T. M. De Volder, S. Tawfick, S. Park, D. Copic, Z. Zhao, W. Lu, and A. J. Hart,.
D
Adv. Matter., 22 (2008) 4384.
Teng Wang , Di Jiang , Si Chen , Kjell Jeppson , Lilei Ye , Johan Liu. Mater Lett., 78 (2012) 184.
TE
[7]
MA
NU
[4]
R. Waser, R. Dittmann, G. Staikov, and K. Szot, Adv. Mater., 21 (2009) 2632–2663.
[9]
M. Popovici, S. Van Elshocht, N. Menou, J. Swerts, D. Pierreux, A. Delabie, B. Brijs,
AC CE P
[8]
T. Conard, K. Opsomer, J. W. Maes, D. J. Wouters, J. A. Kittl, J. Electrochem. Soc. 157 (1) (2010) G1 – G6.
[10] C. S. Hwang, Mater.Sci. &Eng. B. 56( 1998) 071-091 [11] V. A. Coleman, R. Knut, O. Karis, H. Grennberg, U. Jansson, R. Quinlan, B. C. Holloway, B. Sanyal and O. Eriksson. J. Phys.D:Appl.Phys., 4 (2008) 062001. [12] Mingyao Zhu, Jianjun Wang, Brian C. Holloway, R.A. Outlaw, Xin Zhao, Kun Hou, V. Shutthanandan, Dennis M. Manos, Carbon, 45(2007) 2229–2234. [13] M. Kemell, M. Ritala, M. Leskela, E. Ossei-Wusu, J. Carstensen, H. Foll, Microelectronic Engineering 84 (2007) 313–318 [14] B. Su, D. Zhang, T.W. Button. Journal of European Ceramic Society, 32 (2012) 33453349. [15] C. L. Pint, N. W. Nicholas, S. Xu, Z. Sun, J. M. Tour, H. K. Schmidt, R. G. Gordon, R. H. Hauge, Carbon 49 (2011) 4890-4897.
14
ACCEPTED MANUSCRIPT [16] Hui Pan, Jianyi Li, YuanPing Feng, Nanoscale Res Lett (2010) 5:654–668 [17] Elzbieta Frackowiak, François Béguin, Carbon 39 (2001) 937–950 [18] Avouris, Phaedon, Zhihong Chen, and Vasili Perebeinos. Nature Nanotech., 2 (2007)
PT
605–615.
Journal of Power Sources 194 (2009) 1208–1212.
RI
[19] Xin Zhao, Hui Tian, Mingyao Zhu, Kai Tian, J.J. Wang, Feiyu Kang, R.A. Outlaw.
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[20] D.J. Cott, M. Verheijen, O. Richard, I.P. Radu, S. De Gendt, S. Van Elshocht, P.M. Vereecken, Carbon. 58 (2013).
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[21] Meryl D. Stoller, Sungjin Park, Yanwu Zhu, Jinho An, and Rodney S. Ruoff., Nano Lett. 8 (2010) 3498-3502.
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[22] Tsung-Chi Hung, Chia-Fu Chen, Chien-Chung Chen, Wha-Tzong Whang, Applied Surface Science, 255(2009) 3676–3681.
[23] Z. Wang. M. Shoji, H. Ogata, Applied Surface Science 257 (2011) 9082– 9085
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[24] Fanhui Meng and Yi Ding. Adv. Mater. 23 (2011) 4098–4102.
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ACCEPTED MANUSCRIPT Figure captions :
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Figure 1. (a) Schematic diagram for CNS representing the single sheet’s height and thickness. (b) SEM X-section view of single carbon nanosheets. (c) Schematic x-section of a single carbon nanosheet illustrating the formation of CNS from multiple graphene sheets (d) Schematic for the transformation from a blanket structure towards a 3D structure illustrating the area increase per footprint. (e) Schematic diagram illustrating the layers of sheet-like carbon nanostructure.
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Figure 2. Top view SEM micrograph of a CNS layer (a) and a CNS based Al2O3 layer (Scale bar = 300 nm).
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Figure 3. The first stages of CNS growing with RFCVD system, top view (a) and x-section view (b).
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Figure 4. SEM micrograph for CNS morphology grown by CVD. (a) Top – view micrograph indicating the sheet thickness. (b) X-section micrograph for CNS indicating the height of the CNS on TiN wafer.
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Figure 5. Schematic diagram for the fabrication stages of CNS/STO 3D nanostructure Figure 6. SEM micrograph for STO coated CNS for the four wafers with different STO thickness. (a) S1 with 70nm sheet thickness and estimated STO thickness ~ 30nm, (b) S2 with 98nm sheet thickness and estimated STO thickness ~ 45nm, (c) S3 with 40nm sheet thickness and estimated STO thickness ~ 20nm, (d) S4 with 95nm sheet thickness and estimated STO thickness ~ 44nm. Scale bar = 200nm. Figure 7: Nucleation stages for STO on top of 3D CNS. Figures 7a- 7f are top view SEM morphology which indicate the nucleation stages of STO on top of CNS layers starting from the layers on the sheets surfaces. Figures 7g- 7i are tilted view for CNS/STO 3D structure through STO nucleation. Figure 8. (a) Raman spectra for CNS (reference sample) and CNS-STO S1, S2, S3, S4. (b) The ratio of the D band integrating intensity to the G band integrating intensity (IG) for the whole samples.
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ACCEPTED MANUSCRIPT Figure 9. Leakage current density for CNS-STO-Au based MIM capacitors. The inset shows the leakage current in the range 0V-1V
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Fig.10 : Electrochemical impedance spectroscopy for D1, D2 and D3, samples. Nyquist plots for electrochemical capacitors of D1: TiN/Al2O3 (a), D2: CNS/Al2O3 (H2O) (b) and D3: CNS/Al2O3 (O3) (c). The fitting circuit is shown in each plot for the electrochemical system associated with each structure indicating the capacitance and resistance for each system. Impedance phase angle versus frequency for D1: TiN/Al2O3 (d), D2: CNS/Al2O3 (H2O) (e), and D3: CNS/Al2O3 (O3) (f).
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Table 1:
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ID/IG 2.385468 2.443028 2.319904 2.088129 2.241536
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IG 9290 7846 7471 11574 9481
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ID 22161 19168 17332 24168 21252
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Sample Ref S1 S2 S3 S4
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Integrating intensity (ID/IG) ratio of D to G bands.
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ACCEPTED MANUSCRIPT
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Highlights This work includes :
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Fabrication of high aspect ratio solid-state supercapacitors. Low leakage current density MIM capacitors as low as 10-7 A/cm2. Typical capacitors behavior for the fabricated devices with strong breakdown and very low leakage current density. Excellent method to estimate and calculate the area enhancement due to CNS using electroimpednce spectroscopy (EIS). Excellent agreement for the area calculations based on EIS with those obtained from aspect ratio analyzing
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S0167-9317(16)30466-X doi: 10.1016/j.mee.2016.11.013 MEE 10387
To appear in: Received date: Revised date: Accepted date:
2 February 2016 13 September 2016 14 November 2016
Please cite this article as: Mohammad Qaid, M.S. Alsalhi, High aspect ratio and low leakage current carbon nanosheets based high-k nanostructure for energy storage applications, (2016), doi: 10.1016/j.mee.2016.11.013
This is a PDF file of an unedited manuscript that has been accepted for publication. As a service to our customers we are providing this early version of the manuscript. The manuscript will undergo copyediting, typesetting, and review of the resulting proof before it is published in its final form. Please note that during the production process errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.
ACCEPTED MANUSCRIPT High aspect ratio and low leakage current carbon nanosheets based high-k nanostructure for energy storage applications
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Mohammad Qaid 1,2,3* , M. S. Alsalhi 3,4
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Research Chair, Laser Diagnosis of Cancers,College of Science, King Saud University, Riyadh, 11451, Kingdom of Saudi Arabia.
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KACST-Intel Consortium Center of Excellence in Nano-Manufacturing Applications (CENA), Riyadh, Saudi Arabia. 2 Department of Physics, Taiz University, Taiz, Yemen. 3 Department of Physics and Astronomy, College of Science, King Saud University, Riyadh 11451, Kingdom of Saudi Arabia.
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*Correspondence and requests for materials should be addressed to:
Abstract :
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Mohammad Qaid (email: [email protected])
Carbon nanosheets (CNS) are exploited to fabricate a high aspect ratio strontium titanate (STO) structure with very low leakage current density. CNS are grown by chemical vapor deposition (CVD) on 70nm layer of TiN coated Si wafers. Atomic layer deposition (ALD) is employed as a conformal deposition technique for Sr-rich STO on top of 3D CNS to obtain a conformal STO layer with high area per footprint. The area enhancement resulting from CNS is investigated using electrochemical impedance spectroscopy (EIS) for conformally deposited Al2O3 thin films based TIN blanket and CNS, electrodes. It is investigated by comparing the capacitance enhancement resulted from CNS/Al2O3 capacitors with that obtained from blanket TiN/ Al2O3 capacitors. Our findings show that EIS is very promising for estimating the area increase for different nanostructures. The electrochemical spectroscopy show typical capacitor behavior for CNS based electrochemical capacitors. Moreover, solid-state electrical characterizations for CNS/STO based metal-insulator-metal (MIM) capacitors show very low leakage current density with strong breakdown and excellent area scaling through the potential window [0 V, +10V].
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ACCEPTED MANUSCRIPT 1. Introduction Future advances in nanomaterials and energy applications need more scalable fabrication of complex and surface architecture which is essential for the next generation of micro
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and nano electronic devices. The next generation of energy systems is based on
electronic and optical devices.
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nanotechnology which is the corner stone of high performance and state-of-the-art High aspect ratio (AR) -Surface to volume ratio-
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nanostructures are produced with different techniques and employ several materials. One approach is using high area open volume anodized aluminum oxide as template for thin
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layer of aluminum oxide deposited by atomic layer deposition [1]. In this approach a high area and state-of-the-art solid state supercapacitors were obtained. Other branch of these
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attempts is using micropillars to produce such open volume with high aspect ratio surfaces [2,3]. Recently, nanometer-sized carbon materials have attracted significant
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attention in the scientific community because of their unique features such as open
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volume, high aspect ratio, high conductivity and sharp edges. These unique properties make it good candidate as field emitters and for fuel cell and micro electronic
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technologies [4,5]. Carbon based nonmaterial structures are produced in many forms including carbon nanotubes (CNTs) and carbon nanosheets (CNS). These 3D structures are fabricated to produce large area structures using capillary forming of CNTs using a film of iron catalyst patterned by optical lithography on silicon wafer. CNTs microstructures are made as vertically aligned forests grown by atmospheric pressure thermal chemical vapor deposition (CVD) [6,7]. On the other hand, future microelectronics applications involving metal–insulator–metal (MIM) capacitors will require thin films of high-κ ceramic materials with dielectric constants above 100. Thin films of large dielectric constant, low dielectric loss and exhibiting good high frequency characteristics such as SrTiO3 (STO), are promising candidates for many applications like capacitors in DRAM (dynamic random-access memory) applications [8,9]. STO material appears as promising high-κ dielectric material candidates. The high dielectric permittivity of these materials even in thin films and on 2
ACCEPTED MANUSCRIPT the other hand, the relatively small band gaps (~ 3.2eV) of these materials are so interesting [10]. CNS can be described as graphite sheet nanostructures with edges that are composed of stacks of planar graphene sheets standing almost vertically on the
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substrate (Fig.1a-1c). The sheets form a self-supported network of sheet structures with
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thicknesses in the range from a few nanometers to a few tens of nanometers, and with a high aspect ratio (Fig.1b; 1e). The large surface area and sharp edges of CNS make it
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very useful for a number of different applications [11].
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One model describes the mechanism of growth and structure of CNS in terms of the effect of deposition parameters on the structure and morphology properties [12]. It
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proposes that, atomically thin graphene sheets result from a balance between depositions through surface diffusion and etching by atomic hydrogen. The observed vertical orientation of these sheets results from the interaction of the plasma electric field with
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their anisotropic polarizability. The resulting atomically thin edges require the presence
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of simultaneous etching by atomic hydrogen coupled to a vertical electrical field near the
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substrate surface. The electric field induces the anisotropic dipoles of the graphene sheets help to provide the observed self-aligned vertical orientation [12]. Among plenty of high area structures, CNS is one of the largest area per foot print nanostructures [13-20]. In the literature, the surface areas of graphene sheets are measured by the N2 absorption, Brunauer-Emmett-Teller (BET) method [21]. This method precisely evaluates the area enhancement provided by the three-dimensional morphology of a graphene multi-sheets-like structure. Using CNS as electrode due to their unique properties is very promising for electronic devices. On the other hand, utilizing STO as dielectric is very modern for high performance devices like DRAM and energy storage applications [8,9]. Assembling the both unique features for CNS and STO is much promising to obtain an outstanding structure to be exploited in many state-of-the-art applications. In this work we fabricate 3D high aspect ratio with high area per footprint and open volume nanostructure. This
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ACCEPTED MANUSCRIPT unique structure consists of high conductivity electrode and an insulator with extraordinary dielectric properties.
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Moreover, in this work we determine the area enhancement provided by CNSs to Al2O3based capacitors by comparing the capacitance measurements obtained from
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electrochemical impedance spectroscopy (EIS) for electrochemical capacitors based on
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CNSs, with blanket capacitors based on TiN. The capacitance enhancement calculations lead to the determination of the magnitude of the area enhancement of high aspect ratio
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CNS electrodes.
2. Experimental details
Carbon nanosheets based 3D structure devices were prepared in two stages. In the first
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stage, CNS was grown by Radio frequency plasma enhanced chemical vapor deposition
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(RFPECVD- oxford 800Agile). CNS deposition was deposited on Si/TiN 200mm wafers. TiN thickness is around 70nm deposited by physical vapor deposition (PVD). CNS
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system of 13.56 MHz with Radio frequency power of 300W was coupled through a window into a vacuum chamber through a capacitive coupled plasma (CCP) chamber. CNSs have been grown at high temperature (690
) and low pressure (10-2 torr). In the
CVD system, the substrate temperature was controlled by Rf power. Acetylene C2H2 in H2 atmosphere was used as carbon precursor with flow rate ratios of (10:100) sccm (standard cubic centimeter per minute), for S1 and S2, samples, and (5:200) sccm for S3 and S4, samples. The wafers were grown at temperature 690Cᵒ for 45min for S1 and S2, and 90min for S3 and S4, samples. The details of the deposition conditions for CVD have been reported in other work done by Cott et al [20]. In the second stage, strontium titanate was grown by atomic layer deposition (ALD) at low temperature (200
) on
CNS as dielectric with different thickness due to the number of ALD deposition cycles. The run cycles were 45, 69, 45, and 69 for S1, S2, S3 and S4 wafers respectively. STO obtained thicknesses were around 31nm, 45nm, 18nm, and 45 nm for S1, S2, S3, and S4,
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ACCEPTED MANUSCRIPT respectively. The CNS/STO structures were defined through metal dots deposited by thermal evaporation through Nickel shadow mask.
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Morphological studies were investigated by scanning electron microscopy (SEM). Two instrument models have been used, low resolution (SEM, Philips XL30), and high
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resolution SEM (FEI, and NOVA 200).
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Raman spectroscopy was performed by (WiTec CRM 200) tool at a wavelength of 532nm. This characterization investigated the graphitization of carbon nanosheet grown
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through CVD process.
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The electrochemical characterization of the CNS based capacitors were achieved through electrochemical impedance spectroscopy (EIS) using an electrochemical cell of 2.7 cm diameter and 0.2 M Na2SO4 as the electrolyte. EIS characterizations utilized a three
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controlled by Nova 1.9 software.
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electrode chemical workstation setup connected with a potentiostat PGSTAT302N
Electrochemically, three samples are studied in this work are : D1, D2, and D3 and have
respectively.
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sequence layers of Si/TiN/Al2O3, Si/TiN/CNS/Al2O3 (H2O), and Si/TiN/CNS/Al2O3 (O3), A thin layer of Al2O3 is deposited on top of TiN and CNS layers by ALD using H2O and O3 as oxidants for D2 and D3, respectively. Figure 2 shows the SEM micrograph for the morphology of CNS as deposited (Fig.2a) and Al2O3 deposited on CNS (Fig.2b). The obtained Al2O3 thicknesses for the three samples are 15 nm, 20 nm, 20 nm for D1, D2, and D3, respectively. All work involving ALD and CVD is done inside a state-of-the-art clean-room at IMEC-Belgium.
3. Results and discussion CNS vertically grown sheets are clearly shown in the schematic diagram in the Figures 1a-1c, which clarify the diagram of the single sheets height and thickness. From this 5
ACCEPTED MANUSCRIPT schematic, it is shown that, the sheets represent self-supported network structures. This is due to the growth mechanism of CNS explained before. These parameters – thickness and height- define the aspect ratio of the CNS, and they depend on the deposition time and
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precursor flow rate. Figure 1e, represent the schematic diagram for single sheet which
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indicates how it is vertically grown upward the substrate and contains multi graphene stack sheets. Figure 1b shows a SEM cross-section view of single sheet grown vertically
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with respect to the substrate which is explained by the growth mechanism model
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mentioned previously [12].
Figure 3 shows the first growing stages of CNS. In the Figure 3a, a top view of CNS
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seeds at an amorphous phase is shown. At the beginning of deposition process, the carbon morphology is created by forming tiny amorphous clusters and no vertical sheet-like structure is present at this point of growth process only horizontal layers of amorphous
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carbon supported by the substrate (Fig.3b). At this stage the deposition conditions (flow
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rate, heat, and Plasma power) are now sufficient to form carbon sheets [22]. This is
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corresponding to the growth mechanism which suggests that, graphene sheets grow parallel to the substrate surface until a sufficient level of force develops at the grain boundaries to curl the leading edge of the top layers upward. After the top layers curl up being vertical to the substrate surface, which is along the plasma sheath caused electric field direction, the very high surface mobility of incoming carbon-bearing species, and the induced polarization (of the graphitic layers) associated with the local electric field in the sheath layer, combine to cause the nanosheets to grow higher rather than thicker [12]. Figure 4a is a top view SEM micrograph of CNS morphology. It can be seen that the vertical sheet-like CNS possess crumpled surfaces and the sheets arbitrarily interlace each other with a large surface area. Figure 4b is X-section SEM view for that structure which indicates CNS growth in C2H2/H2 system with ratios of 10/100 on the TiN substrate at 690
. It shows CNS structure growth with height of 1 µm. This kind of
structure can provide high aspect ratio and hence high area enhancement exceeding 50 time enhance for some morphologies for the case of sheet thickness of 5 nm. 6
ACCEPTED MANUSCRIPT Three-dimensional CNS/STO structure is prepared through many steps with specific methods and particular techniques used for each step. Four wafers have been prepared to obtain different structures characteristics. These characteristics include both: CNS
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morphology (height and sheet thickness) and STO (thickness and conformal deposition
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on CNS sheets due to the CVD and ALD growth conditions).
Figure 5 shows the fabrication stages for the samples which include CNS growth by
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CVD, STO deposition by ALD and metal dots addition by thermal evaporation through nickel shadow mask.
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Firstly, 200mm Si/TiN wafers were prepared for the process into cleanroom atmosphere. The second step is the growth of CNS on top of TiN wafers. Carbon nanosheets were
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grown on 200mm Si wafers coated with a 70nm layer of TiN. During the deposition, 300W radio frequency (RF, 13.56 MHz) power was coupled into the deposition chamber.
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A precursor gas acetylene (C2H2) was used as carbon source and mixed with hydrogen H2
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as carrier gas. The flow rates for the gases C2H2/H2 inside the chamber were 10/100 for S1 and S2 wafers and 5/200 sccm for S3 and S4 wafers. The deposition time for the four
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wafers was 45 min for S1 and S2, and 90 min for S3 and S4. The third step is atomic layer deposition for strontium titanate as insulator on top of CNS. ALD was used to obtain conformal deposition of strontium titanate as a thin layer on top of CNS. This technique depends on using precursors to create the desired materials and purging gas (N2) to carry the precursors’ ions and improve the surface during the deposition. For strontium titanate deposition, SrO and TiO2 were used to obtained few tens nanometer strontium titanate thin film at low temperature ~ 250 . Different recipes have been followed to obtain different STO thickness. The thickness for STO was controlled by ALD number cycles during the deposition. The morphology of CNS/STO based 3D structure are controlled by two things. Firstly, CVD recipes for CNS which leads to different CNS morphology (height and thickness). This morphology shows little irregularity and crumple surface due to CNS growth mechanism during CVD process. However, this irregularity is overcome using conformal deposition technique through ALD for the strontium titanate. The second thing is ALD 7
ACCEPTED MANUSCRIPT recipe, which controls the STO deposited thickness and morphology. Figure 6 shows the morphological SEM views for STO coated CNS four wafers, S1, S2, S3, S4. The Figures 6a-6d show four different STO morphologies due to different ALD recipes which yields
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different sheet thicknesses of 70nm, 98nm, 40nm and 95 nm with estimated STO layer
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thicknesses of 30nm, 45nm, 20nm and 44nm, for the samples S1, S2, S3 and S4 , respectively.
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Figure 6a, shows the SEM morphology for sample taken from wafer S1. The height of the sheets for this sample was about 1030 nm, and the sheet thickness is ~ 70nm in
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average. This offers an aspect ratio close to 14 as an estimated value. However, CNS crumpled and overlapped layer make the real value of the enhancement area less than the
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Figure 6b shows top view SEM micrograph for strontium titanate coated CNS of the
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sample S2. The height and sheet thickness are 886 nm and 98 nm respectively. The
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aspect ratio obtained due to these values is 9. This is less than that for S1 which was attributed to the higher thickness for STO for this case than for S1 and also because of the
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small sheet height.
Figure 6c shows top view SEM micrograph for strontium titanate coated CNS for the sample S3. The height and sheet thickness are 1200 nm and 40 nm respectively. The aspect ratio is 30. This value is higher than the other values obtained for S1, S2 and S4 which can be attributed to the small STO layer thickness coated by ALD. The small STO thickness for S3 may provide a high probability of defect formation and un-coated areas in the CNS surfaces which in turn leads to high leakage current for such structure. Figure 6d is top view SEM micrographs of strontium titanate coated CNS for sample S4. The height and sheet thickness are 1400 nm and 95 nm, respectively. The large height for the CNS sheets in this case may be attributed to the region of the wafer in which the sample was taken. This is related to the non-homogeneity of CNS on the wafer which is caused by non-homogeneity of CVD deposition through the whole wafer.
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ACCEPTED MANUSCRIPT The forth step toward fabricating 3D nanostructured devices is making metal dots on STO conformal layers. Au metal dots with diameters ranging from 75 to 500µm are deposited by thermal evaporation through a shadow mask. The sample surface after metal
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dots covering is indicated in the Figure 5.
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The nucleation stages for STO onto CNS through ALD deposition is clearly shown in the Figures 7a-7i. Figures 7a-7f show the top view SEM images for these nucleation stages.
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It is clear that, STO starts to be grown and deposited gradually on the sheets layers and in the interfaces between the sheets. At the first deposition stages, the STO forms grains-
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like structure and non-conformal deposition spots take place which is attributed to the collapsed CNS morphology. More deposition cycles, much STO amount is deposited and
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more regularity appears which lead to perfect conformal and thicker layer. Figures 7g-7i, are tilted SEM views for the CNS/STO sheets. From these Figures we can see that the
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of the sheets, as well.
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nucleation is regularly grown on the sheet surfaces, in between them and on the top edge
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Raman spectroscopy was used to characterize CNS/STO structure. The curves show the spectra of the CNS as reference and those with STO coating CNS. Raman spectroscopy for CNS and STO coated CNS yields the same peaks with small difference in the peaks intensity. These peaks’ intensities represent the G and D peaks (table 1). High clarity for D and G peaks originates from the highly graphitized carbon which also indicates that the grown CNS posses a more nanocrystalline structure and large defects [23]. These characteristics make CNS a perfect electrode for energy storage applications. No peaks were appeared for STO improving the amorphous phase for STO. Figure 8a displays Raman spectra of the four TiN/CNS/STO samples in the region 1200– 1700 cm-1. Three distinct peaks have been observed: a typical graphite vibration mode G-band at 1580 cm-1 , a disordered carbon mode D-band at 1348 cm-1, and a Ď line at 1620 cm-1. The G peak at 1580 cm-1 indicates graphite structures fabrication during growth. The second peak D at 1348 cm-1 resulted from defects in the curved graphite sheets, tube ends, and surviving impurities; the weak peak Ď at 1620 cm-1 corresponds to a maximum in the density of 9
ACCEPTED MANUSCRIPT states of the mid-zone phonon and also reveals a disorder induced behavior similar to that of the signal at 1348 cm-1 . The D and Ď lines resulted from disorder-induced features caused by lattice distortion. The unchanged values for ID/IG shows the crystalline
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structure more consistent for CNS through atomic layer deposition for STO on top of
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CNS (Figure 8b). This also clarified the good graphitization degree of the carbon during CVD growing for CNS. STO films with 63% Sr-rich strontium titanate were grown at which explains disappearing any peaks for STO in Raman spectra because of that
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the onset crystalline temperature for STO is between 530
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[9].Solid state
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electrical characterizations for metal-insulator-metal (MIM) capacitor based on CNS/STO/Au shows an ideal capacitor performance with very low leakage current at low
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voltage. Figure 9 shows the leakage current density and the breakdown behavior for this device with different dot sizes. Each dot represents a single MIM capacitor. An excellent
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Figure 9 (inset).
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current density around 10-7 A/cm2 is measured in the potential window [0 V, +1V],
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In terms of the geometric parameters (area, thickness) of the capacitors, the capacitance is
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calculated as
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Where 0 and r in equation (1) are the air permittivity and the dielectric permittivity (also called the dielectric constant), respectively, A is the effective area of the surface of
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the capacitor, and d is the thickness of the dielectric layer. According to equation (1), the area enhancement obtained by comparing two capacitors
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Utilizing equation (2), the area enhancement is estimated by comparing the capacitance measured for Al2O3 based blanket TiN/Al2O3, (D1 sample) capacitors with the capacitance measured from those with Al2O3 based CNS/Al2O3 capacitors (D2, D3 samples). Capacitance values are determined from EIS as illustrated in Figure 10. In these Figures the impedance and capacitance are measured through Nyquist plots and the fitted circuits for each electrochemical system are displayed in the inset of each graph. Figure 10a, shows Nyquist plots for electrochemical capacitors of sample D1: TiN/Al2O3 with fitting circuit [RsCs] showed in the inset of this Figure. The fitting circuit parameters are Rs = 175 Ω, Cs = 2.95 µF, and N = 0.985, where the factor N shows the quality of fitting. The value here of N is typical for the fitting parameters C & R. 11
ACCEPTED MANUSCRIPT Figure 10b, shows Nyquist plots for electrochemical capacitors of D2: CNS/Al2O3 (H2O), with the fitting circuit [Rs(RpCp)] shown in the inset of this Figure. The circuit parameters
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are Rs = 380 Ω, Rp = 165 kΩ, Cp = 28 µF, and N = 0.892. Figure 10c, shows Nyquist plots for electrochemical capacitors of D3: CNS/Al2O3 (O3),
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with fitting circuit [Rs(RpCp)]. The circuit parameters are Rs = 668 Ω, Rp = 1.9 MΩ , Cp =
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25 µF, and N = 0.955.
In the Figures 10d, 10e, and 10f, the Bode plots of the capacitors for the three samples are
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shown. The plots show the capacitance behavior for the three capacitors, which is plotted as the phase change dependence on frequency. The capacitors show a stable behavior
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through most of the frequency range (0.01 Hz-10 MHz). At low frequency, the phase angles are 89ᵒ, 70ᵒ, and 84ᵒ for D1, D2, and D3, respectively. These values are
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comparable to the values for typical supercapacitors with aqueous electrolytes [24].
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Area enhancement is obtained by calculating the capacitance enhancement from D1, D2 and D3. The area enhancement (A2/A1) obtained for the case of D2 and D1 with the C
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and d values of C1= 2.95 µF, d1 = 15 nm, C2= 28 µF, and d2 = 20 nm is approximately 1. For the case of (A3/A1) for samples D3 and D1 with the C and d values of C1= 2.95 µF, d1 = 15 nm, C3= 25 µF, d3 = 20 nm, the area enhancements magnitude is 13. As a result of the high aspect ratio of CNSs, the area enhancements expected from CNSs as deposited is very high. However, after ALD deposition on CNS, the high conformity feature of this deposition technique causes most of porous and vacant spots on the surface of the entire CNS to be filled and occupied. This explains the significant reduction of the area per footprint of CNSs after ALD. In the case of a CNS layer after ALD, using the aspect ratio calculations from the CNS dimensions (our CNS samples have sheet heights of approximately 500 nm and Al2O3 thicknesses of 20 nm), the area enhancement is in the range of 16. This value is close to the results obtaining using impedance characterization.
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deposition for STO is obtained exploiting ALD which yields an excellent coating on the
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sheets surfaces and in the interfacial spaces which is confirmed through the morphological characterization for CNS/STO surface. MIM capacitors based on
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CNS/STO 3D structures show an ideal capacitor behavior with strong breakdown and very low leakage current density (around 10-7 A/cm2 ). The area enhancement for CNS is
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obtained from CNS based Al2O3 supercapacitors extracted from the electrochemical impedance spectroscopy (EIS). EIS for CNS based supercapacitors reported an area
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enhance of 11 and 13. These calculations are in agreement with those obtained from aspect ratio analyzing. This makes EIS characterization very promising method to
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estimate the area enhancement for different 3D open volume nanostructures rather than
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CNS. Such high area and low leakage current nanostructure is very interesting to be exploited for high and unique performance devices utilized in engineering, electrical and
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electrochemical applications, like DRAM and supercapacitors. 5. Acknowledgements
This Project was Financially supported by King Saud University, Vice Deanship of Research Chairs. We also we would like to thank Dr. Iuliana Radu, Prof. Philippe M. Vereecken and Dr. Dare Cott, for their support and help of the experimental work while hosted at imec-Belgium.
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ACCEPTED MANUSCRIPT References
P. Banerjee, I. Perez, L. Henn-Lecordier, S. B. Lee, G. W. Rubloff. Nature Nanotech. ,
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[1]
4 (2009) 292-296.
S. C. Kilchenmann, E. Rollo, E. Bianchi, C. Guiducci, Sens. Actuators B Chem., 185
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[2]
(2013) 713–719.
J.C. Ye, Y.H. An, T.W. Heo, M.M. Biener, R. J. Nikolic, M. Tang, H. Jiang, Y. M.
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[3]
Wang. Journal of Power Sources. 248 (2014) 447-456.
J.Y. Wang, T. Ito, Diamond Relat. Mater., 16 ( 2007) 589-593.
[5]
N.G. Shang, F.C.K. Au, X.M. Meng, C.S. Lee, I. Bello, S.T. Lee, Chem. Phys. Lett., 358 (2002) 187.
[6]
S. T. M. De Volder, S. Tawfick, S. Park, D. Copic, Z. Zhao, W. Lu, and A. J. Hart,.
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Adv. Matter., 22 (2008) 4384.
Teng Wang , Di Jiang , Si Chen , Kjell Jeppson , Lilei Ye , Johan Liu. Mater Lett., 78 (2012) 184.
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[7]
MA
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[4]
R. Waser, R. Dittmann, G. Staikov, and K. Szot, Adv. Mater., 21 (2009) 2632–2663.
[9]
M. Popovici, S. Van Elshocht, N. Menou, J. Swerts, D. Pierreux, A. Delabie, B. Brijs,
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[8]
T. Conard, K. Opsomer, J. W. Maes, D. J. Wouters, J. A. Kittl, J. Electrochem. Soc. 157 (1) (2010) G1 – G6.
[10] C. S. Hwang, Mater.Sci. &Eng. B. 56( 1998) 071-091 [11] V. A. Coleman, R. Knut, O. Karis, H. Grennberg, U. Jansson, R. Quinlan, B. C. Holloway, B. Sanyal and O. Eriksson. J. Phys.D:Appl.Phys., 4 (2008) 062001. [12] Mingyao Zhu, Jianjun Wang, Brian C. Holloway, R.A. Outlaw, Xin Zhao, Kun Hou, V. Shutthanandan, Dennis M. Manos, Carbon, 45(2007) 2229–2234. [13] M. Kemell, M. Ritala, M. Leskela, E. Ossei-Wusu, J. Carstensen, H. Foll, Microelectronic Engineering 84 (2007) 313–318 [14] B. Su, D. Zhang, T.W. Button. Journal of European Ceramic Society, 32 (2012) 33453349. [15] C. L. Pint, N. W. Nicholas, S. Xu, Z. Sun, J. M. Tour, H. K. Schmidt, R. G. Gordon, R. H. Hauge, Carbon 49 (2011) 4890-4897.
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ACCEPTED MANUSCRIPT [16] Hui Pan, Jianyi Li, YuanPing Feng, Nanoscale Res Lett (2010) 5:654–668 [17] Elzbieta Frackowiak, François Béguin, Carbon 39 (2001) 937–950 [18] Avouris, Phaedon, Zhihong Chen, and Vasili Perebeinos. Nature Nanotech., 2 (2007)
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605–615.
Journal of Power Sources 194 (2009) 1208–1212.
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[19] Xin Zhao, Hui Tian, Mingyao Zhu, Kai Tian, J.J. Wang, Feiyu Kang, R.A. Outlaw.
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[20] D.J. Cott, M. Verheijen, O. Richard, I.P. Radu, S. De Gendt, S. Van Elshocht, P.M. Vereecken, Carbon. 58 (2013).
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[21] Meryl D. Stoller, Sungjin Park, Yanwu Zhu, Jinho An, and Rodney S. Ruoff., Nano Lett. 8 (2010) 3498-3502.
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[22] Tsung-Chi Hung, Chia-Fu Chen, Chien-Chung Chen, Wha-Tzong Whang, Applied Surface Science, 255(2009) 3676–3681.
[23] Z. Wang. M. Shoji, H. Ogata, Applied Surface Science 257 (2011) 9082– 9085
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[24] Fanhui Meng and Yi Ding. Adv. Mater. 23 (2011) 4098–4102.
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Figure 1. (a) Schematic diagram for CNS representing the single sheet’s height and thickness. (b) SEM X-section view of single carbon nanosheets. (c) Schematic x-section of a single carbon nanosheet illustrating the formation of CNS from multiple graphene sheets (d) Schematic for the transformation from a blanket structure towards a 3D structure illustrating the area increase per footprint. (e) Schematic diagram illustrating the layers of sheet-like carbon nanostructure.
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Figure 2. Top view SEM micrograph of a CNS layer (a) and a CNS based Al2O3 layer (Scale bar = 300 nm).
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Figure 3. The first stages of CNS growing with RFCVD system, top view (a) and x-section view (b).
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Figure 4. SEM micrograph for CNS morphology grown by CVD. (a) Top – view micrograph indicating the sheet thickness. (b) X-section micrograph for CNS indicating the height of the CNS on TiN wafer.
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Figure 5. Schematic diagram for the fabrication stages of CNS/STO 3D nanostructure Figure 6. SEM micrograph for STO coated CNS for the four wafers with different STO thickness. (a) S1 with 70nm sheet thickness and estimated STO thickness ~ 30nm, (b) S2 with 98nm sheet thickness and estimated STO thickness ~ 45nm, (c) S3 with 40nm sheet thickness and estimated STO thickness ~ 20nm, (d) S4 with 95nm sheet thickness and estimated STO thickness ~ 44nm. Scale bar = 200nm. Figure 7: Nucleation stages for STO on top of 3D CNS. Figures 7a- 7f are top view SEM morphology which indicate the nucleation stages of STO on top of CNS layers starting from the layers on the sheets surfaces. Figures 7g- 7i are tilted view for CNS/STO 3D structure through STO nucleation. Figure 8. (a) Raman spectra for CNS (reference sample) and CNS-STO S1, S2, S3, S4. (b) The ratio of the D band integrating intensity to the G band integrating intensity (IG) for the whole samples.
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ACCEPTED MANUSCRIPT Figure 9. Leakage current density for CNS-STO-Au based MIM capacitors. The inset shows the leakage current in the range 0V-1V
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Fig.10 : Electrochemical impedance spectroscopy for D1, D2 and D3, samples. Nyquist plots for electrochemical capacitors of D1: TiN/Al2O3 (a), D2: CNS/Al2O3 (H2O) (b) and D3: CNS/Al2O3 (O3) (c). The fitting circuit is shown in each plot for the electrochemical system associated with each structure indicating the capacitance and resistance for each system. Impedance phase angle versus frequency for D1: TiN/Al2O3 (d), D2: CNS/Al2O3 (H2O) (e), and D3: CNS/Al2O3 (O3) (f).
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Figure 9
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Graphical abstract
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Table 1:
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ID/IG 2.385468 2.443028 2.319904 2.088129 2.241536
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IG 9290 7846 7471 11574 9481
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ID 22161 19168 17332 24168 21252
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Sample Ref S1 S2 S3 S4
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Integrating intensity (ID/IG) ratio of D to G bands.
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Highlights This work includes :
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Fabrication of high aspect ratio solid-state supercapacitors. Low leakage current density MIM capacitors as low as 10-7 A/cm2. Typical capacitors behavior for the fabricated devices with strong breakdown and very low leakage current density. Excellent method to estimate and calculate the area enhancement due to CNS using electroimpednce spectroscopy (EIS). Excellent agreement for the area calculations based on EIS with those obtained from aspect ratio analyzing
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