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High speed dynamic fault imaging
Microelectronic Engineering 12 (1990) 81-86 Elsevier Science Publishers B.V.
HIGH
SPEED
DYNAMIC
81
FAULT
IMAGING
E b e r h a r d Menzel ICT GmbH K l a u s n e r r i n g la 8011Heimstetten West G e r m a n y
A High Speed D y n a m i c Fault Imaging s y s t e m is i n t r o d u c e d which overcomes the p r o b l e m of extremely long data acquisition times of c o n v e n t i o n a l Dynamic Fault Imaging systems. The new system uses m u l t i s a m p l i n g and a new scheme of data storage in the image processor. Data a c q u i s i t i o n times are reduced by factors of 100 to 1000 d e p e n d i n g on the length of the test vector. Data a c q u i s i t i o n is p e r f o r m e d a u t o m a t i c a l l y and the data e v a l u a t i o n using d i f f e r e n c e images, movie, icon display, logic state d i s p l a y or a c t i v i t y m a p p i n g is fully interactive.
INTRODUCTION D y n a m i c Fault Imaging (DFI) is a technique w h i c h allows easy failure l o c a l i z a t i o n on high c o m p l e x i t y ICs. S t r o b o s c o p i c images of d i f f e r e n t logic states of a p r o g r a m loop are a c q u i r e d and stored, first with a r e f e r e n c e device (Golden Device) and then with the device under test (DUT). A c o m p a r i s o n of images of a c e r t a i n state reveals d i f f e r e n c e s and allows the d e t e r m i n a t i o n of the l o c a t i o n of the fault and its first a p p e a r a n c e in the p r o g r a m loop. A n a l y s i s of s u b s e q u e n t states yields i n f o r m a t i o n about the s p r e a d i n g of the failure until it reaches the bond pads of the IC [I]. By l o o k i n g at the same pixel in each of the d i f f e r e n t state images a logic state analysis of c e r t a i n IC nodes can be performed. A technique called "Delay Mapping" [I] gives i n f o r m a t i o n about weak parts of the d e s i g n of an IC and "Activity mapping" [I] reveals i n f o r m a t i o n about the e f f e c t i v e n e s s of test patterns. The most a t t r a c t i v e feature of this set of t e c h n i q u e s is the fact that no s p e c i f i c i n f o r m a t i o n about the f u n c t i o n i n g or the layout of the d e v i c e is needed, p r o v i d e d that at least one g o l d e n device exists. The most u n a t t r a c t i v e feature is the time n e e d e d to acquire the s o m e t i m e s huge sets of of state images (with 100 state images and 5 m i n u t e s per image the total a c q u i s i t i o n time is longer than 8 hours).
0167-9317/90/$3.50 © 1990, Elsevier Science Publishers B.V.
E. Menzel / High speed dynamic fault imaging
82
HIGH
SPEED
DYNAMIC
FAULT
IMAGING
SYSTEM
In o r d e r to o v e r c o m e the data a c q u i s i t i o n p r o b l e m w i t h DFI, ICT has c o m b i n e d the p a t e n t e d "Multisampling Technique" [2] with a new concept of data storage and data averaging in image p r o c e s s o r s to p r o v i d e High Speed DFI (HSDFI). Here, the signal is not s a m p l e d just once per loop as in c o n v e n t i o n a l DFI systems, but a n u m b e r of times. Compared to c o n v e n t i o n a l DFI the total data acquisition time then is r e d u c e d by the n u m b e r of samples taken per loop. If e.g. the loop is 100 c l o c k cycles and we sample 100 times per loop, the acquisition time is reduced by a factor of 100 (see fig.l). T y p i c a l a c q u i s i t i o n times with 10 MHz c l o c k rate and 100 states per loop range b e t w e e n 2 and 10 m i n u t e s d e p e n d i n g on the size of the scanfield.
CLOCK
SIGNAL
IC SIGNAL
J--I
[--I
I
I
I
DFI SAMPLING PULSE
n HSDFI SAMPLING PULSES
H | START OF LOOP
n
H
n
H__Hq
M SAMPLES PER LOOP
FIGURE
Operation
HSDFI
l
h
END OF LOOP
I
principle
of HSDFI
HARDWARE
ICT's new HSDFI s y s t e m is i n c o r p o r a t e d into the 9000 series Eb e a m testers o p e r a t e d by a SUN 3/260 w h i c h p r o v i d e s a link to the CAD d a t a (see fig.2). The HSDFI s y s t e m c o m p r i s e s an image processor with 512x512x8 bit, 4MB RAM, 68020 CPU, 68881 FPU, d o u b l e frame store, ALU, o p t i o n a l array processor, 350 MB hard d i s k and a 120 MB s t r e a m e r tape. A d e d i c a t e d c o n t r o l unit accepts the clock signals and the loop trigger signal from the IC exerciser and generates the a p p r o p r i a t e p u l s e s for the beam b l a n k e t and the b e a m p o s i t i o n i n g unit in the EB-tester. The high speed a n a l o g signal is c o n v e r t e d to d i g i t a l form in the HSDFI control unit and fed to the image p r o c e s s o r for further processing. The m a x i m u m pixel rate of the image p r o c e s s o r is limited by the decay time of the s c i n t i l l a t o r to about 10 MHz. F a s t e r clock rates of the IC can be h a n d l e d by p r e s c a l i n g the c l o c k f r e q u e n c y in the HSDFI control unit. This prescaling and the then necessary different memory o r g a n i z a t i o n of the image p r o c e s s o r as well as the s e l e c t i o n of the o p t i m u m e-beam pulse length and the n e c e s s a r y number of
E. Menzel / High speed dynamic fault imaging
83
a v e r a g e s for the a c q u i r e d signals is p e r f o r m e d a u t o m a t i c a l l y w i t h a m a n u a l o v e r r i d e c a p a b i l i t y for the operator. The s e l e c t i o n of the o p t i m u m spot size may be linked to the m a g n i f i c a t i o n or scan field (e.g. spot size = scan field length/512) and is p e r f o r m e d automatically.
TRIG.
IC
LOOP
CLOCK
SAMPLING PULSE
9000 E-BEAM TESTER
SUN WORKSTATION
Block
PRINCIPLE
HSDFI CONTROL UNIT
EB-POSITION VIDEO SIGNAL w
t'
IMAGE PROCESSOR
FIGURE 2 d i a g r a m of the HSDFI
system
OF O P E R A T I O N
With the e - b e a m s t a t i o n a r y at a c e r t a i n pixel on the IC surface the 8 bit signals from the e - b e a m pulses are w r i t t e n into the frame store of the image processor. Each sample occupies a "pixel" in the frame store. Therefore, one spatial pixel on the IC s u r f a c e is now r e p r e s e n t e d by M pixels (samples) in the frame store. A f t e r a v e r a g i n g the M loop samples for N times, the e - b e a m is d i r e c t e d to the next pixel on the IC and the p r o c e s s is r e p e a t e d until the frame store is full. The c o n t e n t of the frame store now is a set of logic states for each spatial pixel, w h e r e the n u m b e r of s p a t i a l p i x e l s per frame is (512x512)/M. A f t e r f i l l i n g the first frame, the second frame store is filled. Meanwhile, the i n f o r m a t i o n in the first frame store is stored on disk, from w h e r e the M logic states of a c e r t a i n pixel may be r e t r i e v e d later. Also d u r i n g this period, the data are r e a r r a n g e d so as to y i e l d normal s t r o b o s c o p i c images and images of r e d u c e d
E. Menzel / High speed dynamic fault imaging
84
size (icons) of d i f f e r e n t logic states. The a d v a n t a g e of s t o r i n g these three sets of i n f o r m a t i o n for a state cube lies in the e x t r e m e l y fast access to e i t h e r images, icons, or logic states. Full images can be l o a d e d from the disk in less than 0.3 seconds, icons or logic states can be loaded in less than 0.1 seconds. Once loaded from the disk into the RAM m e m o r y full images may be loaded onto the s c r e e n w i t h i n about 0.1 seconds. The n u m b e r of images that can be h a n d l e d is not l i m i t e d by h a r d w a r e r e s t r i c t i o n s . Thus the d a t a a c q u i s i t i o n and data h a n d l i n g has been a far g r e a t e r e x t e n t than with p r e v i o u s DFI systems.
OPERATING
THE
HSDFI
optimized
to
SYSTEM
The s y s t e m is o p e r a t e d u s i n g a mouse. The o p e r a t o r is g u i d e d thru the d i f f e r e n t operating modes alignment, data acquisition, and data evaluation by w i n d o w screens on a high resolution color monitor.
ALIGNMENT
MODE
In this mode the o p e r a t o r prepares the e - b e a m tester for HSDFI mode by e.g. s e l e c t i n g the b e a m energy, d e v i c e s e c t i o n m a g n i f i c a t i o n (in case of a r e f e r e n c e device).
the and
If a DUT has to be i n v e s t i g a t e d it is necessary to align the d e v i c e in x,y,z d i r e c t i o n and r o t a t i o n with r e s p e c t to the images taken from the r e f e r e n c e device. Here, the a l i g n m e n t is a i d e d by an o n - l i n e subtraction of a r e f e r e n c e image from the actual d e v i c e image. Care has to be taken to use the same e l e c t r o n o p t i c a l p a r a m e t e r s as for the r e f e r e n c e device. These p a r a m e t e r s are s t o r e d w i t h the reference device image and are a u t o m a t i c a l l y used for the DUT without operator interaction. The operator aligns the device mechanically in x and y d i r e c t i o n and e l e c t r o n i c a l l y concerning r o t a t i o n and m a g n i f i c a t i o n . A tilt a l i g n m e n t and z - a d j u s t m e n t may be p e r f o r m e d p r i o r to i n s e r t i o n of the d e v i c e into the chamber. W i t h this t e c h n i q u e the a l i g n m e n t e r r o r is r e d u c e d to a minimum. Any r e s i d u a l misalignment can be c o m p e n s a t e d for by software c o r r e c t i o n algorithms.
DATA
ACQUISITION
A f t e r the o p e r a t o r has acquired automatically acquisition time the taken p r e v i o u s l y .
DATA
s t a r t e d this mode the data from the IC are and stored on the disk(s). D u r i n g the data operator may p e r f o r m evaluation of data
EVALUATION
Once acquired, the images may be p r o c e s s e d in v a r i o u s ways using edge enhancement filters, noise filtering, histogram normalization, differencing, and color encoding etc. Filter p a r a m e t e r s and c o m p l e t e s e q u e n c e s of image p r o c e s s i n g o p e r a t i o n s may be c o m b i n e d to user d e f i n e d macros.
E. Menzel / High speed dynamic fault imaging
85
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i iiiii't~
i/
i"iil
ii I " I I ~ L
121111.111 II HSDFI
images
FIGURE 3 taken from a 256 k DRAM,
............. ....
Ii
scanfield
100x110um
scanfield
520x580Bm
ii I
llr ''''/
I
L T~
HSDFI
FIGURE 4 images taken from a 256 k DRAM,
Figures 3 and 4 show examples of some images taken with the s y s t e m at d i f f e r e n t m a g n i f i c a t i o n s using a h a r d c o p y unit. The images show sections of a 256 k DRAM with 1.5 ~m smallest feature size. The left and center images of figure 3 and 4 r e p r e s e n t the raw data m i c r o g r a p h s (# averages= 32) of d i f f e r e n t logic states of a g o l d e n device, the right images show the c o r r e s p o n d i n g " d i f f e r e n c e " images. The "difference" images were o b t a i n e d not by s u b t r a c t i n g one image from the other but by d i v i d i n g the images: C= A/B. In this way d i f f e r e n c e s are e n h a n c e d and the h i s t o g r a m is a u t o m a t i c a l l y centered around the grey level 127. This simplifies the a u t o m a t i c t h r e s h o l d d e t e r m i n a t i o n w h i c h assigns "0" to all grey levels below t h r e s h o l d I, "127" to all levels b e t w e e n t h r e s h o l d 1 and 2 and "255" to all levels above t h r e s h o l d 2. Noise r e d u c t i o n is p e r f o r m e d by using digital c o n v o l u t i o n with a filter mask w h i c h is e s p e c i a l l y designed for the g e o m e t r i e s e n c o u n t e r e d in the HSDFI images. The time n e e d e d to p e r f o r m all of the n e c e s s a r y post p r o c e s s i n g o p e r a t i o n s like shift, rotate, m a g n i f i c a t i o n adjustment, noise filtering, h i s t o g r a m modification, and d i v i d i n g the images is less than 4 seconds per image when using the o p t i o n a l array processor.
E. Menzel / High speed dynamic fault imaging
86
Multiple images of a large number of logic states can be d i s p l a y e d on the screen with r e d u c e d size (icons w i t h e.g. 64x64 pixels) for an easy survey of the changes b e t w e e n states. Icons of the r e f e r e n c e device, the DUT, and their d i f f e r e n c e may be displayed simultaneously on the screen. The user can q u i c k l y browse through the a c q u i r e d images and then analyse certain states in more details u s i n g h i g h e r r e s o l u t i o n images (512x512 pixels). Full images t o g e t h e r with their d i f f e r e n c e image may be called from the disk to form video films of the state images of interest. Due to the storage of the logic states of the d i f f e r e n t spatial pixels on the disk very fast access to the logic states is p r o v i d e d (typically less than 0.1 seconds). The s e l e c t i o n of IC nodes for the logic state analysis may be s i m p l i f i e d by using ICT's link b e t w e e n the E - b e a m tester and the SUN w o r k s t a t i o n . The i n f o r m a t i o n of the logic states is d i s p l a y e d as timing d i a g r a m and in the form of codes (bin, hex, oct). In the A c t i v i t y M a p p i n g mode the n u m b e r of toggles per pixels is c o u n t e d d u r i n g the test vector. The i n f o r m a t i o n can be d i s p l a y e d as grey level image where the grey level r e p r e s e n t s the n u m b e r of o p e r a t i o n s of a c e r t a i n pixel or color e n c o d i n g may be used.
CONCLUSIONS ICT has d e v e l o p e d a new u s e r - f r i e n d l y High Speed D y n a m i c Fault Imaging system that for the first time allows state cube a c q u i s i t i o n w i t h i n m i n u t e s rather than hours or days. Ease of o p e r a t i o n is a c h i e v e d by a high degree of a u t o m a t i o n and with the help of a link to a CAD workstation.
REFERENCES [I]
T.May,G.Scott,E.Meieran,P.Winer,V.Rao: "Dynamic Fault Imaging VLSI r a n d o m logic devices" Proc. Int. Phys. S y m p . 1 9 8 4 p.95-108
[2] E u r o p e a n Patent
0075710 J . F r o s i e n , B . L i s c h k e
1985
HIGH
SPEED
DYNAMIC
81
FAULT
IMAGING
E b e r h a r d Menzel ICT GmbH K l a u s n e r r i n g la 8011Heimstetten West G e r m a n y
A High Speed D y n a m i c Fault Imaging s y s t e m is i n t r o d u c e d which overcomes the p r o b l e m of extremely long data acquisition times of c o n v e n t i o n a l Dynamic Fault Imaging systems. The new system uses m u l t i s a m p l i n g and a new scheme of data storage in the image processor. Data a c q u i s i t i o n times are reduced by factors of 100 to 1000 d e p e n d i n g on the length of the test vector. Data a c q u i s i t i o n is p e r f o r m e d a u t o m a t i c a l l y and the data e v a l u a t i o n using d i f f e r e n c e images, movie, icon display, logic state d i s p l a y or a c t i v i t y m a p p i n g is fully interactive.
INTRODUCTION D y n a m i c Fault Imaging (DFI) is a technique w h i c h allows easy failure l o c a l i z a t i o n on high c o m p l e x i t y ICs. S t r o b o s c o p i c images of d i f f e r e n t logic states of a p r o g r a m loop are a c q u i r e d and stored, first with a r e f e r e n c e device (Golden Device) and then with the device under test (DUT). A c o m p a r i s o n of images of a c e r t a i n state reveals d i f f e r e n c e s and allows the d e t e r m i n a t i o n of the l o c a t i o n of the fault and its first a p p e a r a n c e in the p r o g r a m loop. A n a l y s i s of s u b s e q u e n t states yields i n f o r m a t i o n about the s p r e a d i n g of the failure until it reaches the bond pads of the IC [I]. By l o o k i n g at the same pixel in each of the d i f f e r e n t state images a logic state analysis of c e r t a i n IC nodes can be performed. A technique called "Delay Mapping" [I] gives i n f o r m a t i o n about weak parts of the d e s i g n of an IC and "Activity mapping" [I] reveals i n f o r m a t i o n about the e f f e c t i v e n e s s of test patterns. The most a t t r a c t i v e feature of this set of t e c h n i q u e s is the fact that no s p e c i f i c i n f o r m a t i o n about the f u n c t i o n i n g or the layout of the d e v i c e is needed, p r o v i d e d that at least one g o l d e n device exists. The most u n a t t r a c t i v e feature is the time n e e d e d to acquire the s o m e t i m e s huge sets of of state images (with 100 state images and 5 m i n u t e s per image the total a c q u i s i t i o n time is longer than 8 hours).
0167-9317/90/$3.50 © 1990, Elsevier Science Publishers B.V.
E. Menzel / High speed dynamic fault imaging
82
HIGH
SPEED
DYNAMIC
FAULT
IMAGING
SYSTEM
In o r d e r to o v e r c o m e the data a c q u i s i t i o n p r o b l e m w i t h DFI, ICT has c o m b i n e d the p a t e n t e d "Multisampling Technique" [2] with a new concept of data storage and data averaging in image p r o c e s s o r s to p r o v i d e High Speed DFI (HSDFI). Here, the signal is not s a m p l e d just once per loop as in c o n v e n t i o n a l DFI systems, but a n u m b e r of times. Compared to c o n v e n t i o n a l DFI the total data acquisition time then is r e d u c e d by the n u m b e r of samples taken per loop. If e.g. the loop is 100 c l o c k cycles and we sample 100 times per loop, the acquisition time is reduced by a factor of 100 (see fig.l). T y p i c a l a c q u i s i t i o n times with 10 MHz c l o c k rate and 100 states per loop range b e t w e e n 2 and 10 m i n u t e s d e p e n d i n g on the size of the scanfield.
CLOCK
SIGNAL
IC SIGNAL
J--I
[--I
I
I
I
DFI SAMPLING PULSE
n HSDFI SAMPLING PULSES
H | START OF LOOP
n
H
n
H__Hq
M SAMPLES PER LOOP
FIGURE
Operation
HSDFI
l
h
END OF LOOP
I
principle
of HSDFI
HARDWARE
ICT's new HSDFI s y s t e m is i n c o r p o r a t e d into the 9000 series Eb e a m testers o p e r a t e d by a SUN 3/260 w h i c h p r o v i d e s a link to the CAD d a t a (see fig.2). The HSDFI s y s t e m c o m p r i s e s an image processor with 512x512x8 bit, 4MB RAM, 68020 CPU, 68881 FPU, d o u b l e frame store, ALU, o p t i o n a l array processor, 350 MB hard d i s k and a 120 MB s t r e a m e r tape. A d e d i c a t e d c o n t r o l unit accepts the clock signals and the loop trigger signal from the IC exerciser and generates the a p p r o p r i a t e p u l s e s for the beam b l a n k e t and the b e a m p o s i t i o n i n g unit in the EB-tester. The high speed a n a l o g signal is c o n v e r t e d to d i g i t a l form in the HSDFI control unit and fed to the image p r o c e s s o r for further processing. The m a x i m u m pixel rate of the image p r o c e s s o r is limited by the decay time of the s c i n t i l l a t o r to about 10 MHz. F a s t e r clock rates of the IC can be h a n d l e d by p r e s c a l i n g the c l o c k f r e q u e n c y in the HSDFI control unit. This prescaling and the then necessary different memory o r g a n i z a t i o n of the image p r o c e s s o r as well as the s e l e c t i o n of the o p t i m u m e-beam pulse length and the n e c e s s a r y number of
E. Menzel / High speed dynamic fault imaging
83
a v e r a g e s for the a c q u i r e d signals is p e r f o r m e d a u t o m a t i c a l l y w i t h a m a n u a l o v e r r i d e c a p a b i l i t y for the operator. The s e l e c t i o n of the o p t i m u m spot size may be linked to the m a g n i f i c a t i o n or scan field (e.g. spot size = scan field length/512) and is p e r f o r m e d automatically.
TRIG.
IC
LOOP
CLOCK
SAMPLING PULSE
9000 E-BEAM TESTER
SUN WORKSTATION
Block
PRINCIPLE
HSDFI CONTROL UNIT
EB-POSITION VIDEO SIGNAL w
t'
IMAGE PROCESSOR
FIGURE 2 d i a g r a m of the HSDFI
system
OF O P E R A T I O N
With the e - b e a m s t a t i o n a r y at a c e r t a i n pixel on the IC surface the 8 bit signals from the e - b e a m pulses are w r i t t e n into the frame store of the image processor. Each sample occupies a "pixel" in the frame store. Therefore, one spatial pixel on the IC s u r f a c e is now r e p r e s e n t e d by M pixels (samples) in the frame store. A f t e r a v e r a g i n g the M loop samples for N times, the e - b e a m is d i r e c t e d to the next pixel on the IC and the p r o c e s s is r e p e a t e d until the frame store is full. The c o n t e n t of the frame store now is a set of logic states for each spatial pixel, w h e r e the n u m b e r of s p a t i a l p i x e l s per frame is (512x512)/M. A f t e r f i l l i n g the first frame, the second frame store is filled. Meanwhile, the i n f o r m a t i o n in the first frame store is stored on disk, from w h e r e the M logic states of a c e r t a i n pixel may be r e t r i e v e d later. Also d u r i n g this period, the data are r e a r r a n g e d so as to y i e l d normal s t r o b o s c o p i c images and images of r e d u c e d
E. Menzel / High speed dynamic fault imaging
84
size (icons) of d i f f e r e n t logic states. The a d v a n t a g e of s t o r i n g these three sets of i n f o r m a t i o n for a state cube lies in the e x t r e m e l y fast access to e i t h e r images, icons, or logic states. Full images can be l o a d e d from the disk in less than 0.3 seconds, icons or logic states can be loaded in less than 0.1 seconds. Once loaded from the disk into the RAM m e m o r y full images may be loaded onto the s c r e e n w i t h i n about 0.1 seconds. The n u m b e r of images that can be h a n d l e d is not l i m i t e d by h a r d w a r e r e s t r i c t i o n s . Thus the d a t a a c q u i s i t i o n and data h a n d l i n g has been a far g r e a t e r e x t e n t than with p r e v i o u s DFI systems.
OPERATING
THE
HSDFI
optimized
to
SYSTEM
The s y s t e m is o p e r a t e d u s i n g a mouse. The o p e r a t o r is g u i d e d thru the d i f f e r e n t operating modes alignment, data acquisition, and data evaluation by w i n d o w screens on a high resolution color monitor.
ALIGNMENT
MODE
In this mode the o p e r a t o r prepares the e - b e a m tester for HSDFI mode by e.g. s e l e c t i n g the b e a m energy, d e v i c e s e c t i o n m a g n i f i c a t i o n (in case of a r e f e r e n c e device).
the and
If a DUT has to be i n v e s t i g a t e d it is necessary to align the d e v i c e in x,y,z d i r e c t i o n and r o t a t i o n with r e s p e c t to the images taken from the r e f e r e n c e device. Here, the a l i g n m e n t is a i d e d by an o n - l i n e subtraction of a r e f e r e n c e image from the actual d e v i c e image. Care has to be taken to use the same e l e c t r o n o p t i c a l p a r a m e t e r s as for the r e f e r e n c e device. These p a r a m e t e r s are s t o r e d w i t h the reference device image and are a u t o m a t i c a l l y used for the DUT without operator interaction. The operator aligns the device mechanically in x and y d i r e c t i o n and e l e c t r o n i c a l l y concerning r o t a t i o n and m a g n i f i c a t i o n . A tilt a l i g n m e n t and z - a d j u s t m e n t may be p e r f o r m e d p r i o r to i n s e r t i o n of the d e v i c e into the chamber. W i t h this t e c h n i q u e the a l i g n m e n t e r r o r is r e d u c e d to a minimum. Any r e s i d u a l misalignment can be c o m p e n s a t e d for by software c o r r e c t i o n algorithms.
DATA
ACQUISITION
A f t e r the o p e r a t o r has acquired automatically acquisition time the taken p r e v i o u s l y .
DATA
s t a r t e d this mode the data from the IC are and stored on the disk(s). D u r i n g the data operator may p e r f o r m evaluation of data
EVALUATION
Once acquired, the images may be p r o c e s s e d in v a r i o u s ways using edge enhancement filters, noise filtering, histogram normalization, differencing, and color encoding etc. Filter p a r a m e t e r s and c o m p l e t e s e q u e n c e s of image p r o c e s s i n g o p e r a t i o n s may be c o m b i n e d to user d e f i n e d macros.
E. Menzel / High speed dynamic fault imaging
85
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FIGURE 4 images taken from a 256 k DRAM,
Figures 3 and 4 show examples of some images taken with the s y s t e m at d i f f e r e n t m a g n i f i c a t i o n s using a h a r d c o p y unit. The images show sections of a 256 k DRAM with 1.5 ~m smallest feature size. The left and center images of figure 3 and 4 r e p r e s e n t the raw data m i c r o g r a p h s (# averages= 32) of d i f f e r e n t logic states of a g o l d e n device, the right images show the c o r r e s p o n d i n g " d i f f e r e n c e " images. The "difference" images were o b t a i n e d not by s u b t r a c t i n g one image from the other but by d i v i d i n g the images: C= A/B. In this way d i f f e r e n c e s are e n h a n c e d and the h i s t o g r a m is a u t o m a t i c a l l y centered around the grey level 127. This simplifies the a u t o m a t i c t h r e s h o l d d e t e r m i n a t i o n w h i c h assigns "0" to all grey levels below t h r e s h o l d I, "127" to all levels b e t w e e n t h r e s h o l d 1 and 2 and "255" to all levels above t h r e s h o l d 2. Noise r e d u c t i o n is p e r f o r m e d by using digital c o n v o l u t i o n with a filter mask w h i c h is e s p e c i a l l y designed for the g e o m e t r i e s e n c o u n t e r e d in the HSDFI images. The time n e e d e d to p e r f o r m all of the n e c e s s a r y post p r o c e s s i n g o p e r a t i o n s like shift, rotate, m a g n i f i c a t i o n adjustment, noise filtering, h i s t o g r a m modification, and d i v i d i n g the images is less than 4 seconds per image when using the o p t i o n a l array processor.
E. Menzel / High speed dynamic fault imaging
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Multiple images of a large number of logic states can be d i s p l a y e d on the screen with r e d u c e d size (icons w i t h e.g. 64x64 pixels) for an easy survey of the changes b e t w e e n states. Icons of the r e f e r e n c e device, the DUT, and their d i f f e r e n c e may be displayed simultaneously on the screen. The user can q u i c k l y browse through the a c q u i r e d images and then analyse certain states in more details u s i n g h i g h e r r e s o l u t i o n images (512x512 pixels). Full images t o g e t h e r with their d i f f e r e n c e image may be called from the disk to form video films of the state images of interest. Due to the storage of the logic states of the d i f f e r e n t spatial pixels on the disk very fast access to the logic states is p r o v i d e d (typically less than 0.1 seconds). The s e l e c t i o n of IC nodes for the logic state analysis may be s i m p l i f i e d by using ICT's link b e t w e e n the E - b e a m tester and the SUN w o r k s t a t i o n . The i n f o r m a t i o n of the logic states is d i s p l a y e d as timing d i a g r a m and in the form of codes (bin, hex, oct). In the A c t i v i t y M a p p i n g mode the n u m b e r of toggles per pixels is c o u n t e d d u r i n g the test vector. The i n f o r m a t i o n can be d i s p l a y e d as grey level image where the grey level r e p r e s e n t s the n u m b e r of o p e r a t i o n s of a c e r t a i n pixel or color e n c o d i n g may be used.
CONCLUSIONS ICT has d e v e l o p e d a new u s e r - f r i e n d l y High Speed D y n a m i c Fault Imaging system that for the first time allows state cube a c q u i s i t i o n w i t h i n m i n u t e s rather than hours or days. Ease of o p e r a t i o n is a c h i e v e d by a high degree of a u t o m a t i o n and with the help of a link to a CAD workstation.
REFERENCES [I]
T.May,G.Scott,E.Meieran,P.Winer,V.Rao: "Dynamic Fault Imaging VLSI r a n d o m logic devices" Proc. Int. Phys. S y m p . 1 9 8 4 p.95-108
[2] E u r o p e a n Patent
0075710 J . F r o s i e n , B . L i s c h k e
1985