HVDC transmission system using multilevel power converters based on dual three-phase two-level inverters

Electrical Power and Energy Systems 65 (2015) 191–200

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Electrical Power and Energy Systems journal homepage: www.elsevier.com/locate/ijepes

HVDC transmission system using multilevel power converters based on dual three-phase two-level inverters V. Fernão Pires a,b,⇑, João Fialho a, J. Fernando Silva b,c a

ESTSetúbal-Instituto Politécnico Setúbal, Portugal INESC-ID Lisboa, Portugal c Instituto Superior Técnico, Universidade de Lisboa, Portugal b

a r t i c l e

i n f o

Article history: Received 4 September 2013 Received in revised form 6 September 2014 Accepted 10 October 2014

Keywords: High-voltage direct-current (HVDC) Multilevel power converter Two level voltage source converters Dual converters

a b s t r a c t Multilevel converters are now an attractive solution for high-voltage direct-current (HVDC) electrical energy transmission systems. Unlike the well-known two-level voltage source converters, multilevel converters use 3 or more voltage levels or steps per leg to modulate the ac voltages, decreasing voltage distortion and reducing electromagnetic interference. This work presents a HVDC transmission system based on a new multilevel structure using a dual two-level converter topology. This structure attains multilevel operation and advantages using two well known three-phase voltage source two-level inverters connected to one three-phase open windings transformer. The proposed dual converter structure has two independent dc links allowing each inverter to process half of the total power. This arrangement is fitted with a control system designed to control the active and reactive power towards their specific set point values, while balancing the voltages of the two dc link capacitors in real time. Obtained results show the effectiveness of the proposed HVDC transmission system. Ó 2014 Elsevier Ltd. All rights reserved.

Introduction HVDC systems are usually used to transmit bulk electric power over long distances by overhead transmission lines or submarine cables. HVDC presents several technical advantages over conventional HVAC transmission systems, being a proven technology in use along several decades [1,2]. Initially thyristor based current source converters (CSC) were used in HVDC systems to transmit power of production sites very far from consumers, or to make asynchronous interconnections. Long distance transmission HVDC systems do not need reactive compensation as required by HVAC transmission systems. HVDC allows also for a transmission capacity increase. In fact, for a given conductor cross section, HVDC transmission can carry more current through a conductor compared with conventional HVAC transmission [1]. Recently backto-back HVDC links using voltage source converters (VSC) are used for the interconnection of asynchronous networks, eliminating the harmonics filters needed in CSC HVDC. VSC based HVDC technology allows converting AC sources with different frequencies to a DC voltage and the independent control of active and reactive ⇑ Corresponding author at: Escola Supeior Tecnologia de Setúbal-IPS, Campus do IPS, Estefanilha, 2914-508 Setúbal, Portugal. Tel.: +351 265 790000; fax: +351 265 721869. E-mail address: [email protected] (V. Fernão Pires). http://dx.doi.org/10.1016/j.ijepes.2014.10.002 0142-0615/Ó 2014 Elsevier Ltd. All rights reserved.

power in all four quadrants. Large offshore wind farms with AC interconnection require an additional power converter system such as a STATCOM or a Static VAr compensator in order to ensure adequate power quality at the grid connection point. However, when using a VSC HVDC connection, the VSC converters can provide both voltage control and stabilization [3]. VSC can also be located at points in the transmission network with relatively low short circuit levels minimizing the need for network reinforcements or remedial measures. A HVDC system that consists in more than two converters connected through an HVDC network, called a multi-terminal HVDC system [4], allows connecting multiple generators and AC grids. Due to these characteristics, HVDC technology can be used as a solution to recent problems of power grids, such as, network congestions, wind farms connection, multi-terminal operation and asynchronous connection [4–19]. In their early ages CSC HVDC systems were based on thyristor technology [20,21] but, due to the continuous improvement of high-voltage, high-power fully controlled semiconductor devices, two-level voltage source converters (VSC) topologies are now being used in HVDC systems [22,13]. These topologies allow operation at switching frequencies much higher than the line frequency. Thus, with these VSC-HVDC systems smaller AC harmonic filters are required when compared to the thyristor technology. Furthermore, with the VSC-HVDC technology AC voltages with broad ranges of amplitude and phase angle (within given limits)

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can be obtained, allowing the control of both active and reactive power independently. On other hand, two level VSC based HVDC systems present several problems such as, high insulation requirements on the interfacing transformers due to high dv/dt, higher switching losses and electromagnetic interference. These drawbacks fuelled the development of HVDC technology using multilevel voltage source converters. Multilevel converters can provide staircase like AC voltage waveforms with several voltage levels or steps, each voltage step being only a fraction of the total DC voltage. Thus, comparing the multilevel topology with the two-level voltage source inverter, several advantages are obtained, such as, reduced dv/dt, lower switching losses, lower electromagnetic interference levels and smaller filters at the output to attenuate the switching frequency harmonics in the output voltage at the point of common coupling. There are several multilevel voltage source converter topologies that can be used in HVDC system. The flying-capacitor and the neutral-point clamped multilevel converters are examples of topologies that have been studied in HVDC systems [23–28]. Another multilevel topology that has been studied and implemented is the modular multilevel converter [29–31]. All these converters require complex controllers to fire the increased number of semiconductors and to balance the dc voltage capacitor voltage dividers used. The objective of this work is to present and study the control of HVDC transmission systems based on multilevel power converter structures using industry standard voltage source converters, such as the three-phase inverter. The derived multilevel topology uses two standard three-phase two level voltage source converters coupled by a three-phase transformer with open-end windings. Thus, each three-phase power converter processes half of the total power transmitted in the DC link. Other advantage of this topology is the simplified layout when compared with conventional multilevel converters. In fact, this configuration uses industry proven modules of three-phase H-bridges without additional diodes, switches or capacitive dividers. The structure of this multilevel power converter was already used in applications, such as the control of open-end winding induction motor, static synchronous compensator STATCOM and grid-connected photovoltaic systems [32–35]. This paper proposes its application to HVDC systems, presenting a vector controller based on sliding mode control. This system controller presents a fast dynamic response and robustness to semiconductor non-idealities, disturbances and load changes. The control strategy takes into account active and reactive power in both converters as well as the regulation and the voltage balancing of the output DC capacitors of the three-phase H-bridges.

The well known VSC HVDC transmission structure consists in a combination of a DC cable or line with two power electronics converters, each one at a link terminal for AC/DC and DC/AC conversion (Fig. 1). The power electronic converters are usually two level VSC converters (Fig. 2) with series connected semiconductor devices. To obtain AC voltage waveforms with several voltage levels, instead of the classical VSC topology, multilevel topologies like Converter R Grid R

i1

S11 R

L

RN

L

S12

S13

iDC iC1

i1

i2

VCo

i3 S12

S12

S13

Fig. 2. Voltage source converter (VSC) topology used in the HVDC transmission system.

the neutral-point clamped or the modular multilevel converter have been proposed. Instead of the classical structure, a HVDC transmission structure with two DC links, as presented in Fig. 3, is proposed. In this HVDC system two three-phase two level H-bridge converters (VSC) connected in each side of the link terminal are used. These two VSCs are connected to the open-end secondary windings of a threephase transformer (Fig. 4). Two DC capacitors are connected to the output of the voltage source converters providing the required DC voltage with low enough ripple. Multilevel AC voltage waveforms are obtained using only the two three-phase VSC converters of this structure. Thus, a simplified topology is obtained when compared with multilevel inverters, resulting in increased reliability of the system. Due to the configuration of the inverter, there are several redundant switching combinations for the same output voltage that can be used for fault tolerant operation. In the event of a fault it is also possible to use only one of the VSCs, although at reduced output power. Converter modeling From the analysis of the circuit presented in Fig. 2, the following three-phase output voltages of the dual inverter are obtained as:

2

3 2 2 32 3 2 2 32 3 v1  13  13 v 11  13  13 v 21 3 3 6 7 6 1 2 7 6 7 6 7 6 7 4 v 2 5 ¼ 4  3 3  13 54 v 12 5  4  13 23  13 54 v 22 5 v3 v 13 v 23  13  13 23  13  13 23

ð1Þ

Assuming ideal power semiconductors and boost operation, the states of the power converter switches (i 2 {1, 2} j 2 {1, 2, 3}) can be represented by the following time dependent variable cij:

(

cij ¼

Proposed HVDC transmission system

R

i0

1 if

Sij is ON ^ Sij is OFF

ð2Þ

if Sij is OFF ^ Sij is ON

0

Thus, the three-phase output voltage of the dual inverter related with the switch states will be expressed as:

2

3

2

2 v1 3 6 7 6 1 4 v2 5 ¼ 4  3 v3  13

 13  13 2 3

 13

32

3

2

32

3

2 c11 c21  13  13 3 7 6 1 2 76 7 1 76  3 54 c12 5 V Co1  4  3 3  13 54 c22 5V Co2 2 1 1 2 c13 c23 3 3 3 3

ð3Þ

LN

Converter V Grid V

i2 i3

Fig. 1. Classic HVDC transmission structure.

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V. Fernão Pires et al. / Electrical Power and Energy Systems 65 (2015) 191–200 Converters R ir1

R

RN

L

Converters V

LN

iv1

ir2 ir3

iv2

VCvo1

VCro1

iv3

Grid R

Grid V

RN

LN

VCro2

VCvo2

Fig. 3. Basic schematic concept of the proposed HVDC transmission structure.

i01 S11

S12

i1 L

V1

VS2

V2

VS3

V3

iC1 VCo1

V12

i3

VS1

i1DC

V11

i2 R

S13

V13 S12

S12

S13

i02 S21

S22

S23

i2DC iC2

V21

VCo2

V22 V23 S22

S21

S23

Fig. 4. Power converter structure.

Applying the Clark-Concordia transformation in (4) to the previous equation, the three-phase output voltage of the dual inverter is represented by (5).





xa xb



2 qffiffi

3 2

¼ 4 pffiffi

2 2

2 qffiffi

va  4 ¼ vb

2 3

0

3   0 x 5 1 pffiffiffi x 2 2

ð4Þ

3" 2 qffiffi 3" # # 2 c  p1ffiffi6  p1ffiffi6 c2a 1 a 3 5 5 V Co1  4 V Co2  p1ffiffi2 c1b 0 p1ffiffi2  p1ffiffi2 c2b

 p1ffiffi6  p1ffiffi6 p1ffiffi 2

ð5Þ From this equation and considering the combination of the switches, 64 different voltage space vectors are obtained. Table 1 slows all the switching states combinations and the obtained AC voltage levels in the ab reference frame. The 64 space vectors can be represented in the ab reference frame as seen in Fig. 5. For simplicity, assuming VCo1 = VCo2 = VDC, only 19 distinct voltage space vectors are found, which are related with nine voltage levels (4/ 3 VDC, VDC, 2/3 VDC, 1/3 VDC, 0, +1/3 VDC, +2/3 VDC, +VDC, +4/3 VDC). These voltage levels can be computed from the switching states of Table 1. According to Fig. 5 and Table 1, there are some voltage levels that can be generated by two or more switching states (for example voltage Va = 1.22 VDC and Vb = 0.71 VDC can be obtained using either vectors 4 and 21), which are said to be redundant.

The dynamic behavior of the dual inverter AC currents in phase coordinates (1, 2, 3), capacitor voltages and DC line current is given by (5).

32 2 3 2 R 32 3 2 2 3 1 1  3L a11 L 0 0 i1 i1 3L 3L 7 6 d6 7 6 76 7 7 v Co1 2v Co1 v Co1 76 4 i2 5 ¼ 4 0  RL 0 54 i2 5 þ 6 3L 54 a12 5V DC 4 3L  3L dt R v v 2 v Co1 Co1 0 0 L a13 i3 i3  3LCo1 3L 3L 2 2 32 3 21 32 3 1 1 a21 0 0 v s1  3L 3L 3L L 6 1 76 7 2 1 76  4 3L  3L a 7V þ 6 4 0 1L 0 54 v s2 5 3L 54 22 5 DC 1 1 2 1 a23 v s3 0 0 L  3L 3L 3L ð6Þ Applying the Park transform (7) to the model (6) in phase coordinates, the model in dq coordinates is given by (8).



xd xq



 ¼

cosðxtÞ

sinðxtÞ

 sinðxtÞ cosðxtÞ



xa



xb

#  " # " #   " R cd1 id L x  1L 1L d id V ¼ þ cq1 DC dt iq x  RL iq  1L 1L " #" # " # 1 v sd   1L 1L cd2 0 L V  þ DC cq2 v sq 0 1L  1L 1L This dynamics of the DC link, can be represented by:

ð7Þ

ð8Þ

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V. Fernão Pires et al. / Electrical Power and Energy Systems 65 (2015) 191–200

Vβ

Table 1 Output voltage vectors for the dual-inverter. 7

S11

S12

S13

S21

S22

S23

Va

Vb

N°

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1

0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1

0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

0 0.41 VDC 0.41 VDC 0.82 VDC 0.82 VDC 0.41 VDC 0.41 VDC 0 0.41 VDC 0 0 0.41 VDC 1.22 VDC 0.82 VDC 0.82 VDC 0.41 VDC 0.41 VDC 0 0 0.41 VDC 1.22 VDC 0.82 VDC 0.82 VDC 0.41 VDC 0.82 VDC 0.41 VDC 0.41 VDC 0 1.63 VDC 1.22 VDC 1.22 VDC 0.82 VDC 0.82 VDC 1.22 VDC 1.22 VDC 1.63 VDC 0 0.41 VDC 0.41 VDC 0.82 VDC 0.41 VDC 0.82 VDC 0.82 VDC 1.22 VDC 0.41 VDC 0 0 0.41 VDC 0.41 VDC 0.82 VDC 0.82 VDC 1.22 VDC 0.41 VDC 0 0 0.41 VDC 0 0.41 VDC 0.41 VDC 0.82 VDC 0.82 VDC 0.41 VDC 0.41 VDC 0

0 0.71 VDC 0.71 VDC 0 0 0.71 VDC 0.71 VDC 0 0.71 VDC 0 1.41 VDC 0.71 VDC 0.71 VDC 0 1.41 VDC 0.71 VDC 0.71 VDC 1.41 VDC 0 0.71 VDC 0.71 VDC 1.41 VDC 0 0.71 VDC 0 0.71 VDC 0.71 VDC 0 0 0.71 VDC 0.71 VDC 0 0 0.71 VDC 0.71 VDC 0 0 0.71 VDC 0.71 VDC 0 0.71 VDC 0 1.41 VDC 0.71 VDC 0.71 VDC 0 1.41 VDC 0.71 VDC 0.71 VDC 1.41 VDC 0 0.71 VDC 0.71 VDC 1.41 VDC 0 0.71 VDC 0 0.71 VDC 0.71 VDC 0 0 0.71 VDC 0.71 VDC 0

0 3 17 1 10 8 12 0 12 0 15 17 13 34 14 12 8 6 0 3 9 7 35 8 10 8 12 0 11 24 27 10 1 4 18 2 0 31 17 32 17 1 16 30 12 0 28 17 8 5 1 21 8 22 0 33 0 20 29 19 25 23 26 0

d dt



v Co1  1 ¼ C v Co2

""

# # cd1 cq1  id   I1DC   cd2 cq2 iq I2DC

ð9Þ

This dynamic model of phase currents will be helpful to design the HVDC system controllers.

6, 22

8, 23, 37, 38, 47, 53, 58

9, 24

10, 25, 34, 35, 48, 54

11

5

13, 27

3, 20, 31, 33, 46

0, 44, 51, 55, 56, 57, 60, 61, 62, 63

4, 21

1, 19, 32, 36, 44, 45, 52

14

15, 28

Vα

18, 30

17, 29, 39, 41, 43, 50

12, 26, 40, 42, 49, 59

2

16

Fig. 5. Output voltage space-vectors of the dual inverter.

Control design The control system enforces the active and reactive power towards their specific set point values. The control system must also regulate the DC link voltage to a reference value. This DC voltage controller is used only in one transmission side, and it provides the value of the active power needed. The active and reactive powers can be given by the following expression [36]:



P Q



 ¼

v sd v sq

v sq  id  v sd iq

ð10Þ

Considering that the reference frame d axis is synchronized to the mains so that vsq = 0, the active and reactive power will be given as:

P ¼ v sd id

ð11Þ

Q ¼ v sd iq

ð12Þ ⁄

⁄

Based on the desired active P and reactive power Q , the current   references id , iq can be determined by: 

id ¼ 

P

v sd

iq ¼ 

Q

v sd

ð13Þ

ð14Þ

Thus, the control strategy will enforce id and iq toward their refer  ences id and iq , in the V side. To further control the dc-link voltage, the R side converter grid current d component reference value must be obtained from the dc-link voltage error. Given the sliding mode control properties concerning response speed and robustness to external disturbances, considering the system dynamics in (6), a sliding mode controller is designed. Additionally, for the R side a PI controller will be used to give the reference value for the grid current d component [26]. Since the ac currents of the upper inverter are the same of the lower inverter it is enough to control the voltages of one of the DC capacitors (in this case the upper capacitor Co1). To maintain VC02 in the same value of VC01 it is only required to choose the right vector, which is made through a vector modulator. Table 1 shows that for the same AC voltage there are several suitable vectors. Some of the vectors will charge the capacitors while other vectors will discharge the capacitors, depending on the resulting cd, cq value of

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V. Fernão Pires et al. / Electrical Power and Energy Systems 65 (2015) 191–200 Converters R R

ir1

RN

L

Converters V

LN

iv1

ir2 ir3

iv2

VCvo1

VCro1

iv3

Grid R

Grid V

ir1 ir2 ir3

i *q = −

Q*

VCro1 ref

Q* v sd

PI

id*

Sliding Mode Current Controller + Vectorial Modulator

VCro2

VCro1 VCro2

LN

VCvo2

VCvo1 VCvo2

Sliding Mode Current Controller + Vectorial Modulator

RN

iv1 iv2 iv3

i *d =

P* v sd

P*

i *q = −

Q* v sd

Q*

VCro1 Fig. 6. Control structure diagram of the proposed HVDC system.

the vector. The reactive power of the R side grid will be controlled through the control of grid current q component. These currents will also controlled by a sliding mode controller. Fig. 6 shows this control structure diagram. The current sliding mode controller consists of a sliding mode surface and control law. From the phase canonical model (6), it can be seen that the controlled state variables id and iq have a relative strong degree of one [37]. In this way, sliding surfaces suitable to control variables id and iq can be made directly proportional to the state variable feedback errors [38]. Defining  feedback errors as the difference between currents references id ,  iq and the actual currents id, iq, the following sliding surfaces should be zero after reaching sliding mode:

(



S1 ðeid ; tÞ ¼ k1 ðid  id Þ ¼ 0 S2 ðeiq ; tÞ ¼

 k1 ðiq

ð15Þ

 iq Þ ¼ 0

Applying the transformations (4) and (16) to the previous equation, the switching function (17) in the ab fixed frame can be obtained [39].



xa xb

(



 ¼

cosðxtÞ  sinðxtÞ sinðxtÞ

cosðxtÞ



xd



xq

  Sa ðeia ; tÞ ¼ k ia  ia ¼ 0 

Sb ðeib ; tÞ ¼ kðib  ib Þ ¼ 0

ð16Þ

ð17Þ

In order to ensure that the system trajectory moves towards and stays on the sliding surface from any initial condition, an adequate voltage vector should be applied. This voltage vector must ensure the sliding mode stability condition (18) [37,38].

Sm

ðeim ; tÞS_ m

ðeim ; tÞ < 0 ðm 2 fa; bgÞ

ð18Þ

The space vector that ensures (17) and (18) must be selected according the following conditions:  – If Sa ðeia ; tÞ > 0 ) S_ a ðeia ; tÞ < 0 ) ia < ia the vector must be chosen in order to increase ia.  – If Sa ðeia ; tÞ < 0 ) S_ a ðeia ; tÞ > 0 ) ia > ia the vector must be chosen in order to decrease ia.

A similar procedure is used for the ib current error. In order to choose the voltage vectors, the current control errors will be quantized using two hysteresis comparators. Fig. 5 and Table 1 show that along the a axis there are nine voltage levels (1.63 VDC, 1.22 VDC, 0.82 VDC, 0.41 VDC, 0, 0.41 VDC, 0.82 VDC, 1.22 VDC, 1.63 VDC,), while along the b axis the number of voltage levels are lower, namely five (1.41 VDC, 0.71 VDC, 0, 0.71 VDC, 1.41 VDC,). However, as the control action will enforce VCo1  VCo2  VDC there will be only 19 distinct space vector affixes. Therefore, to choose all the voltage combinations, two hysteresis comparators, each with 5 levels for both the error of the a and b components (5 ⁄ 5 = 25) is the minimum. However, this leads to ambiguities in selecting some vectors, thus an hysteresis comparator with seven levels (3, 2, 1, 0, 1, 2, 3) for the error of the a component was found to be optimum, while for the error of the b component an hysteresis comparator with five levels (2, 1, 0, 1, 2) is the best choice. This will allow to choose the adequate voltage vector in order to ensure that the system trajectory moves towards and stays on the sliding surface from any initial condition, as well to maintain the voltage of the two DC capacitors with equal value and in equilibrium, provided by the use of redundant vectors. Therefore, at the output of these comparators there are the integer variables ka and kb, that are used to select the most adequate voltage vector (Fig. 7). Table 1 and Fig. 5 show several redundant vectors, allowing to obtain the same output voltage level. The redundant vectors must be used to maintain the voltage of the two DC capacitors with equal value and in equilibrium. Thus, to choose the adequate voltage vector, it is necessary to know the location of the AC currents. As can be seen by Fig. 8 six sectors will be considered. As an example, considering that the system works in the first sector, according the outputs of the five-level (kb 2 {2; 1; 0; 1; 2}) and seven-level (ka 2 {3, 2; 1; 0; 1; 2, 3}) hysteresis comparators, the vector that should be applied will be given by Tables 2 or 3. If the voltage of the DC capacitor 1 is bigger than the voltage of the capacitor 2, then Table 2 must be used. Otherwise, Table 3 should be used. As an example, suppose that vectors 13 and 27 are suitable for the AC current control, since from Table 1 these vectors will give the same voltage level. However, the switching combination of the vector 13 will allow discharging capacitor Co1 and charging

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V. Fernão Pires et al. / Electrical Power and Energy Systems 65 (2015) 191–200 Table 3 Space vector selection for Vco1 < Vco2 and outputs of the hysteresys comparators.

i1 i2 i3

Space Vector Modulator

S11

λα

VCo1 VCo2 Fig. 7. Implementation of the switching strategy.

Fig. 8. Three-phase currents and their correspondent sector.

capacitor Co2. On other hand, vector 27 will charge capacitor Co1 and discharge capacitor Co2. Similar tables can be obtained for the remaining current sectors.

Steady-state and dynamic results To verify the behavior of the proposed dual two-level converter HVDC transmission structure (Fig. 3) with the adopted control system, numeric simulations were performed in MATLAB/Simulink, using the Power System Blockset. To compare the classical with the proposed HVDC system a simulation of these systems based on a real case was performed. Thus, a case study based on the direct transmission system composed of converter stations located in Terranora and Mullumbimby [40] was used. It connects two AC links with 132 kV and 110 kV and with 70 MVA power transformers (132/78.5 kV, 110/78.5 kV). The voltage of the DC link is at ±80 kV. In each of the DC link sides there is a classical voltage source inverter. In the proposed system, the DC link has two bipoles (as presented in Fig. 3) with voltage levels of ±80 kV. The proposed system allows to obtain a multilevel voltage in the AC side of the inverters allowing to reduce the distortion of the AC line currents for the same switching frequency and filters. Fig. 9 shows

Table 2 Space vector selection for Vco1 > Vco2 and outputs of the hysteresys comparators. kb

2 1 0 1 2

3

2

1

0

1

2

3

27 27 11 24 24

14 27 35 24 7

14 40 35 8 7

28 28 0 6 6

16 29 36 3 5

16 30 36 21 5

30 30 2 21 21

S23

λβ

Sβ

ka

2 1 0 1 2

the phase 1 converter ac voltage. In this test, it was used the power converter working as an inverter (the power is transferred from the dc capacitors to the grid). From this figure it is possible to verify that the AC voltage has nine levels. Fig. 10 presents the AC line current of the proposed system. For comparison purposes the control system used in the proposed system was adapted for the classical topology. The obtained AC line current of the classical HVDC system is presented in Fig. 11. From this figure it is possible to verify that in this topology the AC current presents some distortion. Thus, comparing the AC currents of both topologies it is possible to verify that the proposed system allows to strongly reducing de current distortion. In fact, the current THD obtained by the classical system is 8.5% while the current THD obtained by the proposed system is 2.7%. In order to verify the overall performance of the HVDC system, tests with different system dynamic responses have been performed. Figs. 12 and 13 show the active and reactive power in both sides of the HVDC system. The power flow is from the side R to the V side. In this test, a 40 MW active power reference and 0 MVAR reactive power reference is applied to the V side. At t = 1.3 s there is a sudden change in the active power reference (from 20 MW to 50 MW). From these results, it is possible to verify that the controller enforces the active and reactive powers to its references and decouples the P Q powers behavior. Therefore, a variation on the P reference does not change the value of the Q power (except for a very brief transient) and vice-versa. Figs. 14 and 15 show the DC capacitor voltages in both sides of the HVDC system. From the figures it is possible to verify that the voltages become stable after the change in the power reference. The voltages of the capacitors in the V side are slightly below the reference (160 kV). This is due to the HVDC cable resistive losses. In order to verify the voltage balancing between the upper and

2.5

x 10

5

2 1.5 1

Voltage [V]

Sα

kb

0.5 0 -0.5 -1 -1.5

ka 3

2

1

0

1

2

3

13 13 11 9 9

14 13 34 9 7

14 42 34 23 7

15 15 0 22 22

16 17 1 31 5

16 18 1 4 5

18 18 2 4 4

-2 -2.5 0.2

0.205

0.21

0.215

0.22

0.225

0.23

0.235

Time [s] Fig. 9. Converter ac voltage of the proposed HVDC system.

0.24

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V. Fernão Pires et al. / Electrical Power and Energy Systems 65 (2015) 191–200

200 7

x 10

7

150 6 100 5

P [W], Q [VAR]

Current [A]

50

4

V

0

V

-50 -100

3 1

2 1

-150

2

0 -200 0.2

0.205

0.21

0.215

0.22

0.225

0.23

0.235

0.24

-1

Time [s]

1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

Time [s]

Fig. 10. AC line current of the proposed HVDC system. Fig. 13. Converter V active (1) and reactive (2) power flow for a sudden change in the active power reference.

200

1.66

150

1.62

Voltage [V]

Current [A]

50 0 -50

1.6 1.58

-100

1.56

-150

1.54

-200 0.2

0.205

0.21

0.215

0.22

0.225

0.23

0.235

1.52

0.24

Time [s]

x 10

1.66

1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

x 10

5

1.64

1

1.62

-1 -2

Voltage [V]

R

R

1.1

Fig. 14. Converter R DC capacitor voltage for a sudden change in the active power reference.

7

0

1

Time [s]

Fig. 11. AC line current of the classical HVDC system.

P [W], Q [VAR]

5

1.64

100

2

x 10

2

-3 -4 -5

1.6 1.58 1.56

-6 1.54

-7 -8

1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

Time [s] Fig. 12. Converter R active (1) and reactive (2) power flow for a sudden change in the active power reference.

1.52

1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

Time [s] Fig. 15. Converter V DC capacitor voltage for a sudden change in the active power reference.

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1.6001

x 10

5

1.6003

x 10

5

1.6001

1.6002

1.6001 1.6

Voltage [V]

Voltage [V]

1.6001

1.6

1 2

1.6 1.6

1.6

1.5999

1.6 1.5999

1.5998

1.5999 1.5999

1.299 1.2995 1.3

1.5997

1.3005 1.301 1.3015 1.302 1.3025 1.303

Time [s]

x 10

[VAR]

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

7

1.6003

x 10

5

1.6002

2 1

R

1.6001

Voltage [V]

1

0

R

1.2

Fig. 19. DC capacitor voltage of the upper Converter R for a sudden change in the active and reactive power reference.

3

P [W], Q

1.1

Time [s]

Fig. 16. Converter R upper (1) and lower (2) capacitor voltages for a sudden change in the active power reference.

4

1

-1 -2

1.6

1.5999 2

-3

1.5998

-4

1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2 1.5997

Time [s] Fig. 17. Converter R active (1) and reactive (2) power flow for a sudden change in the active and reactive power reference.

6

x 10

3

V

P [W], Q

V

[VAR]

4

1

2

2

1 0 -1

1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

Time [s] Fig. 20. DC capacitor voltage of the lower Converter R for a sudden change in the active and reactive power reference.

7

5

-2

1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

Time [s] Fig. 18. Converter V active (1) and reactive (2) power flow for a sudden change in the active and reactive power reference.

lower capacitor voltage of the R side it is presented in Fig. 16 the time behavior of these voltages in detail. A test to analyze the dynamic behavior of the system for a sudden change in the reactive power reference was also performed. In this test at t = 1.2 s there is a step change in the reactive power reference of the power converter R from 0 MVAR to 10 MVAR. At t = 1.6 s there is a step change in the reactive power reference of the power converter V from 10 MVAR to 30 MVAR. The active power reference in side V is keep at 20 MW. Figs. 17 and 18 present respectively the active and reactive power in both sides of the HVDC system. From these figures it is possible to confirm that the controller tracks the active and reactive powers to the references values. The behavior of the DC capacitor voltages in the R side of the HVDC system is presented in Figs. 19 and 20. These figures show that the voltage balancing between the upper and lower DC capacitors is maintained. A similar test to analyze the dynamic behavior of the system to a step change in the active power reference associated with a reverse active power flow was also performed. So, at t = 1.5 s there is a step change of the active power reference of the power

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x 10

7

1.68

1.66

2

1.64

R

Voltage [V]

4

R

P [W], Q [VAR]

6

2

0

x 10

5

1.62

1.6

-2 1

1.58

-4

-6

1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

1.56

1

Fig. 21. Converter R active (1) and reactive (2) power flow for a step change in the active power reference associated with a reverse active power flow.

x 10

6

7

2

V

V

P [W], Q [VAR]

1

2

-2

-4

-6

1

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

5

1.68

Voltage [V]

1.66

1.64

1.62

1.6

1.58

1

1.1

1.4

1.5

1.6

1.7

1.8

1.9

2

Fig. 24. Converter V DC capacitor voltages for a step change in the active power reference associated with a reverse active power flow.

Conclusions

Fig. 22. Converter V active (1) and reactive (2) power flow for a step change in the active power reference associated with a reverse active power flow.

x 10

1.3

2

Time [s]

1.7

1.2

converter R from +40 MW to 40 MW. The reactive power reference was kept at 0 MVAr. Figs. 21 and 22 show the time behavior of the active and reactive power in both sides of the HVDC system. From these results it is possible to confirm that the controller still enforces the active and reactive power to its references and that the system remains stable. It is also presented the behavior of the DC capacitor voltages in both sides of the HVDC system in this test. As can be seen from Figs. 23 and 24, the voltage balancing between the upper and lower DC capacitors are maintained. From Fig. 23 it is possible to verify that after the change of the power reference the DC output voltage has a disturbance, but shortly after the DC output voltage returns to its reference value. The voltages of the capacitors in the V side increase after the power reference change, since active power is transmitted in the reverse direction.

4

0

1.1

Time [s]

Time [s]

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2

Time [s] Fig. 23. Converter R DC capacitor voltages for a step change in the active power reference associated with a reverse active power flow.

This paper has presented a new HVDC transmission system based on a multilevel structure using a dual two-level converter topology. The proposed HVDC transmission structure obtains multilevel AC voltage waveforms from standard three-phase converters connected to a three-phase open winding transformer. The total power transmitted in the DC link is shared by the two three-phase converters. A control algorithm for the active and reactive transmitted power was also presented. It enforces the active and reactive power towards their specific set point values, while simultaneously regulating the dc-link voltage of each converter. The control algorithm is based on sliding mode control theory coupled to a space vector modulator. To regulate the dc-link voltages to a suitable operating value, a PI controller was adopted. The proposed HVDC system has been tested by numerical simulations. Results from several tests have been presented showing the system step responses. The results confirm that the proposed HVDC transmission system using sliding mode controllers, presents good performance in a wide range of operation conditions. Also, from the obtained results it is confirmed that the control system achieves voltage balancing in both sides of the HVDC system between the upper and lower DC capacitors. In order to compare the classical with the proposed HVDC system, the tests were based on a real case.

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