IBIS Bus: towards a distributed architecture for MEMS integration

Sensors and Actuators A 115 (2004) 470–475

IBIS Bus: towards a distributed architecture for MEMS integration B. Lorente, J. Oliver, C. Ferrer∗ Unitat de Microelectrònica, Departament d’Informàtica, Universitat Autònoma de Barcelona (UAB), 08193 Barcelona, Spain Received 22 September 2003; received in revised form 4 March 2004; accepted 30 March 2004 Available online 1 June 2004

Abstract Our main objective in this work has been to develop a distributed architecture for MEMS integration based on a hierarchical communication system. This communication system is based on the use of a dedicated sensor Bus (IBIS: Interconnection Bus for Integrated Sensors) composed by only two wires. The reduced number of wires of IBIS is an extraordinary advantage because produce a minimal interconnection between all the components and as a consequence the size of the microinstrument becomes smaller. The use of distributed architecture permits to develop a flexible and modular solution to integrate sensors and actuators and the data processing. © 2004 Elsevier B.V. All rights reserved. Subj. Class.: 9 (System architecture, electronic interfaces and wireless interfaces) Keywords: Distributed architectures; Smart sensors; Microsystems interface and communication

1. Introduction Silicon technologies make possible to produce sensing microdevices combining extreme sensitivity, accuracy and compactness devices. MEMS: microelectromechanical systems offer a number of benefits including reducing mass, volume, and power consumption; greater redundancy of system functions and simpler architectures. In view of their remarkable characteristics, it can be expected that such “micro-sensors” will be used extensively wide spread number of applications if an adequate solution is found to reduce the design costs and simplify the electrical interfacing [6–10]. The problem of interfacing multiple sensors, as requisite to manufacture and integrate fully functional microsystems, can be separated in the following two levels: the electronic interface and the technological interface, that permits to interconnect different types of microdevices and their associated circuitry. For the electronic interface, two main interconnection architectures exist: a classical architecture where the sensed data are multiplexed, conditioned and digitised using a ded∗ Corresponding author. Present address: Institut de Microelectr` onica de Barcelona. Centre Nacional de Microelectr`onica (IMB-CNM), CSIC, 08193 Barcelona, Spain. Tel.: +34-93-594-7700; fax: +34-93-580-1496. E-mail address: [email protected] (C. Ferrer). URL: http://www.cnm.es/imb.

0924-4247/$ – see front matter © 2004 Elsevier B.V. All rights reserved. doi:10.1016/j.sna.2004.03.063

icated microcontroller (see Fig. 1), and a distributed architecture where a Bus organised system is used. The second approach introduces the advantages of modularity and interchangeability as it allows a flexible interconnection applicable to different sets of microsystems (see Fig. 2). The main objective of this paper is to show an architectural approach based on the use of a methodological communication system between sensors and actuators that can be applied in the development of micro instrumentation. At this level we apply the concept of smart sensors. A smart sensor is a device, with an added simple interface that allows to connect the sensor to the Bus sensor without causing any incompatibility or any difficulty to adapt the new element to the Bus. The developed communication’s system allows up to 32 smart sensors. The global communication system implements a hierarchical communications protocol from the microsystem’s devices to the main host. This communication system includes the Bus sensor to aid the development of each micro instrument and an instrumentation Bus in other to connect all the microinstruments to the main host [1–5]. The developed Interconnection Bus for Integrated Sensors (IBIS) is a mono-master Bus and it consists in only two wires of communication the first is the Serial Cock Line (SCL) for the initial synchronisation of the elements that communicates between them and the second is the Serial Data Line (SDL). This wire is bi-directional for transmitting commands and data from the Master to the Slaves and from

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Fig. 1. Classical architecture.

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Fig. 2. Distributed architecture.

the Slaves to the Master. Generally, the serial buses in the literature use only one way of communication, the Master only order commands to the Slaves. In the purposed Bus the Master captures data, so it can process the data received and make the Slaves react with another command. In this first version of the Bus, the clock line only is used for ensure that it will not be any lost of synchronisation at the beginning of any transmission due to the Slaves are controlled by their own clock on their electrical circuitry. The SCL line is guided by the Master and all the Slaves have a connection in order to synchronize their response.

2. Bus sensor development The IBIS is a Bus that allows transmitting commands, addresses and data. It must permit the communication between sensors, actuators and a dedicated data processing unit in order to built-up an specific microinstrument. In such a way, the previous elements can communicate and

react to the input events received. The terminals of the communication-developed system are sensors and actuators, which will act as Slaves. The Master is the data processing unit implemented using a microcontroler or an FPGA. Into the Master control algorithms gives the appropriated commands to sensors/actuators and allow them to answer in real time. Also it is possible to introduce local processing in sensors or actuators in order to permit the process of the data obtained before sending it through the Bus to the main host. So, we have made the design of the communication Bus protocol and the appropriated drivers for all the elements we want to interconnect with the Bus sensor [2]. These drivers will make the function of translating the commands that will travel through IBIS, drivers that were originally implemented in simple FPGAs and content the corresponding communications protocol and the interface of the sensor. These drivers, due to their dedicated part, will allow to give certain intelligence to the sensor/actuator, making smart sensors/actuators (see Fig. 3).

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B. Lorente et al. / Sensors and Actuators A 115 (2004) 470–475 1b Frame type 1

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Fig. 3. Smart sensor development.

It’s important in each system the reaction in real time. To make that possible, the implemented drivers must give a quick response, so in our tests we find that the ideal speed for IBIS would be of 1 MHz. This low rate of transmission is due to the low volume of data if we compared the application with another one that requires a high volume of data. With IBIS we will integrate discrete sensors that will measure parameters with a low variation rate. The chosen data rate is enough to transmit the total amount of data produced by the sensors. For the data transmission we have used Manchester encoding and we have built two types of frames: • The first frame consist in 11 bits, 5 bits are for addressing the Slaves, so 32 Slaves can be identified.. The next 4 bits are for transmitting the appropriate command for the iden-

tified Slave. The last 2 bits of the protocol are dedicated to start and stop the frame. • The second frame has 10 bits, two of them are the start and the stop frame bits. The other 8 bits are for data transmission from the Slave to the Master. So, considering both frames, it should be observed that the first frame is for the transmission from the Master to the Slaves, while the second one is for the transmission from the Slaves to the Master (see Fig. 4). To built-up and to fragment frames is necessary a quick mechanism that works for that purpose which is found in the interior of the driver and we can see how it works in Fig. 5 and Fig. 6. The experiments done until nowadays are made with programmable logic, using FPGA’s. The FPGA’s used were from Altera and they were programmed using VHDL language. The developed application was made for industrial control, using optoelectronic sensors, a step motor and a continuous motor. The system had to react in real time to the data sensed and captured by the sensors and make function

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Fig. 5. Partition of the frame.

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Fig. 6. Build up frame.

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the motors depending on the command given (directly synthesized from the data sensed). The results obtained were satisfactory, the sensed data arrived at the Master, who computed it and composed the related commands to send to the sensors or actuators. The system reacted to the all commands given by the Master with the expected efficiency. The maximum speed data transfer proved was of 4 MHz, although the normal tests were done at 1 MHz.

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microinstruments between them. This architecture will be composed by an instrument Bus and a dedicated microcontroller which implements the instrument processing and control unit (see Fig. 8). With IBIS, presented previously, the lower parts of the system has been minimised giving more control while we go climbing to the highest parts of the architecture hierarchy.

4. Comparing IS2 with IBIS 3. Architecture development The interconnection in Bus topology allows to connect more sensors without using so many lines, therefore the data processing will not be so saturated and busy as in a star topology, for example, with signals coming from different smart sensors. In this topology the elements that form the Bus are linearly connected. The information frames are propagated trough the Bus reaching all nodes (Master and Slaves). Each node of the Bus has to read the frame and identify if the frame is for itself. So they monitor the Bus constantly. In the protocol is not implemented any control through the data transmitted, supposing a very low bit error rate (BER). In case of error the superior levels nets will correct any mistake. This enables to make simpler the protocol and, in consequence, with less volume in final implementation for a better integration. This Bus is in the minimum level in a microsystem, so in future, that will be integrated in a single chip and it has to be of small size. The basic interconnection of the microinstrument is shown in Fig. 7 where is presented the minimum level of connection based on a distributed architecture. Each smart sensor is composed by the analogue and digital processing module, the bus driver and the sensor or actuator itself. In that way, we can introduce an hierarchical interconnection architecture that permits to communicate different

IBIS has come up of IS2 . In this section, the main differences between IBIS and are presented. The IS2 Bus physically consists of two active wires. The active wires are SDA and SCL, where SDA is the Serial DAta line and SCL is the Serial CLock line. SCL line is unidirectional and as IS2 in IBIS is used for synchronization of all the elements while SDA is bidirectional in both buses. In both buses each component hooked up to them has its own unique address whether it is a sensor or an actuator. Each of these chips can act as a receiver and/or transmitter depending on its functionality. In IS2 exists error control and the Master or the Slaves can throw an interruption and stop the transmition of the data while in IBIS this is not implemented, to reduce the protocol for a better integration. Also, in IS2 while the transmition is correct, the end of the transmition can be done by the master or the slaves. In IBIS the transmition of any frame is always ended by the Master. The main differences between both buses is the fact that in IS2 the frames have not any length defined while in IBIS the frames are predefined in order to reduce the code of the protocol. The other difference is in the number of devices that can be connected, in IBIS it is possible to connect 32 sensors and in IS2 there can be 16 sensors.

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Fig. 7. Mininum level of connection.

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Fig. 8. Sensor level + system connection level.

IS2 comes up of I2 C, so in the fast mode, the speed data transfer is about 400 kbit/s, but it is possible to achieve a bit transfer of up to 3.4 Mbit/s doing certain changes. In IBIS we have set up a minimum speed of 1 MHz but in certain experiences we have found that it can be of 4 MHz.

5. Conclusions With IBIS it is possible the interconnection of 32 sensors in the same microsystem, avoiding any problem with the plug and play of the elements hooking up in IBIS.

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We have made a communications microsystem Bus (IBIS) that implies a new architecture and a methodology of implementing it. IBIS is a Bus that can be used from the minimum level of integration to the top of the all system. With IBIS we can hook up 32 sensors in the same microsystem without causing that the plug and unplug of the elements that are hanging of the Bus cause any problem. Although we have tested the ideal speed of the IBIS, 1 MHz in systems that no required a high level of data to be transmitted, in fact IBIS can be more quick and go up to 4 MHz. The ideal speed is 1 MHz in systems that do not require a high level of data to be transmitted, also the experimental results until nowadays accept a SCL line at 4 MHz.

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[6] K. Lee, Sensor Networking and Interface Standarization, IEEE International and Measurement Technology Conference, Hungary, May 2001, pp. 147–152. [7] M. Schlegel, G. Hermann, D. Muller, Multiple architecture modeling design method for mixed signal and multi domain system simulation-first solutions, in: Proceedings of the International MEMS Workshop, Singapore, 4–6 July 2001, pp. 662–667. [8] S.D. Senturia, Microsystem Design, Kluwer Academic Publishers, USA, 2001. [9] J.J. Simonne, A systems approach to microsystems development, in: H. Helvajian (Ed.), Microengineering Aerospace Systems, Aerospace Press, CA, USA, 1999 (Chapter 7). [10] K. Wise, Microelectromechanical systems: interfacing electronics to a non-electronic world, Digest of IEEE International Electron Device Meeting, December 1996, pp. 11–18.

Biographies Acknowledgements This work has been founded by the Spanish CICYT project no. TIC-2002-01048. References [1] M. Bartek, “Semi-hybrid” techniques for microsystem integration, in: Proceedings of the 1998 Microsystems Symposium, Delft, The Netherlands, pp. 17–26. [2] C. Ferrer, B. Lorente, Smart sensors development based on a distributed Bus for microsystems applications, in: Proceedings of the SPIE’s First International Symposium on Microtechnologies for the New Millennium 2003: Smarts Sensors, Actuators and MEMS, Maspalomas, Gran Canaria, Spain, 19–21 May 2003. [3] B.J. Hosticka, “CMOS sensor systems”, in: International Conference on Sensors and Actuators (Transducer’97), Chicago, IL, June 1997, pp. 991–993. [4] IEEE Std 1451.2-1997, Standard for a Smart Transducer to Microprocessor Communication Protocols and Electronics Transducer Data Sheet Formats, IEEE Inc., Piscataway, NJ, 1997. [5] IEEE Std 1451.1-1999, Standard for a Smart Transducer Interface for Sensros and Actuators—Nertwork Capable Application Processor (NCAP) Information Model, IEEE Inc., Piscataway, NJ, 1997.

Mrs. Bibiana Lorente was born in Sabadell, Barcelona in 1977. She received her degree on computer engineering in 2002 from the Universitat Autònoma de Barcelona. She is currently working to obtain her PhD degree in the Computer Science Department at the Universitat Autònoma de Barcelona. Since 2002 she is an assistant professor in the Computer Science Engineering Department of the Universistat Autònoma de Barcelona. Her research interests are in the area of microelectromechanical systems (MEMS), the developing of smart sensors and the communications between them. Dr. Joan Oliver received his degree in physics on 1984 and his PhD degree on computer science in 1990 from the Universitat Autònoma de Barcelona. Since 1991 he is an associated professor in the Computer Science Department of the Universistat Autònoma de Barcelona. His research interests are in the area of microelectromechanical systems (MEMS) and low power interaction systems. Dr. Carles Ferrer received his degree on physics in 1984 and his PhD degree on computer science in 1989 from the Universitat Autònoma de Barcelona. Since 1990 he is an associated professor in the Computer Science Department of the Universistat Autònoma de Barcelona. He is also an associate researcher at the Institut de Microelectrònica de Barcelona (CNM-CSIC). His research interests are in the area of microelectromechanical systems (MEMS) integration and their combination with system-on-chip design methodologies.