n-GaN barrier junction

Displays 32 (2011) 330–333

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Short Communication

Improved current-spreading performance of an InGaN-based light-emitting diode with a clear p-GaN/n-GaN barrier junction Yi-Jung Liu a, Der-Feng Guo b, Kuei-Yi Chu a,c, Shiou-Ying Cheng c,⇑, Jian-Kai Liou a, Li-Yang Chen a, Tsung-Han Tsai a, Chien-Chang Huang a, Tai-You Chen a, Chi-Shiang Hsu a, Tsung-Yuan Tsai a, Wen-Chau Liu a,⇑ a

Institute of Microelectronics, Department of Electrical Engineering, National Cheng-Kung University, Tainan, Taiwan, ROC Department of Electronic Engineering, Chinese Air Force Academy, Kaohsiung, Taiwan, ROC c Department of Electronic Engineering, National Ilan University, I-Lan, Taiwan, ROC b

a r t i c l e

i n f o

Article history: Received 19 July 2010 Received in revised form 10 February 2011 Accepted 13 April 2011 Available online 27 May 2011 Keywords: GaN Light-emitting diode Current spreading

a b s t r a c t The InGaN-based light-emitting diode (LED) with a clear p-GaN/n-GaN barrier junction is fabricated and investigated. Due to the built-in potential induced by this junction, superior current spreading performance is achieved. In addition, the suppression of current crowding phenomenon yields the reduced parasitic effect. Therefore, under an injection current of 20 mA, improved behaviors including lower turn-on voltage, lower parasitic series resistance, and significantly enhanced electrostatic discharge (ESD) performance are presented. Ó 2011 Elsevier B.V. All rights reserved.

1. Introduction Over past years, tremendous progresses related to high-brightness InGaN-based light-emitting diodes (LEDs) have been achieved. However, the current-spreading performance of an InGaN LED is still an important concern. Due to insulating nature of sapphire substrates, the n–p metal pads must be located in the same side of LEDs. Such a horizontal structure easily causes the current-crowding effect. Moreover, the high-resistive p-GaN contact layer also exacerbates current crowding. As a result, current concentrates nearby n–p pads, yielding a small and nonuniform lighting area. The turn-on voltage of an LED diode could be increased resulting from the increase of parasitic contact and series resistances [1–3]. Moreover, the heating-induced light degradation should be seriously considered. Many techniques were reported to improve the current-spreading performance of InGaN LEDs [1,2,4]. In this work, an LED with a p–n barrier junction between multiple-quantum well (MQW) and p-GaN layers is proposed to suppress the currentcrowding effect. A 5-nm thin n-GaN layer is inserted into the pGaN/MQW interface. A depleted p-GaN/n-GaN junction, which induces a barrier height, is naturally formed at the p-GaN/MQW interface. Under forward bias voltage, driven holes can be spread out widely neighboring the p–n barrier junction prior to injecting ⇑ Corresponding authors. E-mail addresses: [email protected] (S.-Y. Cheng), [email protected] (W.-C. Liu). 0141-9382/$ - see front matter Ó 2011 Elsevier B.V. All rights reserved. doi:10.1016/j.displa.2011.04.004

into MQW layers. Compared with this energy barrier which extends over the whole lighting area, the traditional current-blocking layer (CBL) [5] presents a localized and completely-insulating current blocking ability. Therefore, its current spreading performance is limited. In fact, the p–n barrier junction is similar to that reported by our group previously [2], where an inserted superlattice structure is employed to suppress vertical current injection into MQW layers. The other similar approach was proposed by Wen et al. [6]. Jeon et al. have reported the works related to p–n tunneling junctions [7–10]. A ‘‘p-side down and n-side up’’ grown process was proposed. This concept allowed the use of a low-resistive n-GaN layer as a surface contact layer which provided a better current-spreading capability. However, this grown sequence is believed not only to cause a more complicated procedure but also increase turn-on voltage of LEDs. This certainly results in a reduced injection efficiency and lifetime. On the other hand, based on the proposed p–n barrier junction in this work, these drawbacks do not occur because it allows a conventional ‘‘p-side up and n-side down’’ grown process. Notably, the purpose of this barrier junction in this work is ‘‘current blocking’’, which is substantially different from ‘‘current tunneling’’ mechanism of previous reports [6–9]. 2. Experimental The epitaxial layers of GaN-based LEDs in this work were grown on sapphire substrates by a Thomas Swan metalorganic chemical vapor deposition (MOCVD) system. The substrates employed were

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Fig. 1 illustrates schematic structural and energy-band diagrams of the studied devices. For the device A, an n-GaN layer is deposited prior to the growth of p-GaN layer. Thus an abrupt p–n depleted junction is formed in this region, and the internal built-in potential ei induced by this junction is clearly shown. A sharper energy barrier near MQW layers is built up by the higher Si-doping GaN barrier layer (see the energy band diagram). Under forward bias voltage, the energy barrier is opposite against the external bias. Vertically injected holes tend to transport laterally prior to reaching MQW layers due to the blocking effect induced by this barrier. Until the applied bias is higher to provide enough kinetic energy for holes to climb over this barrier, they finally transport not only laterally but also vertically. On the other hand, for the device B, the p-GaN layer is directly grown on the MQW layers. A comparably smaller energy barrier also could be observed since the undoped GaN last layer in MQW layers still exhibits an n-type characteristic. However, this unintentionally formed barrier becomes more unclear under the biased condition, and a narrower current-spreading region is expected. This yields undesired current-crowding and severe parasitic effects [1,2]. Fig. 2 shows current–voltage (I–V) characteristics for studied devices. Clearly, the device A exhibits lower forward-biased leakage current at 0–2.5 V voltage regime as compared with the device

ITOITO

ITO

p-GaN

ii

MQW MQW

p-pad p-GaN p-GaN MQW MQW

current path current paths

current paths

n+ GaN n -GaN (device A) device A +

device B

device B

n-pad n-pad

n-GaN

n-GaN sapphire sapphire

p-side

MQW layers

n-side biased unbiased

B EFp InGaN GaN

EFp

EFn

depleted barrier junction (barrier height)

A

holes accumulation

EFn

Fig. 1. The structural and energy-band diagrams of studied devices. The related current-spreading paths of both devices are also shown.

B. Confirmed by atomic force microscopy (AFM) analyses, comparable surface root-mean square roughnesses of 42.5 and 37.7 nm for devices A and B respectively, are found. This demonstrates that the difference in forward leakage currents could not be ascribed to their surface contact properties. In addition, the similar reversebiased leakage currents (1–4  1010 A @ 5 V) for both devices also indicate their perfect crystal qualities. Therefore, one could expect that the variant forward leakage currents are originated from the p–n barrier junction, which induces a barrier height to suppress the forward leakage current. It is known that the barrier height UB of a diode could be expressed as [15]:

/B ¼ KT log





I0

ð1Þ

A T 2

10-1 Device A Device B

10-2 10-3 10-4

Junction Termperature (°C)

3. Results and discussion

p-pad p-pad

p-pad

Current (A)

scribed from 2 in. exactly(0 0 0 1)-oriented sapphire wafers. Trimethyl gallium (TMGa) and trimethyl indium (TMIn) were used as the group-III sources. Ammonia (NH3) was used as the group-V source. Disilane (Si2H6) and bis (cyclopeantadienyl) magnesium (Cp2Mg) were n- and p-type doping source, respectively. H2 and N2 were served as carrier gases for GaN and InGaN epilayer, respectively. The LED structure consisted of a 2 lm GaN buffer layer, a 2 lm Si-doped n-GaN layer (n = 1  1018 cm3), 5-period Si-doped(n = 1  1018 cm3) followed by 10-period undoped (intrinsic concentration = 2  1016 cm3) In0.2Ga0.8N/GaN (5/15 nm) MQW as active layers, a 5 nm Si-doped GaN (denoted as device A) layer (n = 5  1017 cm3), a 0.2 lm Mg-doped planar p-GaN layer (p = 4  1017 cm3, using hydrogen as carrier gas), and a 0.1 lm Mgdoped naturally-textured p-GaN contact layer (p = 4  1017 cm3, using nitrogen as carrier gas) for light extraction. All concentrations were confirmed by secondary ion mass spectrometry (SIMS) analyses. Notably, although these textured V-pits were reported to be related to the termination of threading dislocations on the p-GaN surface [11], one could effectively block the dislocation propagation by inserting a 0.2 lm planar p-GaN layer underlying the naturallytextured p-GaN layer [12]. Notably, in MQW layers, one just doped Si dopants in the first five barrier layers since the hole carrier transport will be easily blocked by Si-doped barrier layers [13]. Thus,electron–hole pairs could be recombined uniformly and efficiently in whole MQW well layers. For comparison, the device without the 5 nm Si-doped GaN layer is also included which is denoted as the device B. For the devices A, due to the presence of a Si-doped layer, a depleted p-GaN/n-GaN junction and the induced larger barrier height are expected between the p-GaN/MQW interface. After wafer cleaning processes, an inductively coupled plasma (ICP) system was utilized to define mesa regions. A 250 nm-thick indium-tin oxide (ITO) layer followed by n- and p-pads was deposited by an electronic beam evaporator. These wafers were diced into individual chips with dimensions of 250  575 lm2. Chips were attached and boned to TO-3 submounts for electrical and optical tests. The current–voltage (I–V) characteristics were measured at room temperature by an Agilent 4156C semiconductor parameter analyzer. The ESD characteristics of forward-biased Machine model (MM+) [14] were measured by an Electro-Tech System ESD simulator Model 910.

10-5 -6

10

10-7 10-8 10-9 10-10

120

Device A 100

Device B

80 60 40 20

0

20

40

60

80

100 120

DC current (mA)

0

1

2

3

4

5

6

Voltage (V) Fig. 2. Current–voltage (I–V) characteristics of the studied devices. The inset shows junction temperature as a function of DC current of both devices.

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and

I0 ¼

 qV 

4

0.10

Ie gKT

ð2Þ

Device A Device B Fitting data

  KT NA ND ln q n2i

ð3Þ

where NA (ND) is the accepter (donor) concentration of the p-(n-) GaN layer, ni the intrinsic concentration of GaN. On the other hand, the one for the device B is evaluated as 0.08 V (NA (ND) = 4  1017 (2  1016), and ni = 2  1016 cm3), which is extremely smaller than the device A. Such a big difference highly agrees well with the fact that the proposed p–n barrier junction surely exhibits a lager barrier height than the normal one. Moreover, based on I–V characteristics, one could find a clear turning point (at around 0.1 mA, 2.5 V) between lower/higher current injections for the device A than that for the device B. This could be explained as follows: when the applied voltage is beyond 2.5 V, holes get not enough kinetic energy to climb across the barrier, hence they tend to transport laterally and concentrate before the barrier (see Fig. 1). Once applied voltage is above 2.5 V, holes acquire enough energy and transport not only laterally but also vertically, resulting in a higher current injection. For comparing the two studied devices A and B with ease for readers, the corresponding parameters mentioned above are summarized in Table 1. The inset of Fig. 2 shows junction temperature as a function of applied DC current for both devices. Here, a diode forward voltage method is used [16] with a 0.03% duty cycle. The temperature coefficients of the forward voltage (dVf/dT) at 20 mA are 1.67 for the device A and 2.26 mV/K for the device B. Clearly, the junction temperature for the device A (35.2 °C) is significantly lower than that for the device B (48.4 °C, @ 20 mA). This indicates the improved current-spreading performance [17]. Fig. 3 shows linear I–V characteristics for both devices. The turn-on voltages (Vf), at 20 mA, are 3.17 and 3.48 V for the devices A and B, respectively. For the device A, as compared with the device B, due to the superior current-spreading performance, the substantially lower Vf value is attributed to the reduced parasitic effect [1–2]. The corresponding IdV/dI–I characteristics are shown in the inset of Fig. 3. It is known that the slopes of IdV/dI–I curves refer to parasitic series resistances of LEDs. As compared with the higher resistance of 31.5 X for the device B, remarkably lower

Current (A)

0.06

2

1

0.04 0 0.02

0.04

0.02

0.06

0.08

I (A)

Device A 0.00

Device B 0

1

2

3

4

5

Voltage (V) Fig. 3. Linear current–voltage characteristics of both devices. The inset shows the related parasitic series resistances.

series resistances of 15.2 X for the devices A is obtained. This result implies that the reduction in parasitic resistances for the device A is more efficient than that for the device B, due to the presence of a barrier junction. In other words, the device A exhibits a better current-spreading performance. The ESD pass yield of MM + measurements for both devices is shown in Fig. 4. During ESD tests, a forward stress is applied to the anode while the cathode is grounded. Here, the ‘‘pass’’ condition is defined as a small leakage current (<108 A @ 5 V) of the device after ESD tests. Around 25–30 chips are selected randomly to evaluate each testing condition. Clearly, remarkably improved ESD endurances are observed for the device A as compared with the device B. For instance, at 250 V, the pass yield of device B is only around 10%, while nearly 100% is found for the device A. This result highly confirms that the barrier junction in LED A could spread out a forward pulse current [6]. The barrier junction prevents LED A from damages exacerbated by concentrated hot carriers. This current-spreading mechanism resembles that provided by an inserted superlattice structure [2]. Nevertheless, it is found that the output light of the LED A is slightly degraded than that of the LED B. At 20 mA, output powers of 7.56 and 8.35 mW are measured for devices A and B, respectively, as shown in the inset of Fig. 4. It is

device A device B

100

80 50

60

40

20

Output power (mW)

ei ¼

0.08

Pass Yield (%)

where A is the effective Richardson coefficient, I0 the reverse saturation current, g the ideality factor, K the Boltzmann’s constant, and T the absolute temperature. The ideality factors are estimated to be 2.11 and 3.13 at voltage regime 2–2.5 V for devices A and B, respectively. By using Eqs. (1) and (2), the barrier heights are calculated as 0.775 and 0.605 eV for devices A and B, respectively. Since an energy barrier height is presented on any heterointerface in LEDs and could not be calculated separately, these two values could be regarded as effective energy barriers of all heterojunctions in studied LEDs. The 0.17 eV increment of barrier height is possibly related to the ei formation of the device A. In other words, the Si-doped GaN layer with higher donor concentration (n = 5  1017 cm3) for the device A creates a larger energy barrier, as compared with the undoped GaN layer (with intrinsic concentration, n = 2  1016 cm3) does for the device B. One could also determine the ei of the p–n barrier junction for the device A as 0.16 V (NA (ND) = 4  1017 (5  1017), and ni = 2  1016 cm3), by using the following equation:

IdV/dI (V)

3 ⁄

device A device B

40 30 20 10 0

0 Table 1 The detailed parameters of studied devices A and B related to a barrier junction.

Device A Device B

Ideality factor (g)

Barrier height (UB, eV)

Built-in potential (ei, V)

2.11 3.13

0.775 0.605

0.16 0.08

0

25

50

75

100

125

150

175

200

Current (mA)

-500 -400 -300 -200 -100

0

100 200 300 400 500 600

Forward Machine Model (MM+) (V) Fig. 4. Electrostatic discharge (ESD) pass yields of studied devices under MM + measurements. The inset illustrates the output power as a function of current for studied devices.

Y.-J. Liu et al. / Displays 32 (2011) 330–333

believed that the light decrease possibly originates from partial light absorption by the Si-doped GaN barrier layer [6,13,18]. However, the degradation ratio becomes lower with increasing the injection current (9.5 and 5.8% decreases at 20 and 100 mA, respectively). At a high driving current, output power of the device A is still increased, while it is saturated or even degraded for the device B. This result could be found across a large sample of studied LEDs and indeed ensures the enhanced current-spreading ability for the device A. At 200 mA, the device A even exhibits improved/comparable output power than the device B does (43.3 and 42.8 mW for devices A and B, respectively). That is, the current-crowding instead of light absorption effect gradually dominates light degradation. Generally, the joule-heating effect, exacerbated by the higher turn-on voltage and current-crowding phenomena, are primarily accompanied with the reliability and light degradation of LEDs [19]. In this work, the studied devices are stressed under a 60 mA DC current at room temperature. For the device B, a deterioration about 20 ± 2% in output power is found once the 600 h aging time is reached. A 23 ± 2% light degradation is also observed after during upon 1173 h aging time. Under 60 mA, the operational voltage becomes higher, as shown in Fig. 3. As a result, the poor current-spreading behavior and higher voltage cause this poor reliability. On the other hand, the device A exhibits a relatively high performance. Only 2 ± 0.4% light degradation is presented after 1173 h aging time. In fact, the reduced diffusion of Mg dopants from the p-GaN layer into MQW active regions induced by the barrier junction could not be ascribed to this enhancement, since comparable SIMS profiles of Mg for both devices are found. 4. Conclusion An InGaN-based LED with a clear p-GaN/n-GaN (device A) barrier junction is fabricated and investigated. Due to the built-in energy barrier, a superior current spreading performance is presented. In addition, the suppression of current crowding phenomenon yields the reduced parasitic effect. Therefore, under an injection current of 20 mA, improved behaviors including lower turn-on voltage, lower parasitic series resistance, and significantly enhanced ESD performance are obtained. For example, at 500 V of MM + measurements, the higher pass yield of nearly 100% is found for the device A. Yet, the corresponding pass yield is nearly 0% for

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the device without a p-GaN/n-GaN barrier junction (device B). Moreover, after 1173 h aging test under an operation current of 60 mA, the light degradation is 23 ± 2% for the device B, while this value is reduced to only 2 ± 0.4% for the device A. Obviously, this excellent result is mainly attributed to the improved currentspreading performance. Acknowledgment Part of this work was supported by the National Science Council of the Republic of China under Contract No. NSC-97-2221-E-006238-MY3. References [1] J.S. Jang, Appl. Phys. Lett. 93 (2008) 081118. [2] Y.J. Liu, C.H. Yen, L.Y. Chen, T.H. Tsai, T.Y. Tsai, W.C. Liu, IEEE Electron Dev. Lett. 30 (2009) 1149. [3] Y.J. Liu, T.Y. Tsai, C.H. Yen, L.Y. Chen, T.H. Tsai, C.C. Huang, T.Y. Chen, C.H. Hsu, W.C. Liu, Opt. Express 18 (2010) 2729. [4] Y.T. Rebane, Y.G. Shreter, B.S. Yavich, V.E. Bougrov, S.I. Stepanov, W.N. Wang, Phys. Status Solidi A – Appl. Mater. 180 (2000) 121. [5] C.F. Tsai, Y.K. Su, C.L. Lin, IEEE Photon. Technol. Lett. 21 (2009) 996. [6] T.C. Wen, S.J. Chang, C.T. Lee, W.C. Lai, J.K. Sheu, IEEE Trans. Electron Dev. 51 (2004) 1743. [7] S.R. Jeon, Y.H. Song, H.J. Jang, K.S. Kim, G.M. Yang, S.W. Hwang, S.J. Son, Phys. Status Solidi (a) 188 (2001) 167. [8] C.M. Lee, C.C. Chuo, I.L. Chen, J.C. Chang, J.I. Chyi, IEEE Electron Dev. Lett. 24 (2003) 156. [9] S.R. Jeon, Y.H. Song, H.J. Jang, G.M. Yang, S.W. Hwang, S.J. Son, Appl. Phys. Lett. 78 (2001) 3256. [10] T. Takeuchi, G. Hasnain, S. Corzine, M. Hueschen, R.P. Schneider, C. Kocot, M. Blomqvist, Y.L. Cheng, D. Lefforge, M.R. Krames, L.W. Cook, S.A. Stockman, Jpn. J. Appl. Phys. 40 (2001) L861. [11] C.H. Jang, J.K. Sheu, C.M. Tsai, S.C. Shei, W.C. Lai, S.J. Chang, IEEE Photon. Technol. Lett. 20 (2008) 1142. [12] C.M. Tsai, J.K. Sheu, P.T. Wang, W.C. Lai, S.C. Shei, S.J. Chang, C.H. Kuo, C.W. Kuo, Y.K. Su, IEEE Photon. Technol. Lett. 18 (2006) 1213. [13] E.H. Park, D.N. Hun Kang, I.T. Ferguson, S.K. Jeon, J.S. Park, T.K. Yoo, Appl. Phys. Lett. 90 (2006) 031102. [14] http://www.siliconfareast.com/esdmodels.htm. [15] L. Wang, M.I. Nathan, T.H. Lim, M.A. Khan, Q. Chen, Appl. Phys. Lett. 68 (1996) 1267. [16] Y. Xi, E.F. Schubert, Appl. Phys. Lett. 85 (2004) 2163. [17] Y.J. Liu, C.H. Yen, K.H. Yu, P.L. Lin, L.Y. Chen, T.H. Tsai, T.Y. Tsai, W.C. Liu, IEEE J. Quantum Electron. 46 (2010) 246. [18] Q. Zhou, J. Chen, B. Pattada, M.O. Manasreh, F. Xiu, S. Puntigan, L. He, K.S. Ramaiah, H. Morkoc, J. Appl. Phys. 93 (2003) 10140. [19] S. Hwang, J. Shim, IEEE Trans. Electron Dev. 55 (2008) 1123.