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Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer
MR-11818; No of Pages 5 Microelectronics Reliability xxx (2015) xxx–xxx
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Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer H.H. Lu a, J.P. Xu a, L. Liu a,⁎, L.S. Wang a, P.T. Lai b, W.M. Tang c,⁎ a b c
School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, People's Republic of China Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong Department of Applied Physics, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong
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Article history: Received 15 June 2015 Received in revised form 15 September 2015 Accepted 14 October 2015 Available online xxxx Keywords: GaAs MOS devices NH3-plasma treatment Interfacial passivation layer Interface-state density
a b s t r a c t The interfacial and electrical properties of GaAs metal-oxide-semiconductor capacitors with yittrium-oxynitride interfacial passivation layer treated by N2 −/NH3-plasma are investigated, showing that lower interface-state density (1.24 × 1012 cm−2 eV−1 near midgap), smaller gate leakage current density (1.34 × 10−5 A/cm2 at Vfb + 1 V), smaller capacitance equivalent thickness (1.43 nm), and larger equivalent dielectric constant (24.5) can be achieved for the sample with NH3-plasma treatment than the samples with N2 −/no-plasma treatment. The mechanisms lie in the fact that NH3-plasma can provide not only N atoms, but H atoms and NH radicals to effectively passivate the high-k/GaAs interface, thus less pinning the Femi level at high-k/GaAs interface. © 2015 Elsevier Ltd. All rights reserved.
1. Introduction Recently, GaAs-based metal-oxide-semiconductor field-effect transistor (MOSFET) with high-k gate dielectric has received increasing attention due to its higher carrier mobility, larger energy bandgap and lower power consumption as compared to those of Si-based MOSFET [1,2]. However, the interface of high-k/GaAs usually has poor quality and a higher interface-state density than the SiO2/Si interface, thus leading to the Fermi-level pinning [3,4]. So using an interfacial passivation layer (IPL), e.g. Si [5], Ge [6], Al2O3 [7], and Ga2O3(Gd2O3) [8], is very crucial to passivate the interface of high-k/GaAs. However, Si and Ge are amphoteric dopants for GaAs, which may alter the doping concentration or even induce the counter doping of the GaAs substrate, causing the instability of the threshold voltage [9], the low k value (~8) of Al2O3 limits further device scaling and (Ga2O3)Gd2O3 has been found to be degraded due to absorption of moisture (H2O) when exposed to air [10]. Yttrium oxide (Y2O3) is a very promising dielectric material because of a moderate k value (~16), relatively large band gap (5.8 eV) and high thermodynamic stability [11,12] and has been successfully used in MOS devices as high-k gate dielectric on Si [13], Ge [12] and GaAs [11,14] or as IPL on Ge [15,16]. However, pure Y2O3 is easy to convert from amorphous to polycrystalline microstructure during the post-deposition annealing, leading to high defect density and unendurable leakage current [17]. Fortunately, nitrogen incorporation into Y2O3 can successfully increase the crystalline temperature and occupy the substitutional site ⁎ Corresponding authors. E-mail addresses: [email protected] (L. Liu), [email protected] (W.M. Tang).
of O atom or vacancy in the film to reduce the defect density [17]. Also, incorporation of proper amount of nitrogen in high-k dielectric can increase the k value; reduce gate leakage current; decrease oxygen vacancies; and form strong N-related bonds at/near the dielectric/ semiconductor interface to further enhance the thermal stability and reliability of the devices [18–23]. So in this work, YON, which was rarely investigated so far, will be used as IPL for GaAs MOS capacitor with ZrON as high-k dielectric in order to get excellent interfacial and electrical properties. On the other hand, plasma treatment, e.g. N 2 -plasma [24,25] and NH3-plasma [26–28] treatments, directly on the semiconductor surface could efficiently remove volatile elements (e.g. As) and reduce weak Ga\\O and As\\O bonds, but the N2 plasma treatment induces damage on the GaAs surface to produce traps, leading to Fermi-level pinning and degradation of current–voltage characteristics [25–29]. This problem is expected to get suppressed by doing the plasma treatment on the IPL, which has received little attention so far. In view of this, the relevant investigation is carried out in this work by using the N2- or NH3-plasma treatment on YON IPL before the high-k dielectric deposition. It is expected that an enhanced N incorporation and a better YON/GaAs interface quality could be obtained as compared to its counterpart without plasma treatment on the IPL. 2. Experimental procedure GaAs MOS capacitors were fabricated on the Si-doped n-type GaAs (100) wafers with a doping concentration of 6 × 1017 cm−3. Firstly, the wafers were cleaned sequentially in deionized water, acetone, alcohol and isopropanol respectively for 5 min. Then the wafers were rinsed
http://dx.doi.org/10.1016/j.microrel.2015.10.013 0026-2714/© 2015 Elsevier Ltd. All rights reserved.
Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013
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with deionized water for several times, followed by immersing in HCl solution for 5 min to remove the native oxide and subsequently in 8% (NH4)2S for 40 min to sulfur-passivate the surface of the wafers. After drying by N2, a 2-nm YN was deposited on the GaAs surface as IPL by reactive RF-sputtering of Y target (RF power of 54 W) in an Ar/N2 (15 sccm/6 sccm) ambient at room temperature and an operating pressure of 0.8 Pa. Then, these samples were divided into three groups: two groups received a plasma treatment in N2 and NH3 respectively (denoted as N2 and NH3 samples) at a gas flow rate of 4 sccm, 350 °C and a RF power of 120 W; another group without plasma treatment was used as control sample. Subsequently, all the samples were transferred to a sputtering chamber to deposit 7-nm of ZrN by reactive RFsputtering of Zr target under the same sputtering conditions as YN. Post-deposition annealing of the samples was performed at 600 °C for 60 s in N2 (500 sccm) + O2 (50 sccm) to transform YN and ZrN to YON and ZrON, respectively. Finally, Al was thermally evaporated and patterned by photolithography as gate electrode with an area of 7.85 × 10−5 cm2 and also as the back electrode, followed by N2 annealing at 300 °C for 20 min to reduce their contact resistance. High-frequency (HF, 1-MHz) capacitance–voltage (C–V) curve and gate leakage current density vs. gate voltage (Jg–Vg) curves of the samples were measured using HP4284A precision LCR meter and HP4156A semiconductor parameter analyzer, respectively. The chemical states at/near the high-k dielectric/GaAs interface were analyzed by X-ray photoelectron spectroscopy (XPS). Physical thickness of the gate dielectric was measured by ellipsometry. All electrical measurements were carried out under a light-tight and electrically-shielded condition at room temperature.
3. Result and discussion Fig. 1 shows the HF (1 MHz) C–V curves of the three samples. Obviously, the control sample exhibits poor C–V behavior with largest “stretch-out” and smallest slope in the depletion regime, indicating pinning of Fermi level and a high density of interface states due to weak As\\O, As\\As, and Ga\\O bonds at the GaAs/YON interface [30–33]. However, improved C–V behaviors with less “stretch-out”, clear accumulation region and steep slope in the depletion regime are demonstrated for the two plasma-treated samples, especially for the NH3-treated sample, indicating less interface states and Femi-level pinning effects at the high-k/GaAs interface [6,30,34]. This can be attributed to the fact that the N2- or NH3-plasma treatment can reduce the weak As\\O, As\\As, and Ga\\O bonds at the GaAs/YON interface by forming strong N-related bonds, as confirmed by the XPS results below.
Fig. 1. HF (1-MHz) C–V curve of GaAs MOS capacitors for NH3, N2 and control samples.
Table 1 Parameters of the GaAs MOS capacitors extracted from HF C–V curves. Sample
Vfb (V)
Dit (/cm2 eV)
Cox (μF/cm2)
k
CET(nm)
NH3 sample N2 sample Control sample
0.98 1.11 1.28
1.24 × 1012 4.01 × 1012 1.04 × 1013
2.41 2.39 2.02
24.5 24.2 20.5
1.43 1.45 1.71
As shown in Table 1, some electrical and physical parameters of the devices are extracted from their HF C–V curves, e.g. flatband voltage (Vfb), gate-oxide capacitance (Cox), equivalent k value of the gate dielectric (k = Cox·Tox/ε0; Tox is the total thickness of the gate dielectric; ε0 is the vacuum permittivity), capacitance equivalent thickness (CET = ε0kSiO2/Cox, where kSiO2 is relative permittivity of SiO2), and interfacestate density (Dit) near the midgap determined by the Terman's method [35]. The positive shift of Vfb indicates the existence of negative charges in the dielectric film and at/near the interface [36], which are probably associated with acceptor-like interface states and near-interface electron traps. Obviously, the NH3 sample has the smallest Vfb (0.98 V), followed by the N2 sample (1.11 V) and the control sample (1.28 V). This is likely due to the fact that the N2- or NH3-plasma treatment on YN IPL is able to incorporate more nitrogen atoms in the IPL for filling the oxygen vacancies produced during the subsequent post-deposition annealing [19,30,36] so that the out-diffusions of Ga and As atoms from the substrate to the high-k dielectric can be better blocked by the plasma-treated YON IPL [18], especially for the NH3-plasma treatment (since NH3 has a lower ionization energy to produce N+ ions [19] than N2, more nitrogen atoms can be incorporated in the IPL during the NH3-plasma treatment). Furthermore, the NH3 sample exhibits larger Cox and equivalent k value, and smaller CET than the N2 and control samples, further indicating that the NH3-plasma treatment can more effectively suppress the formation of low-k interfacial oxide on the GaAs surface [18,27] due to more nitrogen incorporation near the YON/ GaAs interface for the former than the latter. In addition, lower Dit is observed for the two plasma-treated samples (1.24 × 1012 cm−2 eV−1 for NH3 sample and 4.01 × 1012 cm−2 eV−1 for N2 sample) than the control sample (1.04 × 1013 cm−2 eV−1), indicating that the NH3- and N2-plasma treatments can effectively reduce the defects at the interface, especially the former, and the involved mechanisms are analyzed below. The gate leakage characteristics of three GaAs MOS capacitors are shown in Fig. 2. A much larger Jg is observed for the control sample than that of the NH3 and N2 samples, with the smallest for the NH3 sample, e.g. 1.34 × 10−5 A/cm2, 3.48 × 10−5 A/cm2 and 4.83 × 10−4 A/cm2 at Vfb + 1 V for the NH3, N2 and control samples, respectively. The interface-trap-assisted tunneling is suggested to be the main reason for the larger gate leakage current [2,6] because there are more interface
Fig. 2. Jg vs.Vg characteristics of GaAs MOS capacitors. The inset is the schematic diagram of trap-assisted tunneling in gate dielectric.
Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013
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Fig. 3. XPS spectra of Zr 3d for (a) NH3 sample and (b) N2 sample.
Fig. 4. XPS spectra of Y 3d for (a) NH3 sample and (b) N2 sample.
Fig. 5. XPS spectra of As 3d for (a) NH3 sample and (b) N2 sample.
Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013
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states at the high-k dielectric/GaAs interface for the N2 sample and especially the control sample, as mentioned above. Also, the traps in the gate dielectric can assist the electron tunneling through the gate dielectric, as shown in the inset of Fig. 2, thus increasing the gate leakage current. Moreover, the existence of more interfacial Ga−/As-oxide in the control and N2 samples could reduce conduction-band offset between the high-k dielectric and GaAs substrate, thus increasing the leakage current [37]. The low gate leakage current of the NH3 sample further supports that the NH3-plasma treatment can lead to good interface quality and reduced defects in the gate dielectric, thus resulting in less trap-assisted tunneling of charge carriers [2,38]. To confirm the above discussion, XPS analyses were done for the samples to investigate the effects of NH3- and N2-plasma treatment on the interfacial chemical states between the high-k dielectric and GaAs substrate. For this purposes, the thickness of the gate dielectric layer is thinned to ~ 3 nm from the GaAs surface by using an in situ Ar+ ion beam. Firstly, the XPS spectra of Zr 3d for the N2 and NH3 sample are shown in Fig. 3. Zr 3d has two peaks of 3d3/2 and 3d5/2 [39], and each of them can be divided into two peaks, i.e. Zr–O peak at 184.40/ 182.02 eV for 3d3/2/3d5/2 and Zr–N peak at 183.58/181.20 eV for 3d3/2/3d5/2. Also, the presence of oxygen and nitrogen can also be confirmed by the O 1s and the N 1s spectra in the insets of Fig. 3. Fig. 4 shows the XPS spectra of Y 3d for the two samples, with Y 3d, Ga 3s, and S 2p peaks [40–42]. A Y2O3-x peak is at 155.45 eV and a Y–O peak at 159.04 eV. Also, a Y–N peak is found at 156.88 eV [43]. So, YON obviously exists at the GaAs surface. Combining with the results of Fig. 3, the formation of the ZrON/YON stacked gate structure is confirmed. In addition, from Refs. [2,44], the peak-area ratio of Zr–N to Zr 3d in Fig. 3 can be calculated to be 31.20% for the NH3 sample and 25.53% for the N2 sample, while the Y–N/Y 3d peak-area ratio in Fig. 4 can be calculated to be 19.81% for the NH3 sample and 16.13% for the N2 sample, implying more N incorporation in the former than in the latter. Similarly, from the Ga 3s spectrum, the Ga–N/Ga 3s peak-area ratio is calculated to be 63.12% for the NH3 sample and 57.89% for the N2 sample, with the former higher than the latter. All of these indicate that the NH3-plasma treatment can incorporate more nitrogen in the IPL than the N2-plasma treatment and is beneficial to improving the interfacial and electrical properties of the devices. The XPS spectra of the As 3d for both samples are shown in Fig. 5. In Fig. 5(b) for the N2 sample, an As–O peak appears at 43.03 eV [45,46] and an As–As peak at 41.50 eV [18,46]. However, in Fig. 5 (a) for the NH3 sample, the As–O peak is very weak and the intensity of the As– As peak is reduced, indicating that the NH3-plasma treatment can effectively reduce the weak As\\O and As\\As bonds. Besides, the As\\S peak occurs at 42.19 eV [18,46], indicating the passivation role
of sulfur on the GaAs surface. The XPS spectra of Ga 3d for the two samples are presented in Fig. 6, where the Ga–O, Ga–S and Ga–N peaks appear at 21.26 eV [47], 20.25 eV [42] and 19.45 eV [27], respectively. Based on the Ga–O/Ga 3d peak-area ratio [2,44] in Fig. 6, the content of the Ga\\O bond at the interface is calculated to be 5.83% for the N2 sample [Fig. 6(b)] and 3.59% for the NH3 sample [Fig. 6(a)], indicating that the weak Ga\\O bonds are also reduced by the NH3-plasma treatment. In particular, a Y 4p peak is found at 22.74 eV [48], further confirming the existence of element Y inside the IPL. Normally, As oxide, e.g. As2O3, at the GaAs surface is thermodynamically unstable and can decompose to form As, which in turn produces near-midgap states that can pin the Fermi level and enhance nonradiative recombination [49]. For the N2 sample, the GaAs surface can be efficiently passivated by N atoms produced by the N2 plasma through the reaction of GaAs + N → GaN + As (or AsN) [29]. However, besides N atoms, the NH3 plasma can produce high-density reactive species such as H atoms and NH radicals [26], both of which can remove not only the interfacial oxides but also the elemental As during the plasma exposure [27], according to 12 H + As2O3 → 3H2O + 2AsH3 [49]. At the same time, Ga oxide is also reduced, according to Ga2O3 + 4 H → Ga2O + 2H2O and Ga2O + 2 H → 2Ga + H2O [44]. Therefore, it can be suggested that the NH3-plasma treatment is more beneficial to the reduction of weak As\\O, As\\As and Ga\\O bonds than the N2-plasma treatment. This is why the NH3 sample has smaller Dit because the weak As\\O, As\\As and Ga\\O bonds at the GaAs/high-k interface are commonly regarded as the source of defects. 4. Conclusion MOS capacitors with NH3 −/N2-plasma treatment are fabricated and their electrical properties are compared with those of the control sample without plasma treatment. The two plasma-treated samples exhibit improved electrical and interfacial properties than the control sample, with the best for the NH3-plasma treated sample: low interface-state density (1.24 × 1012 cm−2 eV−1 near midgap), low gate leakage current density (1.34 × 10−5 A/cm2 at Vfb + 1 V), small capacitance equivalent thickness (1.43 nm) and large equivalent k value (24.5). The involved mechanisms are analyzed by XPS and thermodynamic reaction. The N2-plasma treatment can provide nitrogen atoms for passivating the GaAs/high-k interface. However, the NH3-plasma treatment can provide additional high-density reactive species (e.g. H atoms and NH radicals), which can better remove the interfacial Ga/As oxides and elemental As, thus resulting in higher quality for the GaAs/high-k interface. Another mechanism lies in the fact that the NH3-plasma treatment after YN deposition could incorporate more nitrogen in the YON film, which
Fig. 6. XPS spectra of Ga 3d for (a) NH3 sample and (b) N2 sample.
Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013
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can more effectively suppress the out-diffusions of Ga and As atoms from the substrate to the high-k dielectric, thus reducing the oxide charges to produce better dielectric-bulk quality. In summary, the NH3-plasma treatment on IPL is a promising way for preparing highperformance GaAs MOS devices. Acknowledgments This work was financially supported by the National Natural Science Foundation of China (Grant No. 61176100, 61274112), the University Development Fund (Nanotechnology Research Institute, 00600009) of the University of Hong Kong and the Hong Kong Polytechnic University (Project number: 1-ZVB1). References [1] R. Chau, S. Datta, A. Majumdar, Compound Semiconductor Integrated Circuit Symposium, IEEE, CA, October 30-November 2, 2005 xii. [2] L.S. Wang, J.P. Xu, S.Y. Zhu, Y. Huang, P.T. Lai, Appl. Phys. Lett. 103 (2013) 092901. [3] M. Zhu, C.-H. Tung, Y.-C. Yeo, Appl. Phys. Lett. 89 (2006) 202903. [4] R.B. Konda, C. White, J. Smak, R. Mundle, M. Bahoura, A.K. Pradhan, Chem. Phys. Lett. 583 (2013) 74. [5] S. Koveshnikov, W. Tsai, I. Ok, J.C. Lee, V. Torkanov, M. Yakimov, S. Oktyabrsky, Appl. Phys. Lett. 88 (2006) 022106. [6] D. Shahrjerdi, M.M. Oye, A.L. Holmes Jr., S.K. Banerjee, Appl. Phys. Lett. 89 (2006) 043501. [7] D. Shahrjerdi, E. Tutuc, S.K. Banerjee, Appl. Phys. Lett. 91 (2007) 063501. [8] M. Hong, J.P. Mannaerts, J.E. Bower, J. Kwo, M. Passlackl, W.-Y. Hwang, L.W. Tu, J. Cryst. Growth 175–176 (1997) 422. [9] F. Gao, S.J. Lee, D.Z. Chi, S. Balakumar, D.-L. Kwong, Appl. Phys. Lett. 90 (2007) 252904. [10] J.F. Zheng, W. Tsai, T.D. Lin, Y.J. Lee, C.P. Chen, M. Hong, J. Kwo, S. Cui, T.P. Ma, Appl. Phys. Lett. 90 (2007) 223502. [11] P.S. Das, G.K. Dalapati, D.Z. Chi, A. Biswas, C.K. Maiti, Appl. Surf. Sci. 256 (2010) 2245. [12] C. Mahata, M.K. Bera, T. Das, S. Mallik, M.K. Hota, B. Majhi, S. Verma, P.K. Bose, C.K. Maiti, Semicond. Sci. Technol. 24 (2009) 085006. [13] V. Ioannou-Sougleridis, G. Vellianitis, A. Dimoulas, J. Appl. Phys. 93 (2003) 3982. [14] P.S. Das, A. Biswas, Microelectron. Eng. 88 (2011) 282. [15] C.X. Li, P.T. Lai, Appl. Phys. Lett. 95 (2009) 022910. [16] L.K. Chu, W.C. Lee, M.L. Huang, Y.H. Chang, L.T. Tung, C.C. Chang, Y.J. Lee, J. Kwo, M. Hong, J. Cryst. Growth 311 (2009) 2195. [17] Z. Liu, L. Liang, Z. Yu, S. He, X. Ye, X. Sun, A. Sun, H. Cao, J. Phys. D. Appl. Phys. 44 (2011) 155403. [18] L.-S. Wang, L. Liu, J.-P. Xu, S.-Y. Zhu, Y. Huang, P.-T. Lai, IEEE Trans. Electron Devices 61 (2014) 742.
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Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013
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Microelectronics Reliability journal homepage: www.elsevier.com/locate/mr
Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer H.H. Lu a, J.P. Xu a, L. Liu a,⁎, L.S. Wang a, P.T. Lai b, W.M. Tang c,⁎ a b c
School of Optical and Electronic Information, Huazhong University of Science and Technology, Wuhan 430074, People's Republic of China Department of Electrical and Electronic Engineering, The University of Hong Kong, Pokfulam Road, Hong Kong Department of Applied Physics, The Hong Kong Polytechnic University, Hung Hom, Kowloon, Hong Kong
a r t i c l e
i n f o
Article history: Received 15 June 2015 Received in revised form 15 September 2015 Accepted 14 October 2015 Available online xxxx Keywords: GaAs MOS devices NH3-plasma treatment Interfacial passivation layer Interface-state density
a b s t r a c t The interfacial and electrical properties of GaAs metal-oxide-semiconductor capacitors with yittrium-oxynitride interfacial passivation layer treated by N2 −/NH3-plasma are investigated, showing that lower interface-state density (1.24 × 1012 cm−2 eV−1 near midgap), smaller gate leakage current density (1.34 × 10−5 A/cm2 at Vfb + 1 V), smaller capacitance equivalent thickness (1.43 nm), and larger equivalent dielectric constant (24.5) can be achieved for the sample with NH3-plasma treatment than the samples with N2 −/no-plasma treatment. The mechanisms lie in the fact that NH3-plasma can provide not only N atoms, but H atoms and NH radicals to effectively passivate the high-k/GaAs interface, thus less pinning the Femi level at high-k/GaAs interface. © 2015 Elsevier Ltd. All rights reserved.
1. Introduction Recently, GaAs-based metal-oxide-semiconductor field-effect transistor (MOSFET) with high-k gate dielectric has received increasing attention due to its higher carrier mobility, larger energy bandgap and lower power consumption as compared to those of Si-based MOSFET [1,2]. However, the interface of high-k/GaAs usually has poor quality and a higher interface-state density than the SiO2/Si interface, thus leading to the Fermi-level pinning [3,4]. So using an interfacial passivation layer (IPL), e.g. Si [5], Ge [6], Al2O3 [7], and Ga2O3(Gd2O3) [8], is very crucial to passivate the interface of high-k/GaAs. However, Si and Ge are amphoteric dopants for GaAs, which may alter the doping concentration or even induce the counter doping of the GaAs substrate, causing the instability of the threshold voltage [9], the low k value (~8) of Al2O3 limits further device scaling and (Ga2O3)Gd2O3 has been found to be degraded due to absorption of moisture (H2O) when exposed to air [10]. Yttrium oxide (Y2O3) is a very promising dielectric material because of a moderate k value (~16), relatively large band gap (5.8 eV) and high thermodynamic stability [11,12] and has been successfully used in MOS devices as high-k gate dielectric on Si [13], Ge [12] and GaAs [11,14] or as IPL on Ge [15,16]. However, pure Y2O3 is easy to convert from amorphous to polycrystalline microstructure during the post-deposition annealing, leading to high defect density and unendurable leakage current [17]. Fortunately, nitrogen incorporation into Y2O3 can successfully increase the crystalline temperature and occupy the substitutional site ⁎ Corresponding authors. E-mail addresses: [email protected] (L. Liu), [email protected] (W.M. Tang).
of O atom or vacancy in the film to reduce the defect density [17]. Also, incorporation of proper amount of nitrogen in high-k dielectric can increase the k value; reduce gate leakage current; decrease oxygen vacancies; and form strong N-related bonds at/near the dielectric/ semiconductor interface to further enhance the thermal stability and reliability of the devices [18–23]. So in this work, YON, which was rarely investigated so far, will be used as IPL for GaAs MOS capacitor with ZrON as high-k dielectric in order to get excellent interfacial and electrical properties. On the other hand, plasma treatment, e.g. N 2 -plasma [24,25] and NH3-plasma [26–28] treatments, directly on the semiconductor surface could efficiently remove volatile elements (e.g. As) and reduce weak Ga\\O and As\\O bonds, but the N2 plasma treatment induces damage on the GaAs surface to produce traps, leading to Fermi-level pinning and degradation of current–voltage characteristics [25–29]. This problem is expected to get suppressed by doing the plasma treatment on the IPL, which has received little attention so far. In view of this, the relevant investigation is carried out in this work by using the N2- or NH3-plasma treatment on YON IPL before the high-k dielectric deposition. It is expected that an enhanced N incorporation and a better YON/GaAs interface quality could be obtained as compared to its counterpart without plasma treatment on the IPL. 2. Experimental procedure GaAs MOS capacitors were fabricated on the Si-doped n-type GaAs (100) wafers with a doping concentration of 6 × 1017 cm−3. Firstly, the wafers were cleaned sequentially in deionized water, acetone, alcohol and isopropanol respectively for 5 min. Then the wafers were rinsed
http://dx.doi.org/10.1016/j.microrel.2015.10.013 0026-2714/© 2015 Elsevier Ltd. All rights reserved.
Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013
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with deionized water for several times, followed by immersing in HCl solution for 5 min to remove the native oxide and subsequently in 8% (NH4)2S for 40 min to sulfur-passivate the surface of the wafers. After drying by N2, a 2-nm YN was deposited on the GaAs surface as IPL by reactive RF-sputtering of Y target (RF power of 54 W) in an Ar/N2 (15 sccm/6 sccm) ambient at room temperature and an operating pressure of 0.8 Pa. Then, these samples were divided into three groups: two groups received a plasma treatment in N2 and NH3 respectively (denoted as N2 and NH3 samples) at a gas flow rate of 4 sccm, 350 °C and a RF power of 120 W; another group without plasma treatment was used as control sample. Subsequently, all the samples were transferred to a sputtering chamber to deposit 7-nm of ZrN by reactive RFsputtering of Zr target under the same sputtering conditions as YN. Post-deposition annealing of the samples was performed at 600 °C for 60 s in N2 (500 sccm) + O2 (50 sccm) to transform YN and ZrN to YON and ZrON, respectively. Finally, Al was thermally evaporated and patterned by photolithography as gate electrode with an area of 7.85 × 10−5 cm2 and also as the back electrode, followed by N2 annealing at 300 °C for 20 min to reduce their contact resistance. High-frequency (HF, 1-MHz) capacitance–voltage (C–V) curve and gate leakage current density vs. gate voltage (Jg–Vg) curves of the samples were measured using HP4284A precision LCR meter and HP4156A semiconductor parameter analyzer, respectively. The chemical states at/near the high-k dielectric/GaAs interface were analyzed by X-ray photoelectron spectroscopy (XPS). Physical thickness of the gate dielectric was measured by ellipsometry. All electrical measurements were carried out under a light-tight and electrically-shielded condition at room temperature.
3. Result and discussion Fig. 1 shows the HF (1 MHz) C–V curves of the three samples. Obviously, the control sample exhibits poor C–V behavior with largest “stretch-out” and smallest slope in the depletion regime, indicating pinning of Fermi level and a high density of interface states due to weak As\\O, As\\As, and Ga\\O bonds at the GaAs/YON interface [30–33]. However, improved C–V behaviors with less “stretch-out”, clear accumulation region and steep slope in the depletion regime are demonstrated for the two plasma-treated samples, especially for the NH3-treated sample, indicating less interface states and Femi-level pinning effects at the high-k/GaAs interface [6,30,34]. This can be attributed to the fact that the N2- or NH3-plasma treatment can reduce the weak As\\O, As\\As, and Ga\\O bonds at the GaAs/YON interface by forming strong N-related bonds, as confirmed by the XPS results below.
Fig. 1. HF (1-MHz) C–V curve of GaAs MOS capacitors for NH3, N2 and control samples.
Table 1 Parameters of the GaAs MOS capacitors extracted from HF C–V curves. Sample
Vfb (V)
Dit (/cm2 eV)
Cox (μF/cm2)
k
CET(nm)
NH3 sample N2 sample Control sample
0.98 1.11 1.28
1.24 × 1012 4.01 × 1012 1.04 × 1013
2.41 2.39 2.02
24.5 24.2 20.5
1.43 1.45 1.71
As shown in Table 1, some electrical and physical parameters of the devices are extracted from their HF C–V curves, e.g. flatband voltage (Vfb), gate-oxide capacitance (Cox), equivalent k value of the gate dielectric (k = Cox·Tox/ε0; Tox is the total thickness of the gate dielectric; ε0 is the vacuum permittivity), capacitance equivalent thickness (CET = ε0kSiO2/Cox, where kSiO2 is relative permittivity of SiO2), and interfacestate density (Dit) near the midgap determined by the Terman's method [35]. The positive shift of Vfb indicates the existence of negative charges in the dielectric film and at/near the interface [36], which are probably associated with acceptor-like interface states and near-interface electron traps. Obviously, the NH3 sample has the smallest Vfb (0.98 V), followed by the N2 sample (1.11 V) and the control sample (1.28 V). This is likely due to the fact that the N2- or NH3-plasma treatment on YN IPL is able to incorporate more nitrogen atoms in the IPL for filling the oxygen vacancies produced during the subsequent post-deposition annealing [19,30,36] so that the out-diffusions of Ga and As atoms from the substrate to the high-k dielectric can be better blocked by the plasma-treated YON IPL [18], especially for the NH3-plasma treatment (since NH3 has a lower ionization energy to produce N+ ions [19] than N2, more nitrogen atoms can be incorporated in the IPL during the NH3-plasma treatment). Furthermore, the NH3 sample exhibits larger Cox and equivalent k value, and smaller CET than the N2 and control samples, further indicating that the NH3-plasma treatment can more effectively suppress the formation of low-k interfacial oxide on the GaAs surface [18,27] due to more nitrogen incorporation near the YON/ GaAs interface for the former than the latter. In addition, lower Dit is observed for the two plasma-treated samples (1.24 × 1012 cm−2 eV−1 for NH3 sample and 4.01 × 1012 cm−2 eV−1 for N2 sample) than the control sample (1.04 × 1013 cm−2 eV−1), indicating that the NH3- and N2-plasma treatments can effectively reduce the defects at the interface, especially the former, and the involved mechanisms are analyzed below. The gate leakage characteristics of three GaAs MOS capacitors are shown in Fig. 2. A much larger Jg is observed for the control sample than that of the NH3 and N2 samples, with the smallest for the NH3 sample, e.g. 1.34 × 10−5 A/cm2, 3.48 × 10−5 A/cm2 and 4.83 × 10−4 A/cm2 at Vfb + 1 V for the NH3, N2 and control samples, respectively. The interface-trap-assisted tunneling is suggested to be the main reason for the larger gate leakage current [2,6] because there are more interface
Fig. 2. Jg vs.Vg characteristics of GaAs MOS capacitors. The inset is the schematic diagram of trap-assisted tunneling in gate dielectric.
Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013
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Fig. 3. XPS spectra of Zr 3d for (a) NH3 sample and (b) N2 sample.
Fig. 4. XPS spectra of Y 3d for (a) NH3 sample and (b) N2 sample.
Fig. 5. XPS spectra of As 3d for (a) NH3 sample and (b) N2 sample.
Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013
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states at the high-k dielectric/GaAs interface for the N2 sample and especially the control sample, as mentioned above. Also, the traps in the gate dielectric can assist the electron tunneling through the gate dielectric, as shown in the inset of Fig. 2, thus increasing the gate leakage current. Moreover, the existence of more interfacial Ga−/As-oxide in the control and N2 samples could reduce conduction-band offset between the high-k dielectric and GaAs substrate, thus increasing the leakage current [37]. The low gate leakage current of the NH3 sample further supports that the NH3-plasma treatment can lead to good interface quality and reduced defects in the gate dielectric, thus resulting in less trap-assisted tunneling of charge carriers [2,38]. To confirm the above discussion, XPS analyses were done for the samples to investigate the effects of NH3- and N2-plasma treatment on the interfacial chemical states between the high-k dielectric and GaAs substrate. For this purposes, the thickness of the gate dielectric layer is thinned to ~ 3 nm from the GaAs surface by using an in situ Ar+ ion beam. Firstly, the XPS spectra of Zr 3d for the N2 and NH3 sample are shown in Fig. 3. Zr 3d has two peaks of 3d3/2 and 3d5/2 [39], and each of them can be divided into two peaks, i.e. Zr–O peak at 184.40/ 182.02 eV for 3d3/2/3d5/2 and Zr–N peak at 183.58/181.20 eV for 3d3/2/3d5/2. Also, the presence of oxygen and nitrogen can also be confirmed by the O 1s and the N 1s spectra in the insets of Fig. 3. Fig. 4 shows the XPS spectra of Y 3d for the two samples, with Y 3d, Ga 3s, and S 2p peaks [40–42]. A Y2O3-x peak is at 155.45 eV and a Y–O peak at 159.04 eV. Also, a Y–N peak is found at 156.88 eV [43]. So, YON obviously exists at the GaAs surface. Combining with the results of Fig. 3, the formation of the ZrON/YON stacked gate structure is confirmed. In addition, from Refs. [2,44], the peak-area ratio of Zr–N to Zr 3d in Fig. 3 can be calculated to be 31.20% for the NH3 sample and 25.53% for the N2 sample, while the Y–N/Y 3d peak-area ratio in Fig. 4 can be calculated to be 19.81% for the NH3 sample and 16.13% for the N2 sample, implying more N incorporation in the former than in the latter. Similarly, from the Ga 3s spectrum, the Ga–N/Ga 3s peak-area ratio is calculated to be 63.12% for the NH3 sample and 57.89% for the N2 sample, with the former higher than the latter. All of these indicate that the NH3-plasma treatment can incorporate more nitrogen in the IPL than the N2-plasma treatment and is beneficial to improving the interfacial and electrical properties of the devices. The XPS spectra of the As 3d for both samples are shown in Fig. 5. In Fig. 5(b) for the N2 sample, an As–O peak appears at 43.03 eV [45,46] and an As–As peak at 41.50 eV [18,46]. However, in Fig. 5 (a) for the NH3 sample, the As–O peak is very weak and the intensity of the As– As peak is reduced, indicating that the NH3-plasma treatment can effectively reduce the weak As\\O and As\\As bonds. Besides, the As\\S peak occurs at 42.19 eV [18,46], indicating the passivation role
of sulfur on the GaAs surface. The XPS spectra of Ga 3d for the two samples are presented in Fig. 6, where the Ga–O, Ga–S and Ga–N peaks appear at 21.26 eV [47], 20.25 eV [42] and 19.45 eV [27], respectively. Based on the Ga–O/Ga 3d peak-area ratio [2,44] in Fig. 6, the content of the Ga\\O bond at the interface is calculated to be 5.83% for the N2 sample [Fig. 6(b)] and 3.59% for the NH3 sample [Fig. 6(a)], indicating that the weak Ga\\O bonds are also reduced by the NH3-plasma treatment. In particular, a Y 4p peak is found at 22.74 eV [48], further confirming the existence of element Y inside the IPL. Normally, As oxide, e.g. As2O3, at the GaAs surface is thermodynamically unstable and can decompose to form As, which in turn produces near-midgap states that can pin the Fermi level and enhance nonradiative recombination [49]. For the N2 sample, the GaAs surface can be efficiently passivated by N atoms produced by the N2 plasma through the reaction of GaAs + N → GaN + As (or AsN) [29]. However, besides N atoms, the NH3 plasma can produce high-density reactive species such as H atoms and NH radicals [26], both of which can remove not only the interfacial oxides but also the elemental As during the plasma exposure [27], according to 12 H + As2O3 → 3H2O + 2AsH3 [49]. At the same time, Ga oxide is also reduced, according to Ga2O3 + 4 H → Ga2O + 2H2O and Ga2O + 2 H → 2Ga + H2O [44]. Therefore, it can be suggested that the NH3-plasma treatment is more beneficial to the reduction of weak As\\O, As\\As and Ga\\O bonds than the N2-plasma treatment. This is why the NH3 sample has smaller Dit because the weak As\\O, As\\As and Ga\\O bonds at the GaAs/high-k interface are commonly regarded as the source of defects. 4. Conclusion MOS capacitors with NH3 −/N2-plasma treatment are fabricated and their electrical properties are compared with those of the control sample without plasma treatment. The two plasma-treated samples exhibit improved electrical and interfacial properties than the control sample, with the best for the NH3-plasma treated sample: low interface-state density (1.24 × 1012 cm−2 eV−1 near midgap), low gate leakage current density (1.34 × 10−5 A/cm2 at Vfb + 1 V), small capacitance equivalent thickness (1.43 nm) and large equivalent k value (24.5). The involved mechanisms are analyzed by XPS and thermodynamic reaction. The N2-plasma treatment can provide nitrogen atoms for passivating the GaAs/high-k interface. However, the NH3-plasma treatment can provide additional high-density reactive species (e.g. H atoms and NH radicals), which can better remove the interfacial Ga/As oxides and elemental As, thus resulting in higher quality for the GaAs/high-k interface. Another mechanism lies in the fact that the NH3-plasma treatment after YN deposition could incorporate more nitrogen in the YON film, which
Fig. 6. XPS spectra of Ga 3d for (a) NH3 sample and (b) N2 sample.
Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013
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can more effectively suppress the out-diffusions of Ga and As atoms from the substrate to the high-k dielectric, thus reducing the oxide charges to produce better dielectric-bulk quality. In summary, the NH3-plasma treatment on IPL is a promising way for preparing highperformance GaAs MOS devices. Acknowledgments This work was financially supported by the National Natural Science Foundation of China (Grant No. 61176100, 61274112), the University Development Fund (Nanotechnology Research Institute, 00600009) of the University of Hong Kong and the Hong Kong Polytechnic University (Project number: 1-ZVB1). References [1] R. Chau, S. Datta, A. Majumdar, Compound Semiconductor Integrated Circuit Symposium, IEEE, CA, October 30-November 2, 2005 xii. [2] L.S. Wang, J.P. Xu, S.Y. Zhu, Y. Huang, P.T. Lai, Appl. Phys. Lett. 103 (2013) 092901. [3] M. Zhu, C.-H. Tung, Y.-C. Yeo, Appl. Phys. Lett. 89 (2006) 202903. [4] R.B. Konda, C. White, J. Smak, R. Mundle, M. Bahoura, A.K. Pradhan, Chem. Phys. Lett. 583 (2013) 74. [5] S. Koveshnikov, W. Tsai, I. Ok, J.C. Lee, V. Torkanov, M. Yakimov, S. Oktyabrsky, Appl. Phys. Lett. 88 (2006) 022106. [6] D. Shahrjerdi, M.M. Oye, A.L. Holmes Jr., S.K. Banerjee, Appl. Phys. Lett. 89 (2006) 043501. [7] D. Shahrjerdi, E. Tutuc, S.K. Banerjee, Appl. Phys. Lett. 91 (2007) 063501. [8] M. Hong, J.P. Mannaerts, J.E. Bower, J. Kwo, M. Passlackl, W.-Y. Hwang, L.W. Tu, J. Cryst. Growth 175–176 (1997) 422. [9] F. Gao, S.J. Lee, D.Z. Chi, S. Balakumar, D.-L. Kwong, Appl. Phys. Lett. 90 (2007) 252904. [10] J.F. Zheng, W. Tsai, T.D. Lin, Y.J. Lee, C.P. Chen, M. Hong, J. Kwo, S. Cui, T.P. Ma, Appl. Phys. Lett. 90 (2007) 223502. [11] P.S. Das, G.K. Dalapati, D.Z. Chi, A. Biswas, C.K. Maiti, Appl. Surf. Sci. 256 (2010) 2245. [12] C. Mahata, M.K. Bera, T. Das, S. Mallik, M.K. Hota, B. Majhi, S. Verma, P.K. Bose, C.K. Maiti, Semicond. Sci. Technol. 24 (2009) 085006. [13] V. Ioannou-Sougleridis, G. Vellianitis, A. Dimoulas, J. Appl. Phys. 93 (2003) 3982. [14] P.S. Das, A. Biswas, Microelectron. Eng. 88 (2011) 282. [15] C.X. Li, P.T. Lai, Appl. Phys. Lett. 95 (2009) 022910. [16] L.K. Chu, W.C. Lee, M.L. Huang, Y.H. Chang, L.T. Tung, C.C. Chang, Y.J. Lee, J. Kwo, M. Hong, J. Cryst. Growth 311 (2009) 2195. [17] Z. Liu, L. Liang, Z. Yu, S. He, X. Ye, X. Sun, A. Sun, H. Cao, J. Phys. D. Appl. Phys. 44 (2011) 155403. [18] L.-S. Wang, L. Liu, J.-P. Xu, S.-Y. Zhu, Y. Huang, P.-T. Lai, IEEE Trans. Electron Devices 61 (2014) 742.
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Please cite this article as: H.H. Lu, et al., Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer, Microelectronics Reliability (2015), http://dx.doi.org/10.1016/j.microrel.2015.10.013