Indirect current controlled shunt active power filter for power quality improvement

Electrical Power and Energy Systems 62 (2014) 441–449

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Electrical Power and Energy Systems journal homepage: www.elsevier.com/locate/ijepes

Indirect current controlled shunt active power filter for power quality improvement R. Mahanty ⇑ Department of Electrical Engineering, Indian Institute of Technology (Banaras Hindu University), Varanasi 221005, India

a r t i c l e

i n f o

Article history: Received 2 October 2013 Received in revised form 21 April 2014 Accepted 1 May 2014

Keywords: Active power filter Harmonic filtering Hysteresis band control Power quality Reactive power compensation

a b s t r a c t The paper deals with an indirect current controlled shunt active power filter (APF) for improving power quality by reactive power compensation and harmonic filtering. The proposed APF is based on a voltage source inverter (VSI). The VSI is controlled by two loops, the voltage control loop and the current control loop. The voltage control loop regulates the DC link capacitor voltage and the current control loop uses hysteresis band control to shape the source current such that it is in-phase with and of the same shape as the input voltage. The major advantage of the proposed APF is that the reference current for power quality improvement is generated from the DC link capacitor voltage. The proposed scheme has been verified through simulation and experimental investigations. Ó 2014 Elsevier Ltd. All rights reserved.

Introduction There has been a continuous rise of nonlinear loads over the years due to intensive use of power electronic control in industry as well as by domestic consumers of electrical energy. The utility supplying these nonlinear loads has to supply large vars. Moreover, the harmonics generated by the nonlinear loads pollute the utility. The basic requirements for compensation process involve precise and continuous var control with fast dynamic response and on-line elimination of harmonics. To satisfy these criterion, the traditional methods of var compensation using switched capacitor and thyristor controlled inductor [1–6] coupled with passive filters are increasingly replaced by active power filters (APFs) [7–16] and hybrid APFs [17–22]. The hybrid APFs improve the characteristics of passive filters with smaller rated APFs. The majority of the reported APFs and hybrid APFs use a var calculator to calculate the reactive current drawn by the load and accordingly a reference current is generated. The compensator current is made to follow the reference current for the required compensation. This method exhibits good current profile and fast dynamic response; however the generation of reference current is a complicated process. In the proposed indirect current controlled APF, the reference current is generated from the DC link capacitor voltage directly, without calculating the reactive current drawn by the load. As the reference current in the proposed APF is generated from the DC link capacitor ⇑ Tel.: +91 542 2575388. E-mail address: [email protected] http://dx.doi.org/10.1016/j.ijepes.2014.05.002 0142-0615/Ó 2014 Elsevier Ltd. All rights reserved.

voltage, without calculating the reactive current drawn by the load, the compensation process is straight forward and simple as compared to the control techniques of conventional APFs. For higher rated nonlinear loads; multilevel inverters (MLIs) can be used [23–27]. To control the output voltage and reduce undesired harmonics of MLIs, sinusoidal PWM, selective harmonic elimination or programmed PWM and space vector modulation techniques have been conventionally used in MLIs. The major complexity associated with such methods is to solve the nonlinear transcendental equations characterizing the harmonics using iterative techniques such as Newton–Raphson method [28,29]. However, this is not suitable in cases involving a large number of switching angles if good initial guess is not available. Another approach based on mathematical theory of resultant, wherein transcendental equations that describe the selective harmonic elimination problem are converted into an equivalent set of polynomial equations and then mathematical theory of resultant is utilized to find all possible sets of solutions for the equivalent problem has also been reported [30]. However, as the number of harmonics to be eliminated increases (up to five harmonics), the degrees of the polynomials in the equations become so large that solving them becomes very difficult. The evolutionary algorithm [31–35] can be applied for computing the optimal switching angles of the MLI with the objective of optimizing the individual harmonics to allowable limits. The proposed indirect current controlled shunt APF is shown in Fig. 1. It has two control loops, the voltage control loop and the current control loop. The voltage control loop regulates the average

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R. Mahanty / Electrical Power and Energy Systems 62 (2014) 441–449

Nomenclature Vc Vc,min Vc,ref Vs

vcomp

Vcomp1 Q L R C

DC link capacitor voltage minimum DC link capacitor voltage reference DC voltage AC system voltage compensating voltage fundamental component in vcomp var supplied by the APF inductor in series with the APF resistance of inductor L DC link capacitor

icomp iload is iref s

x xs xs,max HB

value of the DC link capacitor voltage (Vc). The sensed DC link capacitor voltage is sent to a low pass filter (LPF) to remove the ripples present in it. The voltage thus obtained is compared with a reference DC voltage (Vc,ref) and the error is fed to a PI controller. The output of the PI controller is the amplitude (k) of the current, which is used to derive the reference current. The derived reference current is compared with the source current in the current control loop for generating gate signals for the switches of the voltage source inverter (VSI) of the APF. Hysteresis band control [13,36] has been used in the current control loop of the proposed APF.

compensation current of the APF load current source current reference current switching function supply frequency switching frequency maximum switching frequency hysteresis band

When V comp1 < V s , the inverter draws lagging current and it supplies leading vars to the system. When V comp1 ¼ V s , no current will flow into or out of the system. The var supplied by the APF is given by

V s jV comp1  V s j Q ¼ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi x2 L2 þ R2

ð1Þ

where L is the inductor in series with the APF, R is the resistance of inductor L and x is the supply frequency. By controlling Vcomp1, the reactive power can be controlled. Control principle

Indirect current controlled APF The VSI of a single-phase indirect current controlled shunt APF is shown in Fig. 2. The VSI is controlled to produce a fundamental terminal voltage in-phase with the AC system voltage. When the fundamental inverter terminal voltage is more than the RMS value of AC system voltage Vs, a leading current is drawn from the AC system and when the inverter terminal voltage is less than Vs, a lagging current is drawn from the AC system. The magnitude of the inverter terminal voltage depends on the DC link capacitor voltage Vc. By controlling the gate signals of the switches, the inverter terminal voltage can be made to lag or lead the AC system voltage, so that real power flows into or out of the inverter circuit. By suitable operation of the switches, a voltage vcomp having a fundamental component Vcomp1 is generated at the output of the inverter. When V comp1 > V s , leading current (with respect to Vs) will be drawn and the inverter supplies lagging vars to the system.

The switches S1, S2, S3 and S4 (Fig. 2) are operated in such a way that total current drawn from the source is of the same shape as that of the source voltage Vs. The source voltage Vs can be di expressed as V s ¼ L comp þ R icomp þ sV c . This gives dt

dicomp V s  R icomp  sV c ¼ dt L

ð2Þ

where icomp is the compensation current of the APF and Vc is the DC link capacitor voltage. s = 1, if the switches S1 and S4 conduct; s = 1, if the switches S2 and S3 conduct and s = 0, if the switches S1, S3 or S2, S4 conduct. The DC link capacitor voltage Vc can be expressed as c C dV ¼ sicomp . This gives dt

dV c sicomp ¼ dt C

ð3Þ

where C is the DC link capacitor.

Nonlinear Load

vs

+-

Voltage Source Inverter L

0

R

C

Current Control Loop

Low Pass Filter

Current Controller

Voltage Control Loop

k

Vc

PI Controller

Sin t Fig. 1. Indirect current controlled shunt APF.

Vc,ref

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R. Mahanty / Electrical Power and Energy Systems 62 (2014) 441–449

iref ¼ k sin xt: S1 L vs

S3

The maximum

R vcomp

+-

C

Vc

ð8Þ diref dt

of the reference current is

  diref ¼ k x: max dt

ð9Þ

di

S4

The maximum dtref of the reference current is determined for each harmonic component based on its amplitude and frequency. The

S2

overall maximum Fig. 2. Voltage source inverter.

Solving (2) and (3), the mathematical model for the converter can be expressed in terms of state space equation as

#    " R  "1#  L  Ls icomp d icomp V s: ¼ þ L s dt V c 0 Vc 0 C

ð4Þ

The APF forces the source current to become same in shape as the source voltage Vs. The source current is can be expressed in terms of compensation current of the APF, icomp and load current, iload as

is ¼ icomp þ iload :

ð5Þ

Differentiating (5) gives

dis ¼ dt

! load V s  R icomp  sV c þ L didt : L

ð6Þ

By controlling the switching function s, (6) can be controlled. Vc is maintained at a voltage higher than Vs. This is done by the voltage control loop. The dynamic stability of the indirect current controlled APF depends on its ability to keep the DC link capacitor voltage close to a reference value. The capacitor voltage control loop assumes that the active power supplied by the source is the sum of the power drawn by the load and the losses in the inverter. During the sudden increase in load power demand, capacitor voltage decreases because the energy stored in the capacitor supplies power to the load. This results into an increase in the capacitor error voltage, which ultimately increases the magnitude of the reference current. The increase in reference current recharges the capacitor to the reference value.

diref dt

of the reference current is the highest individ-

di di ual dt . The harmonic giving the highest dt is the third harmonic for the single-phase and fifth harmonic for the three-phase nonlinear loads. From the standard inductor differential equation, an expression for diL dt

can be determined assuming negligible resistance as

diL DV L ¼ : dt L

ð10Þ

The maximum inductance possible is used in the inverter to give the lowest average switching frequency. This in turn reduces the electromagnetic interference and switching losses. Hysteresis band control The hysteresis band control scheme is shown in Fig. 3 [36]. In this scheme, the switching instants occur in such a way as to force the current to remain within a hysteresis band. The switching takes place when the error exceeds a fixed magnitude hysteresis band. The control laws with respect to the switches of the VSI (Fig. 2) of the APF are as follows:  lower band 6 iref  is 6 upper band, none of the switches are ON.  iref  is i upper band, S1 and S2 are ON.  iref  is h lower band, S3 and S4 are ON. þ



With reference to (6), the respective equations for didts and didts can be written as þ

dis V s  Ricomp þ V c diLoad ¼ þ dt L dt

ð11Þ



dis V s  Ricomp  V c diLoad ¼ þ : dt L dt

ð12Þ

Design of DC link capacitor

The respective equations for switching intervals t1 and t2 (shown in Fig. 3) can be written as

The DC link capacitor supplies or absorbs energy, whenever there is a sudden change in the active power demand of the load. In such conditions, the capacitor supports the load demand for the half period of the supply frequency. The DC link capacitor value is calculated from the energy balance principle. The energy stored in capacitor is equal to the energy demand of the load during the transient period. This assumption after simplification gives the expression for calculating the value of DC link capacitor, C as

 þ  dis diref t 1 ¼ 2HB  dt dt

C¼

2pV s is

1

x

V 2c  V 2c;min

!

Hysteresis band (2HB)

ð13Þ

HB

Upper band HB Lower band

Reference sine wave (iref)

Actual current (is)

t1

ð7Þ

t2

where Vc,min is the desired minimum capacitor voltage. In practice, a slightly higher capacitance value is selected to take care of the capacitor losses.

1800

0

Design of filter inductor t

0

The filter inductor must be small enough so that the injected di

current didtL is greater than that of the reference current dtref for the injected current to track the reference current. The reference current is expressed as

PWM pulses Fig. 3. Hysteresis band control.

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R. Mahanty / Electrical Power and Energy Systems 62 (2014) 441–449

Fig. 4. Simulation circuit of single-phase shunt APF with diode rectifier feeding an RC load.

   dis diref t 2 ¼ 2HB:  dt dt

ð14Þ

The relation between t1 and t2 can be written in terms of switching frequency of the hysteresis band, xs as

t1 þ t2 ¼

2p

xs

:

ð15Þ

Solving (11)–(15), the expression of hysteresis band, HB can be expressed as

Fig. 5. Voltage control loop of APF (HB1).

Fig. 6. Current control loop of APF (HB2).

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R. Mahanty / Electrical Power and Energy Systems 62 (2014) 441–449 200A 0A -200A

(a)

I(RL) 1

200A

400V

2

I(Ls)

V(1)

0A -200A

SEL>> -400V 1

I(Ls)

2

(b)

V(1)

200A 0A -200A

(c)

I(L) 600V 500V 400V 0s

100ms V(C:1)- V(C:2)

200ms

(d)

300ms

400ms

500ms

Time Fig. 7. Simulated waveforms of single-phase shunt APF with diode rectifier feeding an RC load. (a) load current I(RL), (b) source current I(Ls) and voltage at node 1 V(1), (c) current supplied by APF I(L) and (d) DC link capacitor voltage V(C:1)–V(C:2).

100A

(a)

50A

2 !2 3   di Load V s  Ricomp þ L didt  L dtref 5 0:5pV c 4 1 HB ¼ xs L Vc

ð16Þ

SEL>> 0A 200A

where iref ¼

I(RL)

(b) 100A

0A 0Hz I(Ls)

0.2KHz

0.4KHz

0.6KHz

0.8KHz

1.0KHz

Frequency

Fig. 8. Harmonic spectra of simulated waveforms of single-phase shunt APF with diode rectifier feeding an RC load after step change in load at 300 ms. (a) load current I(RL) and (b) source current I(Ls).

k sin xt.

diref ¼ kx cos xt: dt

ð17Þ

The maximum switching frequency xs,max for a specified hysteresis band can be expressed as

xs;max ¼

0:5pV c : HB:L

Fig. 9. Simulation circuit of single-phase shunt APF with diode rectifier feeding an RL load.

ð18Þ

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R. Mahanty / Electrical Power and Energy Systems 62 (2014) 441–449 100A 0A -100A

(a)

I(RL) 200A

1

2

400V

I(Ls)

V(1)

0A SEL>> -200A

-400V

1

I(Ls)

2

(b)

V(1)

100A 0A -100A

(c)

I(L) 600V 500V 400V 0s

100ms

V(C:1)-

200ms

V(C:2)

(d)

300ms

400ms

500ms

Time

Fig. 10. Simulated waveforms of single-phase shunt APF with diode rectifier feeding an RL load. (a) Load current I(RL), (b) source current I(Ls) and voltage at node 1 V(1), (c) current supplied by APF I(L) and (d) DC link capacitor voltage V(C:1)–V(C:2).

Simulation results

100A

(a) 50A SEL>> 0A 200A

I(RL)

(b) 100A

0A 0Hz I(Ls)

0.2KHz

0.4KHz

0.6KHz

0.8KHz

1.0KHz

The proposed indirect current controlled shunt APF has been simulated using Pspice for a 230 V, 50 Hz AC system for three cases: (1) single-phase shunt APF with diode rectifier feeding an RC load, (2) single-phase shunt APF with diode rectifier feeding an RL load and (3) three-phase shunt APF with diode rectifier feeding an RLE load.

Single-phase shunt APF with diode rectifier feeding an RC load

Frequency

Fig. 11. Harmonic spectra of simulated waveforms of single-phase shunt APF with diode rectifier feeding an RL load after step change in load at 300 ms. (a) Load current I(RL) and (b) source current I(Ls).

The simulation circuit of single-phase shunt APF with diode rectifier feeding an RC load is shown in Fig. 4. The APF is turned on at 100 ms. Initially, R1load = 25 X and Cload = 1000 lF. To check the

Fig. 12. Simulation circuit of three-phase shunt APF with diode rectifier feeding an RLE load.

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R. Mahanty / Electrical Power and Energy Systems 62 (2014) 441–449

transient response, R2load = 10 X is connected parallel to R1load at 300 ms. The APF has two control loops; HB1, the voltage control loop and HB2, the current control loop. The circuit of HB1 is shown in Fig. 5 and the circuit of HB2 is shown in Fig. 6. HB1 generates the reference current. The capacitor voltage is maintained by the voltage control loop HB1. In the voltage control loop HB1 (Fig. 5), the resistance R3 and capacitance C1 form a LPF. The DC voltage obtained at the output of LPF is compared with a reference DC voltage and the difference is sent to the PI controller. The output of the PI controller is multiplied by a sine wave of unity magnitude to obtain the reference current. The reference current is compared with the source current in the current control loop, HB2 (Fig. 6) for generating gate signals for the IGBTs. In the current control loop, hysteresis comparator has been realized using LM741. The hysteresis window is set at 0.5 A. The simulated waveforms with reference to simulation circuit of Fig. 4 are shown in Figs. 7(a)–(d); where, I(RL) is the load current, I(Ls) is the source current, V(1) is the voltage at node 1, I(L) is the current supplied by APF and V(C:1)–V(C:2) is the voltage across capacitor C. The harmonic spectra of I(RL) and I(Ls) after step change in load at 300 ms are shown in Figs. 8(a) and (b). Single-phase shunt APF with diode rectifier feeding an RL load The simulation circuit of single-phase shunt APF with diode rectifier feeding an RL load is shown in Fig. 9 (R1load = 10 X, R2load = 5 X and Lload = 100 mH). The control loops HB1 and HB2 are same as that of Fig. 4. The simulated waveforms of I(RL), I(Ls), V(1), I(L) and V(C:1)–V(C:2) are shown in Figs. 10(a)–(d). The harmonic spectra of I(RL) and I(Ls) after step change in load at 300 ms are shown in Figs. 11(a) and (b). Three-phase shunt APF with diode rectifier feeding an RLE load The simulation circuit of three-phase shunt APF with diode rectifier feeding an RLE load is shown in Fig. 12 (R1load = 10 X, R2load = 5 X, Lload = 100 mH and E = 50 V). HB1, HB2 and HB3 are the voltage control loops and HB4, HB5 and HB6 are the current control loops. The circuit of voltage control loops and current control loops are same as the previous cases. The dynamic response of the three-phase APF is found similar to the single-phase APF. Fig. 13 shows the simulated waveforms under steady-state for this case. Fig. 13(a) shows the load currents I(RL1), I(RL2) and I(RL3) in

100A

(a)

50A SEL>> 0A 200A

I(RL1)

(b)

100A 0A 100A

I(Ls1)

(c)

50A 0A 0Hz

0.2KHz

I(L1)

0.4KHz

0.6KHz

0.8KHz

1.0KHz

Frequency

Fig. 14. Harmonic spectra of simulated waveforms of three-phase shunt APF with diode rectifier feeding an RLE load. (a) Load current I(RL1), (b) source current I(Ls1) and (c) current supplied by APF I(L1).

the three phases. Fig. 13 (b) shows the source currents I(Ls1), I(Ls2) and I(Ls3) in the three phases. Fig. 13(c) shows the injected currents I(L1), I(L2) and I(L3) in the three phases by the APF. Fig. 13 (d) shows the DC link capacitor voltage V(C:1)–V(C:2). The harmonic spectra of I(RL1), I(Ls1) and I(L1) are shown in Figs. 14(a)– (c).

Discussions on simulation results Table 1 shows the individual harmonic components in load current I(RL), source current I(Ls) and % total harmonic distortion (THD) for the cases discussed. THD (%) of the source currents for all the three cases are well below 5%, the harmonic standards defined in IEEE Standard 519–1992 [37]. It may be observed from the simulation studies that the source current and voltage at the point of common coupling is distorted at the instant of connecting the APF. However, it does not affect the performance of APF and the source current becomes sinusoidal after connecting the APF. It may be noticed from the simulation results that the dynamic response time of the proposed indirect current controlled shunt APF is two cycles. The reason behind this is that a LPF is used to eliminate the ripple from the sensed DC link voltage. Inclusion of a LPF introduces a finite delay in the control process. In addition, the DC link capacitor takes some time to respond to the change in load conditions.

50A I(RL1)

I(RL2)

I(RL3)

SEL>> -50A I(RL1)

I(RL2)

200A I(Ls1)

(a)

I(RL3) I(Ls2)

I(Ls3)

0A -200A I(Ls1)

I(Ls2)

(b)

I(Ls3)

100A 0A I(L1)

-100A I(L1)

I(L2)

I(L2)

I(L3)

(c)

I(L3)

740V 720V 700V 240ms 250ms V(C:1)- V(C:2)

260ms

270ms

(d)

280ms

290ms

300ms

Time Fig. 13. Simulated waveforms of three-phase shunt APF with diode rectifier feeding an RLE load. (a) Load currents I(RL1), I(RL2) and I(RL3); (b) source current I(Ls1), I(Ls2) and I(Ls3); (c) currents supplied by APF I(L1), I(L2) and I(L3) and (d) DC link capacitor voltage V(C:1)–V(C:2).

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R. Mahanty / Electrical Power and Energy Systems 62 (2014) 441–449

Table 1 Individual harmonic components in load current I(RL) and source current I(Ls). Harmonic number

Single-phase APF with diode rectifier feeding an RC load

Single-phase APF with diode rectifier feeding an RL load

Three-phase APF with diode rectifier feeding an RLE load

I(RL) (A)

I(Ls) (A)

I(RL) (A)

I(Ls) (A)

I(RL) (A)

I(Ls) (A)

1 3 5 7 9 11 13 15 17 19 THD (%)

72.688 53.586 35.579 17.577 4.635 2.151 2.122 1.252 1.223 0.938 92.091

103.903 0.811 0.764 0.106 0.103 0.072 0.035 0.024 0.008 0.002 1.085

78.407 23.495 12.984 8.573 6.092 4.414 3.311 2.408 1.734 1.221 37.661

116.325 1.003 0.135 0.099 0.091 0.074 0.060 0.053 0.035 0.030 0.884

50.461 0.042 8.156 5.157 0.125 2.356 1.621 0.665 0.661 0.543 20.062

101.368 0.039 0.245 0.144 0.101 0.099 0.087 0.074 0.065 0.049 0.344

Time: 6 ms/div Voltage: 100 V/div Current: 50 A/div

vs is

Fig. 15. Experimental source voltage connecting shunt APF.

vs

and source current is waveforms before

Time: 6 ms/div Voltage: 100 V/div Current: 50 A/div

vs is

some of the simulation results. The control platform has been built around dSPACE (DS1104 of dSPACE). A microcontroller has been used to carry out analog to digital conversions, digital to analog conversions and real-time computations. Different voltages are sensed using analog circuitry and the currents are sensed using hall-effect sensors. The single-phase shunt APF shown in Fig. 4 with diode rectifier feeding an RC load is used in the experimental setup for a 230 V, 50 Hz AC system. The load parameters for the experimental circuit are Rload = 15 X and Cload = 150 lF. The performance of the proposed APF has been tested under steady-state condition. IGBTs, CM50DY-12E and diodes, RPR4040 are used in the experimental circuit of APF. Driver ICs, IR2110 are used for giving gate signals to the IGBTs. The experimental source voltage vs and source current is waveforms before connecting shunt APF are shown in Fig. 15 and after connecting shunt APF are shown in Fig. 16.

Conclusion An indirect current controlled shunt APF has been proposed for improving power quality. The mathematical background of the indirect current controlled shunt APF using hysteresis band control has been presented. Simulations have been carried out using Pspice for single-phase and three-phase indirect current controlled shunt APFs for different types of nonlinear loads. A single-phase indirect current controlled shunt APF prototype has been developed and tested in the laboratory to verify some of the simulation results. As the reference current in the proposed APF has been generated from the DC link capacitor voltage, without calculating the reactive current drawn by the load, the compensation process is straight forward and simple as compared to conventional APFs.

References

Fig. 16. Experimental source voltage connecting shunt APF.

vs

and source current is waveforms after

Experimental results A single-phase indirect current controlled shunt APF prototype has been designed and developed in the laboratory to validate

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