- Email: [email protected]
Inductively coupled plasma — plasma enhanced chemical vapor deposition silicon nitride for passivation of InP based high electron mobility transistors (HEMTs)
Materials Science and Engineering B80 (2001) 252– 256 www.elsevier.com/locate/mseb
Inductively coupled plasma — plasma enhanced chemical vapor deposition silicon nitride for passivation of InP based high electron mobility transistors (HEMTs) M. Medjdoub *, J.L. Courant, H. Maher, G. Post OPTO + Groupement d’Inte´reˆt Economique, Route de Nozay Marcoussis, F-91460, France
Abstract Silicon nitride thin films have been deposited on InP-based structures at both room and high temperatures in an RF-inductively coupled plasma enhanced chemical vapor deposition (ICP-PECVD) equipment. Metal insulating semiconductor (MIS) diodes have been widely investigated using either SiH4 +NH3 or SiH4 + N2 gas phase. I – V measurements conducted on these diodes reveal high resistivity and breakdown electric field even at low deposition temperature (50°C). Double channel (DC) High electron mobility transistors (HEMTs) have been passivated by SiNx films deposited at room temperature using SiH4 +NH3 precursors. Passivated devices exhibit a very low drift over a 45 h period of stress under high gate-drain electric field. © 2001 Elsevier Science B.V. All rights reserved. Keywords: Passivation; SiN; ICP-PECVD; Interface; InP; HEMT
1. Introduction InP and related materials are widely studied to produce optoelectronic devices as well as high speed integrated circuits used in long distance optical fiber networks. These compounds, in particular InGaAs and AlInAs, are fragile materials, and device reliability is still an open issue, for which an appropriate metallurgy and a passivation process should be developed. The non-existence of stable native oxides to protect the surface of III –V components, and prevent their characteristics from drifting over a long time period, stands as a serious handicap for the development of III –V technologies. Instabilities of SiO2/arsenide interfaces lead to the choice of SiN dielectric for the passivation purpose. The use of technologies such as conventional SiNPECVD is usually undesirable on InP-based semiconductors. Their high sensitivity to ion bombardment and the non-congruent evaporation (elements V tend to be much more volatile at relatively low temperature) requires the development of well adapted technologies. * Corresponding author. Tel.: + 33-1-69634671; fax: +33-169631422. E-mail address: [email protected] (M. Medjdoub).
With this objective, a new passivation process has recently been investigated in our laboratory, based on a SiNx film deposited in an RF-inductively coupled plasma enhanced chemical vapor deposition (ICPPECVD) equipment. This paper presents first electrical results on InGaAs and InP metal insulating semiconductor (MIS) diodes and gives preliminary results on using such SiN films for the passivation of InP-based HEMTs. The ICP-PECVD reactors keep the samples outside the plasma discharge, in order to obtain a diffusive mode of deposition. This mode minimizes damages to the fragile surfaces of III –V semiconductors. Moreover, ICP reactors can operate at low and controllable ion energies (30 eV), and at relatively low temperature (between room temperature and 300°C to maintain the integrity of InP) [1]. This low-damage technology has been applied to the passivation of InP-based HEMTs, as illustrated in Fig. 1. Promising results have been obtained, in comparison with the classical PECVD technique [2–4]. The passivation of a component such as the InPbased HEMT, requires the protection and the stabilization of the access areas between gate, source and drain. This requires a very good control of the AlInAs and
0921-5107/01/$ - see front matter © 2001 Elsevier Science B.V. All rights reserved. PII: S 0 9 2 1 - 5 1 0 7 ( 0 0 ) 0 0 6 4 9 - 8
M. Medjdoub et al. / Materials Science and Engineering B80 (2001) 252–265
253
Fig. 1. Schematic view of HEMT.
InGaAs surfaces. The behavior of the HEMT is very sensitive to the quality of the SiNx /semiconductor interface and the associated Fermi level pinning, which controls the access resistances and thus the device performances.
Fig. 2. Schematic diagram of ICP-PECVD apparatus.
2. Deposition process and refractive index An ICP reactor has already been presented in a previous paper [5]. Briefly, it consists in two communicating chambers: a discharge chamber where either N2 or NH3 plasma is formed, and a deposition chamber where samples are located (Fig. 2). The former is surrounded by a circular antenna providing the RF power, and a coil which presents the inductive element. The RF current flowing in the antenna generates an RF magnetic flux through the discharge region. In addition, the d.c. current circulating into the inductive element induces a constant magnetic field inside the discharge region. The diffusion chamber is surrounded by permanent magnets ensuring uniformity of plasma diffusion. The NH3 (or N2) gas is introduced into the discharge chamber, whereas the SiH4 is introduced in a post-discharge by a ring shaped injector, located just above the sample. SiNx deposition rate can be up to 120 nm min − 1, and is strongly dependent on the SiH4 concentration and the nature of nitrogen vector. Fig. 3 illustrates the refractive index (measured at l =633 nm) as a function of SiH4 concentration in both SiH4 +N2 and SiH4 + NH3 cases. Refractive index is measured on samples with different thicknesses, as it was checked that it is independent of the SiN thickness. These results are obtained at a low temperature deposition (50°C) and at a low ionic energy of the reactive species (self-bias of a few volts). The large range of measured refractive index shows the ability of the ICP reactor to explore a wide range of material composition [5]. For microelectronics applications, best materials are obtained when the SiH4/NH3 or SiH4/N2 ratio is in the
Fig. 3. Refractive index of SiNx films for two gas phases: SiH4 + N2 (square) and SiH4 +NH3 (circle).
range of 20–30%. In the results presented below, this ratio is kept close to 20%.
3. Characterization of silicon nitride bulk and silicon nitride/semiconductor interface MIS diodes have been fabricated aiming at the characterization of both the SiNx /semiconductor interface and the SiNx bulk. Undoped epi-ready InP substrates (doping level n= 4–10× 1015 cm − 3), and undoped InGaAs layers grown on S-doped InP wafers are used. After native oxide removal, the samples are introduced in the reactor for SiNx dielectric layer deposition. Metal electrodes (Ti/Au) are then evaporated through a metallic mask (240 and 1000 mm diameters). Some samples were annealed at 200°C in N2 or ArH2 atmosphere for 1 h prior to Ti/Au evaporation. After In-alloying the samples on a conductive plate, C–V at 1 MHz and I–V measurements are recorded. The film resistivity (z) and the breakdown electric field (Ec) are then deduced from I–V characteristics. Fig. 4a and 4b illustrate C–V curves of MIS diodes fabricated on InGaAs and InP samples respectively; also reported are the anneal results for each case.
254
M. Medjdoub et al. / Materials Science and Engineering B80 (2001) 252–256
These curves are recorded at identical sweep rate (500 mV s − 1), on diodes of 240 mm diameter. In these examples 60 nm of SiNx film have been deposited at 250°C, using SiH4 and NH3 as reactant gas. The plasma excitation power was 800 W. C–V curves exhibit well-defined accumulation and depletion values for both semiconductors, similar shapes are observed at lower sweep rates. The hysteresis
Fig. 4. (a) C – V curves of MIS diodes fabricated on InGaAs layer with SiH4 and NH3 precursors. (a) as deposited and (b) after1 h annealing in N2 atmosphere at 200°C. (b) C–V curves of MIS diodes fabricated on InP substrate with SiH4 and NH3 precursors. (a) As deposited and (b) after1 h annealing in N2 atmosphere at 200°C.
Fig. 5. C – V curves of MIS diodes fabricated on InP substrate with SiH4 and N2 precursors. (a) As deposited and (b) after 1 h annealing in ArH2 atmosphere at 200°C.
(about 4 V on InGaAs and 2 V on InP at 500 mV s − 1) stays relatively high in both cases even after annealing. The film resistivity is about 8× 1013 V cm and the breakdown electric field Ec reaches 6 and 17 MV cm − 1 for SiNx /InGaAs and SiNx /InP diodes respectively. Those characteristics are not significantly improved after annealing. However, the shape of C(V) curves exhibits a steeper slope for annealed samples illustrative of a lower interface state density Nss after annealing: using the Terman method [6], one would deduce values of 3× 1012 to 2×1012 cm − 2 eV − 1 before and after anneal respectively. These values are reported from the minimum of the Nss Ushaped distribution. This behavior can be attributed to a reorganization of the interface. The anneal does not modify significantly the thickness or the refractive index of SiNx films. MIS diodes with SiH4 and N2 reactant gas have also been investigated. Deposition temperature in this case was 180°C, and the RF excitation was 800 W. SiN film thickness was about 76 nm. As shown in Fig. 5, depletion and accumulation regions are as well-defined as for the former examples. As one could expect, accumulation capacitance decreases since SiN thickness increases. However, inversion capacitance remains unchanged, since in both cases it is considered close to the inversion. The film resistivity is in the range of 1014 V cm and the breakdown voltage is about 5 MV cm − 1. However, C–V curves are less steep than for SiH4/NH3 case. Using Terman method, Nss is estimated at 4× 1012 cm − 2 eV − 1 even after annealing. The current leakage measured on films deposited from NH3 is generally higher than the one measured on films prepared with N2. This is because the latter films contain less hydrogen than the former ones, even at high deposition temperature.
4. Device fabrication of double channel (DC) InGaAs/InP HEMTs The DC HEMT multilayer structure used in this study was grown by MOVPE on a semi-insulating InP substrate. The epitaxial layers consist of a 100 nm undoped AlInAs buffer layer, a 30 nm undoped InP sub-channel, a 10 nm undoped InGaAs channel, a carrier supply layer made of a doping plane sandwiched between a 3 nm undoped AlInAs layer used as spacer and a 22 nm undoped AlInAs barrier, and a 10 nm undoped InGaAs cap layer. Drain and source contact areas are from Ge/Au/Ni/Au alloy and the gate Schottky contact is realised by Ti/Au metal deposition. Device isolation is achieved by a wet chemical mesa-etching.
M. Medjdoub et al. / Materials Science and Engineering B80 (2001) 252–265
Fig. 6. Comparison of Ids before and after passivation. Lg =0.7 mm and Wg = 100 mm.
Fig. 7. C – V characteristic of MIS diode on InP substrate. [Deposition temperature50°C].
255
gate length and 100 mm gate width DC HEMT. We observe a slight decrease in drain current resulting from a shift in the surface Fermi level towards the valence band-edge in drain and source access regions. A minor variation of the extrinsic transconductance Gm is also observed whereas the pinch-off voltage remains constant after passivation. Worth noting also is the reduction of the gate leakage on the whole wafer, e.g. from − 72 to − 18° mA mm − 1 for the same device, measured at Vgs = − 1 V and Vds =2 V. Also the on-state breakdown voltage increases from 4.5 to 6 V after SiNx deposition. MIS diode was elaborated in the same conditions, 60 nm of SiN film was deposited. Fig. 7 exhibits the C–V curve recorded on a diode of 500 mm diameter. We observe a shift towards positive voltages with respect to ideal characteristics resulting possibly from the presence of negative fixed charges in the dielectric. Therefore, the InP semiconductor is depleted at 0 V bias, as are the AlInAs barrier and InGaAs cap layers of the HEMT device. The film resistivity is about z= 1013 V cm and the breakdown electric field is in the range of 12–13 MV cm − 1. These values are quite high for films elaborated at room temperature. The interface state density Nss is relatively high when compared with SiNx films elaborated at high temperature, in the range of 1013 cm − 2 eV − 1. In spite of this higher value, the passivation appears satisfactory. Electrical stress bias experiments have been conducted at Vds = 2 V and Vgs = − 1.2 V (close to pinch-off) on 0.1 mm gate length passivated DC HEMTs. As reported on Fig. 8, the kink phenomenon is reduced, resulting in a shift of the threshold voltage of about 40 mV. The drain current decreases slightly, typically from 140 to 100 mA mm − 1 over a 45 h period of bias. This drift is very limited especially when we consider the high gatedrain voltage bias conditions. Igs current does not exhibit any significant evolution (Fig. 9).
Fig. 8. Impact of electrical bias during 45 h. [Vds = 2 V and Vgs = − 1.2 V− Lg =0.1 mm and Wg = 100 mm].
5. Passivation results A 50 nm SiNx film has been deposited on small gate length InP-based DC HEMTs ( ranging from 0.1 to 0.8 mm) using SiH4 and NH3 as reactant gas at room temperature (50°C). At the same time, InP MIS diodes have been fabricated. Thickness was limited in order to keep the feedback capacitance Cgd of these small gate length HEMTs small enough, and thus to minimize the cut-off frequency degradation. DC characteristics investigated before and after SiNx deposition are illustrated in Fig. 6 for 0.7 mm
Fig. 9. Evolution of Ids and Igs with electrical stress. [Vds = 2 V and Vgs = −1.2 V −Lg =0.1 mm and Wg =100 mm].
256
M. Medjdoub et al. / Materials Science and Engineering B80 (2001) 252–256
III –V-based components, even at very low temperature deposition.
6. Conclusion The ICP-PECVD technique offers promising features for the fabrication of high quality SiNx thin films. Relatively high resistivity and high breakdown electric field are obtained for room deposition temperature, typically 1013 V cm and 12 – 13 MV cm − 1 respectively. Those values have been obtained with SiH4 and NH3 reactant gas. They can be improved with higher deposition temperature or when N2 gas is used instead of NH3. However, the interface state density Nss seems to increased when N2 is used. A promising passivation test has been conducted with SiNx deposition at room temperature (50°C) on InP/InGaAs double channel HEMTs; a 50 nm thick dielectric layer has been deposited using SiH4 and NH3 reactant gas. Only a slight decrease of Idss resulting from an increase of drain and source access resistances was observed. However, a notable improvement of the gate current has been obtained after SiNx deposition. Good results have been obtained after a 45 h period of bias at high gate-drain voltage. In conclusion, the ICP passivation technique seems to be very promising for the passivation of
.
Acknowledgements The authors are very grateful to Andre´ Scavennec for valuable comments about various aspects of this research project, and would like to thank Christophe Jany for many discussions on films deposition processes.
References [1] J. Hopwood, Plasma Sources Sci. Technol. 1 (1992) 109. [2] J. Dickmann, K. Riepe, H. Haspeklo, B. Maile, H. Daembkes, H. Nickel, et al., Electron. Lett. 28 (19) (1992) 1849. [3] H. Wang, G.I. Ng, M. Gilbert, P.J. O’Sullivan, Electron. Lett 32 (32) (1996) 2026. [4] A. Wakejima, K. Onda, Y. Ando, A. Fujihara, E. Mizuki, T. Nakayama, et al., J. Appl. Phys. 81 (3) (1997) 1311. [5] M. Medjdoub, J.L. Courant, Le vide — Sci. Tech. Applic. 1/4 (291) (1999) 41. [6] L.M. Terman, Solid State Electron. 5 (1962) 285.
Inductively coupled plasma — plasma enhanced chemical vapor deposition silicon nitride for passivation of InP based high electron mobility transistors (HEMTs) M. Medjdoub *, J.L. Courant, H. Maher, G. Post OPTO + Groupement d’Inte´reˆt Economique, Route de Nozay Marcoussis, F-91460, France
Abstract Silicon nitride thin films have been deposited on InP-based structures at both room and high temperatures in an RF-inductively coupled plasma enhanced chemical vapor deposition (ICP-PECVD) equipment. Metal insulating semiconductor (MIS) diodes have been widely investigated using either SiH4 +NH3 or SiH4 + N2 gas phase. I – V measurements conducted on these diodes reveal high resistivity and breakdown electric field even at low deposition temperature (50°C). Double channel (DC) High electron mobility transistors (HEMTs) have been passivated by SiNx films deposited at room temperature using SiH4 +NH3 precursors. Passivated devices exhibit a very low drift over a 45 h period of stress under high gate-drain electric field. © 2001 Elsevier Science B.V. All rights reserved. Keywords: Passivation; SiN; ICP-PECVD; Interface; InP; HEMT
1. Introduction InP and related materials are widely studied to produce optoelectronic devices as well as high speed integrated circuits used in long distance optical fiber networks. These compounds, in particular InGaAs and AlInAs, are fragile materials, and device reliability is still an open issue, for which an appropriate metallurgy and a passivation process should be developed. The non-existence of stable native oxides to protect the surface of III –V components, and prevent their characteristics from drifting over a long time period, stands as a serious handicap for the development of III –V technologies. Instabilities of SiO2/arsenide interfaces lead to the choice of SiN dielectric for the passivation purpose. The use of technologies such as conventional SiNPECVD is usually undesirable on InP-based semiconductors. Their high sensitivity to ion bombardment and the non-congruent evaporation (elements V tend to be much more volatile at relatively low temperature) requires the development of well adapted technologies. * Corresponding author. Tel.: + 33-1-69634671; fax: +33-169631422. E-mail address: [email protected] (M. Medjdoub).
With this objective, a new passivation process has recently been investigated in our laboratory, based on a SiNx film deposited in an RF-inductively coupled plasma enhanced chemical vapor deposition (ICPPECVD) equipment. This paper presents first electrical results on InGaAs and InP metal insulating semiconductor (MIS) diodes and gives preliminary results on using such SiN films for the passivation of InP-based HEMTs. The ICP-PECVD reactors keep the samples outside the plasma discharge, in order to obtain a diffusive mode of deposition. This mode minimizes damages to the fragile surfaces of III –V semiconductors. Moreover, ICP reactors can operate at low and controllable ion energies (30 eV), and at relatively low temperature (between room temperature and 300°C to maintain the integrity of InP) [1]. This low-damage technology has been applied to the passivation of InP-based HEMTs, as illustrated in Fig. 1. Promising results have been obtained, in comparison with the classical PECVD technique [2–4]. The passivation of a component such as the InPbased HEMT, requires the protection and the stabilization of the access areas between gate, source and drain. This requires a very good control of the AlInAs and
0921-5107/01/$ - see front matter © 2001 Elsevier Science B.V. All rights reserved. PII: S 0 9 2 1 - 5 1 0 7 ( 0 0 ) 0 0 6 4 9 - 8
M. Medjdoub et al. / Materials Science and Engineering B80 (2001) 252–265
253
Fig. 1. Schematic view of HEMT.
InGaAs surfaces. The behavior of the HEMT is very sensitive to the quality of the SiNx /semiconductor interface and the associated Fermi level pinning, which controls the access resistances and thus the device performances.
Fig. 2. Schematic diagram of ICP-PECVD apparatus.
2. Deposition process and refractive index An ICP reactor has already been presented in a previous paper [5]. Briefly, it consists in two communicating chambers: a discharge chamber where either N2 or NH3 plasma is formed, and a deposition chamber where samples are located (Fig. 2). The former is surrounded by a circular antenna providing the RF power, and a coil which presents the inductive element. The RF current flowing in the antenna generates an RF magnetic flux through the discharge region. In addition, the d.c. current circulating into the inductive element induces a constant magnetic field inside the discharge region. The diffusion chamber is surrounded by permanent magnets ensuring uniformity of plasma diffusion. The NH3 (or N2) gas is introduced into the discharge chamber, whereas the SiH4 is introduced in a post-discharge by a ring shaped injector, located just above the sample. SiNx deposition rate can be up to 120 nm min − 1, and is strongly dependent on the SiH4 concentration and the nature of nitrogen vector. Fig. 3 illustrates the refractive index (measured at l =633 nm) as a function of SiH4 concentration in both SiH4 +N2 and SiH4 + NH3 cases. Refractive index is measured on samples with different thicknesses, as it was checked that it is independent of the SiN thickness. These results are obtained at a low temperature deposition (50°C) and at a low ionic energy of the reactive species (self-bias of a few volts). The large range of measured refractive index shows the ability of the ICP reactor to explore a wide range of material composition [5]. For microelectronics applications, best materials are obtained when the SiH4/NH3 or SiH4/N2 ratio is in the
Fig. 3. Refractive index of SiNx films for two gas phases: SiH4 + N2 (square) and SiH4 +NH3 (circle).
range of 20–30%. In the results presented below, this ratio is kept close to 20%.
3. Characterization of silicon nitride bulk and silicon nitride/semiconductor interface MIS diodes have been fabricated aiming at the characterization of both the SiNx /semiconductor interface and the SiNx bulk. Undoped epi-ready InP substrates (doping level n= 4–10× 1015 cm − 3), and undoped InGaAs layers grown on S-doped InP wafers are used. After native oxide removal, the samples are introduced in the reactor for SiNx dielectric layer deposition. Metal electrodes (Ti/Au) are then evaporated through a metallic mask (240 and 1000 mm diameters). Some samples were annealed at 200°C in N2 or ArH2 atmosphere for 1 h prior to Ti/Au evaporation. After In-alloying the samples on a conductive plate, C–V at 1 MHz and I–V measurements are recorded. The film resistivity (z) and the breakdown electric field (Ec) are then deduced from I–V characteristics. Fig. 4a and 4b illustrate C–V curves of MIS diodes fabricated on InGaAs and InP samples respectively; also reported are the anneal results for each case.
254
M. Medjdoub et al. / Materials Science and Engineering B80 (2001) 252–256
These curves are recorded at identical sweep rate (500 mV s − 1), on diodes of 240 mm diameter. In these examples 60 nm of SiNx film have been deposited at 250°C, using SiH4 and NH3 as reactant gas. The plasma excitation power was 800 W. C–V curves exhibit well-defined accumulation and depletion values for both semiconductors, similar shapes are observed at lower sweep rates. The hysteresis
Fig. 4. (a) C – V curves of MIS diodes fabricated on InGaAs layer with SiH4 and NH3 precursors. (a) as deposited and (b) after1 h annealing in N2 atmosphere at 200°C. (b) C–V curves of MIS diodes fabricated on InP substrate with SiH4 and NH3 precursors. (a) As deposited and (b) after1 h annealing in N2 atmosphere at 200°C.
Fig. 5. C – V curves of MIS diodes fabricated on InP substrate with SiH4 and N2 precursors. (a) As deposited and (b) after 1 h annealing in ArH2 atmosphere at 200°C.
(about 4 V on InGaAs and 2 V on InP at 500 mV s − 1) stays relatively high in both cases even after annealing. The film resistivity is about 8× 1013 V cm and the breakdown electric field Ec reaches 6 and 17 MV cm − 1 for SiNx /InGaAs and SiNx /InP diodes respectively. Those characteristics are not significantly improved after annealing. However, the shape of C(V) curves exhibits a steeper slope for annealed samples illustrative of a lower interface state density Nss after annealing: using the Terman method [6], one would deduce values of 3× 1012 to 2×1012 cm − 2 eV − 1 before and after anneal respectively. These values are reported from the minimum of the Nss Ushaped distribution. This behavior can be attributed to a reorganization of the interface. The anneal does not modify significantly the thickness or the refractive index of SiNx films. MIS diodes with SiH4 and N2 reactant gas have also been investigated. Deposition temperature in this case was 180°C, and the RF excitation was 800 W. SiN film thickness was about 76 nm. As shown in Fig. 5, depletion and accumulation regions are as well-defined as for the former examples. As one could expect, accumulation capacitance decreases since SiN thickness increases. However, inversion capacitance remains unchanged, since in both cases it is considered close to the inversion. The film resistivity is in the range of 1014 V cm and the breakdown voltage is about 5 MV cm − 1. However, C–V curves are less steep than for SiH4/NH3 case. Using Terman method, Nss is estimated at 4× 1012 cm − 2 eV − 1 even after annealing. The current leakage measured on films deposited from NH3 is generally higher than the one measured on films prepared with N2. This is because the latter films contain less hydrogen than the former ones, even at high deposition temperature.
4. Device fabrication of double channel (DC) InGaAs/InP HEMTs The DC HEMT multilayer structure used in this study was grown by MOVPE on a semi-insulating InP substrate. The epitaxial layers consist of a 100 nm undoped AlInAs buffer layer, a 30 nm undoped InP sub-channel, a 10 nm undoped InGaAs channel, a carrier supply layer made of a doping plane sandwiched between a 3 nm undoped AlInAs layer used as spacer and a 22 nm undoped AlInAs barrier, and a 10 nm undoped InGaAs cap layer. Drain and source contact areas are from Ge/Au/Ni/Au alloy and the gate Schottky contact is realised by Ti/Au metal deposition. Device isolation is achieved by a wet chemical mesa-etching.
M. Medjdoub et al. / Materials Science and Engineering B80 (2001) 252–265
Fig. 6. Comparison of Ids before and after passivation. Lg =0.7 mm and Wg = 100 mm.
Fig. 7. C – V characteristic of MIS diode on InP substrate. [Deposition temperature50°C].
255
gate length and 100 mm gate width DC HEMT. We observe a slight decrease in drain current resulting from a shift in the surface Fermi level towards the valence band-edge in drain and source access regions. A minor variation of the extrinsic transconductance Gm is also observed whereas the pinch-off voltage remains constant after passivation. Worth noting also is the reduction of the gate leakage on the whole wafer, e.g. from − 72 to − 18° mA mm − 1 for the same device, measured at Vgs = − 1 V and Vds =2 V. Also the on-state breakdown voltage increases from 4.5 to 6 V after SiNx deposition. MIS diode was elaborated in the same conditions, 60 nm of SiN film was deposited. Fig. 7 exhibits the C–V curve recorded on a diode of 500 mm diameter. We observe a shift towards positive voltages with respect to ideal characteristics resulting possibly from the presence of negative fixed charges in the dielectric. Therefore, the InP semiconductor is depleted at 0 V bias, as are the AlInAs barrier and InGaAs cap layers of the HEMT device. The film resistivity is about z= 1013 V cm and the breakdown electric field is in the range of 12–13 MV cm − 1. These values are quite high for films elaborated at room temperature. The interface state density Nss is relatively high when compared with SiNx films elaborated at high temperature, in the range of 1013 cm − 2 eV − 1. In spite of this higher value, the passivation appears satisfactory. Electrical stress bias experiments have been conducted at Vds = 2 V and Vgs = − 1.2 V (close to pinch-off) on 0.1 mm gate length passivated DC HEMTs. As reported on Fig. 8, the kink phenomenon is reduced, resulting in a shift of the threshold voltage of about 40 mV. The drain current decreases slightly, typically from 140 to 100 mA mm − 1 over a 45 h period of bias. This drift is very limited especially when we consider the high gatedrain voltage bias conditions. Igs current does not exhibit any significant evolution (Fig. 9).
Fig. 8. Impact of electrical bias during 45 h. [Vds = 2 V and Vgs = − 1.2 V− Lg =0.1 mm and Wg = 100 mm].
5. Passivation results A 50 nm SiNx film has been deposited on small gate length InP-based DC HEMTs ( ranging from 0.1 to 0.8 mm) using SiH4 and NH3 as reactant gas at room temperature (50°C). At the same time, InP MIS diodes have been fabricated. Thickness was limited in order to keep the feedback capacitance Cgd of these small gate length HEMTs small enough, and thus to minimize the cut-off frequency degradation. DC characteristics investigated before and after SiNx deposition are illustrated in Fig. 6 for 0.7 mm
Fig. 9. Evolution of Ids and Igs with electrical stress. [Vds = 2 V and Vgs = −1.2 V −Lg =0.1 mm and Wg =100 mm].
256
M. Medjdoub et al. / Materials Science and Engineering B80 (2001) 252–256
III –V-based components, even at very low temperature deposition.
6. Conclusion The ICP-PECVD technique offers promising features for the fabrication of high quality SiNx thin films. Relatively high resistivity and high breakdown electric field are obtained for room deposition temperature, typically 1013 V cm and 12 – 13 MV cm − 1 respectively. Those values have been obtained with SiH4 and NH3 reactant gas. They can be improved with higher deposition temperature or when N2 gas is used instead of NH3. However, the interface state density Nss seems to increased when N2 is used. A promising passivation test has been conducted with SiNx deposition at room temperature (50°C) on InP/InGaAs double channel HEMTs; a 50 nm thick dielectric layer has been deposited using SiH4 and NH3 reactant gas. Only a slight decrease of Idss resulting from an increase of drain and source access resistances was observed. However, a notable improvement of the gate current has been obtained after SiNx deposition. Good results have been obtained after a 45 h period of bias at high gate-drain voltage. In conclusion, the ICP passivation technique seems to be very promising for the passivation of
.
Acknowledgements The authors are very grateful to Andre´ Scavennec for valuable comments about various aspects of this research project, and would like to thank Christophe Jany for many discussions on films deposition processes.
References [1] J. Hopwood, Plasma Sources Sci. Technol. 1 (1992) 109. [2] J. Dickmann, K. Riepe, H. Haspeklo, B. Maile, H. Daembkes, H. Nickel, et al., Electron. Lett. 28 (19) (1992) 1849. [3] H. Wang, G.I. Ng, M. Gilbert, P.J. O’Sullivan, Electron. Lett 32 (32) (1996) 2026. [4] A. Wakejima, K. Onda, Y. Ando, A. Fujihara, E. Mizuki, T. Nakayama, et al., J. Appl. Phys. 81 (3) (1997) 1311. [5] M. Medjdoub, J.L. Courant, Le vide — Sci. Tech. Applic. 1/4 (291) (1999) 41. [6] L.M. Terman, Solid State Electron. 5 (1962) 285.