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GaAs heterojunction bipolar transistor
Superlattices and Microstructures 43 (2008) 368–374 www.elsevier.com/locate/superlattices
Influence of emitter-ledge thickness on the surfacerecombination mechanism of InGaP/GaAs heterojunction bipolar transistor Kuei-Yi Chu a , Shiou-Ying Cheng b,∗ , Tzu-Pin Chen a , Ching-Wen Hung a , Li-Yang Chen a , Tsung-Han Tsai a , Wen-Chau Liu a,∗ , Lu-An Chen b a Institute of Microelectronics, Department of Electrical Engineering, National Cheng-Kung University, 1 University
Road, Tainan, 70101, Taiwan, ROC b Department of Electronic Engineering, Nation Ilan University, No.1, Sec.1, Shen-Lung Road, I-Lan,
26041, Taiwan, ROC Received 8 August 2007; received in revised form 16 December 2007; accepted 12 January 2008 Available online 4 March 2008
Abstract In this work, the characteristics of InGaP/GaAs heterojunction bipolar transistors (HBTs) with various emitter-ledge thicknesses are comprehensively studied and demonstrated. Based on the two-dimensional analysis, some important parameters such as the recombination rate and DC characteristics are studied. The simulated analyses are in good agreement with experimental results. It is known that better HBT performance, including lower recombination rate in the surface channel, and higher DC current gain are ˚ obtained in the studied devices with the emitter ledge thickness between 100 and 200 A. c 2008 Elsevier Ltd. All rights reserved.
Keywords: Emitter-ledge thickness; Recombination rate; DC current gain
1. Introduction Heterojunction bipolar transistors (HBTs) based on GaAs material system are attractive devices in applications to microwave power amplifiers and high-speed optical communication circuits due to their excellent DC and RF performance [1–4]. However, one major problem ∗ Corresponding author. Tel.: +886 3 935 7400 252, +886 6 275 7575 62354; fax: +886 3 936 9507, +886 6 209 4786.
E-mail addresses: [email protected] (S.-Y. Cheng), [email protected] (W.-C. Liu). c 2008 Elsevier Ltd. All rights reserved. 0749-6036/$ - see front matter doi:10.1016/j.spmi.2008.01.018
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Fig. 1. Schematic cross-section of the simulated device.
in the circuit applications is the current gain degradation with the decrease of emitter–base junction size, i.e. the emitter size effect [5]. It’s well known that the unpassivated GaAs surface is distracted by a high density of surface states. This causes the undesired pinning effect of surface Fermi level within the band gap of the semiconductor [6–9]. Many studies have been reported to solve this problem, such as emitter-ledge structure, sulphide-based chemical treatment and hydrogen plasma treatment [5–9]. Typically, the emitter- ledge structure is a simple method to decrease the surface recombination current and overcome the emitter-size effect [6,7]. Although, the emitter-ledge structure could improve part of HBT performance [9], the undesired surfacechannel phenomenon on the exposed base surface between the base contact and emitter ledge is still presented. In addition, if the emitter ledge is too thick, part of the electron current injecting from the emitter and travelling towards base, will flow through the undepleted ledge region. This certainly degrades the emitter size effect. In contrast, if the emitter ledge is too thin, it may not effectively passivate the surface [10,11]. Thus, the thickness of the emitter-ledge structure is a significant issue and should be carefully considered. In this work, a comprehensive investigation of InGaP/GaAs HBTs with various emitter-ledge thicknesses is implemented. The related recombination rates and DC characteristics of studied devices are demonstrated and studied. The theoretical analysis and simulations are made by using a two-dimensional simulator Atlas [12,13]. In addition, the corresponding experimental devices are fabricated and compared. The simulated data are in good agreement with measured results. 2. Model and device structure The schematic cross-section of a simulated device structure, symmetrical with respect to the centre line of emitter contact is shown in the Fig. 1. Basically, the studied devices consist of a ˚ n+ -GaAs (n+ = 4 × 1018 cm−3 ) subcollector, a 3000 A ˚ n− -GaAs (n− = 2 × 1016 cm−3 ) 5000 A + + 19 −3 ˚ p -GaAs (p = 2 × 10 cm ) base, a 50 A ˚ n-GaAs (n = 3 × 1017 cm−3 ) collector, a 1000 A
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Fig. 2. The distributions of recombination rate of the studied devices (a) A (without any passivation) and (b) D (with ˚ 200 A-thickness emitter-ledge passivation).
˚ n-In0.49 Ga0.51 P (n = 3 × 1017 cm−3 ) emitter, a 550 A ˚ n+ -GaAs setback layer, a 400 A + 18 −3 + + ˚ (n = 4 × 10 cm ) subemitter, and a 200 A n -GaAs cap layer (n = 2 × 1019 cm−3 ). For comparison, six devices denoted A, B, C, D, E and F with different thickness t of emitterledge structure are employed in this work. The corresponding ledge thicknesses t for devices A, ˚ respectively. Experimentally, the device B, C, D, E, and F are 0, 60, 100, 200, 300 and 400 A, A was fabricated by traditional HBT processes including photolithography, vacuum evaporation and chemical wet selective etching without any ledge passivation. For other ledge passivated devices, the emitter-ledge structure was formed after emitter mesa etch. Then, the length and width of the emitter-ledge structure were defined by the emitter-ledge mesa pattern. The etching solutions of H3 PO4 ·H2 O2 ·H2 O = 1·1·20 and H3 PO4 ·HCl = 1·1 were used to etch the GaAs and In0.49 Ga0.51 P, respectively. The space between base contact and emitter ledge is 2 µm and the emitter area is 6 × 6 µm2 . 3. Results and discussion In order to study the recombination mechanism, the calculated two-dimensional distributed ˚ recombination rates of the studied devices A (without any passivation) and D (with 200 Athickness emitter-ledge passivation) are shown in Fig. 2. The bias voltages are fixed at VBE = 1.25 V and VCB = 0 V. For a traditional device, the highest recombination rate within device A is found as 1.45 × 1028 s−1 cm−3 revealed at the corner of exposed base surfaces (X = 3 µm). This position with highest recombination rate is generally due to the larger amount of accumulated electrons near potential saddle point [11]. For passivated devices, on the other hand, the highest recombination rate of device D is 2.96×1025 s−1 cm−3 revealed at X = 3.8 µm. The significantly smaller recombination rate of device D, as compared with the device A, is mainly caused by the use of emitter-ledge structure. In addition, the surface channel appeared from the potential saddle point distributed towards base contact within the surface-channel region. Part of the excess electrons will diffuse along the surface path from the emitter to base contact and therefore increase the recombination rate. Moreover, the effective surface recombination regions (defined
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Fig. 3. The relationships between the effective recombination region and emitter-ledge thickness t.
here as the surface channel wherein the recombination rate is larger than 1022 s−1 cm−3 ) are 0.75 and 0.4 µm for devices A and D, respectively. The relationships between the effective recombination region and emitter-ledge thickness t for studied devices are illustrated in Fig. 3. Obviously, the effective recombination regime of device A is remarkably higher than other devices. As the emitter-ledge thickness is between 100 ˚ (devices C and D), the relatively smaller effective recombination regime could be and 200 A obtained. This indicates that the surface-channel phenomenon can be effectively suppressed by using an appropriate emitter-ledge passivation. Fig. 4 demonstrates the relationship between the emitter-ledge thickness and the undepletion region length. As seen in the inset of Fig. 4, the depletion regions of emitter ledge contain two main parts, one is the surface depletion region and the other is the pn junction depletion region. The undepletion region acts substantially as a carrier travel path which increases the recombination rate. Therefore, the emitter-ledge thickness t is indeed a crucial factor that could mostly influence the recombination mechanism. Obviously, from Fig. 4, the undepleted region ˚ for devices B–F, respectively. For the thicker lengths of emitter ledge are 0, 0, 0, 75, and 125 A emitter ledge, such as devices E and F, an additional leakage path would be formed at the undepleted region. Thus, current will flow through the undepleted region, and then increase the recombination rate at the edge of emitter ledge. In contrast, for the thinner emitter ledge, such as device B, it may not effectively passivate the exposed base surface even though the band diagram is depletion. The comparisons of recombination rates along the cut line N–N0 (as seen in Fig. 1) of the studied devices are shown in Fig. 5. Obviously, as compared with other passivated devices, the device A shows the highest recombination rate at the edge of emitter sidewall (X = 3 µm). For the passivated devices (B–F), the suppression of surface recombination is caused by the use of emitter-ledge passivation on the exposed base surface. However, the undesired surface-channel phenomenon on the exposed base surface between base contact and emitter ledge is still found. The peak values of recombination rates are 1.45 × 1028 , 5.73 × 1025 , 2.57 × 1025 , 2.96 × 1025 ,
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Fig. 4. Undepletion ledge length as function of the emitter-ledge thickness.
Fig. 5. The distributions of recombination rates along the cut line N–N0 for the studied devices with different emitterledge thickness.
5.18 × 1025 , 1.76 × 1026 s−1 cm−3 for devices A–F, respectively. Therefore, from the above experimental results and theoretical considerations, the optimum ledge thickness is between 100 ˚ (devices C and D). and 200 A
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Fig. 6. The DC current gain β F versus emitter-ledge thickness t for simulated and experimental devices.
Fig. 6 shows the DC current gain β F versus emitter-ledge thickness t for simulated and experimental devices under different collector-current densities. The β F of experimental (simulated) devices A–F are 4.7 (9.8), 28.8 (39.9), 43.1 (62.9), 43.8 (62.6), 37.2 (50.5), and 32.1 (36.5) at collector current density of JC = 10−2 A/cm2 , respectively. It is clearly seen that the ˚ or higher than DC current gain β F drops when the emitter-ledge thickness t is lower than 100 A ˚ In addition, the simulated data agree well with experimentally measured results. This also 200 A. ˚ confirm that the optimum emitter-ledge thickness t of InGaP/GaAs HBT is 100–200 A. 4. Conclusion A comprehensive study of InGaP/GaAs HBTs with the different emitter-ledge thickness is implemented. It is shown that the undesired surface-channel phenomenon on the exposed base surface between the base contact and emitter ledge is still presented. The recombination rate is drastically increased at the surface channel. Moreover, an nonoptimal emitter ledge (i.e. thicker or thinner) results in the deterioration of device performance. Based on the theoretical analysis and experimental results, the surface-recombination effect of the device with emitter-ledge thickness ˚ is lower than that of other devices. Also, the device with the emitter-ledge thickness 100–200 A ˚ shows the best DC characteristics. Therefore, the optimum emitter-ledge thickness of 100–200 A ˚ of InGaP/GaAs HBT device is 100–200 A. Acknowledgments Part of this work was supported by the National Science Council of the Republic of China under Contract NSC-95-2221-E-006-434-MY2 and NSC-96-2221-E-197-022. References [1] W.S. Lour, IEEE Trans. Electron Devices 44 (1997) 346. [2] D.F. Guo, Solid State Electron. 41 (1997) 501.
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[3] J.Y. Chen, D.F. Guo, S.Y. Cheng, K.M. Lee, C.Y. Chen, H.M. Chuang, S.Y. Fu, W.C. Liu, IEEE Electron Device Lett. 25 (2004) 244. [4] S.Y. Cheng, J.Y. Chen, C.Y. Chen, H.M. Chuang, C.H. Yen, K.M. Lee, W.C. Liu, Semicond. Sci. Technol. 19 (2004) 351. [5] N. Hayama, K. Honjo, IEEE Electron Device Lett. 11 (1990) 388. [6] Y.S. Lin, Y.H. Wu, J.S. Su, W.C. Hsu, S.D. Ho, W. Lin, Jpn. J. Appl. Phys. 36 (1997) 2007. [7] W.S. Lour, J.L. Hsieh, Semicond. Sci. Technol. 13 (1998) 847. [8] C.Y. Chen, S.I Fu, S.Y. Cheng, C.Y. Chang, C.H. Tsai, C.H. Yen, S.F. Tsai, R.C. Liu, W.C. Liu, IEEE Trans. Electron Devices 51 (2004) 1963. [9] S.W. Tan, H.R. Chen, M.Y. Chu, W.T. Chen, A.H. Lin, M.K. Hsu, T.S. Lin, W.S. Lour, Superlatt. Microstruct. 37 (2005) 401. [10] S.I. Fu, S.Y. Cheng, T.P. Chen, P.H. Lai, C.W. Hung, K.Y. Chu, L.Y. Chen, W.C. Liu, IEEE Trans. Electron Devices 53 (2006) 2901. [11] S.I. Fu, R.C. Liu, S.Y. Cheng, P.H. Lai, Y.Y. Tsai, C.W. Hung, T.P. Chen, W.C. Liu, J. Vacuum Sci. Technol. B 25 (2007) 691. [12] S.Y. Cheng, Semicond. Sci. Technol. 17 (2002) 701. [13] S.Y. Cheng, Solid State Electron. 48 (2004) 1087.
Influence of emitter-ledge thickness on the surfacerecombination mechanism of InGaP/GaAs heterojunction bipolar transistor Kuei-Yi Chu a , Shiou-Ying Cheng b,∗ , Tzu-Pin Chen a , Ching-Wen Hung a , Li-Yang Chen a , Tsung-Han Tsai a , Wen-Chau Liu a,∗ , Lu-An Chen b a Institute of Microelectronics, Department of Electrical Engineering, National Cheng-Kung University, 1 University
Road, Tainan, 70101, Taiwan, ROC b Department of Electronic Engineering, Nation Ilan University, No.1, Sec.1, Shen-Lung Road, I-Lan,
26041, Taiwan, ROC Received 8 August 2007; received in revised form 16 December 2007; accepted 12 January 2008 Available online 4 March 2008
Abstract In this work, the characteristics of InGaP/GaAs heterojunction bipolar transistors (HBTs) with various emitter-ledge thicknesses are comprehensively studied and demonstrated. Based on the two-dimensional analysis, some important parameters such as the recombination rate and DC characteristics are studied. The simulated analyses are in good agreement with experimental results. It is known that better HBT performance, including lower recombination rate in the surface channel, and higher DC current gain are ˚ obtained in the studied devices with the emitter ledge thickness between 100 and 200 A. c 2008 Elsevier Ltd. All rights reserved.
Keywords: Emitter-ledge thickness; Recombination rate; DC current gain
1. Introduction Heterojunction bipolar transistors (HBTs) based on GaAs material system are attractive devices in applications to microwave power amplifiers and high-speed optical communication circuits due to their excellent DC and RF performance [1–4]. However, one major problem ∗ Corresponding author. Tel.: +886 3 935 7400 252, +886 6 275 7575 62354; fax: +886 3 936 9507, +886 6 209 4786.
E-mail addresses: [email protected] (S.-Y. Cheng), [email protected] (W.-C. Liu). c 2008 Elsevier Ltd. All rights reserved. 0749-6036/$ - see front matter doi:10.1016/j.spmi.2008.01.018
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369
Fig. 1. Schematic cross-section of the simulated device.
in the circuit applications is the current gain degradation with the decrease of emitter–base junction size, i.e. the emitter size effect [5]. It’s well known that the unpassivated GaAs surface is distracted by a high density of surface states. This causes the undesired pinning effect of surface Fermi level within the band gap of the semiconductor [6–9]. Many studies have been reported to solve this problem, such as emitter-ledge structure, sulphide-based chemical treatment and hydrogen plasma treatment [5–9]. Typically, the emitter- ledge structure is a simple method to decrease the surface recombination current and overcome the emitter-size effect [6,7]. Although, the emitter-ledge structure could improve part of HBT performance [9], the undesired surfacechannel phenomenon on the exposed base surface between the base contact and emitter ledge is still presented. In addition, if the emitter ledge is too thick, part of the electron current injecting from the emitter and travelling towards base, will flow through the undepleted ledge region. This certainly degrades the emitter size effect. In contrast, if the emitter ledge is too thin, it may not effectively passivate the surface [10,11]. Thus, the thickness of the emitter-ledge structure is a significant issue and should be carefully considered. In this work, a comprehensive investigation of InGaP/GaAs HBTs with various emitter-ledge thicknesses is implemented. The related recombination rates and DC characteristics of studied devices are demonstrated and studied. The theoretical analysis and simulations are made by using a two-dimensional simulator Atlas [12,13]. In addition, the corresponding experimental devices are fabricated and compared. The simulated data are in good agreement with measured results. 2. Model and device structure The schematic cross-section of a simulated device structure, symmetrical with respect to the centre line of emitter contact is shown in the Fig. 1. Basically, the studied devices consist of a ˚ n+ -GaAs (n+ = 4 × 1018 cm−3 ) subcollector, a 3000 A ˚ n− -GaAs (n− = 2 × 1016 cm−3 ) 5000 A + + 19 −3 ˚ p -GaAs (p = 2 × 10 cm ) base, a 50 A ˚ n-GaAs (n = 3 × 1017 cm−3 ) collector, a 1000 A
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Fig. 2. The distributions of recombination rate of the studied devices (a) A (without any passivation) and (b) D (with ˚ 200 A-thickness emitter-ledge passivation).
˚ n-In0.49 Ga0.51 P (n = 3 × 1017 cm−3 ) emitter, a 550 A ˚ n+ -GaAs setback layer, a 400 A + 18 −3 + + ˚ (n = 4 × 10 cm ) subemitter, and a 200 A n -GaAs cap layer (n = 2 × 1019 cm−3 ). For comparison, six devices denoted A, B, C, D, E and F with different thickness t of emitterledge structure are employed in this work. The corresponding ledge thicknesses t for devices A, ˚ respectively. Experimentally, the device B, C, D, E, and F are 0, 60, 100, 200, 300 and 400 A, A was fabricated by traditional HBT processes including photolithography, vacuum evaporation and chemical wet selective etching without any ledge passivation. For other ledge passivated devices, the emitter-ledge structure was formed after emitter mesa etch. Then, the length and width of the emitter-ledge structure were defined by the emitter-ledge mesa pattern. The etching solutions of H3 PO4 ·H2 O2 ·H2 O = 1·1·20 and H3 PO4 ·HCl = 1·1 were used to etch the GaAs and In0.49 Ga0.51 P, respectively. The space between base contact and emitter ledge is 2 µm and the emitter area is 6 × 6 µm2 . 3. Results and discussion In order to study the recombination mechanism, the calculated two-dimensional distributed ˚ recombination rates of the studied devices A (without any passivation) and D (with 200 Athickness emitter-ledge passivation) are shown in Fig. 2. The bias voltages are fixed at VBE = 1.25 V and VCB = 0 V. For a traditional device, the highest recombination rate within device A is found as 1.45 × 1028 s−1 cm−3 revealed at the corner of exposed base surfaces (X = 3 µm). This position with highest recombination rate is generally due to the larger amount of accumulated electrons near potential saddle point [11]. For passivated devices, on the other hand, the highest recombination rate of device D is 2.96×1025 s−1 cm−3 revealed at X = 3.8 µm. The significantly smaller recombination rate of device D, as compared with the device A, is mainly caused by the use of emitter-ledge structure. In addition, the surface channel appeared from the potential saddle point distributed towards base contact within the surface-channel region. Part of the excess electrons will diffuse along the surface path from the emitter to base contact and therefore increase the recombination rate. Moreover, the effective surface recombination regions (defined
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371
Fig. 3. The relationships between the effective recombination region and emitter-ledge thickness t.
here as the surface channel wherein the recombination rate is larger than 1022 s−1 cm−3 ) are 0.75 and 0.4 µm for devices A and D, respectively. The relationships between the effective recombination region and emitter-ledge thickness t for studied devices are illustrated in Fig. 3. Obviously, the effective recombination regime of device A is remarkably higher than other devices. As the emitter-ledge thickness is between 100 ˚ (devices C and D), the relatively smaller effective recombination regime could be and 200 A obtained. This indicates that the surface-channel phenomenon can be effectively suppressed by using an appropriate emitter-ledge passivation. Fig. 4 demonstrates the relationship between the emitter-ledge thickness and the undepletion region length. As seen in the inset of Fig. 4, the depletion regions of emitter ledge contain two main parts, one is the surface depletion region and the other is the pn junction depletion region. The undepletion region acts substantially as a carrier travel path which increases the recombination rate. Therefore, the emitter-ledge thickness t is indeed a crucial factor that could mostly influence the recombination mechanism. Obviously, from Fig. 4, the undepleted region ˚ for devices B–F, respectively. For the thicker lengths of emitter ledge are 0, 0, 0, 75, and 125 A emitter ledge, such as devices E and F, an additional leakage path would be formed at the undepleted region. Thus, current will flow through the undepleted region, and then increase the recombination rate at the edge of emitter ledge. In contrast, for the thinner emitter ledge, such as device B, it may not effectively passivate the exposed base surface even though the band diagram is depletion. The comparisons of recombination rates along the cut line N–N0 (as seen in Fig. 1) of the studied devices are shown in Fig. 5. Obviously, as compared with other passivated devices, the device A shows the highest recombination rate at the edge of emitter sidewall (X = 3 µm). For the passivated devices (B–F), the suppression of surface recombination is caused by the use of emitter-ledge passivation on the exposed base surface. However, the undesired surface-channel phenomenon on the exposed base surface between base contact and emitter ledge is still found. The peak values of recombination rates are 1.45 × 1028 , 5.73 × 1025 , 2.57 × 1025 , 2.96 × 1025 ,
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Fig. 4. Undepletion ledge length as function of the emitter-ledge thickness.
Fig. 5. The distributions of recombination rates along the cut line N–N0 for the studied devices with different emitterledge thickness.
5.18 × 1025 , 1.76 × 1026 s−1 cm−3 for devices A–F, respectively. Therefore, from the above experimental results and theoretical considerations, the optimum ledge thickness is between 100 ˚ (devices C and D). and 200 A
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Fig. 6. The DC current gain β F versus emitter-ledge thickness t for simulated and experimental devices.
Fig. 6 shows the DC current gain β F versus emitter-ledge thickness t for simulated and experimental devices under different collector-current densities. The β F of experimental (simulated) devices A–F are 4.7 (9.8), 28.8 (39.9), 43.1 (62.9), 43.8 (62.6), 37.2 (50.5), and 32.1 (36.5) at collector current density of JC = 10−2 A/cm2 , respectively. It is clearly seen that the ˚ or higher than DC current gain β F drops when the emitter-ledge thickness t is lower than 100 A ˚ In addition, the simulated data agree well with experimentally measured results. This also 200 A. ˚ confirm that the optimum emitter-ledge thickness t of InGaP/GaAs HBT is 100–200 A. 4. Conclusion A comprehensive study of InGaP/GaAs HBTs with the different emitter-ledge thickness is implemented. It is shown that the undesired surface-channel phenomenon on the exposed base surface between the base contact and emitter ledge is still presented. The recombination rate is drastically increased at the surface channel. Moreover, an nonoptimal emitter ledge (i.e. thicker or thinner) results in the deterioration of device performance. Based on the theoretical analysis and experimental results, the surface-recombination effect of the device with emitter-ledge thickness ˚ is lower than that of other devices. Also, the device with the emitter-ledge thickness 100–200 A ˚ shows the best DC characteristics. Therefore, the optimum emitter-ledge thickness of 100–200 A ˚ of InGaP/GaAs HBT device is 100–200 A. Acknowledgments Part of this work was supported by the National Science Council of the Republic of China under Contract NSC-95-2221-E-006-434-MY2 and NSC-96-2221-E-197-022. References [1] W.S. Lour, IEEE Trans. Electron Devices 44 (1997) 346. [2] D.F. Guo, Solid State Electron. 41 (1997) 501.
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[3] J.Y. Chen, D.F. Guo, S.Y. Cheng, K.M. Lee, C.Y. Chen, H.M. Chuang, S.Y. Fu, W.C. Liu, IEEE Electron Device Lett. 25 (2004) 244. [4] S.Y. Cheng, J.Y. Chen, C.Y. Chen, H.M. Chuang, C.H. Yen, K.M. Lee, W.C. Liu, Semicond. Sci. Technol. 19 (2004) 351. [5] N. Hayama, K. Honjo, IEEE Electron Device Lett. 11 (1990) 388. [6] Y.S. Lin, Y.H. Wu, J.S. Su, W.C. Hsu, S.D. Ho, W. Lin, Jpn. J. Appl. Phys. 36 (1997) 2007. [7] W.S. Lour, J.L. Hsieh, Semicond. Sci. Technol. 13 (1998) 847. [8] C.Y. Chen, S.I Fu, S.Y. Cheng, C.Y. Chang, C.H. Tsai, C.H. Yen, S.F. Tsai, R.C. Liu, W.C. Liu, IEEE Trans. Electron Devices 51 (2004) 1963. [9] S.W. Tan, H.R. Chen, M.Y. Chu, W.T. Chen, A.H. Lin, M.K. Hsu, T.S. Lin, W.S. Lour, Superlatt. Microstruct. 37 (2005) 401. [10] S.I. Fu, S.Y. Cheng, T.P. Chen, P.H. Lai, C.W. Hung, K.Y. Chu, L.Y. Chen, W.C. Liu, IEEE Trans. Electron Devices 53 (2006) 2901. [11] S.I. Fu, R.C. Liu, S.Y. Cheng, P.H. Lai, Y.Y. Tsai, C.W. Hung, T.P. Chen, W.C. Liu, J. Vacuum Sci. Technol. B 25 (2007) 691. [12] S.Y. Cheng, Semicond. Sci. Technol. 17 (2002) 701. [13] S.Y. Cheng, Solid State Electron. 48 (2004) 1087.