Inspection strategies for IX-reticles

Inspection strategies for IX-reticles

World Abstracts on Microelectronics and Reliability steps associated with device fabrication include CF4, CF,,/O2, SF6, CC14, and to a lesser extent N...

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World Abstracts on Microelectronics and Reliability steps associated with device fabrication include CF4, CF,,/O2, SF6, CC14, and to a lesser extent NF 3. It is this gas, NF 3, which is the topic of this article. The review presents a synopsis of the etching characteristics of material such as Si, SIO2, in NF3 plasmas.

Trends in automated diffusion furnace systems for large wafers. JOSEPH C. MALIAKAL,DANIEL J. FISCHER, JR. and ARTHUR WAUGH. Solid St. Technol. 105 (December 1984). With the advent of 6 in. and larger wafer diameters, furnace process control parameters will become more and more critical. A five-zone, 10.5 in. working diameter, 40 in. flat zone furnace is described. Temperature profiling is superior to that of conventional three-zone systems. A modular approach to automation is utilized. Design for the reduction of particulate contamination is discussed. Purification of deionized water by oxidation with ozone. CARL NEBEL and WILLIAM W. NEZGOD. Solid St. Yechnol. 185 (October 1984). Deionized water and its distribution piping become laden with microbes which grow in the granular activated carbon and deionizing beds. When semiconductors are processed with deionized water which contains microbes, circuit defects can occur. Ozone dissolved in water oxidizes the microbes and organic materials of which they are composed. Ozone also simultaneously sanitizes the distribution piping. Dissolved ozone is removed from water by irradiation with ultraviolet light prior to use. This process decomposes the ozone to oxygen. Used deionized water can also be reclaimed because ozone can be employed to oxidize the dissolved organic materials which originated in the manufacturing process. The economics of water reclamation are more attractive than the initial production of deionized water. Reduction lenses for submicron lithography. TAKASHIOMATA. Solid St. Technol. 173 (September 1984). The performance of numerical aperture (NA) 0.35 reduction lenses is reported. Problems associated with higher resolution reduction lenses are discussed. The optimization of NA for the ideal lens is studied with the SAMPLE program in order to calculate linewidth variation as a function of defocus and exposure. Discussed here are the performance of NA 0.45 lenses, a reduction lens for the shorter wavelengths, and the reduction of image contrast due to chromatic aberration. Alternatives to furnace annealing. RON ISCOFF.Semiconductor Int. 78 (May 1985). While diffusion furnaces will continue to dominate wafer annealing into the forseeable future, other sources may soon jump from pilot line to production line. Damage effects in dry etching. S. J. FONASH.Solid St. Technol. 201 (April 1985). Damage to semiconductors and insulators from directional dry etching can take the form of intrinsic bonding damage, impurity and etching-ion permeation, and coating residue or film formation. It can manifest itself in modified structural, chemical and electrical properties. Successful approaches to coping with this damage have focused to-date on liquid-based clean-up procedures, wet chemistry, or furnace annealing. Clearly, elevated temperature furnace annealing and wet clean-up procedures will be more difficult to tolerate in future device fabrication. Consequently, interest is turning to other approaches. Among these are isotropic (non-directional) dry etching for removal of residue, permeated layers, and bonding damage layers and rapid thermal annealing for removal of bonding damage. SMIF technology reduces clean room requirements. MIHIR PARIKH and ANTHONY C. BONORA. Semiconductor Int. 222 (May 1985). The standard mechanical interface (SMIF) technology developed by Hewlett-Packard can reduce the stringent requirements of today's clean rooms.

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Layer to layer interconnections: impact on VLSI circuits. H. B. HARRISON, G. SAbHALASZand G. K. REEVES.Semiconductor Int. 240 (April 1985). Interconnection parasitics are becoming more important in the final performance of integrated circuits. If the area of the interconnect is not to be sacrificed, the most dominant parameter to be reduced is the specific contact resistance. The work center works for wafer lab. NICK SABOand JERRY SECREST. Semiconductor Int. 194 (May 1985). A solution to the search for more efficient wafer production may well lie with the work center concept. Annealing and diffusion of fine geometry CMOS technologies. D. J. GODREY.Semiconductor Int. 216 (April 1985). With the appropriate choice of processing parameters, it is possible to approach the requirements for scaling of MOS transistors in the formation of n ÷ source/drain regions, p+ source/drain regions and shallow p-wells. Designing an advanced copper-alloy leadframe material. YOUNG G. KIM and CHUNG RYU. Semiconductor Int. 250 (April 1985). Copper-based alloy meets physical and electrical requirements being demanded for leadframes in plastic dual in-line packages. Evaluating low-particulate chemicals. DONALD W. JOHNSON. Semiconductor Int. 168 (April 1985). "Superclean" liquid chemicals figure prominently in the yields of VLSI semiconductor production. X-ray lithography and mask technology. PIETERBURGGRAAF. Semiconductor Int. 92 (April 1985). Mastery of X-ray mask technology is a key in the eventual production use of X-ray lithography. Inspection strategies for IX-reticles. GEORGEW. BROOKSand LARRY S. ZUgBRICK. Semiconductor Int. 80 (April 1985). Modeling of the best manufacturing sequence for inspection and qualification of 1X reticles.

Manufacturing one micron. ROBERT CARLSON. Solid St. Technol. 141 (January 1985). The operation of 10:1 wafer steppers in a line processing both bipolar and MOS circuits is discussed. One micrometer features are achieved with an alignment accuracy of better than 0.15 #m on 10 x systems and better than 0.2/~m when the steppers are operated in a mixed mode with 1 x systems. Gallium arsenide digital IC processing--~l manufacturing perspective. AJIT G. RODE and J. GORDON ROPER. Solid St. Technol. 209 (February 1985). The high speed properties of GaAs were first demonstrated in 1974. Since that time, GaAs digital IC technology has undergone a transition from being a lab curiosity to being a practical and manufacturable technology with a well defined marketplace. Today LSI level GaAs ICs can be fabricated and VLSI structures are being worked on. This article describes various digital IC processing technologies and discusses typical applications and results. Manufacturing considerations for GaAs IC facilities and processing equipment are also discussed. Pellicles 1985: an update. RON ISCOFE.Semiconductor Int. 110 (April 1985). The thin, transparent photomask and reticle covers known as pellicles have expanded from limited experimental use to full production line acceptance as a proven way to improve die yield. Manufacturing technology for GaAs monolithic microwave integrated circuits. T. ANDRADE. Solid St. Technol. 199 (February 1985). Gallium arsenide monolithic microwave integrated circuit technology represents a natural extension of discrete GaAs metal-semiconductor field effect transistor