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Insulated-gate field-effect transistor using single crystal cadmium sulfide
182 Solid-State
NOTES Electronics Pergamon Press 1966. p. 182. Printed in Great Britain
Vol. 9,
Insulated-gate field-effect transistor using single crystal cadmium sulfide* (Received
27 July 1965; in revisedform
15 September
1965)
METAL-OXIDE-SEMICONDUCTOR (MOS) transistors have been constructed in this laboratory on prepared substrates of high resistivity, single-crystal cadmium sulfide. The transconductance, output conductance, gate-source and gate-drain capacitances for these devices were of the same general magnitudes as were obtained on deposited polycrystalline CdS thin-film transistors (TFT’s) of similar dimensions. The transconductance values were as high as 1000 p mho for a 20 p channel and roughly a 500-A thick deposited SiO insulating film. Initial tests indicate, however, that the drain current-drain voltage characteristics of the singlecrystal CdS MOS transistor are less temperature sensitive than are the characteristics of deposited, polycrystalline, thin-film, CdS devices (TFT’s). In both single crystal and thin-film transistors, the oxide layer and electrodes are vacuum deposited using similar procedures. The large difference in the temperature stabilities of the two types of devices indicates that the source of the temperature dependence lies in the deposited, thin-film nature of the semiconductor layer. The single-crystal MOS transistors are prepared with high-purity, hexagonal-phase CdS (resistivity m 105 Q-cm) obtained from the Eagle Picher Co. The ingot is sliced into pieces approximately 2 mm thick, and with a cross-sectional area of about 15 mmz. The crystal is cut such that the c-axis is normal to the large face of the slice. The crystal is then imbedded in epoxy resin to permit easy handling. The imbedded crystal is abraded to remove the epoxy from a face normal to the c-axis and then polished successively with 6-p and a-p diamond paste. The surface is then cleaned with a detergent and rinsed with deionized water. To remove surface damage and to obtain ohmic contact, the crystal is lightly etched with hydrochloric acid, rinsed and blown dry with dry nitrogen. The crystal, still imbedded in epoxy, is * The research
herein was sponsored by the U.S. Army Research Office-Durham under Contract DA-31-124-ARO-D-385.
mounted on a glass microscope slide for convenient handling in the vacuum system. Before the source and drain electrodes are deposited, the crystal is ion-bombarded in a glow discharge. Aluminium source and drain electrodes are then evaporated. This step is followed by the successive depositions of an insulating layer of SiO and of the aluminium gate electrodes. The devices were not encapsulated, and the electrical tests described were performed in air. A photograph of the completed transistor, of which four were fabricated, is shown in Fig. 1. Typical electrical characteristics of a thin-film transistor and a single crystal transistor at 23°C are shown in Figs. 2(a) and 3(a) respectively. The electrical characteristics at 120°C for the two transistors are shown in Figs. 2(b) and 3(b). It should be noted that the thin-film transistor characteristics are appreciably degraded at 120°C. Although some recovery in the characteristic occurs upon cooling from this temperature, most of the degradation is permanent. The electrical characteristics of the single-crystal transistor are reduced by less than 10 per cent from their roomtemperature values at temperatures as high as 160°C. In contrast to the behaviour of the film devices, this reduction disappears upon cooling. The maximum temperature attained in the tests was limited by the silver paint used to fasten electrical leads to the single-crystal unit. The apparent deviation from an ohmic source at high temperatures, which is evident in the characteristic by a reduction in the Id-Vd slope near I’d = 0, appears to result from the silver-paint connection. The hysteresis in the characteristics, which also may be due to non-ohmic connexions, was variable in magnitude from device to device and not apparent in the characteristics of one of the four devices studied. The single-crystal, CdS-MOS transistor is a valuable aid for investigating the operating mechanisms of field-effect transistors. Further study and correlation of its performance with that of deposited devices is now in progress. J. CONRAGAN R. S. MULLER Electronics Research Laboratory, Department of Electrical Engineering, University of California, Berkeley, California
NOTES Electronics Pergamon Press 1966. p. 182. Printed in Great Britain
Vol. 9,
Insulated-gate field-effect transistor using single crystal cadmium sulfide* (Received
27 July 1965; in revisedform
15 September
1965)
METAL-OXIDE-SEMICONDUCTOR (MOS) transistors have been constructed in this laboratory on prepared substrates of high resistivity, single-crystal cadmium sulfide. The transconductance, output conductance, gate-source and gate-drain capacitances for these devices were of the same general magnitudes as were obtained on deposited polycrystalline CdS thin-film transistors (TFT’s) of similar dimensions. The transconductance values were as high as 1000 p mho for a 20 p channel and roughly a 500-A thick deposited SiO insulating film. Initial tests indicate, however, that the drain current-drain voltage characteristics of the singlecrystal CdS MOS transistor are less temperature sensitive than are the characteristics of deposited, polycrystalline, thin-film, CdS devices (TFT’s). In both single crystal and thin-film transistors, the oxide layer and electrodes are vacuum deposited using similar procedures. The large difference in the temperature stabilities of the two types of devices indicates that the source of the temperature dependence lies in the deposited, thin-film nature of the semiconductor layer. The single-crystal MOS transistors are prepared with high-purity, hexagonal-phase CdS (resistivity m 105 Q-cm) obtained from the Eagle Picher Co. The ingot is sliced into pieces approximately 2 mm thick, and with a cross-sectional area of about 15 mmz. The crystal is cut such that the c-axis is normal to the large face of the slice. The crystal is then imbedded in epoxy resin to permit easy handling. The imbedded crystal is abraded to remove the epoxy from a face normal to the c-axis and then polished successively with 6-p and a-p diamond paste. The surface is then cleaned with a detergent and rinsed with deionized water. To remove surface damage and to obtain ohmic contact, the crystal is lightly etched with hydrochloric acid, rinsed and blown dry with dry nitrogen. The crystal, still imbedded in epoxy, is * The research
herein was sponsored by the U.S. Army Research Office-Durham under Contract DA-31-124-ARO-D-385.
mounted on a glass microscope slide for convenient handling in the vacuum system. Before the source and drain electrodes are deposited, the crystal is ion-bombarded in a glow discharge. Aluminium source and drain electrodes are then evaporated. This step is followed by the successive depositions of an insulating layer of SiO and of the aluminium gate electrodes. The devices were not encapsulated, and the electrical tests described were performed in air. A photograph of the completed transistor, of which four were fabricated, is shown in Fig. 1. Typical electrical characteristics of a thin-film transistor and a single crystal transistor at 23°C are shown in Figs. 2(a) and 3(a) respectively. The electrical characteristics at 120°C for the two transistors are shown in Figs. 2(b) and 3(b). It should be noted that the thin-film transistor characteristics are appreciably degraded at 120°C. Although some recovery in the characteristic occurs upon cooling from this temperature, most of the degradation is permanent. The electrical characteristics of the single-crystal transistor are reduced by less than 10 per cent from their roomtemperature values at temperatures as high as 160°C. In contrast to the behaviour of the film devices, this reduction disappears upon cooling. The maximum temperature attained in the tests was limited by the silver paint used to fasten electrical leads to the single-crystal unit. The apparent deviation from an ohmic source at high temperatures, which is evident in the characteristic by a reduction in the Id-Vd slope near I’d = 0, appears to result from the silver-paint connection. The hysteresis in the characteristics, which also may be due to non-ohmic connexions, was variable in magnitude from device to device and not apparent in the characteristics of one of the four devices studied. The single-crystal, CdS-MOS transistor is a valuable aid for investigating the operating mechanisms of field-effect transistors. Further study and correlation of its performance with that of deposited devices is now in progress. J. CONRAGAN R. S. MULLER Electronics Research Laboratory, Department of Electrical Engineering, University of California, Berkeley, California