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Investigation on the effect of external mechanical stress on the DC characteristics of GaAs microwave devices
Microelectronics Reliability 55 (2015) 1697–1702
Contents lists available at ScienceDirect
Microelectronics Reliability journal homepage: www.elsevier.com/locate/mr
Investigation on the effect of external mechanical stress on the DC characteristics of GaAs microwave devices K. Adokanou a,b,⁎, K. Inal a, P. Montmitonnet a, F. Pressecq b, B. Bonnet c, J.-L. Muraro c a b c
CEMEF MINES ParisTech, PSL Research University, Sophia-Antipolis, France Centre National d'Etudes Spatiales, Toulouse, France Thales Alenia Space, Toulouse, France
a r t i c l e
i n f o
Article history: Received 24 May 2015 Received in revised form 20 June 2015 Accepted 21 June 2015 Available online 30 June 2015 Keywords: Bending Uniform in-plane stress Microwave Gallium Arsenide Piezoelectric effect Packaging Reliability
a b s t r a c t Stress control is a main factor in the operation, performance and reliability of GaAs devices. A precise understanding of the impact of the mechanical stress on the performance and reliability of GaAs devices can lead to the improvement of the device design and packaging. Most of the time, process flow parameter modifications help to change internal stress in multilayer properties and this has a direct impact on the electric parameters. Mechanical wafer bending is the method usually used to investigate the effects of external stress on Gallium Arsenide (GaAs) devices. The aim of this work is to quantify the sensibility of GaAs microwave devices used for Space applications under mechanical external stress in order to estimate the impact of packaging. In this innovative work, a bending-bybuckling system has been used to apply external mechanical stress on a single GaAs microwave die. To evaluate the value of this stress in device structure and precisely near the channel of the pseudomorphic High Electron Mobility Transistor (pHEMT), simulation based on the Finite Element Method has been carried out. The stress was increased gradually from 0 to ~210 MPa (in tension and compression) and then reduced from ~210 MPa to 0. The experimental results demonstrate that the threshold current changes linearly and reversibly in the range of the applied stress. The shift in the threshold current and voltage of the pHEMT was analysed by considering piezoelectric effects. © 2015 Elsevier Ltd. All rights reserved.
1. Introduction GaAs-based devices such as Monolithic Microwave Integrated Circuits (MMIC) with pseudomorphic High Electron Mobility Transistor (pHEMT) are often used for specific applications including low noise amplifier, radar, fibre optic data transmission systems [1]. The device structure consists of very thin active layer GaInAs epitaxially grown on Gallium Arsenide (GaAs) substrate, thin film metallic gates and insulating/passivating films. According to the deposition conditions, there usually exist residual stresses in the thin films and layers due to the lattice and thermal mismatch between epilayer and substrate [2]. Stress can also be introduced during the packaging processes or during operation due to differences in the thermal expansion coefficient (CTE) [3]. Previous investigation has revealed that microwave devices are sensitive to thermal stress due to testing at elevated temperature [4]. Therefore, for the GaAs microwave device, it is desirable to study the effect of an external mechanical stress on its properties for example the DC characteristics for a better understanding of the device performance. Indeed residual stress may be varied using several process parameters ⁎ Corresponding author at: CEMEF MINES ParisTech, PSL Research University, SophiaAntipolis, France. E-mail address: [email protected] (K. Adokanou).
http://dx.doi.org/10.1016/j.microrel.2015.06.033 0026-2714/© 2015 Elsevier Ltd. All rights reserved.
such as deposition temperature, pressure, gas nature or etch rate. However fabricating a number of different wafers for a complete design of experiments would be too expensive and not sensible for an investigation. Furthermore it is difficult to accurately quantify the amount of the residual stress present in the device. Also, modifying the process flow to alter the internal stresses in the dice can impact other characteristics [5–7] (energy band, wavelength, DC characteristics, RF measurements…). Therefore, applying known external stress by e.g. mechanical bending is a good solution to perform controlled stress experiments. Mechanical wafer bending is a simple and cost-effective way to investigate the underlying physics of stress in semi-conductors [1]. Several methods have been used to externally apply mechanical stress to semi-conductors. The first piezoresistance measurements by Smith [8] were achieved in 1954 by hanging weight from slabs of semi-conductors. This method requires large samples and was very limited. Year after year, cantilever bending systems have been developed and often used in microelectromechanical system (MEMS) for transducer and resonant applications. Four point bending systems improves significantly the stress homogeneity constant between the two internal rollers. Thus recently H. Zhu et al. [9] have applied four-point bending approach to GaAs single quantum well laser diode. However, whatever the configuration, it is difficult to apply a uniform stress, either in the plane or out of the plane, to a single die a few millimetres long. All these methods require
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K. Adokanou et al. / Microelectronics Reliability 55 (2015) 1697–1702
special equipment (displacement and force sensors…) associated with characterisation bench but they are limited in some cases by the lack of free area left for die surface observation. In this work, we quantify the sensitivity of GaAs MMIC dice under external mechanical stress. By using a buckling system (Section 2), a uniform in-plane stress (either tensile or compressive) can be applied to the microwave device active surface (Section 3). The change of DC characteristics has thus been investigated (Section 4). 2. Experiments In this section, experimental conditions are detailed from the sample preparation to set-up measurements on bench test. 2.1. Specimens The GaAs MMIC used for this study include two 0.18 μm pseudomorphic High Electron Mobility Transistor (pHEMT) and SiNy/SiOy/SiNx Metal-Insulator-Metal (MIM) with a silicon nitride (SiNx) passivation layer. The active components are based on GaAlAs/GaInAs/GaAs heterostructure of few nm thick grown by Metal Organic Vapour Phase Epitaxy (MOVPE) on (100) GaAs substrates. The die dimensions are ~100 μm (thickness) × 2000 μm (width) × 3000 μm (length). The stress is applied to the die using a buckling system shown in Fig. 1. Because of the small size of the die (few mm), it was bonded on a Printed Circuit Board (PCB as a flexible support): designed with some electrical lines in other to ensure electrical connection for measurements. The PCB dimensions are 0.4 mm (thickness) × 6 mm (width) × 30 mm (length).
SiNx GaAs Die-attach
PCB Fig. 2. Sample buckling setup 3D modelling with Abaqus CAE software and a zoom on the stack of the die.
2.2. Buckling system and test bench The buckling system (see Fig. 1) consists of two grooved plates in which the PCB support is slid, then electric connections are made. One plate is fixed and the other can be moved in x direction thanks to the micrometre. The in-plane stress applied results in bending by buckling mechanism. In our experiment, the critical x displacement level we apply must be less than 400 μm for the fear of die break. An initial orientation in y direction is necessary to select the tensile or compressive buckling modes. The micrometre provides smooth and accurate motion. The displacement is increased from 0 to 400 μm in 4 steps. For both tensile and compressive mode, a complete cycle has been performed (from 0 to 400 μm back to 0). The advantage of this method is the uniformity of the applied stress (better than 3 points bending) without the need for tools, as in four point bending. For characterisation, load pull measurements can easily be avoided to connectors use. Moreover, it needs less equipment. The active parts of the chip are located near its centre and the die is well bonded at the centre of the PCB support. Hence, the applied stress in the active layer and in the active Electric connections
Sample Fix plate
Load plate with a micrometer
parts is verified to be uniform and in-plane (see Fig. 3). The grooved plates are supposed to ensure only one degree of freedom: z axis rotation. The DC measurements have been performed with HP 4155 Semiconductor Parameter Analyser (SPA). For electrical characterisation of the pHEMT, drain voltage has been changed gradually from 0 to 3 V, gate voltage from −2 to 0.25 V corresponding to the limits of the foundry datasheet in DC characterisation. Only drain and gate currents have been measured. For both tensile and compressive mode, stress has been increased then decreased and measurements have been made at each step. The estimated mechanical stress is evaluated in the coming paragraph.
3. Simulation of sample buckling This section focuses on the stress evaluation and it is made not at the top of the flexural support but precisely at the top surface of the GaAs substrate which is obviously the active layer position: heterostructure GaAlAs/GaInAs/GaAs is few nm thick compared with the 100 μm substrate. The stress distribution has been estimated with numerical simulation tools from Abaqus Standard® FEM software. A structured mesh composed of linear elements has been built and the contacts are assumed to be tie elements. Only applied mechanical stress are
Table 1 [2] Layers material properties and thickness.
Fig. 1. The sketch of the buckling test bench.
PCB Die-attach GaAs SiNx
Young's modulus (GPa)
Poisson's ratio
Thickness (μm)
25.8 7.9 85.5 150
0.3 0.3 0.31 0.3
400 10 100 0.15
K. Adokanou et al. / Microelectronics Reliability 55 (2015) 1697–1702
1699
a) Tensile loading
b) Compressive loading
Fig. 3. Details of stress distribution of σxx at the die surface. The stars on the figures indicate the position of pHEMT.
shown in this paper, it can simply be added to any unknown initial residual stress.
mode, is explained by the non-similarity of the two loadings and the sample structure.
3.1. The numerical model
4. Results: electrical measurements
In order to calculate stresses, 3D model representing the complete dimensions and thicknesses of the real sample has been performed. The numerical model of the die is a bilayer of GaAs/SiNx with thickness of 100 μm and 0.15 μm respectively (see Fig. 2). The chip is stuck on the flexible support with a 10 μm layer of die-attach [4]. Material properties and layer thickness are resumed in Table 1.
In this section, two main DC characterisations have been carried out: threshold voltage (VTH) and the threshold current (IDSS): the threshold
As shown in Fig. 3, the applied stress distribution is estimated in both tensile and compressive case. σxx stress is presented for the maximum displacement of 400 μm in x direction. pHEMTs are represented in Fig. 3 by stars. In Fig. 4, the maximal value of estimated stress in active layer is plotted as function of loading plate displacement. By 4 steps from 0 to 400 μm, stress changes from 0 to ± 210 MPa. Moreover the pHEMTs are in the uniform areas for both tensile and compressive case. The small shift in the drafts for tensile and compression
|Estimated sress(MPa)|
3.2. Stress distribution
Tension
Compression
250 200
150 100 50
0 0
0,1
0,2
0,3
0,4
Load backing displacement in x axis (mm) Fig. 4. Absolute value of estimated mechanical maximum stress σxx in the active layer as a function of loading plate displacement.
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4.2. DC characteristics change
Table 2 Setup DC characteristic error estimation in %. Characteristics
Voltage
No stress
Applied stress
Threshold voltage Threshold current
VDS = 3 V VDS = 3 V/VGS = 0 V
0.095% 0.015%
0.115% 0.096%
For each step (increasing and decreasing) in tension and compression mode on the same sample, DC measurements have been made as mentioned in Section 2.2. The applied stress varies between 0 and ± 210 MPa and results are shown in the following figures. Figs. 5–7 show respectively the change of drain and gate current when drain and gate voltage vary, at different levels of tensile or compressive stress. The zooms on the right show clearly the impact of stress and the good symmetry between tension and compression. For all the graphs (see Fig. 5), it is clearly evident that compression allows higher current density in the gate and the drain whereas tensile stress hinders electron flow in the channel. The change of the threshold voltage and the threshold current of the die pHEMT is plotted in Figs. 8 and 9. For the present devices, the gate orientation is parallel to x, the loading direction. The threshold voltage VTH increases by +2.51% under a tensile stress of +210 MPa and decreases by about −2.31% at a compressive stress of −210 MPa. The threshold current IDSS also increases by −1.59% under a tensile stress of +210 MPa and decreases by about +1.86% at a compressive stress of −210 MPa.
voltage has been calculated with the transconductance gm (see Eq. (1)) for drain voltage VDS = 3 V; and the threshold current corresponds to the drain current IDS for the drain voltage fixed at 3 V and a gate voltage fixed at 0 V. First, the error estimation in measurement has been made and secondly testing results are presented.
gm ¼
ΔIDS ΔV VG
ð1Þ
4.1. Error estimation of the set-up measurement
5. Discussion In non-controlled environments, stress always has some influence on microelectronic device characteristics be it mechanical, thermal [4,10], and hydro-mechanical. C-T. Chang et al. [11] show that the magnitude of the change in the current density depends on the gate orientation in HEMT under uniaxial stress. In our case, the gate finger orientation is parallel to the loading direction therefore there is a linearity in our results. Tests performed on the buckling system (see Fig. 1) show a good linearity of the gate and drain currents, threshold voltage and threshold current as a function of applied stress (tensile as well as compressive). In the literature, similar results of 1.5% variation of normalised IDSS (drain current at zero bias) have been obtained for GaN pHEMT devices
0,05
0,047
σ=210MPa
0,04
0,046
σ=175MPa
Drain current (A)
Drain current (A)
The error estimation of the set-up measurement is a first and important step for testing and also a reference for the real buckling testing result analysis. It has been made for two sample configurations: no stress and applied stress estimated at +140 MPa. In the no stress case, seven measurement steps of 5 min have been made whereas with stress seven measurement steps of 24 h have been made. Error estimations are resumed in Table 2. As shown in Table 2, error increases with the applied stress and its very low changes (b0.12%). Potential variation due to the PCB or the glue is expected but even under load for several hours, the changes are random, not linear. These results confirm the high stability of the measurements set-up and the system material choice. These error values help to estimate the significance of a change during all the experiments to come. A change above this error range is supposed to come from the external mechanical applied stress. The error estimation of the loading plate displacement is evaluated at 3 μm.
0,03 0,02 0,01
σ=140MPa 0,045
σ=90MPa
0,044
σ=-0MPa σ=-90MPa
0,043
σ=-140MPa
0,042
0
σ=-175MPa σ=-210MPa
0,041 1
2
3
2
2,2
Drain voltage (V)
2,4
2,6
2,8
3
Drain voltage (V)
Fig. 5. Drain current as a function of drain voltage for a fixed gate voltage VGS = 0 V.
2,0E-04
1,0E-02
σ=210MPa σ=175MPa
Drain current (A)
Drain current (A)
1,0E-01
1,0E-03 1,0E-04
σ=140MPa σ=90MPa σ=-0MPa σ=-90MPa σ=-140MPa
1,0E-05
σ=-175MPa
1,0E-06
σ=-210MPa
2,0E-05 -2
-1,5
-1
-0,5
Gate voltage (V)
0
-1
-0,98 -0,96 -0,94 -0,92 -0,9 Gate voltage (V)
Fig. 6. Drain current as function of gate voltage for a fixed drain voltage VDS = 3 V.
K. Adokanou et al. / Microelectronics Reliability 55 (2015) 1697–1702
6,0E-07
σ=210MPa σ=175MPa
Gate current (A)
Gat e current (A)
1,0E-05
1701
1,0E-06
1,0E-07
σ=140MPa σ=90MPa σ=-0MPa σ=-90MPa σ=-140MPa
1,0E-08
σ=-175MPa 1,0E-09 -2
-1,5
-1
-0,5
0
3,0E-08 -0,75
σ=-210MPa -0,7
-0,65
Gate voltage (V)
Gate voltage (V)
Fig. 7. Gate current as function of gate voltage for a fixed drain voltage VDS = 0 V.
under three-points bending configuration [11] and up to 10% variation for VTH for AlGaAs/GaAs single quantum well laser diodes [9] with four-point bending system. These current variations and DC characteristics change the result from the piezoelectric effects and changes in electron mobility due to the applied stress [11]. These piezoelectric effects on GaAs devices were commonly used for many applications [12,13] in sensors and performing gauges [14]. For other applications such as packaging, perform such a test helps to quantify the stress induced by packaging and relate it to DC characteristics changes. A. Ivankovic et al.[15] have made four-point testing on IC devices to quantify the impact of assembly processes on the current in the FET. These approaches are very sensible for an investigation because of their great versatility in terms of analysis and evaluated
Tension, increasing
Tension, removing
Compression, increasing
Compression, removing
Thresho ld volt ag e (V)
-0,59 -0,6 -0,61
6. Conclusions In order to evaluate the sensitivity of GaAs microwave devices under mechanical applied stress, MMIC dice have been tested on an innovative simple system using buckling coupled with a micrometer to apply mechanical stress has been developed for the first time. A finite element simulation was adopted to evaluate numerically the stress in the active layer of the chip. Applied stress has been successfully varied between − 210 MPa and + 210 MPa (up and down) and measurements have been made for each step. Our results demonstrate the linear sensitivity (VTH and IDSS variations are respectively around 7.10− 5 V/MPa and 4.10− 6 A/MPa) of GaAs microwave DC characteristics to mechanical stress as it has already found for Si, SiGe and GaN technologies [1,11]. This confirms also the accuracy and the originality of our buckling testing system (see Fig. 1). Evaluating the impact of mechanical stress on the DC characteristic of microwave device is of high importance for understanding the real effect of any applied stress coming from packaging or operation. For further investigation, the gate finger should be oriented differently to understand the impact of the orientation on DC characteristic changes.
-0,62 -0,63 -250 -200 -150 -100
Acknowledgments -50
0
50
100
150
200
250
Estimated stress in the active layer (MPa) Fig. 8. The change of the threshold voltage as a function of the external stress in active layer.
Tension increasing
Tension removing
Compression increasing
Compression removing
0,0468 Threshold current (A)
parameters. Knowing the effect of external mechanical stress on GaAs microwave, innovative packaging solutions can be carried out in order to improve their reliability.
0,0464 0,046 0,0456 0,0452 0,0448 0,0444 -250 -200 -150 -100
-50
0
50
100
150
200
250
Estimated stress in the active layer (MPa) Fig. 9. The change of the threshold current as a function of the external stress in the active layer.
The authors gratefully acknowledge the financial support of CNES (Centre National d'Etudes Spatiales) (French government space agency) and TAS (Thales Alenia Space) and the permission to publish. References [1] Ueda O, Pearton SJ. Materials and reliability handbook for semiconductor optical and electron devices. Tokyo, Japan: Springer; 2013. p. 108. [2] Ghandhi Sorab K. Fabrication principles, silicon and gallium arsenide; 1994. p. 1–835 (NewYork, USA). [3] Hsueh CH, Luttrell CR, Cui T. Thermal stress analyses of multilayered films on substrates and cantilever beams for micro sensors and actuators. J Micromech Microeng 2006;16:2509–15. [4] Adokanou K, Inal K, Montmitonnet P, Courtade F, Bonnet B. Thermo-mechanical analysis of GaAs devices under temperature–humidity-bias testing. 16 th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE 2015); 2015. p. 1–8. [5] Claassen WA. On the relation between deposition conditions and mechanical stress in plasma silicon nitride layers. Thin Solid Films 1985;129:239–47. [6] Miura H, Ohshika K, Masuda H. Effect of passivation film stress on shift in threshold voltage of GaAs FETs. Proc. 1st Int. Conf. on Simulation of Semiconductor Processes and Devices (SISPAD 96); 1996. p. 49–50. [7] McNally PJ, Rosenberg JJ, Jackson TN, Ramirez JC. Modelling and experimental analysis of the impact of process induced stress on the electrical performance of GaAs MESFETs. Solid State Electron 1993;36:1597–612. [8] Smith CS. Piezoresistance effect in germanium and silicon. Phys Rev 1954;94:42–9. [9] Zhu H, Liu K, Xiong C, Feng S, Guo C. The effect of external stress on the properties of AlGaAs/GaAs single quantum well laser diodes. Microelectron Reliab 2015;55(1): 62–5.
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[10] Kitaura Y, Ishida K, Mizoguchi T, Uchitomi N, Matsunaga T, Mochizuki M, Division S, Corporation T, Nii R. A mechanism of threshold voltage changes for WNx gate GaAs MESFETs in high temperature storage life tests. Microelectron Reliab 1995;35(12): 1515–20. [11] Chang EY. Changes of electrical characteristics for AlGaN/GaN HEMTs under uniaxial tensile strain. IEEE Electron Device Lett 2009;30(3):213–5. [12] Arlt G, Quadflteo P. Piezoelectricity in III–V compounds with a phenomenological analysis of the piezoelectric effect. Phys Status Solidi 1968;323:323–30. [13] Jijun X, Jian W, Wendong Z, Chenyang X, Binzhen Z, Jie H. Piezoresistive effect in GaAs/ InxGa1-xAs/AlAs resonant tunneling diodes for application in micromechanical sensors. Microelectron J 2008;39:771–6.
[14] Liu J, Hou T, Xue C, Tan Z, Liu G, Zhang B, Zhang W. GaAs HEMT as sensitive strain gauge. Solid State Electron 2011;61(1):53–7. [15] Ivankovic A, Cherman V, Gonzalez M, Vandevelede B, Vandepitte D, Beyer G, Beyne E, De Wolf I. The underfill-microbump interaction mechanism in 3D ICs: impact and mitigation of induced stresses. 15 th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, EuroSimE 2014; 2014. p. 1–8.
Contents lists available at ScienceDirect
Microelectronics Reliability journal homepage: www.elsevier.com/locate/mr
Investigation on the effect of external mechanical stress on the DC characteristics of GaAs microwave devices K. Adokanou a,b,⁎, K. Inal a, P. Montmitonnet a, F. Pressecq b, B. Bonnet c, J.-L. Muraro c a b c
CEMEF MINES ParisTech, PSL Research University, Sophia-Antipolis, France Centre National d'Etudes Spatiales, Toulouse, France Thales Alenia Space, Toulouse, France
a r t i c l e
i n f o
Article history: Received 24 May 2015 Received in revised form 20 June 2015 Accepted 21 June 2015 Available online 30 June 2015 Keywords: Bending Uniform in-plane stress Microwave Gallium Arsenide Piezoelectric effect Packaging Reliability
a b s t r a c t Stress control is a main factor in the operation, performance and reliability of GaAs devices. A precise understanding of the impact of the mechanical stress on the performance and reliability of GaAs devices can lead to the improvement of the device design and packaging. Most of the time, process flow parameter modifications help to change internal stress in multilayer properties and this has a direct impact on the electric parameters. Mechanical wafer bending is the method usually used to investigate the effects of external stress on Gallium Arsenide (GaAs) devices. The aim of this work is to quantify the sensibility of GaAs microwave devices used for Space applications under mechanical external stress in order to estimate the impact of packaging. In this innovative work, a bending-bybuckling system has been used to apply external mechanical stress on a single GaAs microwave die. To evaluate the value of this stress in device structure and precisely near the channel of the pseudomorphic High Electron Mobility Transistor (pHEMT), simulation based on the Finite Element Method has been carried out. The stress was increased gradually from 0 to ~210 MPa (in tension and compression) and then reduced from ~210 MPa to 0. The experimental results demonstrate that the threshold current changes linearly and reversibly in the range of the applied stress. The shift in the threshold current and voltage of the pHEMT was analysed by considering piezoelectric effects. © 2015 Elsevier Ltd. All rights reserved.
1. Introduction GaAs-based devices such as Monolithic Microwave Integrated Circuits (MMIC) with pseudomorphic High Electron Mobility Transistor (pHEMT) are often used for specific applications including low noise amplifier, radar, fibre optic data transmission systems [1]. The device structure consists of very thin active layer GaInAs epitaxially grown on Gallium Arsenide (GaAs) substrate, thin film metallic gates and insulating/passivating films. According to the deposition conditions, there usually exist residual stresses in the thin films and layers due to the lattice and thermal mismatch between epilayer and substrate [2]. Stress can also be introduced during the packaging processes or during operation due to differences in the thermal expansion coefficient (CTE) [3]. Previous investigation has revealed that microwave devices are sensitive to thermal stress due to testing at elevated temperature [4]. Therefore, for the GaAs microwave device, it is desirable to study the effect of an external mechanical stress on its properties for example the DC characteristics for a better understanding of the device performance. Indeed residual stress may be varied using several process parameters ⁎ Corresponding author at: CEMEF MINES ParisTech, PSL Research University, SophiaAntipolis, France. E-mail address: [email protected] (K. Adokanou).
http://dx.doi.org/10.1016/j.microrel.2015.06.033 0026-2714/© 2015 Elsevier Ltd. All rights reserved.
such as deposition temperature, pressure, gas nature or etch rate. However fabricating a number of different wafers for a complete design of experiments would be too expensive and not sensible for an investigation. Furthermore it is difficult to accurately quantify the amount of the residual stress present in the device. Also, modifying the process flow to alter the internal stresses in the dice can impact other characteristics [5–7] (energy band, wavelength, DC characteristics, RF measurements…). Therefore, applying known external stress by e.g. mechanical bending is a good solution to perform controlled stress experiments. Mechanical wafer bending is a simple and cost-effective way to investigate the underlying physics of stress in semi-conductors [1]. Several methods have been used to externally apply mechanical stress to semi-conductors. The first piezoresistance measurements by Smith [8] were achieved in 1954 by hanging weight from slabs of semi-conductors. This method requires large samples and was very limited. Year after year, cantilever bending systems have been developed and often used in microelectromechanical system (MEMS) for transducer and resonant applications. Four point bending systems improves significantly the stress homogeneity constant between the two internal rollers. Thus recently H. Zhu et al. [9] have applied four-point bending approach to GaAs single quantum well laser diode. However, whatever the configuration, it is difficult to apply a uniform stress, either in the plane or out of the plane, to a single die a few millimetres long. All these methods require
1698
K. Adokanou et al. / Microelectronics Reliability 55 (2015) 1697–1702
special equipment (displacement and force sensors…) associated with characterisation bench but they are limited in some cases by the lack of free area left for die surface observation. In this work, we quantify the sensitivity of GaAs MMIC dice under external mechanical stress. By using a buckling system (Section 2), a uniform in-plane stress (either tensile or compressive) can be applied to the microwave device active surface (Section 3). The change of DC characteristics has thus been investigated (Section 4). 2. Experiments In this section, experimental conditions are detailed from the sample preparation to set-up measurements on bench test. 2.1. Specimens The GaAs MMIC used for this study include two 0.18 μm pseudomorphic High Electron Mobility Transistor (pHEMT) and SiNy/SiOy/SiNx Metal-Insulator-Metal (MIM) with a silicon nitride (SiNx) passivation layer. The active components are based on GaAlAs/GaInAs/GaAs heterostructure of few nm thick grown by Metal Organic Vapour Phase Epitaxy (MOVPE) on (100) GaAs substrates. The die dimensions are ~100 μm (thickness) × 2000 μm (width) × 3000 μm (length). The stress is applied to the die using a buckling system shown in Fig. 1. Because of the small size of the die (few mm), it was bonded on a Printed Circuit Board (PCB as a flexible support): designed with some electrical lines in other to ensure electrical connection for measurements. The PCB dimensions are 0.4 mm (thickness) × 6 mm (width) × 30 mm (length).
SiNx GaAs Die-attach
PCB Fig. 2. Sample buckling setup 3D modelling with Abaqus CAE software and a zoom on the stack of the die.
2.2. Buckling system and test bench The buckling system (see Fig. 1) consists of two grooved plates in which the PCB support is slid, then electric connections are made. One plate is fixed and the other can be moved in x direction thanks to the micrometre. The in-plane stress applied results in bending by buckling mechanism. In our experiment, the critical x displacement level we apply must be less than 400 μm for the fear of die break. An initial orientation in y direction is necessary to select the tensile or compressive buckling modes. The micrometre provides smooth and accurate motion. The displacement is increased from 0 to 400 μm in 4 steps. For both tensile and compressive mode, a complete cycle has been performed (from 0 to 400 μm back to 0). The advantage of this method is the uniformity of the applied stress (better than 3 points bending) without the need for tools, as in four point bending. For characterisation, load pull measurements can easily be avoided to connectors use. Moreover, it needs less equipment. The active parts of the chip are located near its centre and the die is well bonded at the centre of the PCB support. Hence, the applied stress in the active layer and in the active Electric connections
Sample Fix plate
Load plate with a micrometer
parts is verified to be uniform and in-plane (see Fig. 3). The grooved plates are supposed to ensure only one degree of freedom: z axis rotation. The DC measurements have been performed with HP 4155 Semiconductor Parameter Analyser (SPA). For electrical characterisation of the pHEMT, drain voltage has been changed gradually from 0 to 3 V, gate voltage from −2 to 0.25 V corresponding to the limits of the foundry datasheet in DC characterisation. Only drain and gate currents have been measured. For both tensile and compressive mode, stress has been increased then decreased and measurements have been made at each step. The estimated mechanical stress is evaluated in the coming paragraph.
3. Simulation of sample buckling This section focuses on the stress evaluation and it is made not at the top of the flexural support but precisely at the top surface of the GaAs substrate which is obviously the active layer position: heterostructure GaAlAs/GaInAs/GaAs is few nm thick compared with the 100 μm substrate. The stress distribution has been estimated with numerical simulation tools from Abaqus Standard® FEM software. A structured mesh composed of linear elements has been built and the contacts are assumed to be tie elements. Only applied mechanical stress are
Table 1 [2] Layers material properties and thickness.
Fig. 1. The sketch of the buckling test bench.
PCB Die-attach GaAs SiNx
Young's modulus (GPa)
Poisson's ratio
Thickness (μm)
25.8 7.9 85.5 150
0.3 0.3 0.31 0.3
400 10 100 0.15
K. Adokanou et al. / Microelectronics Reliability 55 (2015) 1697–1702
1699
a) Tensile loading
b) Compressive loading
Fig. 3. Details of stress distribution of σxx at the die surface. The stars on the figures indicate the position of pHEMT.
shown in this paper, it can simply be added to any unknown initial residual stress.
mode, is explained by the non-similarity of the two loadings and the sample structure.
3.1. The numerical model
4. Results: electrical measurements
In order to calculate stresses, 3D model representing the complete dimensions and thicknesses of the real sample has been performed. The numerical model of the die is a bilayer of GaAs/SiNx with thickness of 100 μm and 0.15 μm respectively (see Fig. 2). The chip is stuck on the flexible support with a 10 μm layer of die-attach [4]. Material properties and layer thickness are resumed in Table 1.
In this section, two main DC characterisations have been carried out: threshold voltage (VTH) and the threshold current (IDSS): the threshold
As shown in Fig. 3, the applied stress distribution is estimated in both tensile and compressive case. σxx stress is presented for the maximum displacement of 400 μm in x direction. pHEMTs are represented in Fig. 3 by stars. In Fig. 4, the maximal value of estimated stress in active layer is plotted as function of loading plate displacement. By 4 steps from 0 to 400 μm, stress changes from 0 to ± 210 MPa. Moreover the pHEMTs are in the uniform areas for both tensile and compressive case. The small shift in the drafts for tensile and compression
|Estimated sress(MPa)|
3.2. Stress distribution
Tension
Compression
250 200
150 100 50
0 0
0,1
0,2
0,3
0,4
Load backing displacement in x axis (mm) Fig. 4. Absolute value of estimated mechanical maximum stress σxx in the active layer as a function of loading plate displacement.
1700
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4.2. DC characteristics change
Table 2 Setup DC characteristic error estimation in %. Characteristics
Voltage
No stress
Applied stress
Threshold voltage Threshold current
VDS = 3 V VDS = 3 V/VGS = 0 V
0.095% 0.015%
0.115% 0.096%
For each step (increasing and decreasing) in tension and compression mode on the same sample, DC measurements have been made as mentioned in Section 2.2. The applied stress varies between 0 and ± 210 MPa and results are shown in the following figures. Figs. 5–7 show respectively the change of drain and gate current when drain and gate voltage vary, at different levels of tensile or compressive stress. The zooms on the right show clearly the impact of stress and the good symmetry between tension and compression. For all the graphs (see Fig. 5), it is clearly evident that compression allows higher current density in the gate and the drain whereas tensile stress hinders electron flow in the channel. The change of the threshold voltage and the threshold current of the die pHEMT is plotted in Figs. 8 and 9. For the present devices, the gate orientation is parallel to x, the loading direction. The threshold voltage VTH increases by +2.51% under a tensile stress of +210 MPa and decreases by about −2.31% at a compressive stress of −210 MPa. The threshold current IDSS also increases by −1.59% under a tensile stress of +210 MPa and decreases by about +1.86% at a compressive stress of −210 MPa.
voltage has been calculated with the transconductance gm (see Eq. (1)) for drain voltage VDS = 3 V; and the threshold current corresponds to the drain current IDS for the drain voltage fixed at 3 V and a gate voltage fixed at 0 V. First, the error estimation in measurement has been made and secondly testing results are presented.
gm ¼
ΔIDS ΔV VG
ð1Þ
4.1. Error estimation of the set-up measurement
5. Discussion In non-controlled environments, stress always has some influence on microelectronic device characteristics be it mechanical, thermal [4,10], and hydro-mechanical. C-T. Chang et al. [11] show that the magnitude of the change in the current density depends on the gate orientation in HEMT under uniaxial stress. In our case, the gate finger orientation is parallel to the loading direction therefore there is a linearity in our results. Tests performed on the buckling system (see Fig. 1) show a good linearity of the gate and drain currents, threshold voltage and threshold current as a function of applied stress (tensile as well as compressive). In the literature, similar results of 1.5% variation of normalised IDSS (drain current at zero bias) have been obtained for GaN pHEMT devices
0,05
0,047
σ=210MPa
0,04
0,046
σ=175MPa
Drain current (A)
Drain current (A)
The error estimation of the set-up measurement is a first and important step for testing and also a reference for the real buckling testing result analysis. It has been made for two sample configurations: no stress and applied stress estimated at +140 MPa. In the no stress case, seven measurement steps of 5 min have been made whereas with stress seven measurement steps of 24 h have been made. Error estimations are resumed in Table 2. As shown in Table 2, error increases with the applied stress and its very low changes (b0.12%). Potential variation due to the PCB or the glue is expected but even under load for several hours, the changes are random, not linear. These results confirm the high stability of the measurements set-up and the system material choice. These error values help to estimate the significance of a change during all the experiments to come. A change above this error range is supposed to come from the external mechanical applied stress. The error estimation of the loading plate displacement is evaluated at 3 μm.
0,03 0,02 0,01
σ=140MPa 0,045
σ=90MPa
0,044
σ=-0MPa σ=-90MPa
0,043
σ=-140MPa
0,042
0
σ=-175MPa σ=-210MPa
0,041 1
2
3
2
2,2
Drain voltage (V)
2,4
2,6
2,8
3
Drain voltage (V)
Fig. 5. Drain current as a function of drain voltage for a fixed gate voltage VGS = 0 V.
2,0E-04
1,0E-02
σ=210MPa σ=175MPa
Drain current (A)
Drain current (A)
1,0E-01
1,0E-03 1,0E-04
σ=140MPa σ=90MPa σ=-0MPa σ=-90MPa σ=-140MPa
1,0E-05
σ=-175MPa
1,0E-06
σ=-210MPa
2,0E-05 -2
-1,5
-1
-0,5
Gate voltage (V)
0
-1
-0,98 -0,96 -0,94 -0,92 -0,9 Gate voltage (V)
Fig. 6. Drain current as function of gate voltage for a fixed drain voltage VDS = 3 V.
K. Adokanou et al. / Microelectronics Reliability 55 (2015) 1697–1702
6,0E-07
σ=210MPa σ=175MPa
Gate current (A)
Gat e current (A)
1,0E-05
1701
1,0E-06
1,0E-07
σ=140MPa σ=90MPa σ=-0MPa σ=-90MPa σ=-140MPa
1,0E-08
σ=-175MPa 1,0E-09 -2
-1,5
-1
-0,5
0
3,0E-08 -0,75
σ=-210MPa -0,7
-0,65
Gate voltage (V)
Gate voltage (V)
Fig. 7. Gate current as function of gate voltage for a fixed drain voltage VDS = 0 V.
under three-points bending configuration [11] and up to 10% variation for VTH for AlGaAs/GaAs single quantum well laser diodes [9] with four-point bending system. These current variations and DC characteristics change the result from the piezoelectric effects and changes in electron mobility due to the applied stress [11]. These piezoelectric effects on GaAs devices were commonly used for many applications [12,13] in sensors and performing gauges [14]. For other applications such as packaging, perform such a test helps to quantify the stress induced by packaging and relate it to DC characteristics changes. A. Ivankovic et al.[15] have made four-point testing on IC devices to quantify the impact of assembly processes on the current in the FET. These approaches are very sensible for an investigation because of their great versatility in terms of analysis and evaluated
Tension, increasing
Tension, removing
Compression, increasing
Compression, removing
Thresho ld volt ag e (V)
-0,59 -0,6 -0,61
6. Conclusions In order to evaluate the sensitivity of GaAs microwave devices under mechanical applied stress, MMIC dice have been tested on an innovative simple system using buckling coupled with a micrometer to apply mechanical stress has been developed for the first time. A finite element simulation was adopted to evaluate numerically the stress in the active layer of the chip. Applied stress has been successfully varied between − 210 MPa and + 210 MPa (up and down) and measurements have been made for each step. Our results demonstrate the linear sensitivity (VTH and IDSS variations are respectively around 7.10− 5 V/MPa and 4.10− 6 A/MPa) of GaAs microwave DC characteristics to mechanical stress as it has already found for Si, SiGe and GaN technologies [1,11]. This confirms also the accuracy and the originality of our buckling testing system (see Fig. 1). Evaluating the impact of mechanical stress on the DC characteristic of microwave device is of high importance for understanding the real effect of any applied stress coming from packaging or operation. For further investigation, the gate finger should be oriented differently to understand the impact of the orientation on DC characteristic changes.
-0,62 -0,63 -250 -200 -150 -100
Acknowledgments -50
0
50
100
150
200
250
Estimated stress in the active layer (MPa) Fig. 8. The change of the threshold voltage as a function of the external stress in active layer.
Tension increasing
Tension removing
Compression increasing
Compression removing
0,0468 Threshold current (A)
parameters. Knowing the effect of external mechanical stress on GaAs microwave, innovative packaging solutions can be carried out in order to improve their reliability.
0,0464 0,046 0,0456 0,0452 0,0448 0,0444 -250 -200 -150 -100
-50
0
50
100
150
200
250
Estimated stress in the active layer (MPa) Fig. 9. The change of the threshold current as a function of the external stress in the active layer.
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