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Low-frequency noise in electrically stressed n-MOSFETs
Solid-State Electronics 43 (1999) 849±856
Low-frequency noise in electrically stressed n-MOSFETs L. Ren, S. Okhonin, M. Ilegems* Department of Physics, Institute of Micro- and Optoelectronics, Swiss Federal Institute of Technology, CH-10 15 Lausanne, Switzerland Received 28 November 1997; received in revised form 16 November 1998
Abstract Low-frequency noise, electrical current±voltage characteristics and charge pumping methods were employed to study the time-dependent degradation behavior of n-MOSFETs. The increase of 1/f noise under stress correlates, in a non linear manner, with the increase in charge pumping current and the decrease in maximum DC transconductance. The degradation of 1/f noise was found to be an exponential function of the degradation of maximum transconductance, which indicates that the noise can be used as a sensitive monitor for device degradation. # 1999 Elsevier Science Ltd. All rights reserved.
1. Introduction Low-frequency noise (LFN) is becoming more and more popular as a diagnostic tool for device reliability assessment [1]. Compared to DC characteristics, lowfrequency noise is much more sensitive to imperfections along the current path. It is widely reported that the 1/f noise in MOSFETs is very sensitive to electrical stress [2±6]. For example, in a case of hot-carrier degradation, Li and Vandamme [4] reported a 100% increase in 1/f noise while the transconductance only decreased by 4%. However, a detailed understanding of the physical mechanism causing the degradation of 1/f noise is still lacking, which greatly limits the usefulness of 1/f noise to assess the device reliability. This undesirable situation is mainly due to a lack of knowledge about the microscopic origin of 1/f noise in MOSFETs, i.e. the type and location of defects created during the stress which lead to the observed noise increase. Furthermore, although it is now generally
* Corresponding author. Tel.: +21-693-3441; fax: +21-6935490. E-mail address: [email protected]¯.ch (M. Ilegems)
agreed that the 1/f noise in n-type MOSFETs is caused by charge exchange between SiO2 and the underlying Si channel, the exact nature of the traps involved is still a subject of debate [7±15]. Some experiments, in particular under AC stress, suggest that the post-stress 1/f noise correlates with interface trap density [7,8] while other experiments point to oxide traps as the source of 1/f noise [9±11]. In a series of studies on 1/f noise in pre- and post-irradiated MOSFETs, Fleetwood et al. [12±15] have shown that the trapped oxide charge is the predominant factor for the 1/f noise. Both the pre- and the post-irradiation 1/f noise in their g-irradiated MOSFETs were found to scale linearly with the trapped-oxide charge, but to be independent on DVit, the part of MOSFET threshold-voltage shifts due to interface traps. They proposed that the E '-center, a trivalent Si, or simple oxygen vacancy, determines both the pre-irradiation 1/f noise level and the post-irradiation 1/f noise increase [13,14]. In this paper, we report on experimental results on the time-dependent degradation behavior of 1/f noise in n-MOSFETs under uniform Fowler±Nordheim (FN) stress and nonuniform hot-carrier (HC) stress. Charge pumping (CP) measurements were performed simultaneously to evaluate the change of the interface
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trap density. In order to separate the eects of interface traps and the trapped oxide charge on MOSFETs I±V characteristics, we adopted the forward Gate induced leakage drain current (GIDL) [16] method to evaluate the threshold-voltage shift solely due to trapped oxide charge. To our knowledge, it is the easiest and most accurate method to determine the threshold voltage shift due to oxide charge build-up. It was found that the degradation of 1/f noise caused by stress does not correlate in a linear manner either with the increase of interface trap density or with the trapped-oxide charge. We demonstrate that a simple relationship exists between the 1/f noise degradation and the degradation of maximum transconductance of n-MOSFETs. The possible role of hole trapping in the noise degradation is discussed. 2. Experiments Two type of devices manufactured by SGS Thomson using a 0.6 mm industrial technology were used for the FN stress degradation study, namely, device type A with a normal gate oxide; device type B with the oxide nitrided at 10008C in N2O for 10 min. Both types of devices had a gate oxide thickness tox=20 nm and W L=100 mm 0.8 mm. The purpose of using nitrided oxide is to examine the impact of nitridation on the degradation behavior of 1/f noise since it is reported that nitridation suppresses the creation of interface traps [17]. For HC stress, LDD n-MOSFETs with tox=8 nm and W L=100 mm 0.5 mm fabricated at IMEC using a 0.25 mm CMOS technology were used. The stresses were carried out by an automatic system using HP 4145B semiconductor parameter analyzer. The whole system was controlled by LabVIEW with a Macintosh desktop computer. The stresses were performed in steps with stress time being doubled at each next step. Device I±V characteristics, CP current and GIDL current were measured immediately after each stress. For CP measurements, the gate of the MOSFET was connected to a pulse generator while the source and drain were connected together. A small constant reverse bias was applied to the source and drain with the substrate electrode being grounded. The measured current is the substrate current Icp. In a variant CP method used here, the base level of the pulse train is swept from accumulation to inversion while the amplitude of the pulses is kept constant. The frequency of the square±wave was chosen as f=300 kHz, where the CP current was found to be linearly proportional to the pulse frequency. In the GIDL method, a voltage Vbase is applied to the substrate to forward- or reverse-bias the drain-substrate junction and the substrate current is measured
Fig. 1. Degradation of MOSFET I±V characteristics (a) and CP current (b) upon the FN stress.
as a function of gate voltage. The forward GIDL method was chosen here because it yields better spatial resolution and sensitivity. The source terminal can be left ¯oating, grounded or tied to the drain. In this work, the source and drain were short-circuited to avoid any potential drop along the channel. This con®guration reduces parasitic currents in inversion and allows one to determine interface traps located near the source/substrate and drain/substrate junctions as well as in the channel. Furthermore, since interface traps are screened in inversion, the contribution of recombination centers in the Si bulk can be extracted unambiguously. The drain current noise was measured with a noise set-up consisting of a EG&G 5182 ultra low-noise current preampli®er, a HP 3562A Dynamic Signal Analyzer (DSA) and a HP 9000 series desktop computer. The device was biased in its linear regime with dry-cell batteries. The drain current noise signal was AC coupled to EG&G 5182 current preampli®er with a voltage gain between 103 and 108 V/A. The ampli®ed noise signal was then fed outside of the Faraday-cage
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Fig. 2. Time-dependent degradation behavior of (a) type A MOSFETs and of (b) type B MOSFETS upon FN stress. All the lines are only guides for the eye.
to the HP 3562A DSA. An oscilloscope was used to monitor the noise signal in real time while the spectral analysis was being performed. The number of averaging for the noise power spectral density (PSD) was 20. After correction for the gain of the preampli®er, the PSD data were displayed and stored. All the noise spectra were taken in the linear region of device operation with an applied drain-source voltage Vds=50 mV. Both for the virgin and the degraded
devices, good 1/f noise spectra with a frequency index between 0.9 and 1.1 were found at the selected biases. Since the normalized drain current 1/f noise in nMOSFETs is usually found to be inversely proportional to the square of eective gate voltage in the linear regime [18], i.e. SI/I 20(VgsÿVT)ÿ2 we compared the noise measured at the same eective-gate voltages. Here we de®ned S to be the normalized drain current noise as S=SI/I 2 and its change as DS=(SÿS0) where
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S0 SI0 =I 20 is the normalized noise in the virgin devices. The relative changes in 1/f noise, DS/S0, were evaluated at f=20 Hz. 3. Experimental results 3.1. Uniform Fowler±Nordheim injection Positive Fowler±Nordheim injection was performed with a gate voltage Vg=19 V, which corresponds to an oxide ®eld E=9.5 MV/cm. This condition was chosen in order to have an appropriate aging rate of device DC characteristics. Fig. 1(a) shows the drain current degradation of type A MOSFETs, while Fig. 1(b) shows the corresponding change of CP current. Upon the initial two second stress, a large quantity of positive charge was generated at or near the SiO2/Si interface, which is due to electron±hole pair generation by impact ionization in SiO2 [19]. From Fig. 1 it can be seen that this positive charge caused both the I±V and the Icp±Vbase curves to be shifted negatively. However, considering 1/f noise, there is a little in¯uence due to the positive charge. Upon the subsequent stresses this positive charge was removed by the electrons injected from the substrate and acceptor-type interface traps were created, which caused the threshold voltage to be shifted again positively. From Fig. 1(b), it is clear that the interface trap density continued to increase with the stress time from 2 to 1024 s. The interface trap density in the virgin device was found to be about Dit0=7.41010 eVÿ1 cmÿ1 as calculated from CP current [20]. Fig. 2(a) shows the relative changes of 1/f noise, maximum transconductance and maximum charge pumping current for the type A MOSFETs of normal oxide upon FN stress. It can be seen that a good correlation exists between degradation of maximum transconductance gm and the increase of CP current. This fact con®rms that the degradation of maximum transconductance in n-MOSFETs is mainly caused by the creation of interface traps since the CP current mainly senses fast traps at/near the SiO2/S1 interface [20]. The mechanism for gm degradation is the increase of Coulomb scattering by the charged interface traps [21]. Comparing to the degradation of 1/f noise, it is evident that the degradation of 1/f noise is much faster than the degradation of gm and the increase of the fast interface trap density DDit. The FN stress at the same condition was also carried out under the same condition on the type B MOSFETs of nitrided oxide. The result is shown in Fig. 2(b). It can be seen that the degradation of gm and the increase of 1/f noise were greatly reduced compared to the normal oxide devices (type A). Furthermore, it should be mentioned that the degra-
Fig. 3. The relative change of 1/f noise DS/S0 versus the threshold-voltage shift due to trapped oxide charge DVot upon FN stress. The solid line indicates a linear relationship between DS/S0 and DVot.
dation of maximum transconductance gm and the 1/f noise increase in the type B MOSFETs tend to saturate at a later stage upon further increase of stress time. However, like the results presented in Fig. 2(a), a good correlation between maximum transconductance degradation and CP current is also well established for the nitrided MOSFETs. In order to examine a possible correlation between the negative trapped oxide-charge and the 1/f noise, we performed GIDL measurements to evaluate the oxide charge build-up upon the series of FN stresses. It has been shown that the shift in the midgap voltage represents approximately the solo in¯uence of trapped oxide charge on the MOSFET threshold voltage shift [22]. In accordance with the Shockley-Read-Hall theory, the GIDL current reach its maximum when the surface potential is close to midgap [16]. Therefore, the shift of the peak position of GIDL current corresponds to the portion of MOSFET threshold voltage shift solely due to trapped oxide charge, DVot. Compared to a method of using the extrapolated midgap subthreshold current to extract DVot as proposed by PJ McWhorter and PS Winolcur [23], the GIDL method is much more direct and accurate in determining the threshold shift due to oxide charge. Fig. 3 shows the relative change in 1/f noise in both the normal oxide and in the nitrided oxide MOSFETs against the extracted DVot. It can be seen that the 1/f noise in the normal-oxide MOSFETs under FN stress degraded faster than the build-up of the trapped oxide charge whereas the 1/f noise in the nitrided MOSFETs seems to degrade somewhat slower than the trapped-oxide charge creation rate.
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increases, the damage zone become saturated in the LDD region and extends to the channel. This twostage degradation is also visible in the 1/f noise behavior. Both for the virgin and the degraded devices, the gate bias dependence of 1/f noise was ®rst checked by plotting SI/I 2 vs. Vg in log±log scale. At high gate biases (Vg>2 V for our devices), we found that the noise was independent of gate bias. Hence the 1/f noise at high gate biases can be regarded mainly arising from the series resistance. In Fig. 5, the relative changes of 1/f noise at two gate biases which represent the channel noise and the series resistance noise are shown. It can be clearly seen that the channel 1/f noise shows no saturation, whereas the 1/f noise change due to series resistance shows saturation after 700 s stressing. Like in the case of FN stress, it is found that both for the channel and series resistance the degradation in 1/f noise increases much faster than the degradation of gm or CP current Icp, However, HC stress cause 1/f noise to increase much more dramatically than FN stress, i.e. 20% gm degradation corresponds to 500% increase in 1/f noise in the case of HC stress and to only 60% increase in 1/f noise in the case of FN stress.
4. Discussion
Fig. 4. Degradation of MOSFET I±V characteristics (a) and CP current (b) upon the HC stress at maximum substrate current condition: Vg=2 V, Vd=5 V.
3.2. Non-uniform hot-carrier injection Fig. 4 shows the drain-current degradation and CP current for the IMEC LDD n-MOSFETs subjected to HC stress time from 2 to 4094 s. The stresses were carried out at the condition of maximum substrate current, which is known to be the severest condition for HC stress [24]. Compared to FN stress, the thresholdvoltage does not shift much since the damage is mainly located near the drain. Fig. 5 shows the time-dependence of the relative change of 1/f noise, maximum transconductance gm and the maximum charge pumping current for IMEC LDD n-MOSFETs. By comparing the degradation of gm and the CP current plotted in Fig. 5, it is apparent that two dierent degradation mechanisms are involved. We attribute this observation to two-stage degradation in LDD n-MOSFETs [25]. For LDD devices, the degradation starts near the border between the low-doped drain and the high-doped drain where the electric ®eld peaks. As the stress time
The above experimental results demonstrated that the degradation in 1/f noise proceeds with a dierent rate than the degradation of maximum transconductance and CP current. This fact strongly suggests that the 1/f noise is not directly associated with interface trap creation. It is well known that the CP current is mainly a direct measure of the average density of the interface traps within a few tenth of electron volts around midgap, whereas the 1/f noise is associated with the traps a few kT around the Fermi level. Following the classical McWhorter's number ¯uctuation model [9,26±28], the normalized drain-current 1/f noise in the linear regime of device operation can be expressed as S
SI q2 kTNt Ef , I2 fLWC 2ox Vg ÿ VT 2 g
1
where Cox is the oxide capacitance per unit area, Nt(Ef ) is the trap density per unit energy per unit area at the trap quasi-Fermi level Ef and g is the tunnelling coecient. The rest symbols have their usual meanings. Assuming that the oxide capacitance does not change very much upon stress, it is expected that the relative change of 1/f noise at the ®xed eective gate-biases is directly proportional to the relative change of the trap density near the Fermi-level as
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Fig. 5. Time-dependent degradation behavior of LDD n-MOSFETs subjected to HC stress at maximum substrate current condition: Vg=2 V, Vd=5 V. All the lines are only guides for the eye.
DS DNt Ef : S0 Nt0 Ef
2
At the gate biases we used, the devices were under the moderate inversion. The quasi-Fermi level is then close to the conduction band edge. Therefore if the 1/f noise is directly associated with interface trap creation, according to Eq. (2), our experimental observation that the 1/f noise increase faster than the CP current would imply that the rate of interface trap creation is higher close to the conduction-band edge. In order to check this point, deep level transient spectroscopy (DLTS) measurements were performed. Our DLTS results shows the opposite trend: the interface traps near the midband gap are created faster than the interface traps close to the conduction-band edge upon FN stress [29]. Similar results has also been reported previously by using a modi®ed CP technique for nMOSFETs [30]. Therefore, the 1/f increase is not likely to be associated with interface traps. So the question remains to be answered is what are those traps created by stress which determine the 1/f noise and why they are created at a faster rate? In a new nomenclature proposed by Fleetwood et al. [15], interface traps are de®ned as the traps exactly at the SiO2/Si interface and oxide traps as the traps in the oxide ®lm which do not communicate with Si bulk on the experiment time scale. The third class of traps, called `border traps' or `switching states' are physically similar to oxide traps, but are located close enough to the SiO2/Si interface (typically within 3 nm to the interface) that they can exchange charge with Si bulk
on a short time scale. According to the above de®nition, the 1/f noise is then expected to be determined by the border traps while the CP current is determined by the interface traps. According to DiMaria et al. [31], hole trapping and H+ migration are important for the creation of those `border' traps. In the case of positive FN injection, holes and/or H+ can be generated by high energy tail hot-electrons near the oxide/ polysilicon gate junction. These mobile holes and/or H+ produced in the oxide bulk move under the applied ®eld to the SiO2/Si interface. When those trapped holes recombine with the injected electrons, another type of interface traps that are dierent from the Si dangling-bond type defects traps are produced. However, the mobile holes can be trapped on their way at some deep sites, i.e. oxygen vacancies. These trapped holes and/or H+ can acts as `slow states'. Very close to the interface the trapped holes could tunnel into the Si bulk under the applied ®eld, which slows down the trap creation at or very close to the interface. Therefore, the rate of interface trap creation is expected to be high at beginning and then decrease, whereas the oxide trap creation still proceeds. The above simple picture explains qualitatively the fact that 1/f noise increase relatively faster than the CP current since CP current only sense the interface traps. Considering the case of HC injection, hot-electrons and holes are injected at the same time from the Si bulk near the drain into the oxide ®lm. Therefore, compared to FN stress, the space distribution of traps is closer to SiO2/Si interface, in another word more `border' type traps are created than interface type
L. Ren et al. / Solid-State Electronics 43 (1999) 849±856
Fig. 6. The relative change of 1/f noise versus the relative change of maximum transconductance.
traps. This is why we have seen that HC stress caused much more easily 1/f noise to increase rather than to cause gm to decrease as compared to FN stress. Considering the nitrided devices, the nitridation has two main eects. Firstly, the incorporated nitrogen can replace processing-remained hydrogen at SiO2/Si interface which greatly suppresses the interface trap creation [32] due to a higher energy of Si±N bond. Secondly, the oxynitride layers formed near the interfaces, which are similar to silicon nitride (Si3N4), act as blocking barriers to moving species such as holes and H+. Therefore, the creation of oxide traps are also suppressed, hence the 1/f noise. Finally, an empirical relationship between the degradation of 1/f noise and the degradation of static device parameters has been examined. In Fig. 6, the relative change in 1/f noise is plotted in a log±linear scale versus the relative change of gm. The striking result as presented in Fig. 6 is that the relative change in 1/f noise appears to be an exponential function of the change of maximum transconductance for both the case of FN stress and for the case of HC stress. This exponential relationship can be expressed as DS=S0 1A exp BDgm =gm0
855
MOSFETs. Here, starting from a virgin device, the empirical relation is con®rmed on a single device. Combining the charge pumping results, the empirical relation indicates a correlation existed between the increase of 1/f noise and the increase of the interface trap density, roughly of the form ln(DS ) 0 DNit. It should be mentioned that this kind of relationship have been also reported recently for p-MOSFETs [35,36], where hydrogen transport was believed leading to both the latent interface-trap build-up and 1/f noise increase. It is quite surprising that such an empirical relationship also valid for p-MOSFETs because for pMOSFETs mobility ¯uctuations are often reported to be the origin of the 1/f noise [28,37]. As demonstrated in this work, the increase of interface trap density itself does not cause the increased 1/f noise in the devices. As suggested by DM Fleetwood et al. [36], a kind of strong link may be existed between the processes that lead both to the increased 1/f noise and the increased interface trap density. However, the physical picture is still not yet clear. But the relation itself may be very interesting for practical use of 1/f noise as a tool for device reliability assessment.
5. Conclusions For both FN stress and HC stress, a good correlation between the degradation of maximum transconductance gm and charge pumping current has been well established, which indicates that the degradation of the MOSFETs DC characteristics is mainly due to the creation of interface traps (the fast states). In both cases, the degradation of 1/f noise is not linearly correlated with CP current or maximum transconductance degradation. The noise is shown to degrade faster than the degradation of maximum transconductance and charge pumping current. An exponential relationship is observed between 1/f noise degradation and degradation of maximum transconductance.
3
with A and B empirical constants. It should be noted that in the case of FN stress, for dierent gate biases, for normal oxide and for nitrided oxide, and for the occasional best device of the batch, all the data seem to follow the same line. This fact demonstrates the generality of Eq. (3). This type of empirical relation, the 1/f noise is an exponential function of transconductance, was ®rstly proposed by E. Simoen and C. Claeys [33,34] based on a study of the noise dispersion and gm dispersion on a large number of SOI
Acknowledgements The authors wish to thank F. Pio of S.G.S. Thomson for providing the samples. The authors would also like to thank E. Simoen of IMEC Leuven for fruitful discussions and sending us the draft of his recent publication on 1/f noise in hot-carrier degraded MOSFETs. One of the author (L. Ren) wishes to thank Swiss Science Foundation for partial ®nancial support.
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Low-frequency noise in electrically stressed n-MOSFETs L. Ren, S. Okhonin, M. Ilegems* Department of Physics, Institute of Micro- and Optoelectronics, Swiss Federal Institute of Technology, CH-10 15 Lausanne, Switzerland Received 28 November 1997; received in revised form 16 November 1998
Abstract Low-frequency noise, electrical current±voltage characteristics and charge pumping methods were employed to study the time-dependent degradation behavior of n-MOSFETs. The increase of 1/f noise under stress correlates, in a non linear manner, with the increase in charge pumping current and the decrease in maximum DC transconductance. The degradation of 1/f noise was found to be an exponential function of the degradation of maximum transconductance, which indicates that the noise can be used as a sensitive monitor for device degradation. # 1999 Elsevier Science Ltd. All rights reserved.
1. Introduction Low-frequency noise (LFN) is becoming more and more popular as a diagnostic tool for device reliability assessment [1]. Compared to DC characteristics, lowfrequency noise is much more sensitive to imperfections along the current path. It is widely reported that the 1/f noise in MOSFETs is very sensitive to electrical stress [2±6]. For example, in a case of hot-carrier degradation, Li and Vandamme [4] reported a 100% increase in 1/f noise while the transconductance only decreased by 4%. However, a detailed understanding of the physical mechanism causing the degradation of 1/f noise is still lacking, which greatly limits the usefulness of 1/f noise to assess the device reliability. This undesirable situation is mainly due to a lack of knowledge about the microscopic origin of 1/f noise in MOSFETs, i.e. the type and location of defects created during the stress which lead to the observed noise increase. Furthermore, although it is now generally
* Corresponding author. Tel.: +21-693-3441; fax: +21-6935490. E-mail address: [email protected]¯.ch (M. Ilegems)
agreed that the 1/f noise in n-type MOSFETs is caused by charge exchange between SiO2 and the underlying Si channel, the exact nature of the traps involved is still a subject of debate [7±15]. Some experiments, in particular under AC stress, suggest that the post-stress 1/f noise correlates with interface trap density [7,8] while other experiments point to oxide traps as the source of 1/f noise [9±11]. In a series of studies on 1/f noise in pre- and post-irradiated MOSFETs, Fleetwood et al. [12±15] have shown that the trapped oxide charge is the predominant factor for the 1/f noise. Both the pre- and the post-irradiation 1/f noise in their g-irradiated MOSFETs were found to scale linearly with the trapped-oxide charge, but to be independent on DVit, the part of MOSFET threshold-voltage shifts due to interface traps. They proposed that the E '-center, a trivalent Si, or simple oxygen vacancy, determines both the pre-irradiation 1/f noise level and the post-irradiation 1/f noise increase [13,14]. In this paper, we report on experimental results on the time-dependent degradation behavior of 1/f noise in n-MOSFETs under uniform Fowler±Nordheim (FN) stress and nonuniform hot-carrier (HC) stress. Charge pumping (CP) measurements were performed simultaneously to evaluate the change of the interface
0038-1101/99/$ - see front matter # 1999 Elsevier Science Ltd. All rights reserved. PII: S 0 0 3 8 - 1 1 0 1 ( 9 8 ) 0 0 3 2 9 - 3
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trap density. In order to separate the eects of interface traps and the trapped oxide charge on MOSFETs I±V characteristics, we adopted the forward Gate induced leakage drain current (GIDL) [16] method to evaluate the threshold-voltage shift solely due to trapped oxide charge. To our knowledge, it is the easiest and most accurate method to determine the threshold voltage shift due to oxide charge build-up. It was found that the degradation of 1/f noise caused by stress does not correlate in a linear manner either with the increase of interface trap density or with the trapped-oxide charge. We demonstrate that a simple relationship exists between the 1/f noise degradation and the degradation of maximum transconductance of n-MOSFETs. The possible role of hole trapping in the noise degradation is discussed. 2. Experiments Two type of devices manufactured by SGS Thomson using a 0.6 mm industrial technology were used for the FN stress degradation study, namely, device type A with a normal gate oxide; device type B with the oxide nitrided at 10008C in N2O for 10 min. Both types of devices had a gate oxide thickness tox=20 nm and W L=100 mm 0.8 mm. The purpose of using nitrided oxide is to examine the impact of nitridation on the degradation behavior of 1/f noise since it is reported that nitridation suppresses the creation of interface traps [17]. For HC stress, LDD n-MOSFETs with tox=8 nm and W L=100 mm 0.5 mm fabricated at IMEC using a 0.25 mm CMOS technology were used. The stresses were carried out by an automatic system using HP 4145B semiconductor parameter analyzer. The whole system was controlled by LabVIEW with a Macintosh desktop computer. The stresses were performed in steps with stress time being doubled at each next step. Device I±V characteristics, CP current and GIDL current were measured immediately after each stress. For CP measurements, the gate of the MOSFET was connected to a pulse generator while the source and drain were connected together. A small constant reverse bias was applied to the source and drain with the substrate electrode being grounded. The measured current is the substrate current Icp. In a variant CP method used here, the base level of the pulse train is swept from accumulation to inversion while the amplitude of the pulses is kept constant. The frequency of the square±wave was chosen as f=300 kHz, where the CP current was found to be linearly proportional to the pulse frequency. In the GIDL method, a voltage Vbase is applied to the substrate to forward- or reverse-bias the drain-substrate junction and the substrate current is measured
Fig. 1. Degradation of MOSFET I±V characteristics (a) and CP current (b) upon the FN stress.
as a function of gate voltage. The forward GIDL method was chosen here because it yields better spatial resolution and sensitivity. The source terminal can be left ¯oating, grounded or tied to the drain. In this work, the source and drain were short-circuited to avoid any potential drop along the channel. This con®guration reduces parasitic currents in inversion and allows one to determine interface traps located near the source/substrate and drain/substrate junctions as well as in the channel. Furthermore, since interface traps are screened in inversion, the contribution of recombination centers in the Si bulk can be extracted unambiguously. The drain current noise was measured with a noise set-up consisting of a EG&G 5182 ultra low-noise current preampli®er, a HP 3562A Dynamic Signal Analyzer (DSA) and a HP 9000 series desktop computer. The device was biased in its linear regime with dry-cell batteries. The drain current noise signal was AC coupled to EG&G 5182 current preampli®er with a voltage gain between 103 and 108 V/A. The ampli®ed noise signal was then fed outside of the Faraday-cage
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Fig. 2. Time-dependent degradation behavior of (a) type A MOSFETs and of (b) type B MOSFETS upon FN stress. All the lines are only guides for the eye.
to the HP 3562A DSA. An oscilloscope was used to monitor the noise signal in real time while the spectral analysis was being performed. The number of averaging for the noise power spectral density (PSD) was 20. After correction for the gain of the preampli®er, the PSD data were displayed and stored. All the noise spectra were taken in the linear region of device operation with an applied drain-source voltage Vds=50 mV. Both for the virgin and the degraded
devices, good 1/f noise spectra with a frequency index between 0.9 and 1.1 were found at the selected biases. Since the normalized drain current 1/f noise in nMOSFETs is usually found to be inversely proportional to the square of eective gate voltage in the linear regime [18], i.e. SI/I 20(VgsÿVT)ÿ2 we compared the noise measured at the same eective-gate voltages. Here we de®ned S to be the normalized drain current noise as S=SI/I 2 and its change as DS=(SÿS0) where
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S0 SI0 =I 20 is the normalized noise in the virgin devices. The relative changes in 1/f noise, DS/S0, were evaluated at f=20 Hz. 3. Experimental results 3.1. Uniform Fowler±Nordheim injection Positive Fowler±Nordheim injection was performed with a gate voltage Vg=19 V, which corresponds to an oxide ®eld E=9.5 MV/cm. This condition was chosen in order to have an appropriate aging rate of device DC characteristics. Fig. 1(a) shows the drain current degradation of type A MOSFETs, while Fig. 1(b) shows the corresponding change of CP current. Upon the initial two second stress, a large quantity of positive charge was generated at or near the SiO2/Si interface, which is due to electron±hole pair generation by impact ionization in SiO2 [19]. From Fig. 1 it can be seen that this positive charge caused both the I±V and the Icp±Vbase curves to be shifted negatively. However, considering 1/f noise, there is a little in¯uence due to the positive charge. Upon the subsequent stresses this positive charge was removed by the electrons injected from the substrate and acceptor-type interface traps were created, which caused the threshold voltage to be shifted again positively. From Fig. 1(b), it is clear that the interface trap density continued to increase with the stress time from 2 to 1024 s. The interface trap density in the virgin device was found to be about Dit0=7.41010 eVÿ1 cmÿ1 as calculated from CP current [20]. Fig. 2(a) shows the relative changes of 1/f noise, maximum transconductance and maximum charge pumping current for the type A MOSFETs of normal oxide upon FN stress. It can be seen that a good correlation exists between degradation of maximum transconductance gm and the increase of CP current. This fact con®rms that the degradation of maximum transconductance in n-MOSFETs is mainly caused by the creation of interface traps since the CP current mainly senses fast traps at/near the SiO2/S1 interface [20]. The mechanism for gm degradation is the increase of Coulomb scattering by the charged interface traps [21]. Comparing to the degradation of 1/f noise, it is evident that the degradation of 1/f noise is much faster than the degradation of gm and the increase of the fast interface trap density DDit. The FN stress at the same condition was also carried out under the same condition on the type B MOSFETs of nitrided oxide. The result is shown in Fig. 2(b). It can be seen that the degradation of gm and the increase of 1/f noise were greatly reduced compared to the normal oxide devices (type A). Furthermore, it should be mentioned that the degra-
Fig. 3. The relative change of 1/f noise DS/S0 versus the threshold-voltage shift due to trapped oxide charge DVot upon FN stress. The solid line indicates a linear relationship between DS/S0 and DVot.
dation of maximum transconductance gm and the 1/f noise increase in the type B MOSFETs tend to saturate at a later stage upon further increase of stress time. However, like the results presented in Fig. 2(a), a good correlation between maximum transconductance degradation and CP current is also well established for the nitrided MOSFETs. In order to examine a possible correlation between the negative trapped oxide-charge and the 1/f noise, we performed GIDL measurements to evaluate the oxide charge build-up upon the series of FN stresses. It has been shown that the shift in the midgap voltage represents approximately the solo in¯uence of trapped oxide charge on the MOSFET threshold voltage shift [22]. In accordance with the Shockley-Read-Hall theory, the GIDL current reach its maximum when the surface potential is close to midgap [16]. Therefore, the shift of the peak position of GIDL current corresponds to the portion of MOSFET threshold voltage shift solely due to trapped oxide charge, DVot. Compared to a method of using the extrapolated midgap subthreshold current to extract DVot as proposed by PJ McWhorter and PS Winolcur [23], the GIDL method is much more direct and accurate in determining the threshold shift due to oxide charge. Fig. 3 shows the relative change in 1/f noise in both the normal oxide and in the nitrided oxide MOSFETs against the extracted DVot. It can be seen that the 1/f noise in the normal-oxide MOSFETs under FN stress degraded faster than the build-up of the trapped oxide charge whereas the 1/f noise in the nitrided MOSFETs seems to degrade somewhat slower than the trapped-oxide charge creation rate.
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increases, the damage zone become saturated in the LDD region and extends to the channel. This twostage degradation is also visible in the 1/f noise behavior. Both for the virgin and the degraded devices, the gate bias dependence of 1/f noise was ®rst checked by plotting SI/I 2 vs. Vg in log±log scale. At high gate biases (Vg>2 V for our devices), we found that the noise was independent of gate bias. Hence the 1/f noise at high gate biases can be regarded mainly arising from the series resistance. In Fig. 5, the relative changes of 1/f noise at two gate biases which represent the channel noise and the series resistance noise are shown. It can be clearly seen that the channel 1/f noise shows no saturation, whereas the 1/f noise change due to series resistance shows saturation after 700 s stressing. Like in the case of FN stress, it is found that both for the channel and series resistance the degradation in 1/f noise increases much faster than the degradation of gm or CP current Icp, However, HC stress cause 1/f noise to increase much more dramatically than FN stress, i.e. 20% gm degradation corresponds to 500% increase in 1/f noise in the case of HC stress and to only 60% increase in 1/f noise in the case of FN stress.
4. Discussion
Fig. 4. Degradation of MOSFET I±V characteristics (a) and CP current (b) upon the HC stress at maximum substrate current condition: Vg=2 V, Vd=5 V.
3.2. Non-uniform hot-carrier injection Fig. 4 shows the drain-current degradation and CP current for the IMEC LDD n-MOSFETs subjected to HC stress time from 2 to 4094 s. The stresses were carried out at the condition of maximum substrate current, which is known to be the severest condition for HC stress [24]. Compared to FN stress, the thresholdvoltage does not shift much since the damage is mainly located near the drain. Fig. 5 shows the time-dependence of the relative change of 1/f noise, maximum transconductance gm and the maximum charge pumping current for IMEC LDD n-MOSFETs. By comparing the degradation of gm and the CP current plotted in Fig. 5, it is apparent that two dierent degradation mechanisms are involved. We attribute this observation to two-stage degradation in LDD n-MOSFETs [25]. For LDD devices, the degradation starts near the border between the low-doped drain and the high-doped drain where the electric ®eld peaks. As the stress time
The above experimental results demonstrated that the degradation in 1/f noise proceeds with a dierent rate than the degradation of maximum transconductance and CP current. This fact strongly suggests that the 1/f noise is not directly associated with interface trap creation. It is well known that the CP current is mainly a direct measure of the average density of the interface traps within a few tenth of electron volts around midgap, whereas the 1/f noise is associated with the traps a few kT around the Fermi level. Following the classical McWhorter's number ¯uctuation model [9,26±28], the normalized drain-current 1/f noise in the linear regime of device operation can be expressed as S
SI q2 kTNt Ef , I2 fLWC 2ox Vg ÿ VT 2 g
1
where Cox is the oxide capacitance per unit area, Nt(Ef ) is the trap density per unit energy per unit area at the trap quasi-Fermi level Ef and g is the tunnelling coecient. The rest symbols have their usual meanings. Assuming that the oxide capacitance does not change very much upon stress, it is expected that the relative change of 1/f noise at the ®xed eective gate-biases is directly proportional to the relative change of the trap density near the Fermi-level as
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Fig. 5. Time-dependent degradation behavior of LDD n-MOSFETs subjected to HC stress at maximum substrate current condition: Vg=2 V, Vd=5 V. All the lines are only guides for the eye.
DS DNt Ef : S0 Nt0 Ef
2
At the gate biases we used, the devices were under the moderate inversion. The quasi-Fermi level is then close to the conduction band edge. Therefore if the 1/f noise is directly associated with interface trap creation, according to Eq. (2), our experimental observation that the 1/f noise increase faster than the CP current would imply that the rate of interface trap creation is higher close to the conduction-band edge. In order to check this point, deep level transient spectroscopy (DLTS) measurements were performed. Our DLTS results shows the opposite trend: the interface traps near the midband gap are created faster than the interface traps close to the conduction-band edge upon FN stress [29]. Similar results has also been reported previously by using a modi®ed CP technique for nMOSFETs [30]. Therefore, the 1/f increase is not likely to be associated with interface traps. So the question remains to be answered is what are those traps created by stress which determine the 1/f noise and why they are created at a faster rate? In a new nomenclature proposed by Fleetwood et al. [15], interface traps are de®ned as the traps exactly at the SiO2/Si interface and oxide traps as the traps in the oxide ®lm which do not communicate with Si bulk on the experiment time scale. The third class of traps, called `border traps' or `switching states' are physically similar to oxide traps, but are located close enough to the SiO2/Si interface (typically within 3 nm to the interface) that they can exchange charge with Si bulk
on a short time scale. According to the above de®nition, the 1/f noise is then expected to be determined by the border traps while the CP current is determined by the interface traps. According to DiMaria et al. [31], hole trapping and H+ migration are important for the creation of those `border' traps. In the case of positive FN injection, holes and/or H+ can be generated by high energy tail hot-electrons near the oxide/ polysilicon gate junction. These mobile holes and/or H+ produced in the oxide bulk move under the applied ®eld to the SiO2/Si interface. When those trapped holes recombine with the injected electrons, another type of interface traps that are dierent from the Si dangling-bond type defects traps are produced. However, the mobile holes can be trapped on their way at some deep sites, i.e. oxygen vacancies. These trapped holes and/or H+ can acts as `slow states'. Very close to the interface the trapped holes could tunnel into the Si bulk under the applied ®eld, which slows down the trap creation at or very close to the interface. Therefore, the rate of interface trap creation is expected to be high at beginning and then decrease, whereas the oxide trap creation still proceeds. The above simple picture explains qualitatively the fact that 1/f noise increase relatively faster than the CP current since CP current only sense the interface traps. Considering the case of HC injection, hot-electrons and holes are injected at the same time from the Si bulk near the drain into the oxide ®lm. Therefore, compared to FN stress, the space distribution of traps is closer to SiO2/Si interface, in another word more `border' type traps are created than interface type
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Fig. 6. The relative change of 1/f noise versus the relative change of maximum transconductance.
traps. This is why we have seen that HC stress caused much more easily 1/f noise to increase rather than to cause gm to decrease as compared to FN stress. Considering the nitrided devices, the nitridation has two main eects. Firstly, the incorporated nitrogen can replace processing-remained hydrogen at SiO2/Si interface which greatly suppresses the interface trap creation [32] due to a higher energy of Si±N bond. Secondly, the oxynitride layers formed near the interfaces, which are similar to silicon nitride (Si3N4), act as blocking barriers to moving species such as holes and H+. Therefore, the creation of oxide traps are also suppressed, hence the 1/f noise. Finally, an empirical relationship between the degradation of 1/f noise and the degradation of static device parameters has been examined. In Fig. 6, the relative change in 1/f noise is plotted in a log±linear scale versus the relative change of gm. The striking result as presented in Fig. 6 is that the relative change in 1/f noise appears to be an exponential function of the change of maximum transconductance for both the case of FN stress and for the case of HC stress. This exponential relationship can be expressed as DS=S0 1A exp BDgm =gm0
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MOSFETs. Here, starting from a virgin device, the empirical relation is con®rmed on a single device. Combining the charge pumping results, the empirical relation indicates a correlation existed between the increase of 1/f noise and the increase of the interface trap density, roughly of the form ln(DS ) 0 DNit. It should be mentioned that this kind of relationship have been also reported recently for p-MOSFETs [35,36], where hydrogen transport was believed leading to both the latent interface-trap build-up and 1/f noise increase. It is quite surprising that such an empirical relationship also valid for p-MOSFETs because for pMOSFETs mobility ¯uctuations are often reported to be the origin of the 1/f noise [28,37]. As demonstrated in this work, the increase of interface trap density itself does not cause the increased 1/f noise in the devices. As suggested by DM Fleetwood et al. [36], a kind of strong link may be existed between the processes that lead both to the increased 1/f noise and the increased interface trap density. However, the physical picture is still not yet clear. But the relation itself may be very interesting for practical use of 1/f noise as a tool for device reliability assessment.
5. Conclusions For both FN stress and HC stress, a good correlation between the degradation of maximum transconductance gm and charge pumping current has been well established, which indicates that the degradation of the MOSFETs DC characteristics is mainly due to the creation of interface traps (the fast states). In both cases, the degradation of 1/f noise is not linearly correlated with CP current or maximum transconductance degradation. The noise is shown to degrade faster than the degradation of maximum transconductance and charge pumping current. An exponential relationship is observed between 1/f noise degradation and degradation of maximum transconductance.
3
with A and B empirical constants. It should be noted that in the case of FN stress, for dierent gate biases, for normal oxide and for nitrided oxide, and for the occasional best device of the batch, all the data seem to follow the same line. This fact demonstrates the generality of Eq. (3). This type of empirical relation, the 1/f noise is an exponential function of transconductance, was ®rstly proposed by E. Simoen and C. Claeys [33,34] based on a study of the noise dispersion and gm dispersion on a large number of SOI
Acknowledgements The authors wish to thank F. Pio of S.G.S. Thomson for providing the samples. The authors would also like to thank E. Simoen of IMEC Leuven for fruitful discussions and sending us the draft of his recent publication on 1/f noise in hot-carrier degraded MOSFETs. One of the author (L. Ren) wishes to thank Swiss Science Foundation for partial ®nancial support.
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