- Email: [email protected]
In0.2Ga0.8As
Journal of Crystal Growth 323 (2011) 99–102
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Journal of Crystal Growth journal homepage: www.elsevier.com/locate/jcrysgro
Low interfacial density of states around midgap in MBE-Ga2O3(Gd2O3)/In0.2Ga0.8As C.A. Lin a,n, H.C. Chiu b, T.H. Chiang b, Y.C. Chang b, T.D. Lin b, J. Kwo a,c,1, W.-E. Wang d, J. Dekoster d, M. Heyns d,e, M. Hong b,2 a
Department of Physics, National Tsing Hua University, Hsinchu 30013, Taiwan Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan c Center for Condensed Matter Sciences, National Taiwan University, Taipei 10617, Taiwan d Interuniversity Microelectronics Center (IMEC vzw), 3001 Leuven, Belgium e Katholieke Universiteit Leuven, 3001 Leuven, Belgium b
a r t i c l e i n f o
abstract
Available online 23 February 2011
Systematic temperature-dependent capacitance-voltage and conductance measurements were used to study the electrical characteristics of molecular beam epitaxy (MBE) and atomic layer deposition (ALD) oxides on In0.2Ga0.8As/GaAs. The distribution of interfacial density of states (Dit) within the band gap of In0.2Ga0.8As was deduced with the conductance method. The MBE-grown Ga2O3(Gd2O3)/In0.2Ga0.8As, with an excellent tailored interface, has given Dit values of 5 1011 eV 1 cm 2 above, 2 1012 eV 1 cm 2 below, and 1–7 1012 eV 1 cm 2 around the mid-gap region (0.5–0.7 eV above valence band maximum (EV)); the high Dit value near the mid-gap, extracted at 100 and 150 1C, may be related to the temperature effect, which tends to induce more trap excitations. In contrast, the ALD-Al2O3/In0.2Ga0.8As has yielded higher Dit values of41013 eV 1 cm 2 around the mid-gap region. & 2011 Elsevier B.V. All rights reserved.
Keywords: A3. Molecular beam epitaxy B2. Semiconducting gallium arcsenide B2. Dielectric materials B3. Field effect transistors
1. Introduction Si-based metal-oxide-semiconductor field-effect-transistors (MOSFETs) for high-speed applications are approaching the scaling limit. Their InGaAs counterparts with high-k dielectrics are now considered to be a viable candidate for technologies beyond the 15 nm node complementary MOS (CMOS). In0.2Ga0.8As, a material as the channel for GaAs-based high electron mobility transistor (HEMT) [1], is attractive due to its high electron mobility and excellent strained-growth on GaAs [2]. Using In0.2Ga0.8As as a channel material offers advantages to avoid the band to band tunneling problem, often found in small band-gap materials such as InGaAs with indium contents exceeding 50%. Furthermore, hetero-structures of molecular beam epitaxy (MBE)-grown Al2O3/Ga2O3(Gd2O3) [GGO] [3–5] on In0.2Ga0.8As/GaAs have achieved low interfacial density of states (Dit) and remarkable thermal stability under rapid thermal annealing (RTA) over 850 1C [6], important for fabricating self-aligned inversion-channel MOSFET [7,8]. Capacitance–voltage (C–V) characteristics of the p- and n-MOSCAPs (MOS capacitors) with different metal gates
n
Corresponding author. E-mail addresses: [email protected] (C.A. Lin), [email protected] (J. Kwo), [email protected] (M. Hong). 1 Tel.: +886 3 5742800; fax: +886 3 5723052. 2 Tel.: +886 3 5742283; fax: + 886 3 5722366. 0022-0248/$ - see front matter & 2011 Elsevier B.V. All rights reserved. doi:10.1016/j.jcrysgro.2011.01.108
have shown weak frequency dispersion at accumulation, and excellent modulation of the Fermi-level with the gate bias across the entire band-gap [9]. Besides the MBE approach, atomic layer deposited (ALD) Al2O3 [10–13] and HfO2 [14] on InGaAs have yielded low Dit’s without using interfacial passivation layers (IPL). In addition, Si and Ge as IPL between GaAs and gate dielectrics were also employed [15–18]. However, the IPL increases the thickness budget, making it difficult for further down-scaling of equivalent oxide thickness (EOT). Therefore, the direct deposition of high-k dielectrics on the desired high carrier mobility channel is preferred, regardless of the deposition techniques, MBE or ALD. Using the ALD approach, residual native oxides of In2O3 and Ga2O3, and their hydro-oxides, however, were left at the ALD-oxide/InGaAs interface, despite the fact that most of the native oxides, including arsenic oxides, were removed during the ALD process [11,14]. In contrast, there are no such native oxides at the interfaces using MBE-GGO [19]. Then, there could be differences in the measured Dit’s in the MOS capacitors between MBE-GGO and ALD-oxides, particularly the Dit distribution within the band gap. In this paper, we have studied the C–V characteristics of the p- and n-MOSCAPs with both MBE-GGO and ALD-Al2O3 on In0.2Ga0.8As/GaAs under various temperatures ranging from room temperature to 150 1C. The conductance method is one of the most commonly adopted techniques and is sensitive to extract
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C.A. Lin et al. / Journal of Crystal Growth 323 (2011) 99–102
which induces unnecessary trap excitations at higher temperatures; hence, they may not reveal the real Dit values. Fig. 2 shows the corresponding C–V curves for both n- and p-MOSCAPs using ALD- Al2O3. These are samples C and D from Table 1. In contrast to the MBE-GGO case, the C-V characteristics are obviously different for n- and p-MOSCAPs, with the frequency dispersions in C–V curves of n-MOSCAP being larger than those of the p-MOSCAP at each temperature. Comparing the C–V characteristics of n- and p-MOSCAPs using MBE-GGO and ALD- Al2O3, e.g. the frequency dispersions at accumulation, it is clear that the former samples have lower Dit than the latter. In general, both capacitance and conductance as a function of gate bias are also frequency-dependent since interfacial trap densities respond with measurement frequencies. The conductance method, taking the advantage of the energy loss that occurred when carriers are captured and emitted from the interface traps, is implemented in the depletion region where the contribution from minority carriers is negligible. When the CV characteristics were measured, the corresponding conductance– voltage (GV) data were simultaneously obtained. The peak of the Gp/o versus o curve measured at each given gate bias was used to calculate the Dit values, whose energy level was determined from the frequency corresponding to the maximum of Gp/o curve, according to the interface trap characteristic time [12]. Note that Gp is the parallel conductance and o is the measured frequency. Moreover, the coupling between minority carriers and interface traps complicates the Dit extraction [20]. Thus, the Dit determined from the conductance-frequency relation in the depletion region is more representative for the real value. With the aforementioned considerations, we plotted the Dit distribution versus energy only from the measured results with the gate bias in the depletion region. Fig. 3 shows a Dit distribution within the band gap of In0.2Ga0.8As with values of 5 1011 eV 1 cm 2 above and 2 1012 eV 1 cm 2 below the midgap region for the MBE-GGO/InGaAs; these data were obtained with the conductance measurements at room temperature, with the former values from the n-type samples and the latter from the p-type. The Dit values in the mid-gap region, with the energy 0.5–0.7 eV above the valence band maximum (EV) were obtained at 100 and 150 1C. The values are higher than those at 0.3–0.4 and 0.8–0.9 eV above EV, about 1–7 1012 eV 1 cm 2; the difference in the Dit values may mainly be due to more temperature-induced trap excitations. In comparison and as expected, the Dit values of the ALD-Al2O3 samples around the midgap region are larger than those of the MBE-GGO samples, as shown in Fig. 3. The higher Dit values can be elucidated from the low-frequency C–V curves at 150 1C, in which a ‘‘dip’’ capacitance in the depletion region is higher for ALD-Al2O3 case (Fig. 2) than that for MBE-GGO sample (Fig. 1). In general, a lower ‘‘dip’’ capacitance in the depletion region for low frequency C–V curves reveals a smaller Dit value. A similar Dit
the Dit values [20]. It was used here to plot the Dit distribution within the band gap of In0.2Ga0.8As for both the MBE and ALD dielectrics. In order to quantify the Dit values, systematic electrical measurement and the methodology to determine them were employed. Different Dit distributions around the In0.2Ga0.8As mid-gap between these two gate dielectrics also led to markedly different device performances of inversion-channel MOSFETs.
2. Experimental The wafers were grown in a multi-chamber MBE/analysis system [3]. Si- and Be-doped (n- and p-type) In0.2Ga0.8As (7 nm)/GaAs (90 nm) epi-layers with doping concentrations of (0.5–5) 1017 cm 3 were grown on 2-inch n- and p-type GaAs (0 0 1) wafers, respectively, in the GaAs-based solid-source MBE chamber. The freshly grown InGaAs/GaAs wafers were then in-situ moved to the oxide chambers for the deposition of GGO and Al2O3-cap [6]. The details on the growth of the heterostructures were given earlier [6]. The amorphous Al2O3 capping layer 3 nm thick was used to prevent GGO from absorbing moisture during air exposure and processing. For the ALD samples, the freshly MBE-grown InGaAs/GaAs wafers were ex-situ transferred to an ALD reactor to deposit Al2O3. The ALD-oxide growth was detailed elsewhere [10]. Table 1 summarizes the conditions of four samples studied in this work. Before the MOSCAP fabrication, each sample underwent a post deposition annealing (PDA) treatment, as shown in Table 1, to improve the interfacial properties and decrease the bulk traps, thus ensuring the attainment of optimized C-V characteristics. The gate metals of capacitors are Au/Ti and Ni for n- and p-type InGaAs, respectively, which was thermal/e-beam evaporated through a shadow mask of 7.85 10 5 cm2 in area. Both capacitance and conductance were measured using Agilent 4284 with sample temperatures at 25, 100, and 150 1C, respectively. Recently, a new concept was proposed to determine Dit in the whole band gap of InGaAs according to the trap characteristic time, which was related to the carrier trapping and emission from an interface trap state [21]. The determination of Dit values around the mid-gap region of In0.2Ga0.8As is possible via the conductance measurement at elevated temperatures.
3. Results and discussion Fig. 1 shows the C–V curves for MBE-GGO on both n- and p-type InGaAs, measured at 25, 100, and 150 1C, respectively. Note that these are samples A and B from Table 1. At each temperature, the C–V curves of both n- and p-type are similar to each other, in terms of small dispersion at accumulation. Moreover, as the temperature increases, the ‘‘stretch-out’’ phenomena were observed. These may be caused by the temperature effect,
Table 1 Information for MOSCAPs and the corresponding thermal treatment. Sample #
A
B
C
D
In0.2Ga0.8As channel Doping (cm 3) Oxide Thickness Post deposition annealing (PDA)
n-type 4 1017 (Si) MBE-Al2O3/GGO 3 nm/8 nm 300 1C 10 min + 850 1C 15 s, He Ti/Au
p-type 1 1017 (Be) MBE-Al2O3/GGO 3 nm/5 nm 300 1C 10 min +850 1C 15 s, He Ni
n-type 4 1017 (Si) ALD-Al2O3 9 nm 500 1C 1 h +600 1C 15 s, N2 Ti/Au
p-type 5 1016 (Be) ALD-Al2O3 9 nm 500 1C 1 h, N2
Gate metal
Ni
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Fig. 1. Capacitance-voltage (C–V) curves of MBE-Al2O3/GGO/In0.2Ga0.8As gate stack with varying temperature: (a) 25 1C, (b) 100 1C, (c) 150 1C of n-In0.2Ga0.8As (sample A); and (d) 25 1C; (e) 100 1C; (f) 150 1C of p-In0.2Ga0.8As (sample B).
Fig. 2. Capacitance–voltage (C–V) curves of ALD-Al2O3/In0.2Ga0.8As gate stack with varying temperature: (a) 25 1C, (b) 100 1C, (c) 150 1C of n-In0.2Ga0.8As (sample C); and (d) 25 1C, (e) 100 1C, (f) 150 1C of p-In0.2Ga0.8As (sample D).
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of 5 1011 eV 1 cm 2 above and 2 1012 eV 1 cm 2 below the midgap region. Furthermore, the large Dit peak feature in the ALD-Al2O3 case degrades the device performance of inversionchannel In0.2Ga0.8As MOSFETs.
Acknowledgments The authors wish to thank National Science Council, Taiwan for supporting this work under Grants of nos. NSC-98-2120-M-007-002 and NSC-96-2628-M-007-003-MY3. We wish to thank W.H. Chang, L.H. Lai, Y.J. Chu, and Y.H. Chang for their technical supports. References
Fig. 3. Comparisons of Dit versus trap energy level of MBE-Al2O3/GGO/In0.2Ga0.8As and ALD-Al2O3/In0.2Ga0.8As gate stacks, derived using temperature-dependent conductance method.
distribution with noticeable peak-like features near the midgap region was also observed in the ALD-Al2O3/GaAs [21]. The Dit distribution may explain the device performances in inversion-channel InGaAs MOSFETs. For example, self-aligned inversion-channel In0.2Ga0.8As MOSFETs with MBE-Al2O3/GGO as the gate dielectric and TiN as the metal gate gave a drain current Id of 1.5 mA/mm (at VG of 4 V and VD of 2 V), and a transconductance Gm of 1.7 mS/mm (at VD of 2 V) for a device with gate length of 4 mm [22]. In comparison, the inversion-channel In0.2Ga0.8As MOSFETs with ALD-Al2O3 as the gate dielectric and TiAu as the metal gate gave an Id of 0.12 mA/mm measured at VG of 12 V and VD of 2 V for a device with a gate length of 1 mm [23]. The different device performances of the two inversion-channel InGaAs MOSFETs have the strong correlations with the Dit distribution around the midgap because the Fermi level is driven across the midgap to invert the minority carriers. Note that in an early work with thick GGO as the gate dielectric, inversionchannel GaAs MOSFETs yielded a drain current Id of 30 mA/mm (at VG of 7 V and VD of 5 V) for a device with gate length of 1 mm [24]. 4. Conclusion The Dit distributions within the In0.2Ga0.8As band gap for both MBE-GGO and ALD-Al2O3 were obtained using the conductance method measured at temperatures from 25 to 150 1C. The temperature-dependent C-V characterisitcs of the n- and p-samples using MBE-GGO show similarities in terms of small dispersion at accumulation, which are different from those using ALD-Al2O3 as the dielectrics. Despite the trap excitations possibly caused by the temperature effect, the MBE-Al2O3/GGO/InGaAs exhibited Dit’s
[1] Y.L. Lai, E.Y. Chang, C.Y. Chang, T.K. Chen, T.H. Liu, S.P. Wang, T.H. Chen, C.T. Lee, IEEE Electron. Dev. Lett. 17 (1996) 229. [2] Y.J. Lee, C.H. Lee, L.T. Tung, T.H. Chiang, T.Y. Lai, J. Kwo, C.H. Hsu, M. Hong, J. Phys. D: Appl. Phys. 43 (2010) 135101. [3] M. Hong, J.P. Mannaerts, J.E. Bowers, J. Kwo, M. Passlack, W.-Y. Hwang, L.W. Tu, J. Cryst. Growth 175–176 (1997) 422. [4] J. Kwo, M. Hong, B. Busch, D.A. Muller, Y.J. Chabal, A.R. Kortan, J.P. Mannaerts, B. Yang, P. Ye, H. Gossmann, A.M. Sergent, K.K. Ng, J. Bude, W.H. Schulte, E. Garfunkel, T. Gustafsson, J. Cryst. Growth 251 (2003) 645. [5] M. Hong, J. Kwo, T.D. Lin, M.L. Huang, MRS Bull. 34 (2009) 514. [6] K.H. Shiu, T.H. Chiang, P. Chang, L.T. Tung, M. Hong, J. Kwo, W. Tsai, Appl. Phys. Lett. 92 (2008) 172904. [7] J.F. Zheng, W. Tsai, T.D. Lin, Y.J. Lee, C.P. Chen, M. Hong, J. Kwo, S. Cui, T.P. Ma, Appl. Phys. Lett. 91 (2007) 223502. [8] H.C. Chin, M. Zhu, G.S. Samudra, Y.C. Yeo, J. Electrochem. Soc. 155 (2008) H464. [9] Y.D. Wu, T.D. Lin, T.H. Chiang, Y.C. Chang, H.C. Chiu, Y.J. Lee, M. Hong, C.A. Lin, J. Kwo, J. Vac. Sci. Technol. B 28 (2010) 3. [10] P.D. Ye, G.D. Wilk, B. Yang, J. Kwo, H.-J.L. Gossmann, M. Hong, K.K. Ng, J. Bude, Appl. Phys. Lett. 84 (2004) 434. [11] M.L. Huang, Y.C. Chang, C.H. Chang, Y.J. Lee, P. Chang, J. Kwo, T.B. Wu, M. Hong, Appl. Phys. Lett. 87 (2005) 252104. [12] G. Brammertz, H.-C. Lin, K. Martens, D. Mercier, S. Sioncke, A. Delabie, W.E. Wang, M. Caymax, M. Meuris, M. Heyns, Appl. Phys. Lett. 93 (2008) 183504. [13] M. Xu, Y.Q. Wu, O. Koybasi, T. Shen, P.D. Ye, Appl. Phys. Lett. 94 (2009) 212104. [14] Y.C. Chang, M.L. Huang, K.Y. Lee, Y.J. Lee, T.D. Lin, M. Hong, J. Kwo, T.S. Lay, C.C. Liao, K.Y. Cheng, Appl. Phys. Lett. 92 (2008) 072901. [15] S. Koveshnikov, W. Tsai, I. Ok, J.C. Lee, V. Torkanov, M. Yakimov, S. Oktyabrsky, Appl. Phys. Lett. 88 (2006) 022106. [16] J.P. de Souza, E. Kiewra, Y. Sun, A. Callegari, D.K. Sadana, G. Shahidi, D.J. Webb, J. Fompeyrine, R. Germann, C. Rossel, C. Marchiori, Appl. Phys. Lett. 92 (2008) 153508. [17] H.-S. Kim, I. Ok, M. Zhang, F. Zhu, S. Park, J. Yum, H. Zhao, J.C. Lee, J. Oh, P. Majhi, Appl. Phys. Lett. 92 (2008) 032907. [18] Y. Sun, E.W. Kiewra, J.P. de Souza, J.J. Bucchignano, K.E. Fogel, D.K. Sadana, G.G. Shahidi, IEEE Electron. Dev. Lett. 30 (2009) 5. [19] M. Hong, Z.H. Lu, J. Kwo, A.R. Kortan, J.P. Mannaerts, J.J. Krajewski, K.C. Hsieh, L.J. Chou, K.Y. Cheng, Appl. Phys. Lett. 76 (2000) 312. [20] E.H. Nicollian, J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology, 286, John Wiley & Sons, New York, 1981. [21] G. Brammertz, K. Martens, S. Sioncke, A. Delabie, M. Caymax, M. Meuris, M. Heyns, Appl. Phys. Lett. 91 (2007) 133510. [22] C.P. Chen, T.D. Lin, Y.J. Lee, Y.C. Chang, M. Hong, J. Kwo, Solid State Electron. 52 (2008) 1615. [23] Y. Xuan, H.C. Lin, P.D. Ye, G.D. Wilk, Appl. Phys. Lett. 88 (2006) 263518. [24] Y.C. Wang, M. Hong, J.M. Kuo, J.P. Mannaerts, J. Kwo, H.S. Tsai, J.J. Krajewski, J.S. Weiner, Y.K. Chen, A.Y. Cho, Mater. Res. Soc. Symp. Proc. 573 (1999) 219.
Contents lists available at ScienceDirect
Journal of Crystal Growth journal homepage: www.elsevier.com/locate/jcrysgro
Low interfacial density of states around midgap in MBE-Ga2O3(Gd2O3)/In0.2Ga0.8As C.A. Lin a,n, H.C. Chiu b, T.H. Chiang b, Y.C. Chang b, T.D. Lin b, J. Kwo a,c,1, W.-E. Wang d, J. Dekoster d, M. Heyns d,e, M. Hong b,2 a
Department of Physics, National Tsing Hua University, Hsinchu 30013, Taiwan Department of Materials Science and Engineering, National Tsing Hua University, Hsinchu 30013, Taiwan c Center for Condensed Matter Sciences, National Taiwan University, Taipei 10617, Taiwan d Interuniversity Microelectronics Center (IMEC vzw), 3001 Leuven, Belgium e Katholieke Universiteit Leuven, 3001 Leuven, Belgium b
a r t i c l e i n f o
abstract
Available online 23 February 2011
Systematic temperature-dependent capacitance-voltage and conductance measurements were used to study the electrical characteristics of molecular beam epitaxy (MBE) and atomic layer deposition (ALD) oxides on In0.2Ga0.8As/GaAs. The distribution of interfacial density of states (Dit) within the band gap of In0.2Ga0.8As was deduced with the conductance method. The MBE-grown Ga2O3(Gd2O3)/In0.2Ga0.8As, with an excellent tailored interface, has given Dit values of 5 1011 eV 1 cm 2 above, 2 1012 eV 1 cm 2 below, and 1–7 1012 eV 1 cm 2 around the mid-gap region (0.5–0.7 eV above valence band maximum (EV)); the high Dit value near the mid-gap, extracted at 100 and 150 1C, may be related to the temperature effect, which tends to induce more trap excitations. In contrast, the ALD-Al2O3/In0.2Ga0.8As has yielded higher Dit values of41013 eV 1 cm 2 around the mid-gap region. & 2011 Elsevier B.V. All rights reserved.
Keywords: A3. Molecular beam epitaxy B2. Semiconducting gallium arcsenide B2. Dielectric materials B3. Field effect transistors
1. Introduction Si-based metal-oxide-semiconductor field-effect-transistors (MOSFETs) for high-speed applications are approaching the scaling limit. Their InGaAs counterparts with high-k dielectrics are now considered to be a viable candidate for technologies beyond the 15 nm node complementary MOS (CMOS). In0.2Ga0.8As, a material as the channel for GaAs-based high electron mobility transistor (HEMT) [1], is attractive due to its high electron mobility and excellent strained-growth on GaAs [2]. Using In0.2Ga0.8As as a channel material offers advantages to avoid the band to band tunneling problem, often found in small band-gap materials such as InGaAs with indium contents exceeding 50%. Furthermore, hetero-structures of molecular beam epitaxy (MBE)-grown Al2O3/Ga2O3(Gd2O3) [GGO] [3–5] on In0.2Ga0.8As/GaAs have achieved low interfacial density of states (Dit) and remarkable thermal stability under rapid thermal annealing (RTA) over 850 1C [6], important for fabricating self-aligned inversion-channel MOSFET [7,8]. Capacitance–voltage (C–V) characteristics of the p- and n-MOSCAPs (MOS capacitors) with different metal gates
n
Corresponding author. E-mail addresses: [email protected] (C.A. Lin), [email protected] (J. Kwo), [email protected] (M. Hong). 1 Tel.: +886 3 5742800; fax: +886 3 5723052. 2 Tel.: +886 3 5742283; fax: + 886 3 5722366. 0022-0248/$ - see front matter & 2011 Elsevier B.V. All rights reserved. doi:10.1016/j.jcrysgro.2011.01.108
have shown weak frequency dispersion at accumulation, and excellent modulation of the Fermi-level with the gate bias across the entire band-gap [9]. Besides the MBE approach, atomic layer deposited (ALD) Al2O3 [10–13] and HfO2 [14] on InGaAs have yielded low Dit’s without using interfacial passivation layers (IPL). In addition, Si and Ge as IPL between GaAs and gate dielectrics were also employed [15–18]. However, the IPL increases the thickness budget, making it difficult for further down-scaling of equivalent oxide thickness (EOT). Therefore, the direct deposition of high-k dielectrics on the desired high carrier mobility channel is preferred, regardless of the deposition techniques, MBE or ALD. Using the ALD approach, residual native oxides of In2O3 and Ga2O3, and their hydro-oxides, however, were left at the ALD-oxide/InGaAs interface, despite the fact that most of the native oxides, including arsenic oxides, were removed during the ALD process [11,14]. In contrast, there are no such native oxides at the interfaces using MBE-GGO [19]. Then, there could be differences in the measured Dit’s in the MOS capacitors between MBE-GGO and ALD-oxides, particularly the Dit distribution within the band gap. In this paper, we have studied the C–V characteristics of the p- and n-MOSCAPs with both MBE-GGO and ALD-Al2O3 on In0.2Ga0.8As/GaAs under various temperatures ranging from room temperature to 150 1C. The conductance method is one of the most commonly adopted techniques and is sensitive to extract
100
C.A. Lin et al. / Journal of Crystal Growth 323 (2011) 99–102
which induces unnecessary trap excitations at higher temperatures; hence, they may not reveal the real Dit values. Fig. 2 shows the corresponding C–V curves for both n- and p-MOSCAPs using ALD- Al2O3. These are samples C and D from Table 1. In contrast to the MBE-GGO case, the C-V characteristics are obviously different for n- and p-MOSCAPs, with the frequency dispersions in C–V curves of n-MOSCAP being larger than those of the p-MOSCAP at each temperature. Comparing the C–V characteristics of n- and p-MOSCAPs using MBE-GGO and ALD- Al2O3, e.g. the frequency dispersions at accumulation, it is clear that the former samples have lower Dit than the latter. In general, both capacitance and conductance as a function of gate bias are also frequency-dependent since interfacial trap densities respond with measurement frequencies. The conductance method, taking the advantage of the energy loss that occurred when carriers are captured and emitted from the interface traps, is implemented in the depletion region where the contribution from minority carriers is negligible. When the CV characteristics were measured, the corresponding conductance– voltage (GV) data were simultaneously obtained. The peak of the Gp/o versus o curve measured at each given gate bias was used to calculate the Dit values, whose energy level was determined from the frequency corresponding to the maximum of Gp/o curve, according to the interface trap characteristic time [12]. Note that Gp is the parallel conductance and o is the measured frequency. Moreover, the coupling between minority carriers and interface traps complicates the Dit extraction [20]. Thus, the Dit determined from the conductance-frequency relation in the depletion region is more representative for the real value. With the aforementioned considerations, we plotted the Dit distribution versus energy only from the measured results with the gate bias in the depletion region. Fig. 3 shows a Dit distribution within the band gap of In0.2Ga0.8As with values of 5 1011 eV 1 cm 2 above and 2 1012 eV 1 cm 2 below the midgap region for the MBE-GGO/InGaAs; these data were obtained with the conductance measurements at room temperature, with the former values from the n-type samples and the latter from the p-type. The Dit values in the mid-gap region, with the energy 0.5–0.7 eV above the valence band maximum (EV) were obtained at 100 and 150 1C. The values are higher than those at 0.3–0.4 and 0.8–0.9 eV above EV, about 1–7 1012 eV 1 cm 2; the difference in the Dit values may mainly be due to more temperature-induced trap excitations. In comparison and as expected, the Dit values of the ALD-Al2O3 samples around the midgap region are larger than those of the MBE-GGO samples, as shown in Fig. 3. The higher Dit values can be elucidated from the low-frequency C–V curves at 150 1C, in which a ‘‘dip’’ capacitance in the depletion region is higher for ALD-Al2O3 case (Fig. 2) than that for MBE-GGO sample (Fig. 1). In general, a lower ‘‘dip’’ capacitance in the depletion region for low frequency C–V curves reveals a smaller Dit value. A similar Dit
the Dit values [20]. It was used here to plot the Dit distribution within the band gap of In0.2Ga0.8As for both the MBE and ALD dielectrics. In order to quantify the Dit values, systematic electrical measurement and the methodology to determine them were employed. Different Dit distributions around the In0.2Ga0.8As mid-gap between these two gate dielectrics also led to markedly different device performances of inversion-channel MOSFETs.
2. Experimental The wafers were grown in a multi-chamber MBE/analysis system [3]. Si- and Be-doped (n- and p-type) In0.2Ga0.8As (7 nm)/GaAs (90 nm) epi-layers with doping concentrations of (0.5–5) 1017 cm 3 were grown on 2-inch n- and p-type GaAs (0 0 1) wafers, respectively, in the GaAs-based solid-source MBE chamber. The freshly grown InGaAs/GaAs wafers were then in-situ moved to the oxide chambers for the deposition of GGO and Al2O3-cap [6]. The details on the growth of the heterostructures were given earlier [6]. The amorphous Al2O3 capping layer 3 nm thick was used to prevent GGO from absorbing moisture during air exposure and processing. For the ALD samples, the freshly MBE-grown InGaAs/GaAs wafers were ex-situ transferred to an ALD reactor to deposit Al2O3. The ALD-oxide growth was detailed elsewhere [10]. Table 1 summarizes the conditions of four samples studied in this work. Before the MOSCAP fabrication, each sample underwent a post deposition annealing (PDA) treatment, as shown in Table 1, to improve the interfacial properties and decrease the bulk traps, thus ensuring the attainment of optimized C-V characteristics. The gate metals of capacitors are Au/Ti and Ni for n- and p-type InGaAs, respectively, which was thermal/e-beam evaporated through a shadow mask of 7.85 10 5 cm2 in area. Both capacitance and conductance were measured using Agilent 4284 with sample temperatures at 25, 100, and 150 1C, respectively. Recently, a new concept was proposed to determine Dit in the whole band gap of InGaAs according to the trap characteristic time, which was related to the carrier trapping and emission from an interface trap state [21]. The determination of Dit values around the mid-gap region of In0.2Ga0.8As is possible via the conductance measurement at elevated temperatures.
3. Results and discussion Fig. 1 shows the C–V curves for MBE-GGO on both n- and p-type InGaAs, measured at 25, 100, and 150 1C, respectively. Note that these are samples A and B from Table 1. At each temperature, the C–V curves of both n- and p-type are similar to each other, in terms of small dispersion at accumulation. Moreover, as the temperature increases, the ‘‘stretch-out’’ phenomena were observed. These may be caused by the temperature effect,
Table 1 Information for MOSCAPs and the corresponding thermal treatment. Sample #
A
B
C
D
In0.2Ga0.8As channel Doping (cm 3) Oxide Thickness Post deposition annealing (PDA)
n-type 4 1017 (Si) MBE-Al2O3/GGO 3 nm/8 nm 300 1C 10 min + 850 1C 15 s, He Ti/Au
p-type 1 1017 (Be) MBE-Al2O3/GGO 3 nm/5 nm 300 1C 10 min +850 1C 15 s, He Ni
n-type 4 1017 (Si) ALD-Al2O3 9 nm 500 1C 1 h +600 1C 15 s, N2 Ti/Au
p-type 5 1016 (Be) ALD-Al2O3 9 nm 500 1C 1 h, N2
Gate metal
Ni
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Fig. 1. Capacitance-voltage (C–V) curves of MBE-Al2O3/GGO/In0.2Ga0.8As gate stack with varying temperature: (a) 25 1C, (b) 100 1C, (c) 150 1C of n-In0.2Ga0.8As (sample A); and (d) 25 1C; (e) 100 1C; (f) 150 1C of p-In0.2Ga0.8As (sample B).
Fig. 2. Capacitance–voltage (C–V) curves of ALD-Al2O3/In0.2Ga0.8As gate stack with varying temperature: (a) 25 1C, (b) 100 1C, (c) 150 1C of n-In0.2Ga0.8As (sample C); and (d) 25 1C, (e) 100 1C, (f) 150 1C of p-In0.2Ga0.8As (sample D).
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of 5 1011 eV 1 cm 2 above and 2 1012 eV 1 cm 2 below the midgap region. Furthermore, the large Dit peak feature in the ALD-Al2O3 case degrades the device performance of inversionchannel In0.2Ga0.8As MOSFETs.
Acknowledgments The authors wish to thank National Science Council, Taiwan for supporting this work under Grants of nos. NSC-98-2120-M-007-002 and NSC-96-2628-M-007-003-MY3. We wish to thank W.H. Chang, L.H. Lai, Y.J. Chu, and Y.H. Chang for their technical supports. References
Fig. 3. Comparisons of Dit versus trap energy level of MBE-Al2O3/GGO/In0.2Ga0.8As and ALD-Al2O3/In0.2Ga0.8As gate stacks, derived using temperature-dependent conductance method.
distribution with noticeable peak-like features near the midgap region was also observed in the ALD-Al2O3/GaAs [21]. The Dit distribution may explain the device performances in inversion-channel InGaAs MOSFETs. For example, self-aligned inversion-channel In0.2Ga0.8As MOSFETs with MBE-Al2O3/GGO as the gate dielectric and TiN as the metal gate gave a drain current Id of 1.5 mA/mm (at VG of 4 V and VD of 2 V), and a transconductance Gm of 1.7 mS/mm (at VD of 2 V) for a device with gate length of 4 mm [22]. In comparison, the inversion-channel In0.2Ga0.8As MOSFETs with ALD-Al2O3 as the gate dielectric and TiAu as the metal gate gave an Id of 0.12 mA/mm measured at VG of 12 V and VD of 2 V for a device with a gate length of 1 mm [23]. The different device performances of the two inversion-channel InGaAs MOSFETs have the strong correlations with the Dit distribution around the midgap because the Fermi level is driven across the midgap to invert the minority carriers. Note that in an early work with thick GGO as the gate dielectric, inversionchannel GaAs MOSFETs yielded a drain current Id of 30 mA/mm (at VG of 7 V and VD of 5 V) for a device with gate length of 1 mm [24]. 4. Conclusion The Dit distributions within the In0.2Ga0.8As band gap for both MBE-GGO and ALD-Al2O3 were obtained using the conductance method measured at temperatures from 25 to 150 1C. The temperature-dependent C-V characterisitcs of the n- and p-samples using MBE-GGO show similarities in terms of small dispersion at accumulation, which are different from those using ALD-Al2O3 as the dielectrics. Despite the trap excitations possibly caused by the temperature effect, the MBE-Al2O3/GGO/InGaAs exhibited Dit’s
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