Low temperature semiconductor surface passivation for nanoelectronic device applications

Low temperature semiconductor surface passivation for nanoelectronic device applications

Surface Science 532–535 (2003) 759–763 www.elsevier.com/locate/susc Low temperature semiconductor surface passivation for nanoelectronic device appli...

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Surface Science 532–535 (2003) 759–763 www.elsevier.com/locate/susc

Low temperature semiconductor surface passivation for nanoelectronic device applications Choelhwyi Bae, Gerald Lucovsky

*

Department of Physics, North Carolina State University, Campus Box 8202, Raleigh, NC 27695-8202, USA

Abstract A low temperature remote plasma assisted oxidation (RPAO) process for interface formation and passivation has been extended from Si and SiC to GaN. The process, which can be applied to nanoscale structures including quantum dots and wires, provides excellent control of ultra-thin interfacial layers which passivate the GaN substrate, preventing a parasitic or subcutaneous oxidation of the substrate during plasma deposition of SiO2 . This remote plasma processing for GaN-dielectric heterostructures includes: (i) an in situ nitrogen plasma surface clean, (ii) RPAO for formation of an interfacial GaOx transition region between the GaN and deposited dielectric, and (iii) a remote plasma enhanced chemical vapor deposition of an SiO2 dielectric. Ó 2003 Elsevier Science B.V. All rights reserved. Keywords: Plasma processing; Auger electron spectroscopy; Semiconductor–insulator interfaces; Interface states

1. Introduction A major breakthrough in low temperature plasma-assisted GaN device processing has been achieved through a sequence of in situ remote plasma processing steps. It includes two processes used respectively for in situ cleaning and interface formation or surface passivation, followed by plasma deposition of the dielectric, all at 300 °C. The interface formation/passivation process is an extension of a process previously developed for Si devices [1,2], and then extended initially to SiC [3], and to GaN [4]. The interfacial oxide is SiO2 for Si

*

Corresponding author. Tel.: +1-919-515-3301; fax: +1-919515-7331. E-mail address: [email protected] (G. Lucovsky).

and SiC processes: however, for the GaN process it is GaOx , with a composition close to Ga2 O3 or x ¼ 1:5. In this article, the plasma processing steps have been studied in detail by on-line Auger electron spectroscopy (AES). This approach has been used to identify the effect of different processing variables, including the chamber pressure and oxidant gas mixture, and processing sequences, such as plasma deposition of SiO2 directly on to plasma-cleaned GaN, compared with dielectric deposition after the remote plasma assisted GaN oxidation step. The effectiveness of these different processing steps and sequences has been evaluated through studying the interfacial electron trapping as revealed in capacitance–voltage (C–V ) characteristics on test metal-oxide–semiconductor (MOS) devices as a function of the frequency.

0039-6028/03/$ - see front matter Ó 2003 Elsevier Science B.V. All rights reserved. doi:10.1016/S0039-6028(03)00181-X

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2. Experimental results The plasma processing and on-line AES analysis are carried out in a ultra-high-vacuum compatible multi-chamber system with separate chambers optimized for remote plasma processing and AES electron beam analysis. Following off-line chemical cleaning of GaN surfaces in H2 O diluted HCl and HCl–HNO3 mixtures, residual C and O are either eliminated below levels of AES detection, or reduced significantly by an exposure to active Nspecies generated via a remote plasma (Fig. 1). This in situ final cleaning process is more effective at lower chamber pressures (<0.1 Torr) in which the plasma extends in to the processing chamber, than at higher pressure (0.3 Torr) in which the plasma is contained in the generation tube of a remote reactor. At the lower pressures the active

N 2 /He plasma cleaning of GaN

species for cleaning are N2þ ions, whilst a higher pressures they are predominantly N-atoms (radicals) and/or neutral metastables [5]. The data in Fig. 1 indicate reduction of surface O is significantly more effective by a factor of at least five with N2þ ions as compared with neutral N-atom radicals or metastables. Other data indicate that the in situ clean is essentially independent of ex situ wet chemical clean acid mixture. The compositional analysis by in situ AES uses standard techniques previously applied to AES and XPS data [1,2,5]. The data in Fig. 2 for the remote plasma assisted oxidation (RPAO) process demonstrate that as process time is increased from 30 s to more than 5 min, the N signal is reduced by at least a factor of ten. The O-signal initially increases and then reaches a constant value indicative of a GaOx layer with x  1:5. Analysis of the AES features in Fig. 2 indicates a change in the AES peak kinetic energy consistent with a change of nearest-neighbor

N 2 /He (60/200); 0.3 and 0.1 Torr

O2 /He Plasma Oxidation of GaN

N 2 /He (30/100); 0.02 Torr

o

30 W, 300 C

o

dN(E)/dE (arbitrary units)

30 W, 15 min, 300 C

(vi) 30 min

(iv) 0.3 Torr

(ii) 0.02 Torr

(i) As-loaded Ga

C

N O

(v) 10 min

dN(E)/dE (arbitrary units)

(iii) 0.1 Torr

(NH 4 OH)

(iv) 3 min

(iii) 1 min

(ii) 0.5 min

Ga (i) N2 /He plasma

200

400

600

800

1000

1200

Kinetic energy, E(eV) Fig. 1. AES study of in situ nitrogen plasma cleaning process. The notation (60,200) in the figure refers to the flow rates of N2 and He, respectively, in units of standard cubic centimeters per second (sscm).

Ga

Ga

N O 200

400

600

800

1000

Kinetic energy, E(eV) Fig. 2. AES study of in situ RPAO process.

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bonding of interfacial Ga-atoms from N-atoms to O-atoms. The kinetic energy of the Ga-atom MLL feature decreases consistent with core level shits associated with more electronegative nearest neighbors. The kinetics of the interfacial oxide growth have been analyzed by interrupted processing and AES analysis cycles [2], and are illustrated in Fig. 3 for the O2 process which indicates a power law for oxide thickness versus oxidation process time. The initial kinetics of the oxidation process are dependent on the O-atom content in the plasma source gas. For example, for equal flow rates of O2 and N2 O, the thickness of oxide at given time is reduced by a factor of the two for the N2 O process due the availability of less oxygen. This is essentially the same as the result obtained for RPAO of Si where the product was SiO2 [2]. However, as the process proceeds, the oxidation rate decreases for the N2 O process as applied to GaN, but continues to follow power law kinetics for both Si and SiC oxidation processes. 10 O2 /He Plasma Oxidation of GaN

Oxide Thickness, t ox (nm)

30 W

1

Fig. 4(a) and (b) indicate a subcutaneous or parasitic oxidation of the GaN substrate for direct deposition of SiO2 on GaN after the in situ nitrogen clean discussed above. The data in Fig. 4(c) indicate oxide thickness as function of deposition time for deposition with and without the RPAO step. These data confirm a subcutaneous process that has been shown to lead to defective interfaces when applied to the deposition of SiO2 directly onto Hf-last Si, i.e., from Si substrates in which the native oxide was removed by etching in dilute HF as described in Refs. [1,6]. Finally, interface quality has been evaluated by comparing capacitance–voltage characteristics of MOS devices with and without an RPAO GaOx layer between the GaN and a plasma-deposited SiO2 layer. The devices with the RPAO GaOx interfacial layer show a decrease in interfacial defects, including interfacial fixed charge [4], as well as interfacial trapping of electrons (see Fig. 5). The fixed charge is positive and shifts the flat band voltage to large negative values of gate voltage, whereas the interfacial trapping results in significant levels of hysteresis, including a shift to more positive values of gate voltage, as well as strong dependence on frequency. The levels of fixed charge and interfacial traps are in excess of 1012 cm2 without an RPAO step, but both decrease by at least an order of magnitude to the low 1011 cm2 range when the RPAO step is included prior to the SiO2 deposition.

3. Conclusions

(i) (ii) (iii) (i) 300 o C (t ox = 1.21 t

0.22

o

0.29

(iii) 200 C (t ox = 0.52 t

1

0.22

o

(ii) 250 C (t ox = 0.74 t

0.1 0.1

761

10

) ) )

100

Oxidation Time, t (min) Fig. 3. Kinetics of RPAO process for the O2 process.

The development of nanoelectronic semiconductor devices will require multilayer structures in which dielectric layers provide surface passivation, and/or are the constituent layers of an active three terminal or photonic device. This breakthrough in GaN processing opens up new opportunities for integration of GaN quantum dot and/or quantum wire devices in functional nanoelectronic circuits. It should work equally well on ternary Ga-atom containing nitrides such as (Ga,Al)N and (Ga,In)N, providing that the surfaces of these pseudo-binary alloys have a composition that is very close to GaN.

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Fig. 4. AES OKLL peak shift: (a) without RPAO, and (b) with RPAO. (c) Oxide thickness versus time with and without RPAO process. For the SiO2 deposition, the flow rates for plasma excited O2 and He, and down-stream injected 2%SiH4 in He were respectively 60, 200 and 10 sccm. The plasma power, substrate temperature and process pressure are the same for the RPAO and the SiO2 deposition are 30 W, 300 °C and 0.3 Torr, respectively. The notations (ii) through (iv) represent AES traces taken for 20 s interruptions in the SiO2 deposition step.

The sequence of in situ process steps has been shown to result in significantly reduced interfacial trapping compared to a process sequence that does not include the RPAO step, paralleling results obtained for Si–SiO2 and SiC–SiO2 interfaces.

The similarity in oxidation rates between GaN, Si and SiC, exemplified by the power law fits, means that the self-limiting mechanisms are essentially the same. The oxidation process proceeds very rapidly for the surface dangling bonds, and

C. Bae, G. Lucovsky / Surface Science 532–535 (2003) 759–763

Capacitance (pF)

Capacitance (pF)

14

N2 /H2 anneal (400 oC, 30 min) 1 kHz 3.16 kHz 10 kHz 31.6 kHz 100 kHz 316 kHz 1 MHz

12

10

-4

(a)

-2

0

N 2 /H2 anneal o (400 C, 30 min)

Without RPAO

RPAO (~1 nm) 14

2

4

6

8

10

-4

10

Gate Voltage (V)

1 kHz 3.16 kHz 10 kHz 31.6 kHz 100 kHz 316 kHz 1 MHz

12

763

(b)

-2

0

2

4

6

8

10

Gate Voltage (V)

Fig. 5. Comparisons between C–V characteristics (a) with RPAO and PMA, and (b) without RPAO, but with PMA.

the atoms back-bonded to the surface atom, and then decreases significantly. The microscopic bonding between GaN and GaOx is an ionic analog of the more covalent bonding between Si and SiO2 and this has been addressed in a previously published paper [4]. The process is not directly extendable to GaAs and GaP, but can be used in other III–V materials if sacrificial GaN layers are formed prior to the oxidation. The key to the process is the volatility of N-oxide species, e.g., NO, N2 O, etc. The nonvolatility of As and P oxides means RPAO cannot be applied directly GaAs or GaP.

trogen atoms at the GaN–gallium oxide interface, and (iii) following the SiO2 deposition with a one minute 900 °C rapid thermal anneal in an Ar ambient. The hysteresis has been reduced by more than a factor of five what is indicated in Fig. 5(a), and the density of interface traps, Dit , has been reduced to approximately 2–3  1011 cm2 . Acknowledgements This research is supported by the ONR, AFOSR, SRC and i-Sematech/SRC Front End Processes Center. References

Note added in proof There have been three recent changes in processing that have lead to improved GaN–dielectric interface properties. Significant reductions in the density of interface traps as monitored by frequency-dependent hysteresis in C–V traces have been achieved by (i) eliminating the pre-oxidation nitridation clean, (ii) following the remote plasma assisted oxidation, RPAO, process step by a remote plasma assisted interface nitridation step that introduces approximately one monolayer of ni-

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