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Manufactures consider fixtureless in-circuit testers
1040
World Abstracts on Microelectronics and Reliability
measure degradation following exposure to environmental stresses. The first reliability stress was to store units at constant elevated temperatures of 80, 100, and 125°C for up to 8500 h. Analysis of these results was done with a nonlinear regression model. Since multiple failure modes were present, the data were deconvolved by treating them as multiple censored and analyzing them using maximum likelihood techniques. The temperature dependence of the degredation rate was assumed to be Arrhenius. For the dominant mode, the results of this model are PSi(t, T) = 3.05 - 58 x exp(-2629/T) + t °-3s+ ei where PS(t, T) is the push-through strength as a function of time, t, and Kelvin temperature, T. e~represents the random part and is distributed normally with 0 mean. These results give an effective activation energy of 0.6 eV. The second reliability test was to thermally cycle units between - 5 0 and + 100°C for up to 1000 cycles. There was no degradation• A simple first-order estimate indicates that this is equivalent to about five lifetimes• In summary, a quantitative measure of joint strength was established. This measure was to determine optimum solder volume, and was the basis for a quantitative reliability study• Relation between delamination and temperature cycling induced failures in plastic packaged devices. KAREL VAN DOORSELAER and KEES DE ZEEUW. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 879 (1990). The occurrence of electrical failures in temperature cycling tests (TCTs) is studied by means of test chips. The observed failures are all caused by top metal deformation, leading to electrical "opens". Investigation of the test chips using scanning acoustic tomography (SCAT) demonstrates that the failures are introduced by delamination at the plastic-die interface. A similar correlation is observed between hazardous metal shifting and delamination on l-Mb SRAMs. Moreover, delamination at the plastic~lie interface is found to give rise to a strong degradation of the wire bond quality. These observations can be explained by the increased freedom of the plastic to move with respect to the die surface in case of delamination, as well as by the concentration of shear stresses on a small area. The overall conclusion from these experiments in that adhesion plastic~die is the key factor to be considered in TCTs.
Automated visual inspection of bare printed circuit boards. PAUL M. GRIFFIN, J. RENE VILLALOBOS,JOSEPHW. FOSTER III and SH~RRI L. MESSlM~R. Computers ind. Engng 18(4), 505 (1990). This paper describes the work currently conducted by the authors for visual inspection of bare printed circuit boards using computer vision. The types of nonconformities which may be detected include trace geometry, improper spacing, measles and surface nonconformities. Both through-hole and surface mount technology circuit boards are inspected. A description of the work for the visual inspection of bare printed boards is presented with examples. Effects of polymer/metal interaction in thin-film multiehip module applications. GRETCHEN M. ADEMA,IWONATURLIK, LIH-TLYNG HWANG, GLENN A. RIN~ and MICHELE J. BERRY. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 766 (1990). An investigation was conducted to examine the effects of different polyimide/metal combinations on structures similar to those used in thin-film multichip module applications. Three different metal structures and three commercially available spin-on polyimide materials which possess different molecular structures were examined. Transmission electron microscopy (TEM) was used to study the polyimide/metal interfaces. Measurements of the electri-
cal signal propagation through the different polyimide/metal structures were compared. It was found that the extent of interaction of polyimide with copper is dependent upon the type of polyimide used. The use of an electroless nickel layer over copper structures as well as the use of aluminum conductor lines with different polyimides was also examined. Healing of voids in the aluminum metuilization of integrated circuit chips. EDWARDF. CUDDIHY,RUSSELA. LAWTONand THOMAS R. GAVIN. IEEE Trans. Reliab. 39(5), 564 (1990). A thermal treatment to heal voids in the aluminum metallization of integrated circuit (IC) chips has been discovered. The aluminum metallization is alloyed with nominally 1 wt% of silicon• This discovery of serendipity arose from efforts to cause further growth of pre-existing voids in IC RAMs intended for long-term, unattended spacecraft applications. The experimental effort was intended to cause further void propagation for the purposes of establishing a time/temperature propagation relationship, but resulted instead in a healing of the voids. The thermal treatment consisted of heating IC chips with voids in the aluminum/silicon metallization to temperatures in excess of 200°C followed by quick immersion into liquid nitrogen. This thermal treatment appears to be inconsistent with state-ofthe-art theories which suggest that voids are directly and exclusively caused by stresses and strains associated with thermal expansion mismatches between the glass passivation, silicon substrate, and aluminum metallization. Such state-of-the-art theories lead to the anticipation that cooling • of the parts below ambient temperatures should lead to further void growth, which did not happen with these RAMs. This article describes the thermal treatment, and advances a theory based on silicon solubility and migration in aluminum to explain both the formation and healing of voids in the aluminum metallization of IC chips.
Investigations of failure mechanisms of TAB-bonded chips during thermal ageing. ELKE ZAKEL and HERBERT REICHL. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 856 (1990). Tape automated bonding (TAB) is an attractive technology for microconnecting chips with high lead counts. Recently an increased effort has been made to reduce the pitch and to increase the number of bonds. The investigations performed at the Technical University show some new aspects of TAB metallurgy and failure mechanisms. Eutectic soldering and thermocompression bonding were investigated with regard to thermal ageing mechanisms. These methods require two different metallurgies: Cu-Sn-Au and Cu-Au. Effects like pore formation due to the Kirkendall effect and the formation of ternary phases have been investigated. The influence of the lead roughness and of copper recrystallization is shown by the use of ED-copper and RA-copper. The influence of these parameters on long term reliability is summarized. Manufacturers consider fixturele~s in-circuit testers. M. TAKAHISHI. JEE (Japan) 58 (November 1990). The recent emergence of surface-mount devices has been followed by the development of printed circuit boards with high mounting densities that hinder tests on bed-of-nails fixtures. Presently, the smallest pitch that can be reliably accommodated by such fixtures is 0.8 mm. Therefore, there is a good demand for the development of probe-pins and fixtures accommodating such densely mounted boards. Field-induced instabilities in polytmtde passivated lateral p--n-p transistors. BADXHE L - ~ et al. IEEE Trans. Comport. Hybrids mfg Technol. 13(4), 623 (1990). Stress induced shifts in the gain of lateral p-n-p transistors with different dielectric compositions over the base region are discussed. Two separate degradation mechanisms are
World Abstracts on Microelectronics and Reliability
measure degradation following exposure to environmental stresses. The first reliability stress was to store units at constant elevated temperatures of 80, 100, and 125°C for up to 8500 h. Analysis of these results was done with a nonlinear regression model. Since multiple failure modes were present, the data were deconvolved by treating them as multiple censored and analyzing them using maximum likelihood techniques. The temperature dependence of the degredation rate was assumed to be Arrhenius. For the dominant mode, the results of this model are PSi(t, T) = 3.05 - 58 x exp(-2629/T) + t °-3s+ ei where PS(t, T) is the push-through strength as a function of time, t, and Kelvin temperature, T. e~represents the random part and is distributed normally with 0 mean. These results give an effective activation energy of 0.6 eV. The second reliability test was to thermally cycle units between - 5 0 and + 100°C for up to 1000 cycles. There was no degradation• A simple first-order estimate indicates that this is equivalent to about five lifetimes• In summary, a quantitative measure of joint strength was established. This measure was to determine optimum solder volume, and was the basis for a quantitative reliability study• Relation between delamination and temperature cycling induced failures in plastic packaged devices. KAREL VAN DOORSELAER and KEES DE ZEEUW. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 879 (1990). The occurrence of electrical failures in temperature cycling tests (TCTs) is studied by means of test chips. The observed failures are all caused by top metal deformation, leading to electrical "opens". Investigation of the test chips using scanning acoustic tomography (SCAT) demonstrates that the failures are introduced by delamination at the plastic-die interface. A similar correlation is observed between hazardous metal shifting and delamination on l-Mb SRAMs. Moreover, delamination at the plastic~lie interface is found to give rise to a strong degradation of the wire bond quality. These observations can be explained by the increased freedom of the plastic to move with respect to the die surface in case of delamination, as well as by the concentration of shear stresses on a small area. The overall conclusion from these experiments in that adhesion plastic~die is the key factor to be considered in TCTs.
Automated visual inspection of bare printed circuit boards. PAUL M. GRIFFIN, J. RENE VILLALOBOS,JOSEPHW. FOSTER III and SH~RRI L. MESSlM~R. Computers ind. Engng 18(4), 505 (1990). This paper describes the work currently conducted by the authors for visual inspection of bare printed circuit boards using computer vision. The types of nonconformities which may be detected include trace geometry, improper spacing, measles and surface nonconformities. Both through-hole and surface mount technology circuit boards are inspected. A description of the work for the visual inspection of bare printed boards is presented with examples. Effects of polymer/metal interaction in thin-film multiehip module applications. GRETCHEN M. ADEMA,IWONATURLIK, LIH-TLYNG HWANG, GLENN A. RIN~ and MICHELE J. BERRY. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 766 (1990). An investigation was conducted to examine the effects of different polyimide/metal combinations on structures similar to those used in thin-film multichip module applications. Three different metal structures and three commercially available spin-on polyimide materials which possess different molecular structures were examined. Transmission electron microscopy (TEM) was used to study the polyimide/metal interfaces. Measurements of the electri-
cal signal propagation through the different polyimide/metal structures were compared. It was found that the extent of interaction of polyimide with copper is dependent upon the type of polyimide used. The use of an electroless nickel layer over copper structures as well as the use of aluminum conductor lines with different polyimides was also examined. Healing of voids in the aluminum metuilization of integrated circuit chips. EDWARDF. CUDDIHY,RUSSELA. LAWTONand THOMAS R. GAVIN. IEEE Trans. Reliab. 39(5), 564 (1990). A thermal treatment to heal voids in the aluminum metallization of integrated circuit (IC) chips has been discovered. The aluminum metallization is alloyed with nominally 1 wt% of silicon• This discovery of serendipity arose from efforts to cause further growth of pre-existing voids in IC RAMs intended for long-term, unattended spacecraft applications. The experimental effort was intended to cause further void propagation for the purposes of establishing a time/temperature propagation relationship, but resulted instead in a healing of the voids. The thermal treatment consisted of heating IC chips with voids in the aluminum/silicon metallization to temperatures in excess of 200°C followed by quick immersion into liquid nitrogen. This thermal treatment appears to be inconsistent with state-ofthe-art theories which suggest that voids are directly and exclusively caused by stresses and strains associated with thermal expansion mismatches between the glass passivation, silicon substrate, and aluminum metallization. Such state-of-the-art theories lead to the anticipation that cooling • of the parts below ambient temperatures should lead to further void growth, which did not happen with these RAMs. This article describes the thermal treatment, and advances a theory based on silicon solubility and migration in aluminum to explain both the formation and healing of voids in the aluminum metallization of IC chips.
Investigations of failure mechanisms of TAB-bonded chips during thermal ageing. ELKE ZAKEL and HERBERT REICHL. IEEE Trans. Compon. Hybrids mfg Technol. 13(4), 856 (1990). Tape automated bonding (TAB) is an attractive technology for microconnecting chips with high lead counts. Recently an increased effort has been made to reduce the pitch and to increase the number of bonds. The investigations performed at the Technical University show some new aspects of TAB metallurgy and failure mechanisms. Eutectic soldering and thermocompression bonding were investigated with regard to thermal ageing mechanisms. These methods require two different metallurgies: Cu-Sn-Au and Cu-Au. Effects like pore formation due to the Kirkendall effect and the formation of ternary phases have been investigated. The influence of the lead roughness and of copper recrystallization is shown by the use of ED-copper and RA-copper. The influence of these parameters on long term reliability is summarized. Manufacturers consider fixturele~s in-circuit testers. M. TAKAHISHI. JEE (Japan) 58 (November 1990). The recent emergence of surface-mount devices has been followed by the development of printed circuit boards with high mounting densities that hinder tests on bed-of-nails fixtures. Presently, the smallest pitch that can be reliably accommodated by such fixtures is 0.8 mm. Therefore, there is a good demand for the development of probe-pins and fixtures accommodating such densely mounted boards. Field-induced instabilities in polytmtde passivated lateral p--n-p transistors. BADXHE L - ~ et al. IEEE Trans. Comport. Hybrids mfg Technol. 13(4), 623 (1990). Stress induced shifts in the gain of lateral p-n-p transistors with different dielectric compositions over the base region are discussed. Two separate degradation mechanisms are