Microelectronics Reliability xxx (2014) xxx–xxx
Contents lists available at ScienceDirect
Microelectronics Reliability journal homepage: www.elsevier.com/locate/microrel
Methodology of reliability enhancement for high power LED driver Song Lan a,⇑, Cher Ming Tan a,b,1, Kevin Wu c a
Department of Electrical & Electronic Engineering, Nanyang Technological University, Singapore 639798, Singapore Singapore Institute of Manufacturing Technology, Singapore c Macroblock, Inc., Hsingchu 30072, Taiwan, ROC b
a r t i c l e
i n f o
a b s t r a c t
Article history: Received 9 July 2013 Received in revised form 4 January 2014 Accepted 6 January 2014 Available online xxxx
The degradation of a linear-mode high power LED driver is studied. This driver is to provide constant current to LED regardless of its output voltage, but there is a minimum output voltage whereby the output current cannot be maintained as constant. Prolonged operation of the driver through relevant reliability test revealed that this minimum voltage will increase due to degradation of the output transistor in the driver, and when this minimum voltage exceeds the operating voltage of the driver, it no longer provides a constant current to the LEDs. Our investigation clearly reveals that the degradation mechanism is hot carrier injection as will be shown in this work, and hence it is inevitable. As high power LEDs have long life time, their drivers must also have equivalent lifetime so that the long life of LEDs can be leveraged in the entire luminary. One method to enhance its lifetime is to increase the hot carrier injection lifetime of the output transistor which may requires some fundamental change in the transistor structure and/or processing, and it is beyond the control of the driver designer and can be expensive also. A circuit approach is to use redundant circuit for enhancement which is common in the circuit world. Effective switch over to redundant circuit requires continuous health monitor of the primary circuit. In this work, the method to identify the health monitoring index, based on the degradation mechanism is shown, and the control circuit to detect and switch over to the redundant circuit is also designed and presented here. Ó 2014 Elsevier Ltd. All rights reserved.
1. Introduction The applications of medium to high power LEDs are increasing rapidly into many areas such as the back light of liquid crystal display (LCD), automotive head lamp and illumination sources, to name a few. With longer operating lifetime and higher energy efficiency, these LEDs are expected to replace the traditional incandescent and fluorescent lamps in the near future. A LED luminaries system consists of a driver circuit, LED chip, heat sink and secondary optics. Failure of any component will lead to the failure of the entire system, and thus the reliability of the LED system is ensured by having high reliable sub-systems. However, few researches are reported on LED driver reliability, and from the database of the engineering village, there are 5 of them [1–5] that focus on the LED driver circuit reliability. Four of them focus on the reliability of the external component to the driver circuit IC, in particular, the electrolytic capacitor at the output node of the switched-mode driver IC, and only [2] reported the work on the degradation of the internal circuit of a linear mode ⇑ Corresponding author. Tel.: +65 96503096. E-mail addresses:
[email protected] (C.M. Tan). 1 Tel.: +65 67904567; fax: +65 67920415.
(S.
Lan),
[email protected]
LED driver. In this work, the driver under studied is the linear mode LED driver from Macro Block Inc. All LED drivers are to provide a constant current to the LED. In linear mode LED driver, the output current of the driver is maintained by adjusting the gate voltage of the output transistor through feedback circuit. Thus, switching noise is absent with this type of driver and output electrolytic capacitor is not necessary. This renders the previous methods presented by the other four literatures [1,3–5] not suitable for this work. Linear mode LED driver provides constant current to LEDs regardless of its output voltage, but there is a minimum output voltage whereby the output current cannot be maintained as constant. Prolonged operation of the driver through relevant reliability test revealed that this minimum voltage will increase due to degradation of the output transistor in the driver, and when this minimum voltage exceeds the operating voltage of the driver, it no longer provides a constant current to the LEDs [2]. As medium to high power LEDs have long life time, their drivers must also have equivalent lifetime so that the long life of LEDs can be leveraged in the entire luminary. Unfortunately, the lifetime of such driver under normal condition is unknown currently because its lifetime extrapolation from reliability test data cannot be obtained using the standard methods such as the inverse power rule or generalized Eyring method or Arrhenius method [6]. However,
http://dx.doi.org/10.1016/j.microrel.2014.01.027 0026-2714/Ó 2014 Elsevier Ltd. All rights reserved.
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027
2
S. Lan et al. / Microelectronics Reliability xxx (2014) xxx–xxx
this is beyond the scope of this work, but will be reported in another work of us. On the other hand, degradation of the output transistor in the driver was indeed observed at high stress condition [2], and while the actual lifetime is being investigated, we would like also to look at the method to improve the lifetime of the driver in parallel. One method to improve the reliability of the driver circuit is to make some fundamental change in the transistor/interconnection structure and/or processing, but this is beyond the control of the driver designer and can be expensive also. A circuit approach is to use redundant circuit for enhancement which is common in the circuit world. Effective switch over to redundant circuit requires constant health monitoring of the primary circuit, and thus fault indicator or health index of the primary circuit must be identified. CALCE group has developed diagnostics and prognostics method for electronic circuits. They defined the fault indicator by successive refinement of the circuit’s transient response based on a sweep signal. Through pattern recognition, the circuit fault can be located [7]. This transient response method is suitable for the analog circuit with behavior embedded in time and frequency domains. However, it cannot be directly used for the LED driver in this work because the degradation of the transient performance of this LED driver is not as significant as that of static performance as will be shown later. Beside the method proposed by CALCE, IDDQ and digital pattern testing are also widely used to detect the fault circuit of integrated circuits [8–10]. Digital pattern testing is majorly used for the digital circuit such as memory and CPU system and hence cannot be applied to our case. IDDQ is suitable for the circuit with hard failure such as oxide breakdown or bridging fault. In our case, the degradation mechanism is due to the hot carrier injection at the output transistor as will be shown in later section, and the change in IDDQ is negligible as will be shown later. In view of the above-mentioned, a new health index is needed. To derive the health index, let us first characterize the strength of the driver and examine its performance degradation. Only then, we will be able to identify an appropriate health index or fault indicator for the driver. With this index identified, control circuit to detect and switch over to the redundant circuit can then be designed and will be presented in Section 4.
thus a core parameter reflecting its performance. The degradation of switched-mode LED driver has been studied by monitoring the ripple in its output current [4], and larger ripple will be present due to the aging of the external electrolytic capacitor, and it is also the weaker part of the driver system. Thus, the strength degradation of the switch-mode LED driver is basically the study of the capacitor degradation. However, due to different current regulation method employed, the current ripple is not an issue for the linear-mode LED driver, and the degradation for this linear-mode LED driver must be redefined. 2.1. Strength characterization The LED driver studied in this work behaves like a constant DC current sink. From our I–V sweep, it can be found that so long as the LED driver output is biased at voltage higher than the Vknee, the output current will be constant. The equivalent circuit of the output channel is shown in Fig. 1 [2]. Due to the negative feedback of the error amplifier, the output current is always regulated at Iout = Vref/Rsense, which is independent of the applied voltage. The knee point voltage is given as:
V knee ¼
Iout dIout dV out
ð1Þ
dIout where Iout is the operating output current and dV is the slope of out I–V curve before the knee point, which is also the transconductance of output channel. In this region where the transistor is in triode mode, the output current is proportional to the output voltdIout age. dV is calculated based on channel’s output impedance given out
as [2]:
dIout 1 1 ¼ ¼ dV out Rout KðV gs1V Þ þ Rsense
For practical applications, some considerations on the value of the applied output voltage must be made. Firstly, the power consumption of the driver itself has to be well controlled. There are 16 channels in each driver and the output operating current is about 45 mA/channel. Thus, the minimum power consumption for the driver is given below:
Pmini ¼ V knee 16 45 mA
2. LED driver strength characterization and degradation The output lumen of a LED luminary depends on the applied current from a LED driver. The output current of a LED driver is
ð2Þ
th
ð3Þ
As the output is usually biased at Vout-opt. that must be greater than Vknee to provide good safety margin, the unnecessary power consumed by each LED driver is given as: Knee Point
Vdd
VLED
GND
Vdd
X
Rex
Vout
XXX Driver
X X
OE
External Resistor Vknee 0.7V~0.8V Vout
Vref CH
(a)
Rsense
(b)
Linear Current regulator Fig. 1. (a) Equivalent circuit of the linear-mode LED driver and (b) I–V curve of the output node.
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027
3
S. Lan et al. / Microelectronics Reliability xxx (2014) xxx–xxx
Pwaste ¼ ðV out-opt: V knee Þ 16 45 mA
ð4Þ
The actual power consumption is:
Pact ¼ Pmini þ Pwaste ¼ V out-opt: 16 45 mA
ð5Þ
It can be seen that large output voltage leads to higher unnecessary power consumption. This high unnecessary power consumption also gives rise to high operating temperature of the driver, which in turn leads to several types of failure mechanisms such as Electromigration, wire-bond failure and oxide breakdown [2,11–13]. To avoid the above mentioned unnecessary power consumption and reliability issues, Vout-opt. has to be kept as low as possible. From the operating circuit shown in Fig. 1, the Vout-opt. is expressed as:
V out-opt: ¼ V LED V LED-drop
ð6Þ
The practical value of Vout-opt. is set to be slightly higher than Vknee, which is around 0.80–0.9 V depending on its application. In this work, its reliability is evaluated based on the operating condition that V. As long as Vknee is smaller than operating output voltage, the chip is considered as reliable. 2.2. Strength degradation dIout Our previous work [2] showed that dV decreases with the out stress time. As channel transconductance of the output transistor drifts with test time, the transconductance is identified as the weak point of the driver. The plot of the I–V and knee point voltage with stress time is shown in Fig. 2. Both Hot Carrier Injection (HCI) and dIout Electromigration (EM) can lead to the drift of dV , and the degraded out dIout is given as [2]: dV out deg:
dIout 1 ¼ ¼ dV outdeg: Rout deg K
1 deg ðV gs V th
deg
1 þ Rsense þ Rem Þ
ð7Þ
where Kdeg indicates the reduced carrier mobility and Vth_deg represents the increase of the threshold voltage caused by HCI. The increased interconnection resistance due to EM is represented by Rem. The decrease in dIout/dVout causes a decrease in the Vknee as shown in Fig. 2(a). The time variation of Vknee is shown in Fig. 2(b).
(a)
Table 1 Test condition for the drivers in this work. Output voltage (stress)
Output current
Temperature
Sample size
13 V
43 mA
25 °C
9
3. Investigations of degradation mechanisms It was found that both the high output voltage and high operating temperature can significantly accelerate the degradation of the VKnee [2]. In this work, the high voltage stress factor is used for investigation of the degradation mechanism in the driver under studied. A high constant DC output voltage of 13 V is applied at room temperature of 25 °C. The output current is set at maximum level according to the datasheet. The stress condition is summarized in Table 1. The degradation of VKnee is found for all the tested samples as expected. The extracted knee point voltage degradation vs. test time is plotted in Fig. 3. A sharp degradation is observed at the initial period, which is consistent with our previous work [2], and thus it is believed that this sharp degradation is caused by HCI. The subsequent degradation rate becomes slow. To investigate the subsequent degradation mechanism, DVKnee of sample #2 chosen arbitrary is extracted and plotted with the stress time as shown in Fig. 4. From the plot in Fig. 4, it can be found out log (DVKnee) has a linear relationship with log(t), which can be expressed as:
logðDV knee ðtÞÞ ¼ n logðtÞ þ logðaÞ
ð8Þ
where n and a are empirical fitted parameters. The simplified model is thus given as follows:
DV knee ðtÞ ¼ a tn
ð9Þ
In other words, the degradation of the knee point voltage follows power law with the stress time. This power law relationship is commonly used to fit the device parameter drift such as DGm, DVth and the mobility l caused by HCI [14,15]. In Hu’s work [16], HCI degradation is caused by mobility reduction due to interface generation. The reduction of the mobility is given as:
(b)
Fig. 2. (a) I–V degradation of the driver with zoom in near the knee point as insert, showing the degradation in the output current and (b) extracted knee point voltage degradation.
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027
4
S. Lan et al. / Microelectronics Reliability xxx (2014) xxx–xxx Table 2 Physical dimensions used for the modeling of the output transistor. Physical dimension Channel length (lm)
Channel width (lm)
Gate oxide thickness (A)
Lext (lm)
2
4
25
0.3
Table 3 Doping profiles used for the modeling of the output transistor. Doping profile Substrate doping Poly gate Drain–source Drain–source-ext
Fig. 3. Knee point voltage degradation.
Doping type
Concentration
Boron Arsenic Arsenic Arsenic
1.60E+17 1.00E+20 1.00E+19 (peak) 1.00E+17 (peak)
channel and gain the energy to become ‘‘hot’’ without collision. On the other hand,/ the Idrain is the supply of the channel electron. it The term Idrain eqkEm is the rate of the hot carriers based on ‘‘lucky electron’’ model [17]. The Kdeg in Eq. (7) can be expressed in terms of the degraded mobility in Eq. (10).
kdeg ¼
lo 1 þ bNit
C ox
W L
ð12Þ
Substituting Eq. (7) and Eqs. (10)–(12) into Eq. (1), the degraded knee point voltage can be re-written as:
0
V knee ðtÞ ¼ Iout
lo
ð10Þ
1 þ bNit
where Nit is function of time in power law relation:
Nit ðtÞ ¼ c1
ð13Þ
And the DVKnee(t) can be expressed:
Fig. 4. Time variation of DVknee during testing.
ldeg ¼
1 /it n Idrain qkE mt B1 þ bc1 W eff e C @ þ Rfb A lo C ox WL ðV dd V th Þ
/ n it Idrain qkE e mt W eff
ð11Þ
Here, C1 is process-dependent parameter, /it is the interface barrier height, Em is /the peak lateral electrical field and k is the free path. it The term eqkEm is the probability for an electron to travel in the
DV knee ðtÞ ¼ Iout
bc1
lo C ox
Idrain W eff
W L
/it n eqkEm t
ðV dd V th Þ
ð14Þ
From Eq. (14), we can see that DVknee(t) has the exact power law relation with test time t as derived experimentally. With Iout = Idrain, the fitted parameter a in Eq. (9) is expressed as:
a ¼ Iout
bc1
lo C ox
Iout W eff
W L
/it n eqkEm
ðV dd V th Þ
ð15Þ
Output Node D Vref
+ A
G
S
Rs
Fig. 5. Mixed-mode and device model.
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027
5
S. Lan et al. / Microelectronics Reliability xxx (2014) xxx–xxx
(a)
it
50%
(b) Fig. 8. Probability plot of the lifetime.
Fig. 6. (a) Simulated Nit degradation and (b) simulated knee point degradation.
where parameter n is the degradation rate parameter [18]. Thus, the LED driver degradation Vknee(t) follows the power law relation which is consistent to the interface generation mechanism
Nit due to HCI, and thus HCI is likely a degradation mechanism of the driver studied. To further verify the degradation mechanism, Sentaurus TCAD is employed. Sentaurus provides built-in algorithm for the device degradation such as HCI and metal transportation, and it is commonly used to model and study the device degradation [19,20]. Sentaurus provides mixed-mode for device and circuit simulation so that the device built by the user can be put into a circuit, and the impact of device degradation on the circuit performance can be simulated. As it has been clearly proved in the previous work [2], the amplifier, sensing resistor and the reference voltage of the LED driver do not degrade after stress testing. Based on our test results, the weak point of the driver is the output transistor. Thus, physical model for the output transistor is built and simulated using Sentaurus. The mixed-mode circuit is shown in Fig. 5. Since the LED driver internal circuit and process parameters are not disclosed due to confidentiality, the process parameters of the MOSFET model are chosen based on the literature [21], and the model parameters are summarized in Tables 2 and 3.
Emmi image (20x)
Overlay image (20x)
The Spot is observed during the EMMI test
(a)
(b)
Fig. 7. (a) EMMI image of sample #2 and (b) overlay the microscopic image of sample #2 on its EMM image.
Table 4 Failure time (FT) for the tested sample. Sample # Failure time (h)
No. 1 1.7
No. 2 10.02
No. 3 15.8
No. 4 14.7
No. 5 13.5
No. 6 16
No. 7 14.1
No. 8 16.9
No. 9 12
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027
6
S. Lan et al. / Microelectronics Reliability xxx (2014) xxx–xxx
Assuming the degradation is indeed HCI, we study the impact of the transistor degradation on the LED driver, and the hot carrier injection model based on lucky electron injection is applied to the MOSFET defined in this work. Thus, the degradation of the user defined device follows power law relation of ‘‘lucky electron’’ and is calculated using transport equations via numerical method. The rest of the components are chosen from the default model library and their parameters’ values are kept unchanged in the aging simulation. Hence, the simulated circuit performance drift is the result of the MOSFET degradation only. Average interface traps Nit and knee point voltage degradation vs. aging time is shown in Fig. 6. Both Nit and knee point Vknee follows power law relation, which matches our test results and the previous analysis. As reported in Tan’s work [22], the degradation caused by EM follows the convex degradation, where the degradation rate
become faster as the stress continues. On the other hand, the knee point degradation observed in this work follows concave degradation matching the saturation mechanism of HCI. Thus, the possibility of EM is low and the degradation is caused by HCI only. To further verify the HCI degradation mechanism of the driver, sample #2 was selected for EMMI analysis, and its image is shown in Fig. 7. White spot is detected under the EMMI test, indicating that the failure is indeed due either to the oxide breakdown or HCI. In this case, oxide breakdown is unlikely because no increase in the supply current is detected and the LED driver is still operational with larger Vknee. Therefore, the degradation of the knee point is confirmed to be caused by HCI only and can be expressed as follows:
V knee ðtÞ ¼ a tn þ c
(a)
ð16Þ
(b)
Fig. 9. (a) Change in the transient response at different Vknee and (b) change in gate leakage current of the output transistor at different Vknee.
Fig. 10. Degradation detecting with redundancy circuit I.
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027
S. Lan et al. / Microelectronics Reliability xxx (2014) xxx–xxx
where a, n are the degradation model parameter as presented in last section, while c is the initial value of the knee point (t = 0). The driver’s lifetime can be evaluated based on Eq. (16) where Vknee(t) = Vout-opt. is used as failure criteria.
s¼
1 V out-opt: C n a
ð17Þ
Assuming Vout-opt. = 0.85 V is the operating condition, the lifetime of the tested samples are summarized in Table 4. The lognormal plot of the lifetime is shown in Fig. 8. The Lognormal plot is used because HCI failure time follows lognormal distribution [23]. The median lifetime t50% is found to be 14 h from the plot at the stress condition used in this work. 4. Degradation detection and redundancy circuit As Vout-opt. is expected to become lower for low power application in the future, the above-mentioned degradation will become
7
more important and can significantly shorten the lifetime of the driver, hence strength monitoring with redundancy circuit is proposed to enhance the driver circuit reliability. As mentioned in the introduction section, there are various health indexes available. The feature extraction through transient response is one of them. However, the degradation of the transient response due to HCI in output transistor of this driver is negligible as can be seen in Fig. 9(a) which shows the simulation result of time delay degradation of the transient response under different Vknee. The degradation of Vknee is more significant than that of time delay. Thus, this transient response method is not effective for the LED driver in this work. IDDQ is another method widely used to detect the failure of a circuit, particularly for the circuit hard failure [10,24]. Unfortunately, the increase of IDDQ due to HCI degradation is small. The HCI induced gate leakage current is in the range of nA, and this increase in the leakage current is negligible in comparison to the IDDQ of the entire circuit, which is about 20 mA. Thus, the drift of the IDDQ
(a)
(b)
(c)
Fig. 11. Simulated waveforms (a) sensing signal, (b) logic signal and (c) output current.
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027
8
S. Lan et al. / Microelectronics Reliability xxx (2014) xxx–xxx
Table 5 Values of test parameters for detection circuit II. Vout-opt.
A
Iout-opt.
Vref1
Vref2
0.91 V
50
42.5 mA
0.686 V
1.6 V
caused by HCI is hardly detectable. The simulated IDDQ vs. Vknee is shown in Fig. 9(b). Therefore, IDDQ degradation is not sensitive to the degradation of the output transistor for this LED driver. Based on the above discussion, it is clear that Vknee is indeed the best health index for the driver under studied. A degradation detecting circuit can therefore be proposed to detect the drift of the health index, i.e. Vknee. By monitoring the health index with time, the circuit health condition is revealed. The redundancy circuit is designed so that it can be turned on automatically if Vknee increases to the pre-set value of Vout-opt. Since VKnee dIout degradation is caused by the decrease of dV ; the degradation out can be detected by monitoring the current deterioration at specific output voltage smaller than VKnee. as current is linearly propordIout tional to dV in this region as given below out
Iout ðV out-specific Þ ¼
dIout V out-specific dV out
ð18Þ
Two types of degradation detection circuits are designed in this work. The first degradation detection circuit with the redundancy circuit is shown in Fig. 10, and simulation is performed to verify the switching function of the proposed circuit using Cadence TSMC 0.35 lm technology, which is the same technology used for the samples studied. The simulation results are shown in the waveform of Fig. 11. The strength degradation can be detected during the rising period of Vout and the clock controlled linear ramp voltage generator is used to produce voltage sweep for output node. In real application, the detection duration can be set so short that it is not discernible to human eyes. Hence, the degradation detection circuit can work periodically to monitor the circuit health index without the impact on driver’s performance. The degradation is detected by using two comparators with logic gates. In the detection process, the output current is converted to a voltage V sense ¼ Iout Rsense . This sensed voltage increases with the output voltage as shown in Fig. 11(a). At Vout = 0 V, the output
current is zero so that Vsense < Vref2 and Vout < Vref1. At this moment, the comparator output Vcm2(t = 0) is ‘‘1’’ while Vcm1(t = 0) is ‘‘0’’. As Vout increases, Vcm1 is triggered from ‘‘0’’ to ‘‘1’’ at Vout P Vref1 and Vcm2 is triggered from ‘‘1’’ to ‘‘0’’ at Vsense P Vref2. dIout As the dV ; V knee degradation is monitored at the region out where Vout < Vknee, Vref1 must be set smaller than Vknee, which is 0.5 V in this simulation. Vref2 is chosen such that before the failure, where Vknee < Vout-opt., Vsense reaches Vref2 earlier than Vout reaches Vref1. In this case, the triggering of Vcm2 is in advance of Vcm1. Hence, these two comparators outputs cannot be logic high simultaneously before failure, leading to logic low for the AND gate output shown in Fig. 11(b). As a result, the control signal Vq remains at logic low while Vqbar remains at logic high. As such, the original circuit is on and the redundancy circuit is off. After the degradation becomes unacceptable, where Vknee > Vout-opt. Vout increases to Vref1 before Vsense can increase to Vref2 due to the current deterioration shown in Fig. 11(a). Therefore, it leads to the logical high signal for both of these comparator outputs at the instance when Vout P Vref1. Hence the output of the AND gate at this instance is ‘‘1’’, and Vq is triggered from low to high. Thus, the original circuit is turned off while the redundancy circuit is turned on. Vq controlling the transmission gate is also a failure indicator and can reflect the health status of the LED driver. The M7D and M8D shown in Fig. 11(c) are the drain current of the output channel for original circuit (M7) and redundancy circuit (M8) respectively. Before the failure, the output current is sinking through the original circuit M7. After the failure is detected, the degraded circuit (M7) is turned off and the current is sinking through redundancy circuit (M8). Therefore, by properly setting the value of Vref1 and Vref2, the maximum allowed degradation can be controlled. From Eq. (18) and Fig. 11(a), the original circuit is in operation if
V sensejV out ¼V ref 1 ¼
dIout V ref 1 Rsense > V ref 2 dV out
ð19Þ
dIout As the degradation continues, dV decreases, and there is a critout ical point where
V sensejV out ¼V ref 1 ¼
dIout V ref 1 Rsense: ¼ V ref 2 dV out Critical:
ð20Þ
Fig. 12. Degradation detecting with redundancy circuit II.
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027
S. Lan et al. / Microelectronics Reliability xxx (2014) xxx–xxx
9
As the LED driver tested in this work is a commercial product, the internal circuit design cannot be modified. Therefore, another degradation detection circuit (circuit II) is designed and tested at discrete-component level as shown in Fig. 12. The methodology is similar to that of the circuit shown in Fig. 10, but the detection and redundancy circuit are built externally, which can be directly used with the commercial product. In this case, the Output Enable (OE) instead of the transmission gate is used to turn on and off the chip. The output of the AND gate is the degradation indicator, and it is connected to the OE. To sense the output current, a 1-X resistor is externally connected to the output channel with its voltage drop amplified by a differential amplifier. Hence, the current deterioration is also amplified to achieve a better accuracy. Therefore, the maximum allowed degradation is modified from Eq. (21) as follows: Fig. 13. Rdeg-model vs. knee point.
V ref 2 dIout Iout-opt: ¼ ¼ dV outMax-deg: V out-opt: V ref 1 1 Xsense: A
At this point, the redundancy circuit will be switched over to replace the degraded driver. From Eqs. (19) and (20), the maximum allowed degradation dV outdIout can be calculated based on a given Max-deg:
operating output voltage and operating output current as shown in Fig. 2:
V ref 2 dIout Iout-opt: ¼ ¼ dV outMax-deg: V out-opt: V ref 1 Rsense:
ð21Þ
ð22Þ
where A is the gain of the differential amplifier. To verify the working of this detection circuit, a variable resistor Rdeg-model is connected at the output to model the output channel degradation. This is possible since the degradation of the driver is caused by either HCI or EM, which indeed leads to the increase of the output impedance as mentioned in Section 2. The Vknee vs. is plotted in Fig. 13. The Vknee is proportional to the value of Rdeg-model and hence the increase of Rdeg-model is equivalent to the
Fig. 14. The measured results of the degradation detecting circuit.
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027
10
S. Lan et al. / Microelectronics Reliability xxx (2014) xxx–xxx
strength degradation of the driver with stress time. To test the redundancy switching, the failure criterion is chosen arbitrary between Rdeg-model = 2.5 X and Rdeg-model = 3 X, where the corresponding Vout-opt. = 0.91 V. The redundancy circuit is turned on when Rdeg-model is increased from 2.5 to 3 X. The test parameters are summarized as shown in Table 5. Here Vout-opt. is the failure criterion, Iout-opt. is the output current and A is the gain of the differential amplifier shown in Fig. 12 whose value is determined by the values of R1–R4. The values of Vref1 and Vref2 can be calculated using Eq. (20). Based on the working principle of the proposed degradation detecting circuit, the redundancy circuit is switched over when the knee point passed 0.91 V. The I–V curves with different values of Rdeg-model are measured using Keithley 2602 source meter. The measured waveforms are shown in Fig. 14. The switching process is consistent with the analysis. As Rdeg-model is increased from 2.5 to 3 X, the redundancy circuit is turned on and degraded circuit is turned off. By changing the value of Vref1, Vref2, the failure criterion can be adjusted according to its application. After the redundancy circuit is switched over, Vknee-deg. becomes virgin again, which is Vknee(0), and the lifetime is doubled.
[4]
[5] [6] [7] [8]
[9] [10]
[11] [12] [13]
[14]
5. Conclusion In this work, the health index of a linear mode LED driver is identified and characterized, which is the knee point voltage. Its degradation is monitored with the stress time. Based on the degradation study and failure analysis results, the cause of the degradation is found to be HCI under high voltage stress condition. When the health index becomes unacceptable, the LED driver is unable to perform its intended performance. Based on the knee point voltage degradation, two types of degradation detection circuits with a redundancy circuit are developed. The test results of these two detection circuits show that the redundancy circuits switch over when the knee point voltage passes the failure point and the lifetime of the driver is thus extended. Reference [1] Yuege Z, Xiang L, Xuerong Y, Guofu Z. A remaining useful life prediction method based on condition monitoring for LED driver. In: 2012 IEEE 2012 prognostics and system health management conference (PHM 2012), 23–25 May 2012, IEEE, Piscataway, NJ, USA, 2012. p. 5. [2] Lan S, Tan CM, Wu K. Reliability study of LED driver – a case study of black box testing. Microelectron Reliab 2012;52:1940–4. [3] Bo S, Sau Wee K, Yuan C, Xuejun F, Guoqi Z. Accelerated lifetime test for isolated components in linear drivers of high-voltage LED system. In: 2013 14th international conference on thermal, mechanical and multi-physics
[15]
[16]
[17]
[18] [19]
[20]
[21]
[22] [23]
[24]
simulation and experiments in microelectronics and microsystems (EuroSimE), 14–17 April 2013, IEEE, Piscataway, NJ, USA, 2013. p. 5. Lei H, Narendran N. Developing an accelerated life test method for LED drivers. In: Ninth international conference on solid state lighting, 3–5 August 2009, SPIE – the international society for optical engineering, USA, 2009. p. 742209 (742208 pp.). Han L, Narendran N. An accelerated test method for predicting the useful life of an LED driver. IEEE Trans Power Electron 2011;26:2249–57. MEEKER WQ. ESCOBAR LA, Statistical methods for reliability. A wileyInterscience Publication, 1998. Vasan ASS, Long B, Pecht M. Diagnostics and prognostics method for analog electronic circuits. IEEE Trans Ind Electron 2013;60:5277–91. Chin Tsung M, Chung Len L, Wen Ching W. A self-diagnostic BIST memory design scheme. In: Proceedings of IEEE international workshop on memory technology, design, and test, 8–9 August 1994, IEEE Comput Soc Press, Los Alamitos, CA, USA, 1994. p. 7–9. Shyam S, Constantinides K, Phadke S, Benacco V, Austin T. Ultra low-cost defect protection for microprocessor pipelines. Comput Archit News 2006;34:73–82. Ahmed F, Milor L. Reliable cache design with detection of gate oxide breakdown using BIST. In: Computer design, 2009, ICCD 2009, IEEE international conference on, 2009. p. 366–71. Guo Y, Liu G, Jin H, Shi Z, Qiao G. Intermetallic phase formation in diffusionbonded Cu/Al laminates. J Mater Sci 2011;46:2467–73. Tan CM. Electromigration in ULSI interconnections. Singapore: World Scientific Publishing Co. Pte. Ltd.; 2010. _ Brozek T, Chan YD, Viswanathan CR. Gate oxide leakage due to temperature accelerated degradation under plasma charging conditions. Microelectron Reliab 1998;38:73–9. Takeda E, Suzuki N. Empirical model for device degradation due to hot-carrier injection. Electron Dev Lett 1983;4:111–3. Cham KM, Hui J, Vande Voorde P, Fu HS. Self-limiting behavior of hot carrier degradation and its implication on the validity of lifetime extraction by accelerated stress. In: 25th Annual proceedings – reliability physics 1987, IEEE, San Diego, CA, USA, 1987, p. 191–4. Chung JE, Ko P-K, Hu C. A model for hot-electron-induced MOSFET linearcurrent degradation based on mobility reduction due to interface-state generation. IEEE Trans Electron Dev 1991;38:1362–70. Chenming H, Simon CT, Fu-Chieh H, Ko PK, Chan TY, Terrill KW. Hot-electroninduced MOSFET degradation – model, monitor, and improvement, solid-state circuits. IEEE J 1985;20:295–305. Ang DS, Ling CH. Unified model for the self-limiting hot-carrier degradation in LDD n-MOSFET’s. IEEE Trans Electron Dev 1998;45:149–59. Hadi DA, Wan Muhamad Hatta SF, Soin N. Effect of oxide thickness on 32 nm pMOSFET reliability. In: 2010 IEEE international conference on semiconductor electronics (ICSE), 28–30 June 2010, IEEE, Piscataway, NJ, USA, 2010, p. 244–7. Maiti TK, Bera MK, Mahato SS, Chakraborty P, Mahata C, Sengupta M, Chakraborty A, Maiti CK. Hot carrier degradation in nanowire (NW) FinFETs. In: 2008 15th IEEE international symposium on the physical and failure analysis of integrated circuits, IPFA, July 7, 2008 – July 11, 2008, Institute of Electrical and Electronics Engineers Inc., Singapore, Singapore, 2008. Haifeng C, Yue H, Zhiwei Z, Xiaohua M, Yanrong C. Investigation of gateinduced drain leakage current in ultra-thin gate oxide LDD nMOSFET’s. In: 2006 8th International conference on solid-state and integrated circuit technology, 23–26 October 2006, IEEE, Piscataway, NJ, USA, 2006, p. 3. Tan CM, Roy A. Electromigration in ULSI interconnects. Mater Sci Eng: R: Rep 2007;58:1–75. Snyder ES. The impact of statistics on hot-carrier lifetime estimates of nchannel MOSFETs. In: Microelectronics manufacturing and reliability, 21–22 September 1992, USA, 1993, p. 180–7. Chen Z, Wei L, Keshavarzi A, Roy K. IDDQ testing for deep-submicron ICs: challenges and solutions. IEEE Des Test Comput 2002;19:24–33.
Please cite this article in press as: Lan S et al. Methodology of reliability enhancement for high power LED driver. Microelectron Reliab (2014), http:// dx.doi.org/10.1016/j.microrel.2014.01.027