Microprocessor based data acquisition system

Microprocessor based data

acquisition system V V Athani describes the development of a data acquisition system using the Fairchild F8 microprocessor and a compatible analogue converter unit The paper reports the development o f a 1G-channel data acquisition system based on the Fairchild F8 microprocessor. The system developed consists o f an analogue input unit containing a 16-channel analogue multiplexer, instrumentation amplifier and A/D converter, and an 1=8 microprocessor which stores and processes data. Software for data logging at regular intervals, data logging on demand by the operator, limit checking, trend checking and self checking has already been developed. Software to compensate for input offset as well as for nonlinearity o f transducer characteristics is under development. Data acquisition systems (DASs) are used to monitor process variables in distillation columns, chemical reactors, nuclear and conventional power plants, wind tunnel testing of aircraft, missile tracking, patient monitoring systems, etc. DASs are basically capable of sensing a number of analogue signals emanating from the process being monitored, and converting them into digital form for storage and processing. The processed information enables the operator to

16- bit address hne ,U,;Reset ,~ Analogue J ADC VMA input I ~

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The two basic units of the DAS are interconnected as shown in Figure 1. The analogue input unit used is the MP21 chip produced by Burr-Brown s . This is designed to be used with the F8 and is an 80-pin package consisting of: analogue multiplexer that can accept up to 16 single ended or eight differential analogue inputs

Department of Electrical Engineering, Indian Institute of Technology, Bombay, Powai, Bombay 400 076, India

vol 3 no 8 october 79

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Figure I. Block diagram of data acquisition system

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Figure 2. MP21 block diagram

ANALOGUE INPUT UNIT

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8-bit data bus

• ensure that the process is running smoothly (monitoring function) • take control action for regulating the process • take corrective action in case of emergencies With the advent of microprocessors, storage and processing of information in digital form has become an inexpensive proposition, so much so that it has become feasible to dedicate a microprocessor system entirely to the DAS, making it more compact, versatile and reliable than before. This has led to the increasing use of microprocessors in DASs ~-~" This tendency has been further intensified by manufacturers of linear integrated circuits coming out with microprocessor compatible analogue input units s . In keeping with this tender{cy a DAS based on the Fairchild F8 microprocessor and an F8 compatible analogue input unit has been developed ~ : this paper describes its salient features.

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• • •

instrumentation amplifier high speed 8-bit A/D converter interface, timing and address decoding circuits

A block diagram is shown in Figure 2. The MP 21 unit may be operated in any of four modes. • start conversion and halt the processor (using HALT line, if available, on the microprocessor) till conversion is over

0141-9331/79/080359-06 $02.00 © 1979 IPC Business Press

359

Table 1. MP21 specifications ADC gain ranges Amplifier gain Throughput rate Input impedance CM RR (for differential inputs) Output ending Logic loading on input Output drive Size Power supply

• •

•

: 0 - 5 V, 0 - 1 0 V, -+2.5 V, -+5 V, -+IOV : 2-250 : 40-200/as/channel : 5 GS2 in parallel with 1 0 0 p F : 70 dB (DC to 60 Hz) : binary or 2's-complement : one TTL load : five TTL loads 43 mm x 55 mm : -+15 V,-+5 V DC

start conversion, carry out some other job then return after conversion is over start conversion and go to another part of the program, periodically checking the HALT line for end of conversion start conversion and proceed to another part of the program, the MP21 causing an interrupt at the end of conversion

The main specifications of the MP21 unit are shown in Table I.

F8 M I C R O P R O C E S S O R The F8 evaluation kit produced by Fairchild Microsystems Division has been used in our DAS for storing and processing data in digital form generated by the MP21 analogue input unit. The kit is a single board microcomputer consisting of the following LSI chips: • • • •

3850 3851 3853 2102

microprocessor unit (MPU) program storage unit (PSU) static memory interface unit (SMI) random access memory (RAM)

Salient features of these units are described below for ready reference. See references 7 and 8 for further details.

3850 MPU The F8 is an 8-bit microprocessor with 2/as instruction cycle time. Its instruction repertoire consists of over 70 instructions. 64 scratch pad registers, internal as well as external clocks, and power-on reset logic are noteworthy features of this MPU. Another distinguishing characteristic is the provision of two 8-bit I/O ports. The 3850 MPU contains the following registers: • arithmetic logic unit (ALU): 8-bit parallel register for performing arithmetic and logic operations on data. Both binary and decimal arithmetic are provided • accumulator: 8-bit parallel register, data stored in which is manipulated by the ALU. The results of operations carried out by the ALU are left in the accumulator • scratch pad registers: 64 8-bit scratch pad registers may be used for storing frequently accessed data as well as intermediate results. They can be used by the, user as read/write memory. They also serve as index registers • indirect scratch pad address register (ISAR): the first 16 scratchpad registers may be directly accessed by

360

the user. The remaining scratchpad registers are accessed through the ISAR • status register (W): 5-bit register which identifies the following status conditions arising from execution of each instruction: sign, carry, zero, overflow and interrupt requests. The user may use the condition of the W register to cause conditional jumps to take place in his program • I/O ports: two bidirectional I/O ports have been provided for communication with outside world

3851 P~;U This is basically a 1024 byte ROM which is meant to store instructions and data that are read but never altered. In addition to the ROM, the PSU contains a number of interesting features as mentioned below: •

program counter (PCO): 16-bit register which holds the address of the next instruction. After each reference to it, the PCO automatically increments itself by one • stack register (PCI): 16-bit register to which contents of PCO are transferred before a jump to a subroutine, a loop or an interrupt service routine is made. It thus becomes possible for the MPU to execute subroutines, loops, and interrupts • data counter (DC): 16-bit register that holds the address of the operand • I/O ports: two more 8-bit bidirectional I/O ports are provided • local timer/interrupt: a polynomial shift regLster which runs continuously, sending a signal to the interrupt control logic whenever the timer count reaches zero. In this way, delays up to 7905 clock pulses may be generated

3 8 5 3 SMI The SMI is used to interface static RAM of up to 64 kbyte capacity to the F8 microprocessor system. To enable this interfacing to be achieved, the SMI contains the following registers: •

program counter (PCO): plays the same role as the PCO register of the 3851 PSU, except that 3853 has no chip select mask. The entire contents of PCO are transferred to attached RAMs which interpret part of the PCO address as chip select lines • stack register (PCI): has the same role to play as in 3851 PSU • data counters (DCO, DCI): DCl acts as a temporary storage buffer for DCO. An instruction switches contents of DCO and DCI • local timer/interrupt: is similar to that in 3851 PSU • two additional ports have been provided foQrprogrammable vector interrupt registers

SYSTEM INTERFACING The interconnection between the MP21 and F8 microcomputer units is illustrated in Figure 1. The MPU, PSU, SMI and RAM are on the same data bus. Digital output pins DO to D7 of MP21 are connected to this common data bus. The SMI generates 16-bit addresses for use with external memory ~ia the 16-line address bus. The address pins of MP21 are connected to the address bus. The I/O port 5 pin 0 is used to reset MP21. HALT and INTERRUPT pins of MP21 arenot used. Clock ~2 and R/W

microprocessors and microsystems

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At specified intervals of time, called log time, latest values of the variables coming on the analogue input channel are printed out on the TTY in the following format XX-

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where I X denotes two digit channel number and YYY represents the latest sample value. After one cycle of logging is over, the routine branches to reset. Details of this routine are shown in Figure 4.

Limit checking Serial input from TTY

Serial output to TTY

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Each safnple value, as received from the analogue input unit MP21, is checked against specified upper and lower limits already-stored in the MPU. If the sample value is outside these limits the program jumps to the alarm routine; otherwise it proceeds to the trend checking routine, as shown in Figure 5. The purpose of this limit checking routine is to warn the operator about the existence of abnormal conditions and to urge him to take corrective action.

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The purpose of this routine is to forewarn the operator about an impending crisis and to enable him to take precautionary measures before the crisis actually occurs. This is the essence of preventive maintenance. Such prevention is certainly better than troubleshooting after the crisis has occurred and may obviate danger to life or costly equipment and degradation of product.

Figure 3. Interfacing details, (a) interfacing of I/0 ports 0 and 1-of 3850 to LED displays (b) interfacing of I/0 ports 4 and 5 of 3851

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I Po~=l I 0 pins are made permanently high. VMA is connected to the MPU READ pin of the SMI. Two 7-segment common anode LEDs are connected to I/O ports 0 and 1 of the MPU. Details of connection are shown in Figure 3. The LEDs are used for display as well as_alarm indication. Details of other I/O port pin connections are as follows:

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Yes

Keyboard and printer lines from the TTY and power supply are also appropriately connected.

SOFTWARE DEVELOPMENT Software for processin~l data in a variety of ways has been developed, A flowchart for all the programs developed is shown in Figure 4..Details of these programs are briefly described below.

NO

II &oe NO

Monitoring Each of the input channels is scanned sequentially. The number of channels N to be scanned and time interval between reading of successive channels, as a multiple of the basic 4 ms interval, are specified by the operator.

vol 3 no 8 october 79

Figure 4. Flowchart of main program

367

Limit checking routine

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alarm routine; else it proceeds further. Details of this routine are given in Figure 6.

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A jump to this routine is affected from either the limit checking or trend checking program when the present or predicted value of Yn+l or Yn+2 falls outside the range defined by the upper and lower limits. The aim of this routine is to warn the operator against either existing or impending abnormal conditions. This warning is given in two ways:

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• a visual alarm signalshowing the two digit channel number XX appears on the two 7-segment LED displays connected to I/O ports 0 ;~nd 1 as shown in Figure 3 • a warning message is simultaneously printed out on the Teletype unit in the following format

Figure 5. Limit checking routine

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If the limit checking or self checking routines do not produce the alarm condition, the program comes to this routine. This routine moves the present and past sample values down. Thus Yn value is shifted to Yn-1, Yn-1 value is shifted to Yn-2," Yn-2 value is transferred to Yn-3 and Yn-3 value is moved to Yn-4. The current Yn-4 value is lost. This is illustrated in Figure 8.

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Figure 6. Trend checking routine

The forewarning is done by computing two future values Yn+l and Yn+2 on the basis of the present value Yn and four previous values Yn-1, Yn-2, Yn-3 and Yn-4. Newton's backward interpolation formula 9 is used for computing Yn+.l and Yn+2- In this method, the successive differences are first computed as follows:

AYn-1 = Y n - Y~-I A2 Y~-2 : Y . - 2Y~-1 + Yn-2

(1) (2)

A4 Yn-4 : Yn - 4Yn-1 + 6Yn-2 - 4Yn-3 + Yn-4 (4) On the basis of these differences, Y'n+1 and Y:.+? are compute~l as follows: Y~+I = Yn + A~n-1 + A2yn~2 + ~ 3 y n - 3 + A4Yn.-4 (5) Yn + ~ ~'n-~l + 3A2 Yn-2 + 4A3 ~'~-3 + 5 A 4 Yn4 (6) In case either Yn+! or Yn~2 or both exceed the upper limit or fall below the lower limit, the program lumps to the Y'n+2 =

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microprocessors and microsystems

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An interrupt switch to enable the operator to interrupt the main program is also provided. Having interrupted the~ program, the operator has two switch selected options: logging on demand and self checking routine.

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(,Return to main program) I Enable external interrupt

Self checking This routine is called by the operator to ensure that all channels are working correctly. On receiving an operator request, the MPU reads the standard analogue input applied to each channel in turn and compares the sample value with standard stored value. If the difference is more than one least significant bit, an error message appears on the Teletype unit in the following format: C XX-

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YYY ERR Z

where X X denotes the channel number, YYY stands for the absolute value of deviation and Z indicates calibration test number. A set of eight tests can be performed cyclically, the analogue input for each test being suitably adjusted. At the end of each test, the operator may give a 'GO' command for the next test or RETURN to the main program, as shown in Figure 9.

Binary to BCD conversion

IRead digital input value

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Compare with Zth ca brat on va ue I I

Figure 9. Self checking routine

II

Binary to BCD conversion routine

IClear OL, ou I

"1 I Shift combined registers QU, OL, R8 to the left one place

In DASs used in engineering systems, logging in decimal form is invariably used. In view of this, a binary to BCD conversion program has been developed which takes an 8-bit binary number and converts it into three decimal digits as shown in Figure 10. These decimal digits are output either on an LED display or on a Teletype.

l ~ e s IAdd 3 to units digit J

FABRICATION AND TESTING The whole of this DAS has been fabricated in the form of two printed circuit boards, one containing the analogue input unit MP21 and the other being the F8 microprocessor evaluation kit. The operator controls are all located on the front pannel. These include selector switches for selecting the scanning rate, the logging rate, timer etc. Thumb wheel switches have been provided for entering upper and lower limits for limit and trend checking, and also for entering standa(d calibration'values used in the self checking routine. Alternatively it is possible to read in these values from a punched tape under software control.

vol 3 no 8 october 79

I Add 3 to tens dig,t

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IAdd3 to hundreds digit I L .

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Figure 10. Binary to BCD conversion routine.

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The software developed has been thoroughly tested with the help of the FAIRBUG program stored in the PSU unit (3851) of the F8 microprocessor kit. The FAIRBUG program offers the following facilities: • data entry in serial form (from Teletype) or parallel form (from paper tape) • examine and alter any register in the memory • dump memory and create PROM talSe • library of subroutines for debugging, input/output control, etc.

REFERENCES 1 Grandobis, C 'Log data under microprocessor control' Electron. Des. Vol 24 No 10 (10 May 1976) pp 94-101 2 Calkins, R and Berg A 'Data acquisition in a DIP shrinks system' Electronics Vol 49 No 14 (8 July 1976) pp 77-83

The entire DAS has also been tested on simulated inputs. The extent of software developed has been severely constrained by the RAM available (11
3 Mulder, M C and Fasang, P F 'Microprocessor oriented data acquisition and control system for power control' Computer Architecture News Vol 4 No 4 (January 1976) pp 74-77 4 Townzen, D A 'A microprocessor based data acquisition system' Proc. IECI '79 (1979) 5 Analog input microperipheral Burr-Brown Corporation, No PDS-375 (April 1977) 6 Balachandran, S C 'Microprocessor based data acquisition system' B. Tech. Project, II T Bombay (1978)

CONCLUSIONS

A novel DAS consisting of two compatible units, analogue converter unit MP21 and F8 microprocessor kit, has been developed. The system is compact, and versatile in terms of data processing capabilities. The system is not competi"rive in terms of cost at the present level of pricing, especially of the analogue input unit MP21. However, technical

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feasibility has been established. In future, as the prices of both microprocessor and compatible analogue input unit come down, the system will become economically feasible also.

7 [:8 evaluator kit manual Fairchild Micro Systems Division 8 Soucek, B Microprocessors and microcomputers Wiley, New York (1976) 9 Davis, P J Interpolation and approximation Blaisdell Publishing Co., New York (1963) Chapter 2

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F u r t h u r d~'t,t~is l r o m :

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microprocessors and microsystems