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Microprocessors and Microsystems
Newsfile Academics' ASIC service To overcome the problem of 'routes to silicon' faced by UK-based academics, the University of London VLSI Consortium and the ASIC design and manufacturing company European Silicon Structures have launched a scheme to offer a lowcost fabrication service exclusively to universities and polytechnics. Problems faced by academics in fabricating designs were identified at the 1986 European conference on Customer-Vendor Interfaces in Microelectronics in the FRG; they included the support of design rule sets on the processes being used, unacceptably long turnaround times, and extensive acceptance t e s t i n g necessary to differentiate low yields arising from bad processing from low yields resulting from design errors. The new academic service will
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enable numerous chip design courses to be extended through to the critical stages of fabrication and test. Fabrication technology will involve the 2pm electron-beam direct write process, and production can be geared to the academic calendar giving researchers the opportunity to complete the design cycle twice in one year. Tumaround of error-free designs is guaranteed to be within nine weeks, says ES2. The VLSI Consortium was set up in 1984 to support the fabrication and testing of full-custom design projects from colleges within London University, although other UK universities have used the service. Contact: A D G Davidson, University of London VLSI Consortium, Department of Electronic and Electrical Engineering, University College London, Torrington Place, London WCIE 7JE, UK. Tel: 01-387 7050.
New Section •
New Section •
ASIC 'standards' drive US semiconductor companies Texas Instruments and Intel are joining forces in a bid to establish de facto industry ASIC 'standards' on the strength of their combined market presence. Agreement between the companies includes development of a common cell library and common gate array macro library, as well as provisions for common testing, packaging and design rules. A common SSI/MSI library of standard cells and LSI c e l l s - including 82xx peripherals, bit-slice components such as the 2901 and 2920, register files, FIFOs, RAMs, ROMs and PLAs - - will be available by the end of 1987. Both companies intend that each shall be the other's altemate source for the supply of CMOS ASICs. VLSI cells will be added to the ASIC library eventually.
New Section •
Call for Papers
Chip architectures: system integration Systemsengineers have for many years been able to choose between general-purpose and custom devices. Sincethe early 1970s this choice has been dominated by the microprocessor with its inherent programmability and flexibility. Now, with the increasing range of building blocks such as programmable logic devices, gate arraysand standard cells, allied to the increasingsophistication and cost effectiveness of computer-aided engineering (CAE)and design support tools, the custom approach is regaining support. Significantly, the company that introduced the first commercial microprocessor, Intel, can now supply many of its peripheral components in standard cell form, and microprocessor cells will follow. Advantagesof the custom approach, such as increased processingspeed and reduction in the number of systemscomponents, have to be weighed against the benef~s of flexibility and lower initial engineering costs of the traditional approach. In many situations, however, the two forms of components will need to coexist. Custom chips will combine many of the functions of individual components; standard processor cores will provide the basisof many custom devices. According to the microprocessor manufacturer Zilog*: 'Rather than application-specific integrated circuits (ASICs) cutting into the processor market, they have fuelled it into a frenzy. In building an ASIC with over 30k gates, you need order. Processorcores provide that order.' Microprocessors and Micros)stems is launching this new section to examine and report developments in the field of chip architecture design and the integration of such chips into systemsconfigurations. The joumal invites contributions for this special forum linking chip-level to system-level architecture designs -- reports on researchand development, review papers and tutorials on chip architecture design and practical systems applications -- for publication from February 1988. Papers may cover • microprocessor architectures • custom and semicustom devices • design methodologies
• applying CAD tools • description languages
• logic design • simulation, verification and test
Microprocessors and Micros)stems publishes fully refereed technical papers describing practical computing design and development experience and engineering applications. Papersto be submitted for the new section should be sent to: The Editor, Miaoprocessors and Microsystems, PO Box 63, Guildford, Surrey GU2 5BH, UK.
*Electronics Times(25 June 1987)
Vol 11 No 8 October 1987
411
Notes for authors Microprocessors and Microsystems The journal welcomes original papers from both academic and industrial contributors on the design, devel3pment, evaluation and application of microprocessor-based systems. Chiplevel to systems-level architecture designs are covered; also the application of associated software tools. Papers should illustrate practical experience and show the applicability of the work described. Contributions are invited for inclusion in the following sections of the journal
figures from the main body of the script and attach them at the end of the paper. Each table or figure should be reproduced on a single sheet. Please list figure captions on a separate sheet. English is the sole language used by the journal, and we follow the Oxford English Dictionary. All papers should be written in English. To maintain consistency throughout each volume, every paper published is stylized by the journal's editorial staff.
• Architectures • Systems: design and development • Software tools
Biographical notes
Typically, full-length papers are approximately 5000-7000 words long plus illustrations. In addition to full-length papers, the journal welcomes shorter design notes, application notes and case studies of up to 3000 words.
Biographical notes can be up to 100 words, briefly describing career details and current research interests, and should be accompanied by a black-and-white portrait photograph.
All submitted articles are refereed by two independent reviewers to ensure both accuracy and relevance, though it is the authors' sole responsibility that statements used are accurate. The author is also responsible for obtaining permission to quote material and to republish tables and illustrations.
PREPARATION OF SCRIPTS Three copies of the manuscript, typed double spaced on one side of A4 paper should be sent to:
The
Edilor, Microprocessors and Microsystems, PO Box 63, Guildford, Surrey GU2 5BH, United Kingdom. The paper should be structured in the following way • • • • • • • • •
Title Author(s) and affiliation Abstract Main body of paper References Biographical note List of figure captions Tables Figures
Each page of the manuscript should be numbered. Wide margins should be left so that the paper can be prepared for the typesetters. Please remove tables and
412
The journal style is to indicate the use of a reference in the text with a superscript as each one arises and give the full reference with the same number at the end of the paper. If a reference is cited more than once, the same number should be used each time. With a bibliography, the references are given in alphabetical order (dependent on the first author's surname). Please follow this style. References take the following form: (To journals) I Peyton Jones, S 'Using Futurebus in a fifth-generation computer' Microprocessors and Microsystems Vol 10 No 2 (March 1986) pp 69-76 (To books) 2 Ham, P A L 'Reliability and redundancy in microprocessor controllers' in Warwick, K and Rees, D
(eds) Industrial digital control systems UNITS
REFEREEING
REFERENCES
SI units should be used. In circumstances where this is not possible, please provide a conversion factor at the first mention of the unit.
I LLUSTRATIONS Line drawings We use our own professional studio to ensure that line drawings are consistent with house style. We would prefer, however, to receive one set of unlettered drawings (black ink on tracing paper) so we can put on the lettering ourselves.
Computer printouts Illustrations showing line printer listings, plotter output, etc should preferably be on unlined paper. Printouts will be reduced by us to the relevant size. Do not mark them as they will be used to make photographic copies for the typesetters. Only include sufficient lines for the reader to interpret the format and nature of the printout. Fuller explanation of the printout should appear in the caption and the text.
Photographs Black-and-white glossy photographs (including Polaroid prints of VDU screens) should be supplied unmounted. They should be labelled clearly on the back with a soft pencil.
Peter Peregrinus, London, UK (1986) pp 242-266
PROOFS Correspondence and proofs for corrections will be sent to the first named author, unless otherwise indicated. Authors will receive a copy of the page proofs which will include copies of redrawn or relettered illustrations. It is important that these proofs should be checked and returned promptly.
COPYRIGHT Before publication, authors are requested to assign copyright to Butterworth & Co (Publishers) Ltd. This allows the company to sanction reprints of the whole or part of the volume and authorize photocopies. The authors, however, still retain their traditional right to reuse or to veto thirdparty publication.
OFFPRINTS AND REPRINTS The first named author will receive 25 offprints of the paper free of charge as well as a complimentary copy of the journal. Further reprint copies, a minimum of 100, can be ordered at any time from the Reprints Department, Butterworth Scientific Ltd, PO Box 63, Westbury House, Bury Street, Guildford, Surrey GU2 5BH, UK.
Microprocessors and Microsystems
•
enable numerous chip design courses to be extended through to the critical stages of fabrication and test. Fabrication technology will involve the 2pm electron-beam direct write process, and production can be geared to the academic calendar giving researchers the opportunity to complete the design cycle twice in one year. Tumaround of error-free designs is guaranteed to be within nine weeks, says ES2. The VLSI Consortium was set up in 1984 to support the fabrication and testing of full-custom design projects from colleges within London University, although other UK universities have used the service. Contact: A D G Davidson, University of London VLSI Consortium, Department of Electronic and Electrical Engineering, University College London, Torrington Place, London WCIE 7JE, UK. Tel: 01-387 7050.
New Section •
New Section •
ASIC 'standards' drive US semiconductor companies Texas Instruments and Intel are joining forces in a bid to establish de facto industry ASIC 'standards' on the strength of their combined market presence. Agreement between the companies includes development of a common cell library and common gate array macro library, as well as provisions for common testing, packaging and design rules. A common SSI/MSI library of standard cells and LSI c e l l s - including 82xx peripherals, bit-slice components such as the 2901 and 2920, register files, FIFOs, RAMs, ROMs and PLAs - - will be available by the end of 1987. Both companies intend that each shall be the other's altemate source for the supply of CMOS ASICs. VLSI cells will be added to the ASIC library eventually.
New Section •
Call for Papers
Chip architectures: system integration Systemsengineers have for many years been able to choose between general-purpose and custom devices. Sincethe early 1970s this choice has been dominated by the microprocessor with its inherent programmability and flexibility. Now, with the increasing range of building blocks such as programmable logic devices, gate arraysand standard cells, allied to the increasingsophistication and cost effectiveness of computer-aided engineering (CAE)and design support tools, the custom approach is regaining support. Significantly, the company that introduced the first commercial microprocessor, Intel, can now supply many of its peripheral components in standard cell form, and microprocessor cells will follow. Advantagesof the custom approach, such as increased processingspeed and reduction in the number of systemscomponents, have to be weighed against the benef~s of flexibility and lower initial engineering costs of the traditional approach. In many situations, however, the two forms of components will need to coexist. Custom chips will combine many of the functions of individual components; standard processor cores will provide the basisof many custom devices. According to the microprocessor manufacturer Zilog*: 'Rather than application-specific integrated circuits (ASICs) cutting into the processor market, they have fuelled it into a frenzy. In building an ASIC with over 30k gates, you need order. Processorcores provide that order.' Microprocessors and Micros)stems is launching this new section to examine and report developments in the field of chip architecture design and the integration of such chips into systemsconfigurations. The joumal invites contributions for this special forum linking chip-level to system-level architecture designs -- reports on researchand development, review papers and tutorials on chip architecture design and practical systems applications -- for publication from February 1988. Papers may cover • microprocessor architectures • custom and semicustom devices • design methodologies
• applying CAD tools • description languages
• logic design • simulation, verification and test
Microprocessors and Micros)stems publishes fully refereed technical papers describing practical computing design and development experience and engineering applications. Papersto be submitted for the new section should be sent to: The Editor, Miaoprocessors and Microsystems, PO Box 63, Guildford, Surrey GU2 5BH, UK.
*Electronics Times(25 June 1987)
Vol 11 No 8 October 1987
411
Notes for authors Microprocessors and Microsystems The journal welcomes original papers from both academic and industrial contributors on the design, devel3pment, evaluation and application of microprocessor-based systems. Chiplevel to systems-level architecture designs are covered; also the application of associated software tools. Papers should illustrate practical experience and show the applicability of the work described. Contributions are invited for inclusion in the following sections of the journal
figures from the main body of the script and attach them at the end of the paper. Each table or figure should be reproduced on a single sheet. Please list figure captions on a separate sheet. English is the sole language used by the journal, and we follow the Oxford English Dictionary. All papers should be written in English. To maintain consistency throughout each volume, every paper published is stylized by the journal's editorial staff.
• Architectures • Systems: design and development • Software tools
Biographical notes
Typically, full-length papers are approximately 5000-7000 words long plus illustrations. In addition to full-length papers, the journal welcomes shorter design notes, application notes and case studies of up to 3000 words.
Biographical notes can be up to 100 words, briefly describing career details and current research interests, and should be accompanied by a black-and-white portrait photograph.
All submitted articles are refereed by two independent reviewers to ensure both accuracy and relevance, though it is the authors' sole responsibility that statements used are accurate. The author is also responsible for obtaining permission to quote material and to republish tables and illustrations.
PREPARATION OF SCRIPTS Three copies of the manuscript, typed double spaced on one side of A4 paper should be sent to:
The
Edilor, Microprocessors and Microsystems, PO Box 63, Guildford, Surrey GU2 5BH, United Kingdom. The paper should be structured in the following way • • • • • • • • •
Title Author(s) and affiliation Abstract Main body of paper References Biographical note List of figure captions Tables Figures
Each page of the manuscript should be numbered. Wide margins should be left so that the paper can be prepared for the typesetters. Please remove tables and
412
The journal style is to indicate the use of a reference in the text with a superscript as each one arises and give the full reference with the same number at the end of the paper. If a reference is cited more than once, the same number should be used each time. With a bibliography, the references are given in alphabetical order (dependent on the first author's surname). Please follow this style. References take the following form: (To journals) I Peyton Jones, S 'Using Futurebus in a fifth-generation computer' Microprocessors and Microsystems Vol 10 No 2 (March 1986) pp 69-76 (To books) 2 Ham, P A L 'Reliability and redundancy in microprocessor controllers' in Warwick, K and Rees, D
(eds) Industrial digital control systems UNITS
REFEREEING
REFERENCES
SI units should be used. In circumstances where this is not possible, please provide a conversion factor at the first mention of the unit.
I LLUSTRATIONS Line drawings We use our own professional studio to ensure that line drawings are consistent with house style. We would prefer, however, to receive one set of unlettered drawings (black ink on tracing paper) so we can put on the lettering ourselves.
Computer printouts Illustrations showing line printer listings, plotter output, etc should preferably be on unlined paper. Printouts will be reduced by us to the relevant size. Do not mark them as they will be used to make photographic copies for the typesetters. Only include sufficient lines for the reader to interpret the format and nature of the printout. Fuller explanation of the printout should appear in the caption and the text.
Photographs Black-and-white glossy photographs (including Polaroid prints of VDU screens) should be supplied unmounted. They should be labelled clearly on the back with a soft pencil.
Peter Peregrinus, London, UK (1986) pp 242-266
PROOFS Correspondence and proofs for corrections will be sent to the first named author, unless otherwise indicated. Authors will receive a copy of the page proofs which will include copies of redrawn or relettered illustrations. It is important that these proofs should be checked and returned promptly.
COPYRIGHT Before publication, authors are requested to assign copyright to Butterworth & Co (Publishers) Ltd. This allows the company to sanction reprints of the whole or part of the volume and authorize photocopies. The authors, however, still retain their traditional right to reuse or to veto thirdparty publication.
OFFPRINTS AND REPRINTS The first named author will receive 25 offprints of the paper free of charge as well as a complimentary copy of the journal. Further reprint copies, a minimum of 100, can be ordered at any time from the Reprints Department, Butterworth Scientific Ltd, PO Box 63, Westbury House, Bury Street, Guildford, Surrey GU2 5BH, UK.
Microprocessors and Microsystems