- Email: [email protected]
Microstructural and electrical property evolution in an acceptor-dopant free positive temperature coefficient thermistor
Materials Science in Semiconductor Processing 15 (2012) 47–51
Contents lists available at SciVerse ScienceDirect
Materials Science in Semiconductor Processing journal homepage: www.elsevier.com/locate/mssp
Microstructural and electrical property evolution in an acceptor-dopant free positive temperature coefficient thermistor C. Leach n, M.A. Zubair Materials Science Centre, School of Materials, University of Manchester, Manchester M1 7HS, UK
a r t i c l e i n f o
abstract
Available online 3 September 2011
The effect of varying sintering temperature in the range 1270–1430 1C on the resistivity–temperature characteristics of semiconducting BaTiO3 based positive temperature coefficient of resistance thermistors containing a donor-dopant, but without acceptor doping, was investigated by impedance spectroscopy. As the sintering temperature was increased the specimen resistivity around the Curie temperature decreased, while the peak resistivity, obtained above the Curie temperature, remained approximately constant. The change in PTC behaviour with increasing sintering temperature is inconsistent with the standard double Schottky barrier model, but is explained in terms of grain size variations coupled with a, sintering temperature independent, grain boundary barrier layer thickness of 0.50 7 0.04 mm. & 2011 Elsevier Ltd. All rights reserved.
Keywords: Thermistor Electroceramic Grain boundary
1. Introduction Positive temperature coefficient of resistance (PTC) thermistors, based on polycrystalline, semiconducting, donor/acceptor co-doped BaTiO3, show a large rise in grain boundary resistivity at temperatures just above the Curie temperature (TC), which is associated with a ferroelectric to paraelectric phase transformation. In the standard double Schottky barrier (DSB) model [1,2] this rise in grain boundary resistivity just above TC is attributed to a permittivity dependant depletion layer that forms from an interfacial two-dimensional (2D) layer of electron traps. Numerous studies have shown that PTC behaviour is sensitive to several factors, including donor and acceptor dopant concentrations [3,4], sintering time [5], temperature [6], atmosphere [7] and cooling rate [8,9]. The dependence of grain boundary resistance both on the sintering atmosphere and cooling rate supports the idea of grain boundary trap formation and activation by the surface adsorption of atmospheric oxygen. This behaviour is consistent with the presence of a 2D surface charge
n
Corresponding author. E-mail address: [email protected] (C. Leach).
1369-8001/$ - see front matter & 2011 Elsevier Ltd. All rights reserved. doi:10.1016/j.mssp.2011.08.003
layer, as is assumed in the standard DSB model [1,2]. However this approach cannot explain all experimental observations. In particular, large deviations from theory have been observed in both the low-field r(T) and high field current–voltage characteristics. These deviations are best explained by invoking a more complex interface trap structure, which is likely to extend significantly into the grains and hence be 3D in nature [6]. It has been previously suggested that such a 3D structure can arise from the // nucleation, at grain boundaries, of barium vacancies (VBa), which then diffuse into the grains to form a surficial // insulating layer in which the VBa act as electron traps [10]. This 3D layer would form at high temperature but vary in thickness during the cooling phase of the sintering cycle as the equilibrium penetration depth varied with temperature. The vacancy structure would become ‘frozen in’ at some point during cooling, at a temperature dependent on cooling rate but independent of sintering temperature (Tsint). In this contribution we have characterised the effect of variations in Tsint on the formation and evolution of the grain boundary barrier in PTC thermistors. We have used donor-doped BaTiO3 to ensure n-type semiconducting behaviour within the grains but have not incorporated an acceptor dopant, in order to allow direct observation of
48
C. Leach, M.A. Zubair / Materials Science in Semiconductor Processing 15 (2012) 47–51
the underlying processes controlling the development of interfacial electrical structures in these materials without the influence of trap activation by the acceptor dopant. 2. Experimental Donor-doped PTC thermistors were prepared by a mixed oxide route using BaTiO3 powder with 2 at% SiO2 sintering aid. The powders were milled for 18 h and then dried for 6 h at 85 1C. Disc compacts of 10 mm diameter and 2 mm thickness, were pressed and sintered for 1h in air with peak temperatures every 20 1C in the range 1270–1430 1C. A cooling rate of 300 1C h 1 was used for all samples. Ohmic In–Ga eutectic alloy electrodes were applied for electrical measurements. Resistance–temperature (r(T)) characteristics were established between 30 and 330 1C, at 10 1C intervals, using a KEITHLEY 487 Picoammeter. Impedance spectroscopy (IS) data were collected over the same temperature range using a HP3192A impedance analyser, allowing the real and imaginary components of impedance (Z/, Z//) and electrical modulus (M/, M//) to be plotted as a function of frequency (f). The data were corrected for the effects of the sample holder and leads. Samples were held at the temperature for 30 min prior to each measurement to establish thermal equilibrium. Polished cross-sections of the specimens were prepared for imaging in a Phillips XL30 FEGSEM operating at 10 kV. The mean grain size was calculated using a standard linear intercept method with a geometrical constant of 1.6. 3. Results At low values of Tsint the grains appear rounded and many are surrounded by a secondary silicate phase (Fig. 1a). With increasing Tsint the mean grain size increases while the grains develop a {1 0 0} habit (Fig. 1b). At the highest Tsint there is some anomalous grain growth (Fig. 1c). Fig. 2 shows the variation in mean grain size with Tsint. The dependence of r(T) on Tsint is presented in Fig. 3. The minimum resistivity (rmin) occurs at TC, its value decreasing with increasing Tsint, while the temperature of rmax (Trmax) varies only slightly. The sudden decrease in rmax for Tsint ¼1430 1C is attributed to the onset of anomalous grain growth. IS is an effective technique for isolating the electrical responses of different microstructural regions within an electroceramic, allowing values for the real and imaginary components of impedance (Z/, Z//) or modulus (M/, M//) to be established as a function of frequency. The complex modulus (Mn) is related to the complex impedance (Zn) according to M n ¼ joC0 Z n
ð1Þ
where j ¼ O1, o is the angular frequency and Co the vacuum capacitance of the measuring cell. Fig. 4a shows Z// vs. log(f), and Fig. 4b M// vs. log(f) for the sample sintered at 1330 1C. The Z// curves show a single clear peak while the M// curves show two separate peaks. Both sets of curves are representative of IS data collected over the range of Tsint. The lower frequency M//
Fig. 1. SEM micrographs of samples with Tsint: (a) 1290 1C (b) 1370 1C and (c) 1430 1C.
peak and the Z// peak occur at the same frequency and so are attributed to the same electrical element within the microstructure. Since it is generally accepted that the grain boundary regions show higher capacitance than the grain interior [11,12] the lower frequency M// peak is assigned to the grain boundary relaxation, while the higher frequency M// peak is attributed to the grain interior (bulk) relaxation.
C. Leach, M.A. Zubair / Materials Science in Semiconductor Processing 15 (2012) 47–51
49
Fig. 2. Variation in mean grain size with Tsint.
Fig. 3. Effect of Tsint on the low field r(T) characteristics of PTC thermistor in the temperature range 50–330 1C.
The data were modelled using an equivalent circuit based on two parallel RC elements arranged in series: one representing the bulk relaxation and the other the grain boundary relaxation. Curve fitting on this basis shows the overall r(T) response for all samples and values of Tsint are almost entirely due to the grain boundary resistance, with little or no contribution from the bulk resistance (Fig. 5). The temperature variations of bulk capacitance (CB) and grain boundary capacitance (CGB) above TC are presented in Fig. 6(a,b and c) for Tsint ¼1290 1C, 1370 and 1410 1C, respectively. Both capacitances decrease with increasing measurement temperature, although the variation in CB/ CGB reduces as Tsint is increased. Using this equivalent circuit, it was possible to fit all spectra for all samples accurately and extract reasonable values for bulk and grain boundary resistances and capacitances, along with smooth temperature variations. Consequently the equivalent circuit was considered appropriate for modelling this system, and there was no justification for using a more complex analytical approach, such as that described by Fleig and Maier [13], for example. The equivalent circuit that was used describes a uniform microstructure of equally sized square grains separated by grain boundaries of constant thickness: the grains and grain boundaries each having uniform electrical properties throughout (the brick-layer model).
Fig. 4. (a) Plots of log(f) vs. Z//, and (b) log(f) vs. M// plots of IS data collected from the sample sintered at 1330 1C.
Using this model, the grain boundary width (b) can be calculated according to b ¼ ðGÞð11=ð1 þ VB =VGB Þ1=3 Þ
ð2Þ
where G is the average grain size and VGB/VB is the volume ratio of the grain boundary to the bulk. If it is assumed that the permittivities of the bulk and grain boundary regions are equal, then VGB/VB is equal to the capacitance ratio CB/ CGB [12]. Just above TC the ratio, CB/CGB, decreases from 0.8270.11 to 0.4270.05 with increasing Tsint (Fig. 7a), yielding a value of 0.5070.04 mm for b for all Tsint and hence a constant penetration depth of the grain boundary region into each grain of half this value (Fig. 7b). 4. Discussion Using the standard DSB model [1,2], it is possible to calculate the surface charge density in the 2D grain boundary layer (NSO) via either of two methods. The first approach is to use the gradient of the curve of log(r(T)) vs. 2 1/T just above TC, which is proportional to NSO [3]. The second approach is to construct a rmax–Trmax plane [14] in NSO–trap depth space. Applying the first method to our
50
C. Leach, M.A. Zubair / Materials Science in Semiconductor Processing 15 (2012) 47–51
Fig. 5. (a) Grain boundary resistance as a function of temperature obtained from the Z// peak, and the low frequency M// peak (b) Bulk resistance as a function of temperature obtained from the high frequency M// peak.
Fig. 6. Cgb and Cb calculated from the M// peak heights for samples sintered at (a) 1290 1C, (b) 1370 1C and (c) 1410 1C.
data predicts a steady increase in NSO with Tsint due to the systematic increase in the gradient of r(T) just above TC (Fig. 3). In this case, increasing the sintering temperature from 1290 to 1410 1C results in a steady increase in NSO from 0.66 1013 cm 2 to 3.1 1013 cm 2. However the second method gives a near-constant value for NSO due to the small variation in rmax and Trmax. In this case NSO was found to fall within a narrow range (4.4470.57)
1013 cm 2. This inconsistency in the calculated temperature variation of NSO, dependent on analysis method, indicates that the experimental data from these acceptor-dopant free samples cannot be explained satisfactorily in terms of the standard DSB model. In previous studies of donor/acceptor co-doped PTC thermistors [9], the authors have noted that consistent values of NSO could be extracted for those samples. It is believed that the
C. Leach, M.A. Zubair / Materials Science in Semiconductor Processing 15 (2012) 47–51
51 //
obtain for the penetration depth of VBa into the grains of 0.25 mm (i.e. b/2) is about one order of magnitude lower than the minimum grain size in any of our samples (2.670.2 mm) and so is realistic in microstructural terms. However, calculations based on the only previously pub// lished value for VBa diffusion coefficient [10] predict a much greater penetration depth, of approximately 2.4 mm, at this cooling rate [15]. Such a value is significantly larger than G/ 2 for the majority of our samples and, if this published coefficient were correct, then the grains would be expected to show insulating behaviour. Since this is not observed we conclude that, if the grain boundary layer in our samples is // formed by the inward diffusion of VBa, the previously published value of diffusion coefficient [10] is too high. Such a view is consistent with the findings of other workers [16], who observed that PTC behaviour was retained in a thermistor after extended periods of annealing at elevated temperature: conditions that predicted the grains would become entirely insulating. 5. Conclusions
Fig. 7. Variation, with Tsint, in (a) the volume ratio of grain boundary layer to grain interior (VGB/VB), and (b) penetration depth of the grain boundary layer into each grain.
addition of manganese as an acceptor dopant (which segregates to the grain boundaries and leads to extensive trap activation) modifies the surface charge profile so that the dominant grain boundary charge can be effectively modelled as a 2D layer, in line with the assumptions of the standard DSB model. The case of acceptor-free material, however, does not permit this and reveals another situation where experimental deviations from standard DSB theory are observed in this system [6]. Consequently it is necessary to interpret these data in the context of a more complex 3D grain boundary resistive layer, as has been proposed to form by surface nucleation and equili// brium inward diffusion of barium vacancies (VBa) during sintering [10]. Under these conditions the equilibrium vacancy distribution is ‘frozen in’ at some critical temperature during cooling: the actual temperature is dependent on cooling rate, but is typically around 1220 1C, leaving the grains with a conductive grain interior that // is surrounded by an insulating VBa rich grain boundary layer. This layer traps electrons so that depletion layers with band bending and Schottky potential barriers form on either side of it. Our constant value of b, and hence vacancy penetration depth, irrespective of Tsint, is consistent with the predictions of this model [12], but is inconsistent with the standard DSB model, where b would be expected to vary with barrier height. The value we
Acceptor-free, donor-doped PTC thermistors, sintered in the range 1270–1430 1C were characterised using r(T) and IS measurements. The absence of acceptor doping and consequent trap activation allowed the underlying 3D structure of the grain boundary to be characterised. The standard DSB model, based on a 2D interface layer of trapped charge, was unable to explain the variation in NSO with Tsint consistently, and so the behaviour was considered in terms of a 3D interfacial structure, possibly // formed from a VBa rich grain boundary layer. As Tsint was increased the grain boundary width remained constant at 0.5070.04 mm, which is consistent with the behaviour of a 3D, charge-trapping, grain boundary layer formed by the nucleation and inward diffusion of cation vacancies. However, the effective diffusion rate for the formation of this layer is approximately one order of magni// tude lower than that previously quoted for VBa migration. References [1] W. Heywang, Journal of the American Ceramic Society 47 (184) (1964) 484. [2] G.H. Jonker, Solid State Electronics 7 (1964) 895. [3] J. Illingsworth, H.M. Allak, A.W. Brinkman, Journal of Physics D: Applied Physics 23 (1971) 971. [4] H. Ihring, Journal of American Ceramic Society 64 (1984) 617. [5] M. Gallego, A.R. West, Journal of Applied Physics 90 (2001) 394. [6] H. Ihring, W. Puschert, Journal of Applied Physics 48 (1977) 3081. [7] M. Kuwabara, Solid State Electronics 27 (1984) 929. [8] Kim Chang-Jung, Kwangsoo No, Journal of Materials Science 28 (1993) 5765. [9] M.A. Zubair, C. Leach, Journal of the European Ceramic Society 28 (2008) 1845. [10] J. Daniels, R. Wernicke, Philips Research Reports 31 (1976) 544. [11] E.J. Abram, D.C. Sinclair, A.R. West, Journal of Electroceramics 10 (2003) 165. [12] J.T.S. Irvine, D.C. Sinclair, R. West, Advanced Materials 2 (1990) 132. [13] J. Fleig, J. Maierx, Journal of the European Ceramic Society 19 (1999) 693. [14] G.H. Jonker, Materials Research Bulletin 2 (1967) 401. [15] W. Jost, Diffusion in solids, liquids, gases, Academic Press Inc., New York, 1990. [16] H.M. Al-Allak, G.J. Russell, J. Woods, Journal of Physics D: Applied Physics 20 (1987) 1645.
Contents lists available at SciVerse ScienceDirect
Materials Science in Semiconductor Processing journal homepage: www.elsevier.com/locate/mssp
Microstructural and electrical property evolution in an acceptor-dopant free positive temperature coefficient thermistor C. Leach n, M.A. Zubair Materials Science Centre, School of Materials, University of Manchester, Manchester M1 7HS, UK
a r t i c l e i n f o
abstract
Available online 3 September 2011
The effect of varying sintering temperature in the range 1270–1430 1C on the resistivity–temperature characteristics of semiconducting BaTiO3 based positive temperature coefficient of resistance thermistors containing a donor-dopant, but without acceptor doping, was investigated by impedance spectroscopy. As the sintering temperature was increased the specimen resistivity around the Curie temperature decreased, while the peak resistivity, obtained above the Curie temperature, remained approximately constant. The change in PTC behaviour with increasing sintering temperature is inconsistent with the standard double Schottky barrier model, but is explained in terms of grain size variations coupled with a, sintering temperature independent, grain boundary barrier layer thickness of 0.50 7 0.04 mm. & 2011 Elsevier Ltd. All rights reserved.
Keywords: Thermistor Electroceramic Grain boundary
1. Introduction Positive temperature coefficient of resistance (PTC) thermistors, based on polycrystalline, semiconducting, donor/acceptor co-doped BaTiO3, show a large rise in grain boundary resistivity at temperatures just above the Curie temperature (TC), which is associated with a ferroelectric to paraelectric phase transformation. In the standard double Schottky barrier (DSB) model [1,2] this rise in grain boundary resistivity just above TC is attributed to a permittivity dependant depletion layer that forms from an interfacial two-dimensional (2D) layer of electron traps. Numerous studies have shown that PTC behaviour is sensitive to several factors, including donor and acceptor dopant concentrations [3,4], sintering time [5], temperature [6], atmosphere [7] and cooling rate [8,9]. The dependence of grain boundary resistance both on the sintering atmosphere and cooling rate supports the idea of grain boundary trap formation and activation by the surface adsorption of atmospheric oxygen. This behaviour is consistent with the presence of a 2D surface charge
n
Corresponding author. E-mail address: [email protected] (C. Leach).
1369-8001/$ - see front matter & 2011 Elsevier Ltd. All rights reserved. doi:10.1016/j.mssp.2011.08.003
layer, as is assumed in the standard DSB model [1,2]. However this approach cannot explain all experimental observations. In particular, large deviations from theory have been observed in both the low-field r(T) and high field current–voltage characteristics. These deviations are best explained by invoking a more complex interface trap structure, which is likely to extend significantly into the grains and hence be 3D in nature [6]. It has been previously suggested that such a 3D structure can arise from the // nucleation, at grain boundaries, of barium vacancies (VBa), which then diffuse into the grains to form a surficial // insulating layer in which the VBa act as electron traps [10]. This 3D layer would form at high temperature but vary in thickness during the cooling phase of the sintering cycle as the equilibrium penetration depth varied with temperature. The vacancy structure would become ‘frozen in’ at some point during cooling, at a temperature dependent on cooling rate but independent of sintering temperature (Tsint). In this contribution we have characterised the effect of variations in Tsint on the formation and evolution of the grain boundary barrier in PTC thermistors. We have used donor-doped BaTiO3 to ensure n-type semiconducting behaviour within the grains but have not incorporated an acceptor dopant, in order to allow direct observation of
48
C. Leach, M.A. Zubair / Materials Science in Semiconductor Processing 15 (2012) 47–51
the underlying processes controlling the development of interfacial electrical structures in these materials without the influence of trap activation by the acceptor dopant. 2. Experimental Donor-doped PTC thermistors were prepared by a mixed oxide route using BaTiO3 powder with 2 at% SiO2 sintering aid. The powders were milled for 18 h and then dried for 6 h at 85 1C. Disc compacts of 10 mm diameter and 2 mm thickness, were pressed and sintered for 1h in air with peak temperatures every 20 1C in the range 1270–1430 1C. A cooling rate of 300 1C h 1 was used for all samples. Ohmic In–Ga eutectic alloy electrodes were applied for electrical measurements. Resistance–temperature (r(T)) characteristics were established between 30 and 330 1C, at 10 1C intervals, using a KEITHLEY 487 Picoammeter. Impedance spectroscopy (IS) data were collected over the same temperature range using a HP3192A impedance analyser, allowing the real and imaginary components of impedance (Z/, Z//) and electrical modulus (M/, M//) to be plotted as a function of frequency (f). The data were corrected for the effects of the sample holder and leads. Samples were held at the temperature for 30 min prior to each measurement to establish thermal equilibrium. Polished cross-sections of the specimens were prepared for imaging in a Phillips XL30 FEGSEM operating at 10 kV. The mean grain size was calculated using a standard linear intercept method with a geometrical constant of 1.6. 3. Results At low values of Tsint the grains appear rounded and many are surrounded by a secondary silicate phase (Fig. 1a). With increasing Tsint the mean grain size increases while the grains develop a {1 0 0} habit (Fig. 1b). At the highest Tsint there is some anomalous grain growth (Fig. 1c). Fig. 2 shows the variation in mean grain size with Tsint. The dependence of r(T) on Tsint is presented in Fig. 3. The minimum resistivity (rmin) occurs at TC, its value decreasing with increasing Tsint, while the temperature of rmax (Trmax) varies only slightly. The sudden decrease in rmax for Tsint ¼1430 1C is attributed to the onset of anomalous grain growth. IS is an effective technique for isolating the electrical responses of different microstructural regions within an electroceramic, allowing values for the real and imaginary components of impedance (Z/, Z//) or modulus (M/, M//) to be established as a function of frequency. The complex modulus (Mn) is related to the complex impedance (Zn) according to M n ¼ joC0 Z n
ð1Þ
where j ¼ O1, o is the angular frequency and Co the vacuum capacitance of the measuring cell. Fig. 4a shows Z// vs. log(f), and Fig. 4b M// vs. log(f) for the sample sintered at 1330 1C. The Z// curves show a single clear peak while the M// curves show two separate peaks. Both sets of curves are representative of IS data collected over the range of Tsint. The lower frequency M//
Fig. 1. SEM micrographs of samples with Tsint: (a) 1290 1C (b) 1370 1C and (c) 1430 1C.
peak and the Z// peak occur at the same frequency and so are attributed to the same electrical element within the microstructure. Since it is generally accepted that the grain boundary regions show higher capacitance than the grain interior [11,12] the lower frequency M// peak is assigned to the grain boundary relaxation, while the higher frequency M// peak is attributed to the grain interior (bulk) relaxation.
C. Leach, M.A. Zubair / Materials Science in Semiconductor Processing 15 (2012) 47–51
49
Fig. 2. Variation in mean grain size with Tsint.
Fig. 3. Effect of Tsint on the low field r(T) characteristics of PTC thermistor in the temperature range 50–330 1C.
The data were modelled using an equivalent circuit based on two parallel RC elements arranged in series: one representing the bulk relaxation and the other the grain boundary relaxation. Curve fitting on this basis shows the overall r(T) response for all samples and values of Tsint are almost entirely due to the grain boundary resistance, with little or no contribution from the bulk resistance (Fig. 5). The temperature variations of bulk capacitance (CB) and grain boundary capacitance (CGB) above TC are presented in Fig. 6(a,b and c) for Tsint ¼1290 1C, 1370 and 1410 1C, respectively. Both capacitances decrease with increasing measurement temperature, although the variation in CB/ CGB reduces as Tsint is increased. Using this equivalent circuit, it was possible to fit all spectra for all samples accurately and extract reasonable values for bulk and grain boundary resistances and capacitances, along with smooth temperature variations. Consequently the equivalent circuit was considered appropriate for modelling this system, and there was no justification for using a more complex analytical approach, such as that described by Fleig and Maier [13], for example. The equivalent circuit that was used describes a uniform microstructure of equally sized square grains separated by grain boundaries of constant thickness: the grains and grain boundaries each having uniform electrical properties throughout (the brick-layer model).
Fig. 4. (a) Plots of log(f) vs. Z//, and (b) log(f) vs. M// plots of IS data collected from the sample sintered at 1330 1C.
Using this model, the grain boundary width (b) can be calculated according to b ¼ ðGÞð11=ð1 þ VB =VGB Þ1=3 Þ
ð2Þ
where G is the average grain size and VGB/VB is the volume ratio of the grain boundary to the bulk. If it is assumed that the permittivities of the bulk and grain boundary regions are equal, then VGB/VB is equal to the capacitance ratio CB/ CGB [12]. Just above TC the ratio, CB/CGB, decreases from 0.8270.11 to 0.4270.05 with increasing Tsint (Fig. 7a), yielding a value of 0.5070.04 mm for b for all Tsint and hence a constant penetration depth of the grain boundary region into each grain of half this value (Fig. 7b). 4. Discussion Using the standard DSB model [1,2], it is possible to calculate the surface charge density in the 2D grain boundary layer (NSO) via either of two methods. The first approach is to use the gradient of the curve of log(r(T)) vs. 2 1/T just above TC, which is proportional to NSO [3]. The second approach is to construct a rmax–Trmax plane [14] in NSO–trap depth space. Applying the first method to our
50
C. Leach, M.A. Zubair / Materials Science in Semiconductor Processing 15 (2012) 47–51
Fig. 5. (a) Grain boundary resistance as a function of temperature obtained from the Z// peak, and the low frequency M// peak (b) Bulk resistance as a function of temperature obtained from the high frequency M// peak.
Fig. 6. Cgb and Cb calculated from the M// peak heights for samples sintered at (a) 1290 1C, (b) 1370 1C and (c) 1410 1C.
data predicts a steady increase in NSO with Tsint due to the systematic increase in the gradient of r(T) just above TC (Fig. 3). In this case, increasing the sintering temperature from 1290 to 1410 1C results in a steady increase in NSO from 0.66 1013 cm 2 to 3.1 1013 cm 2. However the second method gives a near-constant value for NSO due to the small variation in rmax and Trmax. In this case NSO was found to fall within a narrow range (4.4470.57)
1013 cm 2. This inconsistency in the calculated temperature variation of NSO, dependent on analysis method, indicates that the experimental data from these acceptor-dopant free samples cannot be explained satisfactorily in terms of the standard DSB model. In previous studies of donor/acceptor co-doped PTC thermistors [9], the authors have noted that consistent values of NSO could be extracted for those samples. It is believed that the
C. Leach, M.A. Zubair / Materials Science in Semiconductor Processing 15 (2012) 47–51
51 //
obtain for the penetration depth of VBa into the grains of 0.25 mm (i.e. b/2) is about one order of magnitude lower than the minimum grain size in any of our samples (2.670.2 mm) and so is realistic in microstructural terms. However, calculations based on the only previously pub// lished value for VBa diffusion coefficient [10] predict a much greater penetration depth, of approximately 2.4 mm, at this cooling rate [15]. Such a value is significantly larger than G/ 2 for the majority of our samples and, if this published coefficient were correct, then the grains would be expected to show insulating behaviour. Since this is not observed we conclude that, if the grain boundary layer in our samples is // formed by the inward diffusion of VBa, the previously published value of diffusion coefficient [10] is too high. Such a view is consistent with the findings of other workers [16], who observed that PTC behaviour was retained in a thermistor after extended periods of annealing at elevated temperature: conditions that predicted the grains would become entirely insulating. 5. Conclusions
Fig. 7. Variation, with Tsint, in (a) the volume ratio of grain boundary layer to grain interior (VGB/VB), and (b) penetration depth of the grain boundary layer into each grain.
addition of manganese as an acceptor dopant (which segregates to the grain boundaries and leads to extensive trap activation) modifies the surface charge profile so that the dominant grain boundary charge can be effectively modelled as a 2D layer, in line with the assumptions of the standard DSB model. The case of acceptor-free material, however, does not permit this and reveals another situation where experimental deviations from standard DSB theory are observed in this system [6]. Consequently it is necessary to interpret these data in the context of a more complex 3D grain boundary resistive layer, as has been proposed to form by surface nucleation and equili// brium inward diffusion of barium vacancies (VBa) during sintering [10]. Under these conditions the equilibrium vacancy distribution is ‘frozen in’ at some critical temperature during cooling: the actual temperature is dependent on cooling rate, but is typically around 1220 1C, leaving the grains with a conductive grain interior that // is surrounded by an insulating VBa rich grain boundary layer. This layer traps electrons so that depletion layers with band bending and Schottky potential barriers form on either side of it. Our constant value of b, and hence vacancy penetration depth, irrespective of Tsint, is consistent with the predictions of this model [12], but is inconsistent with the standard DSB model, where b would be expected to vary with barrier height. The value we
Acceptor-free, donor-doped PTC thermistors, sintered in the range 1270–1430 1C were characterised using r(T) and IS measurements. The absence of acceptor doping and consequent trap activation allowed the underlying 3D structure of the grain boundary to be characterised. The standard DSB model, based on a 2D interface layer of trapped charge, was unable to explain the variation in NSO with Tsint consistently, and so the behaviour was considered in terms of a 3D interfacial structure, possibly // formed from a VBa rich grain boundary layer. As Tsint was increased the grain boundary width remained constant at 0.5070.04 mm, which is consistent with the behaviour of a 3D, charge-trapping, grain boundary layer formed by the nucleation and inward diffusion of cation vacancies. However, the effective diffusion rate for the formation of this layer is approximately one order of magni// tude lower than that previously quoted for VBa migration. References [1] W. Heywang, Journal of the American Ceramic Society 47 (184) (1964) 484. [2] G.H. Jonker, Solid State Electronics 7 (1964) 895. [3] J. Illingsworth, H.M. Allak, A.W. Brinkman, Journal of Physics D: Applied Physics 23 (1971) 971. [4] H. Ihring, Journal of American Ceramic Society 64 (1984) 617. [5] M. Gallego, A.R. West, Journal of Applied Physics 90 (2001) 394. [6] H. Ihring, W. Puschert, Journal of Applied Physics 48 (1977) 3081. [7] M. Kuwabara, Solid State Electronics 27 (1984) 929. [8] Kim Chang-Jung, Kwangsoo No, Journal of Materials Science 28 (1993) 5765. [9] M.A. Zubair, C. Leach, Journal of the European Ceramic Society 28 (2008) 1845. [10] J. Daniels, R. Wernicke, Philips Research Reports 31 (1976) 544. [11] E.J. Abram, D.C. Sinclair, A.R. West, Journal of Electroceramics 10 (2003) 165. [12] J.T.S. Irvine, D.C. Sinclair, R. West, Advanced Materials 2 (1990) 132. [13] J. Fleig, J. Maierx, Journal of the European Ceramic Society 19 (1999) 693. [14] G.H. Jonker, Materials Research Bulletin 2 (1967) 401. [15] W. Jost, Diffusion in solids, liquids, gases, Academic Press Inc., New York, 1990. [16] H.M. Al-Allak, G.J. Russell, J. Woods, Journal of Physics D: Applied Physics 20 (1987) 1645.