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20Sn solder joint in laser diode package
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Microelectronic Engineering 85 (2008) 512–517 www.elsevier.com/locate/mee
Microstructure of eutectic 80Au/20Sn solder joint in laser diode package J.W. Ronnie Teo a,*, F.L. Ng a, L.S. Kip Goi a, Y.F. Sun a, Z.F. Wang a, X.Q. Shi a, J. Wei a, G.Y. Li b b
a Singapore Institute of Manufacturing Technology, 71 Nanyang Drive, Singapore 638075, Singapore School of Materials Science and Engineering, Nanyang Technological University, 79 Nanyang Avenue, Singapore 639798, Singapore
Received 8 February 2007; received in revised form 20 August 2007; accepted 9 September 2007 Available online 5 October 2007
Abstract Laser diodes (LD) are usually bonded onto heat sinks for the purposes of heat dissipation, mechanical support and electrical interconnect. In this study, energy dispersive X-ray analysis (EDX) and electron backscatter diffraction (EBSD) are employed to investigate the microstructure evolution of 80Au/20Sn solder joint in LD package. During reflow, Pt–Sn and (Au, Ni)Sn IMCs were formed at the respective LD/solder and solder/heatsink interfaces, while d, b and f 0 phases of Au/Sn intermetallics were found in the solder joint. The Au-rich b and f 0 phases in the solder joint limit the growth of interfacial IMCs. Chip shear testing showed that the failure occurred within the LD, with partial brittle fracture at the GaAs substrate and partial interfacial delamination at the GaAs/SiN interface. The strong solder bond can be attributed to the high mechanical strength of 80Au/20Sn solder, which provides improved stability for high temperature applications. 2007 Elsevier B.V. All rights reserved. Keywords: Soldering; Intermetallic compounds; Electron backscatter diffraction
1. Introduction Eutectic 80Au/20Sn solder is being increasingly used in microelectronics and optoelectronics applications, e.g., flip chip bumps [1], LD die interconnection [2–5], and optical fiber feedthrough joint [6], etc. Their passive alignment characteristic, good thermo-mechanical behavior, fluxless soldering capability, suitable thermal conductivity and thermal expansion coefficient, as well as lead-free feature make it suitable for high temperature applications. In the past few years, researchers have put in a lot of efforts to develop 80Au/20Sn solder plating, bumping, multi-layer metallization and attachment processes [7–11], and to investigate the microstructure of 80Au/20Sn solder and its interfacial reaction on different metallization during thermal aging [12–15]. These studies show that the solder joint consists of Au-rich and Sn-rich phases, with the Au-
*
Corresponding author. Tel.: +65 67938351; fax: +65 67916377. E-mail address: [email protected] (J.W. Ronnie Teo).
0167-9317/$ - see front matter 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2007.09.009
rich phases at the center of the solder joint [12,14,16,17]. Pittroff et al. [2] propose having thick Au layer on the LD/heatsink metallization in order to improve the bonding integrity of the solder joint. To comprehend the microstructure of 80Au/20Sn solder joint, the phase diagram and the intermetallic compounds (IMCs) of Au-AuSn system are briefly discussed. The Au-Sn binary alloy has two eutectics, Au-rich 80Au/20Sn and Sn-rich 29Au/71Sn. The Sn-rich eutectic posed reliability concerns while Au-rich eutectic has good mechanical strength [18,19]. The phase diagram of Au-AuSn system shown in Fig. 1 represents one of the most complicated and intriguing binary systems [20,21]. The complexity of Au-Sn alloy is that it forms several IMCs with up to 18.5 at% Sn in Au. The eutectic that forms at 280 C (29 at% Sn) has a reaction L M [d + f], and is of great interest as a soldering material. The phases of interest are b, f 0 (Au5Sn), f, and d (AuSn). The b phase was assessed to be Au10Sn IMC stable above 532 C in 8 at% Sn alloy. The b phase corresponds roughly to commercial gold solder which performs well when used to solder to Au or
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513
a
Fig. 2. Schematic diagram of an epi-side down bonded LD.
b
action of the electron beam with the crystal lattice produces backscatter diffracted electrons and generates a pattern of intersecting bands. The lattice orientation on the surface of a sample can be systematically measured from these bands and the phases and intermetallics formed in such thin solder joint can be identified. In this study, the microstructure of 80Au/20Sn soldered LD package was studied using SEM with energy dispersive analysis of X-ray (EDX) and electron backscatter diffraction (EBSD). The mechanical strength and the fracture characteristics of the solder joint were further analyzed through die shear test. 2. Experimental details 2.1. Au/Sn bonding
Fig. 1. (a) Phase diagram of Au–AuSn. (b) The composition information of various Au–Sn phase compound found in Au–AuSn phase diagram [21].
Au-protected surfaces. The f phase exists from the peritetic b + L M f from 9.1 at% Sn at 521 C to 17.6 at% Sn at 280 C, and 13.9 at% Sn at 190 C [22]. It has good mechanical properties, increased thermal conductivity and excellent reliability. The f 0 (Au5Sn) phase has a composition of 16.7 at% Sn, and exists up to 190 C. At temperatures lower than 190 C, the f phase is transformed to f 0 phase, an extension of the f phase at low temperature [23]. On the other hand, the AuSn or d phase is a hexagonal IMC with a melting temperature of 419.3 C. It is a nonstoichiometric compound with a homogeneity range between 50.0 and 50.5 at% Sn and can be designated as Au(1x)Sn(0.006x60.02). The composition information of the Au-Sn phase compound was found in Fig. 1(b). In a LD package, the solder joint has a thickness of a few microns and consists of several metallization layers as shown in Fig. 2. During the bonding process, diffusion of Au from the LD electrode and Cu heat sink metallization may result in the formation of other intermetallics, not easily observed from scanning electron microscope (SEM). There are limited studies on the Au-rich phases in Au/Sn solder joint and it is difficult to quantify these intermetallics using conventional scanning electron microscopy (SEM). Over the years, electron diffraction in SEM has demonstrated to be an effective analytical tool to determine the crystal orientation of a surface [24–27]. The inter-
Chips used in this study were ridge waveguide LDs with dimensions of 300 · 600 · 100 lm. The metallization at the LD electrode consists of Ti/Pt/Au. Cu heat sinks with dimensions of 3 · 5 · 5 mm were plated with a thin layer of Ni (2 lm) as a diffusion barrier, followed with a thin layer of Au (50 nm) to protect the Ni layer and improve solder wettability. Eutectic 80Au/20Sn solder preform with thickness of about 5 lm was used to bond the chip onto heat sink with Model 860 Omni Bonder from Semiconductor Corps. Preforms were used instead of solder paste due to its better control of joint thickness during the bonding process. 80Au/20Sn solder also does not require the application of flux, which is usually found in solder paste, during the bonding process. The peak bonding temperature is 300 C and the reflow time is 5 s. The bonding stage is encapsulated with argon (Ar) environment to avoid oxidation during the bonding process. The LD is then gradually cooled to 100 C before extracting it out of the Ar-filled bonding stage for further characterization. Details of the bonding process can be found in [3]. 2.2. SEM/EDX and EBSD characterizations After bonding, the specimens were cold-mounted into resin and polished until the microstructure of the solder can be seen clearly under the optical microscope. The cross-sectional view of the samples was examined using SEM (Ziess EVO-50) with EDX and EBSD detectors to analyze the phase compositions. For EBSD characteriza-
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tions, the specimens were tilted approximately 70, whereby the backscatter diffracted electrons were captured by a phosphor screen placed near the specimen, generating a series of diffraction patterns. The spatial resolution of the electron beams is 0.2–0.3 lm and the diffraction region forms within 10–50 nm from the specimen surface. This diffraction patterns consist of a series of intersecting bands, which correspond directly to the crystallographic planes in the diffracting crystal volume [28,29]. The bands represent the plane in the crystal and the spacing between the bands is inversely proportional to the inter-planar spacing. When these bands intersect on a prescribed grid, the crystallographic orientation, also known as poles, was recorded. The patterns were then indexed automatically to obtain the orientation and phases of the surface.
40 wt% in the dark domain while the light domain has a smaller tin content of 10–12 wt%. The dark and light domains can be confirmed to be d and f 0 phases with the phase diagram as shown in Fig. 1(a). However, after reflow, the Sn-rich phase was observed to coalesce to the interface as shown in Fig. 3(b) while the Au-rich phase remained in the solder. The possibility of Sn-rich phase moving to the edges of the solder may be induced by the lower surface tension in the Sn-rich phase than the Au-rich phase [31]. The lower surface energy of Sn-rich phase drew itself towards the edges of the solder joint, leaving the center as Au-rich phase. Since the Au-rich phase has good mechanical properties and
2.3. Die shear testing Die shear testing was also conducted to evaluate the bonding integrity of the solder joint. Shear Test Analysis STA-3100 (Keller Technology Corps.), with a 1 kg transducer, was used to perform die shear tests. The specimens were held onto the stage via vacuum and the shear tool was positioned approximately 30 lm off the heat sink surface. As shown in Fig. 4, the shear tip was positioned at the LD chip in order to identify the joint strength and the failure mode of the LD package. According to MIL-STD883 C (Method 2019) [30], the shear rate should be in the range of 0.25–6.0 mm/s to avoid creep deformation behaviors. As the mechanical properties of the solder joint were sensitive to strain rate, the shear rate was selected to be 3 mm/s to identify the shear strength of the package. SEM/EDX was then used to identify the material fracture behavior and failure mode of the solder joint.
Fig. 4. Schematic diagram of die shear testing methodology.
3. Results and discussion 3.1. Microstructure of Au/Sn solder interconnect The 80Au/20Sn solder preform has an initial coarse random distribution of dark and light domains as shown in Fig. 3(a). EDX analysis showed a high tin content of 35–
Fig. 5. Typical cross-sectional view of Au/Sn solder joint. The joint thickness was approximately 8.5 lm.
Fig. 3. Microstructure evolution of 80Au/20Sn solder (a) before and (b) after solder reflow with Au/Ni metallization. Random distribution of d and f 0 phases was observed in the Au/Sn solder material. The Sn-rich phase coalesces towards the Ni-P interface after reflow.
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thermal conductivity, it would increase the mechanical integrity and produce excellent heat dissipation channel. Fig. 4 shows a typical cross-sectional view of as-bonded LDs. During bonding, due to the high diffusivity of Au, the Au layer from the LD electrode and the heat sink metalli-
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zation diffused quickly into the solder joint and increased the overall Au content of the solder into Au-rich phase. EDX analysis showed that the concentration of Au in Au-rich phase varied from 7 to 13 at.%. Complete dissolution of Au into the solder exposed the underlying
Fig. 6. EBSD diffraction patterns of intermetallics formed in the solder joint. (a) Diffraction pattern found from the Sn-rich region and (b)–(c) diffraction patterns found from the Au-rich phases. Kikuchi bands and poles of (d) d, (e) f 0 and (f) b phases was indexed according to the lattice orientations on the specimen surface. f 0 and b phases were found in the Au-rich region while d phase was found in the Sn-rich region.
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metallization, which also diffused into the solder sequentially. At the LD/solder interface, a thin layer of Pt-Sn IMCs was detected. Lee et al. [15] reported the formation of PtSn and PtSn4 IMCs after reflow. Due to the short reflow duration, Ni could only be detected within 1–2 lm of the Sn-rich phase at the solder/heatink interface. The concentration of Ni in the Sn-rich phase varied from 1 to 8 at.%, depending on the location of the Sn-rich phase. According the Au–Ni phase diagram, Ni and Au interdiffusion were limited at the reflow temperature. As the concentration of Sn remained unchanged and interstitial diffusion was unlikely to occur, Ni was expected to replace Au and form (Au, Ni)Sn IMC [32] (see Fig. 5). Further analysis of the 80Au/20Sn intermetallics in the solder joint was carried out using EBSD technique to identify the phase transformation. Reasonable matching of standard diffraction patterns from the database of indices for Au–Sn intermetallics was performed. At the Sn-rich region, a d phase with hexagonal crystal structure was detected. However, at the Au-rich region, two different crystal structures were observed; a trigonal f 0 phase and a hexagonal b phase. Although f 0 and b phases have very similar chemistry, their crystallographical patterns are obviously different as depicted in Fig. 6. Based on these crystallographical diffraction patterns, the solder joint actually consists of three phases; d, f 0 and b phases. The formation of the b phase showed that the Au layer from the LD electrode and Cu heat sink diffused not only into the d phase to form f 0 phase, but also into the f 0 phase to form b phase during reflow. However, the diffusivity rate of Au into the d and f 0 phases is unknown and requires further investigations. During aging, Sn and Ni interdiffused to form additional IMCs. However, due to the low Sn content in the f 0 and b phases, the diffusion of Sn to the interfaces was limited, resulting in slow IMC kinetic growth during aging [12,14]. The Au-rich b and f 0 phases acted as a form of diffusion barrier to the formation of interfacial IMCs. Song et al. [12] demonstrated that the IMC thickness was only 6 lm after 200 C thermal aging for 365 days. The metallurgical stability of the solder joint is an important aspect in optoelectronics packaging as these LDs are expected to have a service lifetime of 105 h [33– 35]. Furthermore, the mechanical properties of a solder joint is governed by the microstructure and interfacial IMCs formed.
direction of crack propagation, this network of cleavage planes was observed to propagate towards an interface. Surface analysis of the fracture interface using secondary ion mass spectroscopy (SIMS) showed that the failure occurred at the GaAs/SiN interface as depicted in Fig. 8. The failure at this interface indicated that the bonding strength of solder interconnect was stronger than the diode chip itself and that the failure at the GaAs/SiN interface might be due to the poor adhesion strength of SiN onto GaAs material. The good mechanical properties of 80Au/ 20Sn solder and the stable (Au, Ni)Sn IMCs at the interface would result in fracture in the LD.
Fig. 7. Typical sheared LDs and its associated shear force-displacement profile. Partial brittle fracture at the GaAs and partial interfacial delamination at the GaAs/SiN interface was observed. The peak shear force for this sample is 371.7 g.
3.2. Fracture characteristics and failure mode To assess the mechanical integrity of the solder joint, the specimens were subjected to shear testing, a mechanical overloading condition, to determine the weakest interface or material. Die shear tests showed that the joints had an average shear strength of 24.5 MPa and Fig. 7 shows a typical shear profile of the test. As depicted in Fig. 7(a), distinct cleavage fractures were observed to initiate on many parallel cleavage planes, which was referred as wallner lines [36], at the GaAs material. As the fracture advanced in the
Fig. 8. SIMS depth profile of the fracture surface after shear testing.
J.W. Ronnie Teo et al. / Microelectronic Engineering 85 (2008) 512–517
4. Conclusions In this study, LDs were bonded onto Cu heat sinks using 80Au/20Sn solder. The initial microstructure and the microstructure evolution of 80Au/20Sn solder joint in LD package were investigated using SEM/EDX and EBSD. The solder joint comprised of a layer of Pt-Sn IMCs at the LD/solder interface, a layer of (Au,Ni)Sn IMCs at the solder/heat sink interface, and d, b and f 0 phases at the center of the solder joint. During reflow, the Au metallization from the LD electrode and the Cu heat sink diffused into the d phase to form f 0 phase and into f 0 phase to form b phase. The Au-rich b and f phases in the solder joint limited the growth of IMCs at the interfaces, enabling prolonged reliability. Chip shear test further showed good bonding integrity with fracture occurring within the LD. Partial brittle fracture at the GaAs substrate and partial interfacial delamination at the GaAs/SiN interface was observed. Acknowledgements This work is supported by Agency for Science, Technology and Research (A*STAR), Singapore. The authors would like to thank Dr. S. Suzuki from TSL Technology for their kind assistance in the EBSD discussion. References [1] W. Pittroff, T. Reiche, J. Barnikow, A. Klein, U. Merkel, K. Vogel, J. Wu¨rfl, Appl. Phys. Lett. 67 (1995) 2367. [2] W. Pittroff, G. Erbert, G. Beister, F. Bugge, A. Klein, A. Knauer, J. Maege, P. Ressel, J. Sebastian, R. Staske, G. Traenkle, IEEE Trans. Adv. Package 24 (2001) 434. [3] J.W.R. Tew, Z.F. Wang, X.Q. Shi, G.Y. Li, in: Proceedings of the IEEE 6th EPT Conference, 2004, p. 390. [4] J.W.R. Tew, X.Q. Shi, S. Yuan, Mater. Lett. 58 (2004) 2695. [5] J.W. Ronnie Teo, G.Y. Li, M.S. Ling, Z.F. Wang, X.Q. Shi, Thin Solid Films 515 (2007) 4340. [6] M.W. Beranek, M. Rassaian, C.-H. Tang, C.L.S. John, V.A. Loebs, IEEE Trans. Adv. Package 24 (2001) 576. [7] C. Belouet, C. Villard, C. Fages, D. Keller, ASME J. Electron. Mater. 28 (1999) 1123.
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[8] C.H. Lee, K.L. Tai, D.D. Bacon, C. Doherty, A. Katz, Y.M. Wong, E. Lane, Semicond. Sci. Technol. 9 (1994) 379. [9] M. Nishiguchi, IEEE Trans. Comp., Hybrids, & Manufact. Technol. 14 (1991) 523. [10] G.R. Dohle, J.J. Callahan, K.P. Martin, T.J. Drabik, IEEE Trans. Comp., Packag., & Manufact. Technol. B 19 (1996) 57. [11] C.C. Lee, C.Y. Wang, G.S. Matijasevic, IEEE Trans. Comp., Hybrids, & Manufact. Technol. 14 (1991) 407. [12] H.G. Song, J.P. Ahn, J.J.W. Morris, J. Electron. Mater. 30 (2001) 1083. [13] S. Anhock, H. Oppermann, C. Kallmayer, R. Aschenbrenner, L. Thomas and H. Reichl, in: Proceedings of the IEMT conference 1998, p. 156. [14] M.T. Sheen, Y.H. Ho, C.L. Wang, K.C. Hsieh, W.H. Cheng, J. Electron. Mater. 34 (2005) 1318. [15] C.H. Lee, Y.M. Wong, C.J. Doherty, K.L. Tai, K.L. Katz, E. Lane, D.D. Bacon, F.A. Baiocchi, J. Appl. Phys. 72 (1992) 3808. [16] D.G. Ivey, Micron 29 (1997) 281. [17] G. Elger, M. Hutter, H. Oppermann, R. Aschenbrenner, H. Reichl, E. Jager, Microsyst. Technol. 7 (2002) 239. [18] F.G. Yost, M.M. Karnowsky, W.D. Drotning, J.H. Gieske, Metall. Trans. A 21 (1990) 1885. [19] T. Yamada, K. Miura, M. Kajihara, N. Kurokawa, K. Sakamoto, Mater. Sci. Eng. A 390 (2005) 118. [20] E. Zakel, H. Reichl, in: J. Lau (Ed.), Flip Chip Assembly Using the Gold, Gold-Tin and Nickel-Gold Metallurgy, McGraw-Hill, New York, USA, 1995. [21] H. Okamoto, T.B. Massalski, Binary Alloy Phase Diagrams, ASM International, Metal Park, 1990. [22] J. Doesburg, D.G. Ivey, Mater. Sci. Eng. B 78 (2000) 44. [23] L. Buene, H. Falkenberg-Arell, J. Gjønnes, J. Taftø, Thin Solid Films 65 (1980) 247. [24] B.L. Adams, Mater. Sci. Eng. A 166 (1993) 59. [25] B.L. Adams, Ultramicroscopy 67 (1997) 11. [26] D.P. Field, Ultramicroscopy 67 (1997) 1. [27] D.J. Jensen, Ultramicroscopy 67 (1997) 25. [28] A.U. Telang, T.R. Bieler, S. Choi, K.N. Subramanian, J. Mater. Res. 17 (2002) 2294. [29] D.Z. Li, C.Q. Liu, P.P. Conway, Mater. Sci. Eng. A 391 (2005) 95. [30] Test Methods and Procedures for Microelectronics, in: MIL-STD 883C, Method 2019. August 1983. [31] S.W. Yoon, W.K. Choi, H.M. Lee, Scripta Mater. 40 (1999) 297. [32] X.Q. Shi, H.F. Kwan, S.M.L. Nai, G.H. Lim, J. Mater. Sci. Lett. 39 (2004) 1095. [33] A.R. Hartman, R.W. Dixon, Appl. Phys. Lett. 26 (1975) 239. [34] A. Moser, Appl. Phys. Lett. 59 (1991) 522. [35] K. Mizuishi, M. Sawai, S. Todoroki, S. Tsuiji, M. Hirao, M. Nakamura, IEEE J. Quant. Electron. 19 (1983) 1294. [36] H. Schardin, Fracture, MIT Press, 1959, p. 297.
Microelectronic Engineering 85 (2008) 512–517 www.elsevier.com/locate/mee
Microstructure of eutectic 80Au/20Sn solder joint in laser diode package J.W. Ronnie Teo a,*, F.L. Ng a, L.S. Kip Goi a, Y.F. Sun a, Z.F. Wang a, X.Q. Shi a, J. Wei a, G.Y. Li b b
a Singapore Institute of Manufacturing Technology, 71 Nanyang Drive, Singapore 638075, Singapore School of Materials Science and Engineering, Nanyang Technological University, 79 Nanyang Avenue, Singapore 639798, Singapore
Received 8 February 2007; received in revised form 20 August 2007; accepted 9 September 2007 Available online 5 October 2007
Abstract Laser diodes (LD) are usually bonded onto heat sinks for the purposes of heat dissipation, mechanical support and electrical interconnect. In this study, energy dispersive X-ray analysis (EDX) and electron backscatter diffraction (EBSD) are employed to investigate the microstructure evolution of 80Au/20Sn solder joint in LD package. During reflow, Pt–Sn and (Au, Ni)Sn IMCs were formed at the respective LD/solder and solder/heatsink interfaces, while d, b and f 0 phases of Au/Sn intermetallics were found in the solder joint. The Au-rich b and f 0 phases in the solder joint limit the growth of interfacial IMCs. Chip shear testing showed that the failure occurred within the LD, with partial brittle fracture at the GaAs substrate and partial interfacial delamination at the GaAs/SiN interface. The strong solder bond can be attributed to the high mechanical strength of 80Au/20Sn solder, which provides improved stability for high temperature applications. 2007 Elsevier B.V. All rights reserved. Keywords: Soldering; Intermetallic compounds; Electron backscatter diffraction
1. Introduction Eutectic 80Au/20Sn solder is being increasingly used in microelectronics and optoelectronics applications, e.g., flip chip bumps [1], LD die interconnection [2–5], and optical fiber feedthrough joint [6], etc. Their passive alignment characteristic, good thermo-mechanical behavior, fluxless soldering capability, suitable thermal conductivity and thermal expansion coefficient, as well as lead-free feature make it suitable for high temperature applications. In the past few years, researchers have put in a lot of efforts to develop 80Au/20Sn solder plating, bumping, multi-layer metallization and attachment processes [7–11], and to investigate the microstructure of 80Au/20Sn solder and its interfacial reaction on different metallization during thermal aging [12–15]. These studies show that the solder joint consists of Au-rich and Sn-rich phases, with the Au-
*
Corresponding author. Tel.: +65 67938351; fax: +65 67916377. E-mail address: [email protected] (J.W. Ronnie Teo).
0167-9317/$ - see front matter 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2007.09.009
rich phases at the center of the solder joint [12,14,16,17]. Pittroff et al. [2] propose having thick Au layer on the LD/heatsink metallization in order to improve the bonding integrity of the solder joint. To comprehend the microstructure of 80Au/20Sn solder joint, the phase diagram and the intermetallic compounds (IMCs) of Au-AuSn system are briefly discussed. The Au-Sn binary alloy has two eutectics, Au-rich 80Au/20Sn and Sn-rich 29Au/71Sn. The Sn-rich eutectic posed reliability concerns while Au-rich eutectic has good mechanical strength [18,19]. The phase diagram of Au-AuSn system shown in Fig. 1 represents one of the most complicated and intriguing binary systems [20,21]. The complexity of Au-Sn alloy is that it forms several IMCs with up to 18.5 at% Sn in Au. The eutectic that forms at 280 C (29 at% Sn) has a reaction L M [d + f], and is of great interest as a soldering material. The phases of interest are b, f 0 (Au5Sn), f, and d (AuSn). The b phase was assessed to be Au10Sn IMC stable above 532 C in 8 at% Sn alloy. The b phase corresponds roughly to commercial gold solder which performs well when used to solder to Au or
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513
a
Fig. 2. Schematic diagram of an epi-side down bonded LD.
b
action of the electron beam with the crystal lattice produces backscatter diffracted electrons and generates a pattern of intersecting bands. The lattice orientation on the surface of a sample can be systematically measured from these bands and the phases and intermetallics formed in such thin solder joint can be identified. In this study, the microstructure of 80Au/20Sn soldered LD package was studied using SEM with energy dispersive analysis of X-ray (EDX) and electron backscatter diffraction (EBSD). The mechanical strength and the fracture characteristics of the solder joint were further analyzed through die shear test. 2. Experimental details 2.1. Au/Sn bonding
Fig. 1. (a) Phase diagram of Au–AuSn. (b) The composition information of various Au–Sn phase compound found in Au–AuSn phase diagram [21].
Au-protected surfaces. The f phase exists from the peritetic b + L M f from 9.1 at% Sn at 521 C to 17.6 at% Sn at 280 C, and 13.9 at% Sn at 190 C [22]. It has good mechanical properties, increased thermal conductivity and excellent reliability. The f 0 (Au5Sn) phase has a composition of 16.7 at% Sn, and exists up to 190 C. At temperatures lower than 190 C, the f phase is transformed to f 0 phase, an extension of the f phase at low temperature [23]. On the other hand, the AuSn or d phase is a hexagonal IMC with a melting temperature of 419.3 C. It is a nonstoichiometric compound with a homogeneity range between 50.0 and 50.5 at% Sn and can be designated as Au(1x)Sn(0.006x60.02). The composition information of the Au-Sn phase compound was found in Fig. 1(b). In a LD package, the solder joint has a thickness of a few microns and consists of several metallization layers as shown in Fig. 2. During the bonding process, diffusion of Au from the LD electrode and Cu heat sink metallization may result in the formation of other intermetallics, not easily observed from scanning electron microscope (SEM). There are limited studies on the Au-rich phases in Au/Sn solder joint and it is difficult to quantify these intermetallics using conventional scanning electron microscopy (SEM). Over the years, electron diffraction in SEM has demonstrated to be an effective analytical tool to determine the crystal orientation of a surface [24–27]. The inter-
Chips used in this study were ridge waveguide LDs with dimensions of 300 · 600 · 100 lm. The metallization at the LD electrode consists of Ti/Pt/Au. Cu heat sinks with dimensions of 3 · 5 · 5 mm were plated with a thin layer of Ni (2 lm) as a diffusion barrier, followed with a thin layer of Au (50 nm) to protect the Ni layer and improve solder wettability. Eutectic 80Au/20Sn solder preform with thickness of about 5 lm was used to bond the chip onto heat sink with Model 860 Omni Bonder from Semiconductor Corps. Preforms were used instead of solder paste due to its better control of joint thickness during the bonding process. 80Au/20Sn solder also does not require the application of flux, which is usually found in solder paste, during the bonding process. The peak bonding temperature is 300 C and the reflow time is 5 s. The bonding stage is encapsulated with argon (Ar) environment to avoid oxidation during the bonding process. The LD is then gradually cooled to 100 C before extracting it out of the Ar-filled bonding stage for further characterization. Details of the bonding process can be found in [3]. 2.2. SEM/EDX and EBSD characterizations After bonding, the specimens were cold-mounted into resin and polished until the microstructure of the solder can be seen clearly under the optical microscope. The cross-sectional view of the samples was examined using SEM (Ziess EVO-50) with EDX and EBSD detectors to analyze the phase compositions. For EBSD characteriza-
514
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tions, the specimens were tilted approximately 70, whereby the backscatter diffracted electrons were captured by a phosphor screen placed near the specimen, generating a series of diffraction patterns. The spatial resolution of the electron beams is 0.2–0.3 lm and the diffraction region forms within 10–50 nm from the specimen surface. This diffraction patterns consist of a series of intersecting bands, which correspond directly to the crystallographic planes in the diffracting crystal volume [28,29]. The bands represent the plane in the crystal and the spacing between the bands is inversely proportional to the inter-planar spacing. When these bands intersect on a prescribed grid, the crystallographic orientation, also known as poles, was recorded. The patterns were then indexed automatically to obtain the orientation and phases of the surface.
40 wt% in the dark domain while the light domain has a smaller tin content of 10–12 wt%. The dark and light domains can be confirmed to be d and f 0 phases with the phase diagram as shown in Fig. 1(a). However, after reflow, the Sn-rich phase was observed to coalesce to the interface as shown in Fig. 3(b) while the Au-rich phase remained in the solder. The possibility of Sn-rich phase moving to the edges of the solder may be induced by the lower surface tension in the Sn-rich phase than the Au-rich phase [31]. The lower surface energy of Sn-rich phase drew itself towards the edges of the solder joint, leaving the center as Au-rich phase. Since the Au-rich phase has good mechanical properties and
2.3. Die shear testing Die shear testing was also conducted to evaluate the bonding integrity of the solder joint. Shear Test Analysis STA-3100 (Keller Technology Corps.), with a 1 kg transducer, was used to perform die shear tests. The specimens were held onto the stage via vacuum and the shear tool was positioned approximately 30 lm off the heat sink surface. As shown in Fig. 4, the shear tip was positioned at the LD chip in order to identify the joint strength and the failure mode of the LD package. According to MIL-STD883 C (Method 2019) [30], the shear rate should be in the range of 0.25–6.0 mm/s to avoid creep deformation behaviors. As the mechanical properties of the solder joint were sensitive to strain rate, the shear rate was selected to be 3 mm/s to identify the shear strength of the package. SEM/EDX was then used to identify the material fracture behavior and failure mode of the solder joint.
Fig. 4. Schematic diagram of die shear testing methodology.
3. Results and discussion 3.1. Microstructure of Au/Sn solder interconnect The 80Au/20Sn solder preform has an initial coarse random distribution of dark and light domains as shown in Fig. 3(a). EDX analysis showed a high tin content of 35–
Fig. 5. Typical cross-sectional view of Au/Sn solder joint. The joint thickness was approximately 8.5 lm.
Fig. 3. Microstructure evolution of 80Au/20Sn solder (a) before and (b) after solder reflow with Au/Ni metallization. Random distribution of d and f 0 phases was observed in the Au/Sn solder material. The Sn-rich phase coalesces towards the Ni-P interface after reflow.
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thermal conductivity, it would increase the mechanical integrity and produce excellent heat dissipation channel. Fig. 4 shows a typical cross-sectional view of as-bonded LDs. During bonding, due to the high diffusivity of Au, the Au layer from the LD electrode and the heat sink metalli-
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zation diffused quickly into the solder joint and increased the overall Au content of the solder into Au-rich phase. EDX analysis showed that the concentration of Au in Au-rich phase varied from 7 to 13 at.%. Complete dissolution of Au into the solder exposed the underlying
Fig. 6. EBSD diffraction patterns of intermetallics formed in the solder joint. (a) Diffraction pattern found from the Sn-rich region and (b)–(c) diffraction patterns found from the Au-rich phases. Kikuchi bands and poles of (d) d, (e) f 0 and (f) b phases was indexed according to the lattice orientations on the specimen surface. f 0 and b phases were found in the Au-rich region while d phase was found in the Sn-rich region.
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metallization, which also diffused into the solder sequentially. At the LD/solder interface, a thin layer of Pt-Sn IMCs was detected. Lee et al. [15] reported the formation of PtSn and PtSn4 IMCs after reflow. Due to the short reflow duration, Ni could only be detected within 1–2 lm of the Sn-rich phase at the solder/heatink interface. The concentration of Ni in the Sn-rich phase varied from 1 to 8 at.%, depending on the location of the Sn-rich phase. According the Au–Ni phase diagram, Ni and Au interdiffusion were limited at the reflow temperature. As the concentration of Sn remained unchanged and interstitial diffusion was unlikely to occur, Ni was expected to replace Au and form (Au, Ni)Sn IMC [32] (see Fig. 5). Further analysis of the 80Au/20Sn intermetallics in the solder joint was carried out using EBSD technique to identify the phase transformation. Reasonable matching of standard diffraction patterns from the database of indices for Au–Sn intermetallics was performed. At the Sn-rich region, a d phase with hexagonal crystal structure was detected. However, at the Au-rich region, two different crystal structures were observed; a trigonal f 0 phase and a hexagonal b phase. Although f 0 and b phases have very similar chemistry, their crystallographical patterns are obviously different as depicted in Fig. 6. Based on these crystallographical diffraction patterns, the solder joint actually consists of three phases; d, f 0 and b phases. The formation of the b phase showed that the Au layer from the LD electrode and Cu heat sink diffused not only into the d phase to form f 0 phase, but also into the f 0 phase to form b phase during reflow. However, the diffusivity rate of Au into the d and f 0 phases is unknown and requires further investigations. During aging, Sn and Ni interdiffused to form additional IMCs. However, due to the low Sn content in the f 0 and b phases, the diffusion of Sn to the interfaces was limited, resulting in slow IMC kinetic growth during aging [12,14]. The Au-rich b and f 0 phases acted as a form of diffusion barrier to the formation of interfacial IMCs. Song et al. [12] demonstrated that the IMC thickness was only 6 lm after 200 C thermal aging for 365 days. The metallurgical stability of the solder joint is an important aspect in optoelectronics packaging as these LDs are expected to have a service lifetime of 105 h [33– 35]. Furthermore, the mechanical properties of a solder joint is governed by the microstructure and interfacial IMCs formed.
direction of crack propagation, this network of cleavage planes was observed to propagate towards an interface. Surface analysis of the fracture interface using secondary ion mass spectroscopy (SIMS) showed that the failure occurred at the GaAs/SiN interface as depicted in Fig. 8. The failure at this interface indicated that the bonding strength of solder interconnect was stronger than the diode chip itself and that the failure at the GaAs/SiN interface might be due to the poor adhesion strength of SiN onto GaAs material. The good mechanical properties of 80Au/ 20Sn solder and the stable (Au, Ni)Sn IMCs at the interface would result in fracture in the LD.
Fig. 7. Typical sheared LDs and its associated shear force-displacement profile. Partial brittle fracture at the GaAs and partial interfacial delamination at the GaAs/SiN interface was observed. The peak shear force for this sample is 371.7 g.
3.2. Fracture characteristics and failure mode To assess the mechanical integrity of the solder joint, the specimens were subjected to shear testing, a mechanical overloading condition, to determine the weakest interface or material. Die shear tests showed that the joints had an average shear strength of 24.5 MPa and Fig. 7 shows a typical shear profile of the test. As depicted in Fig. 7(a), distinct cleavage fractures were observed to initiate on many parallel cleavage planes, which was referred as wallner lines [36], at the GaAs material. As the fracture advanced in the
Fig. 8. SIMS depth profile of the fracture surface after shear testing.
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4. Conclusions In this study, LDs were bonded onto Cu heat sinks using 80Au/20Sn solder. The initial microstructure and the microstructure evolution of 80Au/20Sn solder joint in LD package were investigated using SEM/EDX and EBSD. The solder joint comprised of a layer of Pt-Sn IMCs at the LD/solder interface, a layer of (Au,Ni)Sn IMCs at the solder/heat sink interface, and d, b and f 0 phases at the center of the solder joint. During reflow, the Au metallization from the LD electrode and the Cu heat sink diffused into the d phase to form f 0 phase and into f 0 phase to form b phase. The Au-rich b and f phases in the solder joint limited the growth of IMCs at the interfaces, enabling prolonged reliability. Chip shear test further showed good bonding integrity with fracture occurring within the LD. Partial brittle fracture at the GaAs substrate and partial interfacial delamination at the GaAs/SiN interface was observed. Acknowledgements This work is supported by Agency for Science, Technology and Research (A*STAR), Singapore. The authors would like to thank Dr. S. Suzuki from TSL Technology for their kind assistance in the EBSD discussion. References [1] W. Pittroff, T. Reiche, J. Barnikow, A. Klein, U. Merkel, K. Vogel, J. Wu¨rfl, Appl. Phys. Lett. 67 (1995) 2367. [2] W. Pittroff, G. Erbert, G. Beister, F. Bugge, A. Klein, A. Knauer, J. Maege, P. Ressel, J. Sebastian, R. Staske, G. Traenkle, IEEE Trans. Adv. Package 24 (2001) 434. [3] J.W.R. Tew, Z.F. Wang, X.Q. Shi, G.Y. Li, in: Proceedings of the IEEE 6th EPT Conference, 2004, p. 390. [4] J.W.R. Tew, X.Q. Shi, S. Yuan, Mater. Lett. 58 (2004) 2695. [5] J.W. Ronnie Teo, G.Y. Li, M.S. Ling, Z.F. Wang, X.Q. Shi, Thin Solid Films 515 (2007) 4340. [6] M.W. Beranek, M. Rassaian, C.-H. Tang, C.L.S. John, V.A. Loebs, IEEE Trans. Adv. Package 24 (2001) 576. [7] C. Belouet, C. Villard, C. Fages, D. Keller, ASME J. Electron. Mater. 28 (1999) 1123.
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