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Millisecond crystallization of amorphous silicon films by Joule-heating induced crystallization using a conductive layer
Thin Solid Films 515 (2007) 5357 – 5361 www.elsevier.com/locate/tsf
Millisecond crystallization of amorphous silicon films by Joule-heating induced crystallization using a conductive layer Won-Eui Hong, Jae-Sang Ro ⁎ Department of Materials Science and Engineering, Hongik University, Seoul, 121–791, Korea Received 21 October 2006; received in revised form 21 December 2006; accepted 12 January 2007 Available online 23 January 2007
Abstract This study revolved around the introduction of a crystallization technology for amorphous silicon film using Joule-heating. As part of this study, an electric field was applied to a conductive layer to induce Joule-heating in order to generate the intense heat needed to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced via Joule-heating through a solid state transformation under typical processing conditions. Uniformly distributed fine grains were obtained due to enormously high heating rate of this process. Crystallization was accomplished throughout the sample within the range of milliseconds of the heating, thus demonstrating the possibility of a crystallization route for amorphous silicon films at room temperature. © 2007 Elsevier B.V. All rights reserved. Keywords: Joule-heating; Crystallization; LTPS; AMOLED; Thin film transistors
1. Introduction The impetus to produce low temperature polycrystalline silicon has taken on additional urgency in recent years as a result of the advent of active matrix organic light emitting diode (AMOLED). In this regard, various crystallization techniques for amorphous silicon films, including solid phase crystallization (SPC) [1], metal induced crystallization [2], metal induced lateral crystallization (MILC) [3], and excimer laser crystallization [4], have been developed. Several attempts have been made to anneal silicon films by applying an electric field during the crystallization of amorphous silicon films. By applying an electric field during MILC, Jun et al. attempted to fabricate polycrystalline silicon thin film transistors using fieldaided lateral crystallization [5]. Electric field enhanced silicide mediated crystallization has also been reported for low temperature crystallization [6,7]. In such methods, an electric field is applied to an a-Si film which has an ultra thin Ni layer during the crystallization process. Sameshima et al. proposed a crystallization method with pulsed electrical current-induced
⁎ Corresponding author. Tel.: +82 2 320 1698; fax: +82 2 334 0750. E-mail address: [email protected] (J.-S. Ro). 0040-6090/$ - see front matter © 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2007.01.028
heating of silicon films. In coincidence with the voltage pulse, samples were irradiated with a 28-ns pulsed XeCl excimer laser. The authors reported that the melt duration time of the silicon thin films could be controlled using electrical current intensity in order to obtain large crystalline grain growth [8,9]. They also reported the rapid crystallization of silicon films using Jouleheating of metal films [10]. Rapid Joule-heating at an intensity of about 1.0 MW/cm2 was demonstrated by allowing current to flow in chromium metal strips located above a-Si films. This particular method involved the achievement of crystallization by melting silicon films. In this study, we have developed a crystallization technique named as Joule-heating induced crystallization (JIC) using a conductive layer [11]. In this technique, Joule-heat was generated by a conductive layer located beneath or above the amorphous silicon film, and was used to raise the temperature of the silicon film to crystallization temperature. As the silicon film should be optically transparent in the case of applications in flat panel displays, a transparent indium tin oxide (ITO) film was employed as a source of Joule-heating when the conductive layer was located beneath the amorphous silicon films. For the crystallization of a-Si films to occur, the Joule-heat generated must be used mainly in raising the temperature of the film to its crystallization temperature. Thus, an electric field was applied
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to the conductive layer for a very short time in order to generate intense pulses of energy which were conducted to the film, therefore minimizing the heating of glass substrate. As the Joule-heat is generated uniformly throughout the conductive layer, the temperature of the film can be regarded as being more uniform than that achieved using other conventional heating methods. Crystallization was accomplished within the range of millisecond by solid state transformation.
beneath the amorphous silicon films. A transparent ITO conductive layer and a SiO2 dielectric layer are successively formed on the dielectric layer produced on the glass substrate, which is then followed by the formation of an amorphous silicon thin film thereon. Fig. 1b exhibits a case in which a conductive layer is located above the amorphous silicon films. In this instance, a SiO2 dielectric layer and a conductive layer such as Mo, Cr, or ITO, are successively deposited on the amorphous silicon films. Using the plasma enhanced chemical vapor deposition (PECVD) method, a SiO2 layer (first dielectric layer) with a thickness of 300 nm was formed on a 0.7-mm thick glass substrate. An ITO thin film (conductive layer) having a thickness of 70 nm was deposited on the first dielectric layer by sputtering, and then a SiO2 layer (second dielectric layer) having a thickness of 500 nm was deposited thereon using the PECVD method. The PECVD method also resulted in an amorphous silicon thin film having a thickness of 50 nm being deposited on the second dielectric layer. Thus, an array, including the amorphous silicon thin film shown in Fig. 1a, was prepared. The sheet resistance of the conductive layer was measured to be 30 Ω/□. For Joule-heating to occur in this study, JIC specimens of the type illustrated in Fig. 1a were employed, and an electric field was applied to a conductive layer such as an ITO film. The mean grain size and the microstructure of crystallized films were determined by transmission electron microscopy (TEM) in dark or bright-field mode. The TEM specimen was prepared by lift-off technique: the underlying glass substrate was removed by HF. The crystallinity was examined by Raman spectroscopy. The Raman measurements were performed at room temperature in the backscattering configuration using a Jobin-Yvon LabRam HR system. The spectra were excited with the 514.5 nm line of an Ar-ion laser. Ion shower doping followed by thermal activation annealing was conducted to check the uniformity of crystallinity by measuring the sheet resistance of the crystallized silicon films.
2. Sample preparation and experimental procedure
3. Results and discussion
Fig. 1 illustrates the schematic diagrams of the JIC specimen. Fig. 1a shows an instance in which a conductive layer is located
Fig. 2a represents a photograph of a specimen showing an amorphous silicon thin film prior to field application.
Fig. 1. Schematic diagrams illustrating the constitution of a JIC specimen. (a) A transparent conductive layer such as ITO is located beneath the amorphous silicon films. (b) A conductive layer is located above the amorphous silicon films.
Fig. 2. (a) A photograph of a specimen having an amorphous silicon thin film before the application of an electric field; (b) a photograph showing the luminescence of the silicon thin film caused by heating at high temperatures using the Joule-heating method during field application and; (c) a photograph of a specimen in which the silicon thin film has been converted to a polycrystalline silicon thin film after one field application at room temperature.
W.-E. Hong, J.-S. Ro / Thin Solid Films 515 (2007) 5357–5361
Fig. 3. (a) A measured pulsed voltage, (b) changes in the electrical current flowing at ITO films, and (c) the calculated power density during 0.32 ms in an electric field of 800 V/cm.
Meanwhile, Fig. 2b is a photograph showing the luminescence of the silicon thin film caused by high temperature heating using the Joule-heating method where an electric field of 250 V/cm for 15 ms was applied to the conductive layer. The power density applied to the conductive layer in the field applications was ∼ 2000 Watt/cm2, and Fig. 2c is a photograph of a specimen whose silicon thin film has been converted to a polycrystalline silicon thin film after one-cycle of Joule-heating. The experiment was conducted at ambient temperatures, which means that the sample was not heated in a furnace. In accordance with the luminescence phenomenon observed in Fig. 2b, it was estimated that the peak temperature of the silicon film reaches
5359
1000 °C or above. Such intense heating may be sufficient to induce the solid state crystallization of the amorphous silicon. Fig. 3a shows a pulsed voltage at 1200 V when an electric field of 800 V/cm for 0.32 ms was applied to the conductive layer. Fig. 3b shows changes in the electrical current flowing at ITO films during field application. Fig. 3c shows changes in the power density with time calculated from Fig. 3a and b, respectively. Electrical current flowing in the conductive layer as a Joule-heat source decreases from 40 A to 22.5 A under a constant pulsed voltage during 0.32 ms of field application as indicated in Fig. 3b. This means that Joule-heating causes the temperature of ITO films to rise very rapidly thus resulting in the increase in the resistance of the conductive layer. Initially the sheet resistance of ITO films was measured to be 30 Ω/□. It increases to the value of ∼ 53 Ω/□ at the end of field application. Average power density applied to the conductive layer was estimated to be 14 kW/cm2. Fig. 4 shows the Raman spectra of JIC poly-Si after onecycle of Joule-heating under the above mentioned conditions. The optical phonon peak of the silicon transverse optical (TO) modes for the poly-Si was observed around 516.9 cm− 1. A shift in peak of 3.8 cm− 1 from the crystalline TO phonon peak of single crystalline silicon (520.7 cm− 1) was observed. This means that a tensile stress was built up in the films crystallized by this method. Fig. 5 shows a TEM bright-field micrograph and the transmission electron diffraction (TED) pattern of the JIC poly-Si. The a-Si film is fully crystallized at room temperature in an electric field of 800 V/cm for 0.32 ms. The radii of the TED patterns for the JIC poly-Si have been indexed and found to correspond to the interplanar spacing of silicon. The grains are preferentially oriented with the (111), (220) and (311) directions according to the TED patterns as indicated in Fig. 5a. The microstructure of the polycrystalline silicon thin film exhibits a nano-crystalline phase. The polycrystalline silicon produced has a very small grain size of ∼ 30 nm and exhibits grains of equiaxed morphology uniformly distributed in terms of the grain size. Such a microstructure cannot be obtained by solid state transformation using conventional heattreatment methods. In order to investigate the temperature dependence of the crystallization kinetics and grain size, we conducted SPC
Fig. 4. Raman spectra of the JIC poly-Si crystallized at room temperature in an electric field of 800 V/cm for 0.32 ms.
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Fig. 5. (a) TED pattern and (b) TEM bright-field micrograph of the JIC poly-Si crystallized at room temperature in an electric field of 800 V/cm for 0.32 ms.
experiments using silicon wafers that had the structure of a 50 nm-thick a-Si/500 nm-thick SiO2/silicon wafer. Crystallization was carried out using a tube furnace at temperatures ranging from 600 °C to 1000 °C. In addition, Raman spectroscopy was used to determine the nominal incubation and crystallization time. Table 1 shows nominal incubation time and crystallization time as a function of crystallization temperature. While the crystallization process was completed in 20 h at 600 °C, it was over in 25 s at 1000 °C. Since SPC kinetics is controlled by the nucleation rate, and the amount of
activation energy needed to nucleate silicon crystals is very high [12], the crystallization rate is dramatically increased when the crystallization temperature is raised. Moreover, in the case of furnace annealing, the sample was found to be unable to reach the setting temperature of 1000 °C within 25 s. As indicated in Fig. 6, the average grain size was measured as a function of crystallization temperature. Dark field TEM was used to calculate the average grain size of the 100 large grains that were selected. Since the grains of SPC poly-Si are elliptical in shape, we measured the lengths of the long and short axes respectively. The grain size was then calculated using the equation (πab)1/2/2, where a and b are the lengths of the long and short axes respectively. The grain size was found to decrease as the annealing temperature was increased from 600 °C to 800 °C. However, it was discovered to be less sensitive to annealing temperature at temperatures beyond 800 °C. As crystallization kinetics becomes very rapid and the heating rate of a conventional furnace is slow, a phase transition to polycrystalline silicon may occur in the course of heating-up. Such a phase transition to polycrystalline silicon may occur in the course of heating-up even in the case of rapid thermal annealing (RTA), which exhibits the highest heating rate of the conventional heat-treatment methods, because the heating rate is only about 100 °C/s. Thus, the desired microstructure formed at a high temperature cannot be reflected. The heating rate of JIC, however, was estimated to exceed 106 °C/s, which is of four orders of magnitude faster than that of RTA. Based on the experimental results illustrated in the previous paragraph, the conclusion can be reached that a high heating rate ensures complete crystallization within the range of milliseconds. This high heating rate is also believed to enable the formation of nano-crystalline grains. Such a method of crystallization of Si film with a nano-crystalline phase through solid state transformation via Joule-heating has not previously been reported. Finally, the uniformity of crystallinity was verified by measuring sheet resistance after ion shower doping and thermal activation. The variations of the sheet resistance were observed to be within 2%. Thus, the macroscopic uniformity of the grain size of the JIC poly-Si was found to be excellent.
Table 1 Nominal incubation and crystallization time vs. crystallization temperature
600 °C 650 °C 700 °C 750 °C 800 °C 850 °C 900 °C 950 °C 1000 °C
Nominal incubation time
Nominal crystallization time
∼4 h <10 min <2 min <1 min <20 s <20 s <15 s <10 s <5 s
∼ 20 h ∼3 h ∼ 20 min ∼ 6 min ∼ 3 min ∼ 2 min ∼ 1 min ∼ 40 s ∼ 25 s
Fig. 6. Grain size vs. annealing temperature.
W.-E. Hong, J.-S. Ro / Thin Solid Films 515 (2007) 5357–5361
4. Conclusions This study demonstrated the possibility of achieving the millisecond crystallization of amorphous Si thin film via Jouleheating at room temperature. Such a process does not make use of any metallic element for preferential nucleation, and is completed within the range of millisecond. Crystallization was accomplished by solid state transformation at higher temperatures. Poly-Si film featuring nano-crystalline sized grains were obtained by the present crystallization method. As the macroscopic uniformity of the grains of the JIC poly-Si film is excellent, this JIC process is expected to find its applications, especially with regards to AMOLED. Acknowledgment The authors would like to thank EnSilTech Corporation for supporting this work.
5361
References [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
A.T. Voutsas, M.K. Hatalis, J. Electrochem. Soc. 139 (1992) 2659. R.S. Wagner, W.C. Ellis, Appl. Phys. Lett. 4 (1964) 89. S.-W. Lee, S.-K. Joo, IEEE Electron Dev. Lett. 17 (1996) 160. J.S. Im, H.J. Kim, M.O. Thompson, Appl. Phys. Lett. 63 (1993) 2969. S.-I. Jun, Y.-H. Yang, J.-B. Lee, D.-K. Choi, Appl. Phys. Lett. 75 (1999) 2235. J. Jang, J.Y. Oh, S.K. Kim, Y.J. Choi, S.Y. Yoon, C.O. Kim, Nature 395 (1998) 481. S.Y. Yoon, J.Y. Oh, C.O. Kim, J. Jang, J. Appl. Phys. 84 (1998) 6463. T. Sameshima, K. Ozaki, N. Andoh, Appl. Phys., A 71 (2000) 1. T. Sameshima, N. Andoh, H. Takahashi, J. Appl. Phys. 89 (2001) 5362. T. Sameshima, Y. Kaneko, N. Andoh, Appl. Phys., A 73 (2001) 419. J.-S. Ro, W.-E. Hong, Proc. SID 2006 International Symposium Digest of Technical Papers, vol. XXXVII, 2006, p. 1280 (Book II). I.-W. Wu, A. Chiang, M. Fuse, L. Őveçoglu, T.Y. Huang, J. Appl. Phys. 65 (1989) 4036.
Millisecond crystallization of amorphous silicon films by Joule-heating induced crystallization using a conductive layer Won-Eui Hong, Jae-Sang Ro ⁎ Department of Materials Science and Engineering, Hongik University, Seoul, 121–791, Korea Received 21 October 2006; received in revised form 21 December 2006; accepted 12 January 2007 Available online 23 January 2007
Abstract This study revolved around the introduction of a crystallization technology for amorphous silicon film using Joule-heating. As part of this study, an electric field was applied to a conductive layer to induce Joule-heating in order to generate the intense heat needed to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced via Joule-heating through a solid state transformation under typical processing conditions. Uniformly distributed fine grains were obtained due to enormously high heating rate of this process. Crystallization was accomplished throughout the sample within the range of milliseconds of the heating, thus demonstrating the possibility of a crystallization route for amorphous silicon films at room temperature. © 2007 Elsevier B.V. All rights reserved. Keywords: Joule-heating; Crystallization; LTPS; AMOLED; Thin film transistors
1. Introduction The impetus to produce low temperature polycrystalline silicon has taken on additional urgency in recent years as a result of the advent of active matrix organic light emitting diode (AMOLED). In this regard, various crystallization techniques for amorphous silicon films, including solid phase crystallization (SPC) [1], metal induced crystallization [2], metal induced lateral crystallization (MILC) [3], and excimer laser crystallization [4], have been developed. Several attempts have been made to anneal silicon films by applying an electric field during the crystallization of amorphous silicon films. By applying an electric field during MILC, Jun et al. attempted to fabricate polycrystalline silicon thin film transistors using fieldaided lateral crystallization [5]. Electric field enhanced silicide mediated crystallization has also been reported for low temperature crystallization [6,7]. In such methods, an electric field is applied to an a-Si film which has an ultra thin Ni layer during the crystallization process. Sameshima et al. proposed a crystallization method with pulsed electrical current-induced
⁎ Corresponding author. Tel.: +82 2 320 1698; fax: +82 2 334 0750. E-mail address: [email protected] (J.-S. Ro). 0040-6090/$ - see front matter © 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2007.01.028
heating of silicon films. In coincidence with the voltage pulse, samples were irradiated with a 28-ns pulsed XeCl excimer laser. The authors reported that the melt duration time of the silicon thin films could be controlled using electrical current intensity in order to obtain large crystalline grain growth [8,9]. They also reported the rapid crystallization of silicon films using Jouleheating of metal films [10]. Rapid Joule-heating at an intensity of about 1.0 MW/cm2 was demonstrated by allowing current to flow in chromium metal strips located above a-Si films. This particular method involved the achievement of crystallization by melting silicon films. In this study, we have developed a crystallization technique named as Joule-heating induced crystallization (JIC) using a conductive layer [11]. In this technique, Joule-heat was generated by a conductive layer located beneath or above the amorphous silicon film, and was used to raise the temperature of the silicon film to crystallization temperature. As the silicon film should be optically transparent in the case of applications in flat panel displays, a transparent indium tin oxide (ITO) film was employed as a source of Joule-heating when the conductive layer was located beneath the amorphous silicon films. For the crystallization of a-Si films to occur, the Joule-heat generated must be used mainly in raising the temperature of the film to its crystallization temperature. Thus, an electric field was applied
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to the conductive layer for a very short time in order to generate intense pulses of energy which were conducted to the film, therefore minimizing the heating of glass substrate. As the Joule-heat is generated uniformly throughout the conductive layer, the temperature of the film can be regarded as being more uniform than that achieved using other conventional heating methods. Crystallization was accomplished within the range of millisecond by solid state transformation.
beneath the amorphous silicon films. A transparent ITO conductive layer and a SiO2 dielectric layer are successively formed on the dielectric layer produced on the glass substrate, which is then followed by the formation of an amorphous silicon thin film thereon. Fig. 1b exhibits a case in which a conductive layer is located above the amorphous silicon films. In this instance, a SiO2 dielectric layer and a conductive layer such as Mo, Cr, or ITO, are successively deposited on the amorphous silicon films. Using the plasma enhanced chemical vapor deposition (PECVD) method, a SiO2 layer (first dielectric layer) with a thickness of 300 nm was formed on a 0.7-mm thick glass substrate. An ITO thin film (conductive layer) having a thickness of 70 nm was deposited on the first dielectric layer by sputtering, and then a SiO2 layer (second dielectric layer) having a thickness of 500 nm was deposited thereon using the PECVD method. The PECVD method also resulted in an amorphous silicon thin film having a thickness of 50 nm being deposited on the second dielectric layer. Thus, an array, including the amorphous silicon thin film shown in Fig. 1a, was prepared. The sheet resistance of the conductive layer was measured to be 30 Ω/□. For Joule-heating to occur in this study, JIC specimens of the type illustrated in Fig. 1a were employed, and an electric field was applied to a conductive layer such as an ITO film. The mean grain size and the microstructure of crystallized films were determined by transmission electron microscopy (TEM) in dark or bright-field mode. The TEM specimen was prepared by lift-off technique: the underlying glass substrate was removed by HF. The crystallinity was examined by Raman spectroscopy. The Raman measurements were performed at room temperature in the backscattering configuration using a Jobin-Yvon LabRam HR system. The spectra were excited with the 514.5 nm line of an Ar-ion laser. Ion shower doping followed by thermal activation annealing was conducted to check the uniformity of crystallinity by measuring the sheet resistance of the crystallized silicon films.
2. Sample preparation and experimental procedure
3. Results and discussion
Fig. 1 illustrates the schematic diagrams of the JIC specimen. Fig. 1a shows an instance in which a conductive layer is located
Fig. 2a represents a photograph of a specimen showing an amorphous silicon thin film prior to field application.
Fig. 1. Schematic diagrams illustrating the constitution of a JIC specimen. (a) A transparent conductive layer such as ITO is located beneath the amorphous silicon films. (b) A conductive layer is located above the amorphous silicon films.
Fig. 2. (a) A photograph of a specimen having an amorphous silicon thin film before the application of an electric field; (b) a photograph showing the luminescence of the silicon thin film caused by heating at high temperatures using the Joule-heating method during field application and; (c) a photograph of a specimen in which the silicon thin film has been converted to a polycrystalline silicon thin film after one field application at room temperature.
W.-E. Hong, J.-S. Ro / Thin Solid Films 515 (2007) 5357–5361
Fig. 3. (a) A measured pulsed voltage, (b) changes in the electrical current flowing at ITO films, and (c) the calculated power density during 0.32 ms in an electric field of 800 V/cm.
Meanwhile, Fig. 2b is a photograph showing the luminescence of the silicon thin film caused by high temperature heating using the Joule-heating method where an electric field of 250 V/cm for 15 ms was applied to the conductive layer. The power density applied to the conductive layer in the field applications was ∼ 2000 Watt/cm2, and Fig. 2c is a photograph of a specimen whose silicon thin film has been converted to a polycrystalline silicon thin film after one-cycle of Joule-heating. The experiment was conducted at ambient temperatures, which means that the sample was not heated in a furnace. In accordance with the luminescence phenomenon observed in Fig. 2b, it was estimated that the peak temperature of the silicon film reaches
5359
1000 °C or above. Such intense heating may be sufficient to induce the solid state crystallization of the amorphous silicon. Fig. 3a shows a pulsed voltage at 1200 V when an electric field of 800 V/cm for 0.32 ms was applied to the conductive layer. Fig. 3b shows changes in the electrical current flowing at ITO films during field application. Fig. 3c shows changes in the power density with time calculated from Fig. 3a and b, respectively. Electrical current flowing in the conductive layer as a Joule-heat source decreases from 40 A to 22.5 A under a constant pulsed voltage during 0.32 ms of field application as indicated in Fig. 3b. This means that Joule-heating causes the temperature of ITO films to rise very rapidly thus resulting in the increase in the resistance of the conductive layer. Initially the sheet resistance of ITO films was measured to be 30 Ω/□. It increases to the value of ∼ 53 Ω/□ at the end of field application. Average power density applied to the conductive layer was estimated to be 14 kW/cm2. Fig. 4 shows the Raman spectra of JIC poly-Si after onecycle of Joule-heating under the above mentioned conditions. The optical phonon peak of the silicon transverse optical (TO) modes for the poly-Si was observed around 516.9 cm− 1. A shift in peak of 3.8 cm− 1 from the crystalline TO phonon peak of single crystalline silicon (520.7 cm− 1) was observed. This means that a tensile stress was built up in the films crystallized by this method. Fig. 5 shows a TEM bright-field micrograph and the transmission electron diffraction (TED) pattern of the JIC poly-Si. The a-Si film is fully crystallized at room temperature in an electric field of 800 V/cm for 0.32 ms. The radii of the TED patterns for the JIC poly-Si have been indexed and found to correspond to the interplanar spacing of silicon. The grains are preferentially oriented with the (111), (220) and (311) directions according to the TED patterns as indicated in Fig. 5a. The microstructure of the polycrystalline silicon thin film exhibits a nano-crystalline phase. The polycrystalline silicon produced has a very small grain size of ∼ 30 nm and exhibits grains of equiaxed morphology uniformly distributed in terms of the grain size. Such a microstructure cannot be obtained by solid state transformation using conventional heattreatment methods. In order to investigate the temperature dependence of the crystallization kinetics and grain size, we conducted SPC
Fig. 4. Raman spectra of the JIC poly-Si crystallized at room temperature in an electric field of 800 V/cm for 0.32 ms.
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Fig. 5. (a) TED pattern and (b) TEM bright-field micrograph of the JIC poly-Si crystallized at room temperature in an electric field of 800 V/cm for 0.32 ms.
experiments using silicon wafers that had the structure of a 50 nm-thick a-Si/500 nm-thick SiO2/silicon wafer. Crystallization was carried out using a tube furnace at temperatures ranging from 600 °C to 1000 °C. In addition, Raman spectroscopy was used to determine the nominal incubation and crystallization time. Table 1 shows nominal incubation time and crystallization time as a function of crystallization temperature. While the crystallization process was completed in 20 h at 600 °C, it was over in 25 s at 1000 °C. Since SPC kinetics is controlled by the nucleation rate, and the amount of
activation energy needed to nucleate silicon crystals is very high [12], the crystallization rate is dramatically increased when the crystallization temperature is raised. Moreover, in the case of furnace annealing, the sample was found to be unable to reach the setting temperature of 1000 °C within 25 s. As indicated in Fig. 6, the average grain size was measured as a function of crystallization temperature. Dark field TEM was used to calculate the average grain size of the 100 large grains that were selected. Since the grains of SPC poly-Si are elliptical in shape, we measured the lengths of the long and short axes respectively. The grain size was then calculated using the equation (πab)1/2/2, where a and b are the lengths of the long and short axes respectively. The grain size was found to decrease as the annealing temperature was increased from 600 °C to 800 °C. However, it was discovered to be less sensitive to annealing temperature at temperatures beyond 800 °C. As crystallization kinetics becomes very rapid and the heating rate of a conventional furnace is slow, a phase transition to polycrystalline silicon may occur in the course of heating-up. Such a phase transition to polycrystalline silicon may occur in the course of heating-up even in the case of rapid thermal annealing (RTA), which exhibits the highest heating rate of the conventional heat-treatment methods, because the heating rate is only about 100 °C/s. Thus, the desired microstructure formed at a high temperature cannot be reflected. The heating rate of JIC, however, was estimated to exceed 106 °C/s, which is of four orders of magnitude faster than that of RTA. Based on the experimental results illustrated in the previous paragraph, the conclusion can be reached that a high heating rate ensures complete crystallization within the range of milliseconds. This high heating rate is also believed to enable the formation of nano-crystalline grains. Such a method of crystallization of Si film with a nano-crystalline phase through solid state transformation via Joule-heating has not previously been reported. Finally, the uniformity of crystallinity was verified by measuring sheet resistance after ion shower doping and thermal activation. The variations of the sheet resistance were observed to be within 2%. Thus, the macroscopic uniformity of the grain size of the JIC poly-Si was found to be excellent.
Table 1 Nominal incubation and crystallization time vs. crystallization temperature
600 °C 650 °C 700 °C 750 °C 800 °C 850 °C 900 °C 950 °C 1000 °C
Nominal incubation time
Nominal crystallization time
∼4 h <10 min <2 min <1 min <20 s <20 s <15 s <10 s <5 s
∼ 20 h ∼3 h ∼ 20 min ∼ 6 min ∼ 3 min ∼ 2 min ∼ 1 min ∼ 40 s ∼ 25 s
Fig. 6. Grain size vs. annealing temperature.
W.-E. Hong, J.-S. Ro / Thin Solid Films 515 (2007) 5357–5361
4. Conclusions This study demonstrated the possibility of achieving the millisecond crystallization of amorphous Si thin film via Jouleheating at room temperature. Such a process does not make use of any metallic element for preferential nucleation, and is completed within the range of millisecond. Crystallization was accomplished by solid state transformation at higher temperatures. Poly-Si film featuring nano-crystalline sized grains were obtained by the present crystallization method. As the macroscopic uniformity of the grains of the JIC poly-Si film is excellent, this JIC process is expected to find its applications, especially with regards to AMOLED. Acknowledgment The authors would like to thank EnSilTech Corporation for supporting this work.
5361
References [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
A.T. Voutsas, M.K. Hatalis, J. Electrochem. Soc. 139 (1992) 2659. R.S. Wagner, W.C. Ellis, Appl. Phys. Lett. 4 (1964) 89. S.-W. Lee, S.-K. Joo, IEEE Electron Dev. Lett. 17 (1996) 160. J.S. Im, H.J. Kim, M.O. Thompson, Appl. Phys. Lett. 63 (1993) 2969. S.-I. Jun, Y.-H. Yang, J.-B. Lee, D.-K. Choi, Appl. Phys. Lett. 75 (1999) 2235. J. Jang, J.Y. Oh, S.K. Kim, Y.J. Choi, S.Y. Yoon, C.O. Kim, Nature 395 (1998) 481. S.Y. Yoon, J.Y. Oh, C.O. Kim, J. Jang, J. Appl. Phys. 84 (1998) 6463. T. Sameshima, K. Ozaki, N. Andoh, Appl. Phys., A 71 (2000) 1. T. Sameshima, N. Andoh, H. Takahashi, J. Appl. Phys. 89 (2001) 5362. T. Sameshima, Y. Kaneko, N. Andoh, Appl. Phys., A 73 (2001) 419. J.-S. Ro, W.-E. Hong, Proc. SID 2006 International Symposium Digest of Technical Papers, vol. XXXVII, 2006, p. 1280 (Book II). I.-W. Wu, A. Chiang, M. Fuse, L. Őveçoglu, T.Y. Huang, J. Appl. Phys. 65 (1989) 4036.