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Millisecond flash-lamp annealing of LaLuO3
Microelectronic Engineering 88 (2011) 1346–1348
Contents lists available at ScienceDirect
Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee
Millisecond flash-lamp annealing of LaLuO3 J. Lehmann a,⇑, N. Shevchenko a, A. Mücklich a, J.v. Borany a, W. Skorupa a, J. Schubert b, J.M.J. Lopez b, S. Mantl b a b
Institute of Ion-Beam Physics and Materials Research, Helmholtz-Zentrum Dresden-Rossendorf (HZDR), Bautzner Landstrasse 400, 01328 Dresden, Germany Peter Grünberg Institute (PGI 9-IT), Forschungszentrum Jülich, Leo-Brandt Str., 52428 Jülich, Germany
a r t i c l e
i n f o
Article history: Available online 30 March 2011 Keywords: High-k dielectrics Alternative high-k dielectrics Higher-k dielectrics Ternary rare earth oxides Ternary high-k oxides Rare-earth based gate oxides Electrical properties
a b s t r a c t Metal-oxide-semiconductor capacitors containing the alternative high-k dielectric LaLuO3 were treated by flash lamp annealing (FLA). Capacitance–voltage (C–V) and current–voltage (J–V) characteristics reveal an increase in the capacitance for the flashed samples while the very low leakage current of the LaLuO3 is retained. Microstructural investigations confirm the thermal stability of the film even after FLA at 1200 °C, 20 ms. Ó 2011 Published by Elsevier B.V.
1. Introduction
2. Experimental
In the most recent years ternary oxides containing rare earth elements gained some attention as alternative dielectrics because of their very promising properties [1]. One material out of this class is LaLuO3 which offers a k-value up to 32, a band gap of 5.6 eV, symmetrical band offsets to silicon of 2.1 eV, low densities of interface trap states (Dit) of around 5 1011 eV1 cm2 in combination with very low leakage currents. It was shown to remain amorphous even after rapid thermal annealing with 1000 °C and 10 s [2]. Additionally, LaLuO3 can be grown on Ge and GaAs [3–5], for which reason it might find an application on high-mobility channel materials. Millisecond annealing techniques such as FLA are technologically relevant because their extremely short annealing times reduce or even suppress diffusion during the high-temperature source–drain activation annealing [6,7]. For this reason FLA might be a critical technique for the electrical activation of ultra-shallow junctions as well as a gate first process protocol of high-k/metal gate stacks. The interaction of FLA and the high-k gate stack was investigated by high-resolution transmission electron microscopy (HRTEM), grazing incidence X-ray diffraction (GiXRD), current– voltage (J–V) and capacitance–voltage (C–V) methods.
Ten nanometer thick LaLuO3 films were grown by molecular beam deposition (MBD) onto RCA cleaned p-type Si wafers whereupon the FLA treatment did follow. During the FLA process the samples first were preheated from the back side with a halogen lamp to a final temperature of 700 °C. After a preheating time of 30 s an optical flash was applied to the front side with pulse durations of 1, 3 or 20 ms and flash energies high enough to achieve peak temperatures between 900 and 1200 °C [6]. One wafer was used as a control sample and received no FLA. For electrical characterization Al and 50 nm of Pt were deposited on the back and front of the wafer, respectively. The Pt was patterned into 360 360 lm2 top contacts by optical lithography. A contact annealing at 400 °C was performed in forming gas atmosphere (90% N2 + 10% H2) for 10 min as the last processing step. For this reason the layer sequence was Al/p-Si substrate/SiOx/LaLuO3/ Pt for samples bound to electrical measurements. For microstructural investigations such as HRTEM and GiXRD the films got no additional metal layers of Al or Pt.
⇑ Corresponding author. Tel.: +49 351 260 2912. E-mail address: [email protected] (J. Lehmann). 0167-9317/$ - see front matter Ó 2011 Published by Elsevier B.V. doi:10.1016/j.mee.2011.03.126
3. Results and discussion HRTEM pictures of the unflashed control sample and a sample which underwent FLA at 1200 °C, 20 ms are presented in Fig. 1, together with their respective GiXRD-spectra. For both samples an interfacial silicon oxide layer of around 1 nm is visible between the Si-substrate and the high-k layer. This layer is a consequence
J. Lehmann et al. / Microelectronic Engineering 88 (2011) 1346–1348
1347
temperature during the contact annealing step, the microstructural results should be valid for to the real stack, too. A comparison of the J–V characteristics (Fig. 2) shows no big differences between FLA treated samples and the one without FLA. Measured leakage currents at VG = -1 V were near the measurement limit of some 10 fA, which is corresponding to leakage current densities of 2 1010 A/cm2. Similarly, the width of the C–V hysteresis and flat band voltages (VFB) were for all samples less than 50 mV and around VFB = 0 V, respectively, whereby the variation between different samples was as low as the variation between different devices on one sample. Another evaluation of the measured C–V measurements revealed the results printed in Fig. 3, where the measured maximum capacitance (CMAX) of the C–V curves and the calculated capacitance equivalent oxide thickness (CET) are plotted in closed and open symbols, respectively. The CMAX-values were extracted from the C–V curves in the accumulation regime at 1.5 V, while the given CET-values were calculated from the measured maximum capacitance (CMAX) of the C–V curves by
CET ¼
Fig. 1. HRTEM picture of layer stack (a) without flash (b) after flash with 1200 °C and 20 ms. (c) GiXRD-spectra which show no crystallization of LaLuO3-film after FLA.
of the RCA cleaning process and can be found in all samples with thicknesses of 0.7–1.4 nm. The high-k film itself is still 10 nm thick and remains amorphous after FLA, which can also be seen in the GiXRD-spectra (compare Fig. 1c). Since the real gate stack for electrical measurements got an additional Pt-layer on top of the high-k layer as well as a 400 °C, 10 min forming gas annealing, it might happen that metal interdiffusion occurs, but in experiments on Si and TiN capped systems this effect was found to be very small for annealing temperatures and times of up to 700 °C and 10 min, respectively. Moreover, no crystallization was found under such conditions. For this reasons and because of the even lower
Ae0 eSiO2 C MAX
where A, e0 and eSiO2 ¼ 3; 9 are the area of the capacitor, the vacuum permittivity and the relative permittivity of silicon dioxide, respectively. Therefore, a higher measured capacitance is correlated with a decrease of the CET. At first, the results for 3 ms flash durations with different peak temperatures are going to be discussed (Fig. 3a). As clearly visible from the plotted capacitance and CET-values, the FLA-treatment is able to improve them compared to the unflashed control sample, whose CET-values are in good agreement with formerly reported values for LaLuO3 [8]. Increasing the FLA peak temperatures from 900 to 1100 °C increases the measured capacitances even more, whereby at 1000 °C an optimum could have been reached. This is going to be inspected more closely, soon, within a new series with FLA peak temperatures of up to 1300 °C, currently under preparation. From the dependence on the flash durations (Fig. 3b) it can be concluded that for peak temperatures of 1000 °C short flash durations of 1–3 ms are more beneficial than longer ones such as 20 ms, because no improvement of CET is visible for this sample. A similar effect was found for LaScO3 in Ref. [9], were the authors found a correlation between the improved k-value and the oxygen content of the high-k film. If the same is valid for LaLuO3 has to be shown by further experiments, which are currently carried out. Inspecting the normalized C–V curves of Fig. 4 leads to the observation, that the characteristics of flashed samples have a steeper transition from the accumulation to inversion region. Only some selected C–V characteristics are shown, because the slopes
Fig. 2. J–V curves of devices with (a) different peak temperatures and (b) different flash durations of the FLA.
1348
J. Lehmann et al. / Microelectronic Engineering 88 (2011) 1346–1348
Fig. 3. Areal capacitance and CET plotted as a function of the flash lamp annealing (a) temperature and (b) time. The preheating conditions before the flash were the same with 700 °C, 30 s.
capacitance or CET of the gate stack as well as an improvement in the Dit. The material remains in an amorphous state and keeps its very low leakage current. Acknowledgement This work was supported in part by the Project KZWEI which is funded in line with the technology funding for regional development (ERDF) of the European Union and by funds of the Free State of Saxony. References
Fig. 4. Selection of normalized C–V curves, measured under a frequency of 100 kHz.
are quite similar for all flashed samples. These stepper transitions in flashed samples point to a decreased number of Dit. Corresponding Dit-values for the unflashed and the flashed samples were calculated by Terman’s method and range around 5 and 1 1011 eV1 cm2, respectively [10]. 4. Conclusion It could be shown that a LaLuO3 gate dielectric can benefit from a post deposition flash lamp treatment by an improvement in the
[1] J.M.J. Lopez, E. Durg˘un Özben, M. Roeckerath, U. Littmark, R. Lupták, St. Lenk, M. Luysberg, A. Besmehn, J. Schubert, S. Mantl, Microelectron. Eng. 86 (2009) 1646. [2] M. Roeckerath, T. Heeg, J.M.J. Lopes, J. Schubert, S. Mantl, A. Besmehn, P. Myllymäki, L. Niinstö, Thin Solid Films 517 (2008) 201. [3] C. Radtke, C. Krug, G.V. Soares, I.J.R. Baumvol, J.M.J. Lopez, E. Durg˘un Özben, A. Nichau, J. Schubert, S. Mantl, Electrochem. Solid State 13 (2010) G37. [4] J.J. Gu, Y.Q. Liu, M. Xu, G.K. Celler, R.G. Gordon, P.D. Ye, Appl. Phys. Lett. 97 (2010) 012106. [5] Y. Liu, M. Xu, J. Heo, P.D. Ye, R.G. Gordon, Appl. Phys. Lett. 97 (2010) 162910. [6] W. Skorupa, T. Gebel, R.A. Yankov, S. Paul, W. Lerch, D.F. Downey, E.A. Arevalo, J. Electrochem. Soc. 152 (2005) G436. [7] C.T.M. Kwo, R.D. Braatz, S. Paul, W. Lerch, E.G. Seebauer, J. Appl. Phys. 105 (2009) 063514. [8] J.M.J. Lopez, M. Roeckerath, T. Heeg, E. Rije, J. Schubert, S. Mantl, V.V. Afanase’ev, S. Shamuilia, A. Stesmans, Y. Jia, D.G. Schlom, Appl. Phys. Lett. 89 (2006) 222902. [9] J.M.J. Lopez, U. Littmark, M. Roeckerath, St. Lenk, J. Schubert, S. Mantl, A. Besmehn, J. Appl. Phys. 101 (2007) 104109. [10] E.H. Nicollian, J.R. Brews, MOS Physics and Technology, Wiley Interscience, New York, 1982.
Contents lists available at ScienceDirect
Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee
Millisecond flash-lamp annealing of LaLuO3 J. Lehmann a,⇑, N. Shevchenko a, A. Mücklich a, J.v. Borany a, W. Skorupa a, J. Schubert b, J.M.J. Lopez b, S. Mantl b a b
Institute of Ion-Beam Physics and Materials Research, Helmholtz-Zentrum Dresden-Rossendorf (HZDR), Bautzner Landstrasse 400, 01328 Dresden, Germany Peter Grünberg Institute (PGI 9-IT), Forschungszentrum Jülich, Leo-Brandt Str., 52428 Jülich, Germany
a r t i c l e
i n f o
Article history: Available online 30 March 2011 Keywords: High-k dielectrics Alternative high-k dielectrics Higher-k dielectrics Ternary rare earth oxides Ternary high-k oxides Rare-earth based gate oxides Electrical properties
a b s t r a c t Metal-oxide-semiconductor capacitors containing the alternative high-k dielectric LaLuO3 were treated by flash lamp annealing (FLA). Capacitance–voltage (C–V) and current–voltage (J–V) characteristics reveal an increase in the capacitance for the flashed samples while the very low leakage current of the LaLuO3 is retained. Microstructural investigations confirm the thermal stability of the film even after FLA at 1200 °C, 20 ms. Ó 2011 Published by Elsevier B.V.
1. Introduction
2. Experimental
In the most recent years ternary oxides containing rare earth elements gained some attention as alternative dielectrics because of their very promising properties [1]. One material out of this class is LaLuO3 which offers a k-value up to 32, a band gap of 5.6 eV, symmetrical band offsets to silicon of 2.1 eV, low densities of interface trap states (Dit) of around 5 1011 eV1 cm2 in combination with very low leakage currents. It was shown to remain amorphous even after rapid thermal annealing with 1000 °C and 10 s [2]. Additionally, LaLuO3 can be grown on Ge and GaAs [3–5], for which reason it might find an application on high-mobility channel materials. Millisecond annealing techniques such as FLA are technologically relevant because their extremely short annealing times reduce or even suppress diffusion during the high-temperature source–drain activation annealing [6,7]. For this reason FLA might be a critical technique for the electrical activation of ultra-shallow junctions as well as a gate first process protocol of high-k/metal gate stacks. The interaction of FLA and the high-k gate stack was investigated by high-resolution transmission electron microscopy (HRTEM), grazing incidence X-ray diffraction (GiXRD), current– voltage (J–V) and capacitance–voltage (C–V) methods.
Ten nanometer thick LaLuO3 films were grown by molecular beam deposition (MBD) onto RCA cleaned p-type Si wafers whereupon the FLA treatment did follow. During the FLA process the samples first were preheated from the back side with a halogen lamp to a final temperature of 700 °C. After a preheating time of 30 s an optical flash was applied to the front side with pulse durations of 1, 3 or 20 ms and flash energies high enough to achieve peak temperatures between 900 and 1200 °C [6]. One wafer was used as a control sample and received no FLA. For electrical characterization Al and 50 nm of Pt were deposited on the back and front of the wafer, respectively. The Pt was patterned into 360 360 lm2 top contacts by optical lithography. A contact annealing at 400 °C was performed in forming gas atmosphere (90% N2 + 10% H2) for 10 min as the last processing step. For this reason the layer sequence was Al/p-Si substrate/SiOx/LaLuO3/ Pt for samples bound to electrical measurements. For microstructural investigations such as HRTEM and GiXRD the films got no additional metal layers of Al or Pt.
⇑ Corresponding author. Tel.: +49 351 260 2912. E-mail address: [email protected] (J. Lehmann). 0167-9317/$ - see front matter Ó 2011 Published by Elsevier B.V. doi:10.1016/j.mee.2011.03.126
3. Results and discussion HRTEM pictures of the unflashed control sample and a sample which underwent FLA at 1200 °C, 20 ms are presented in Fig. 1, together with their respective GiXRD-spectra. For both samples an interfacial silicon oxide layer of around 1 nm is visible between the Si-substrate and the high-k layer. This layer is a consequence
J. Lehmann et al. / Microelectronic Engineering 88 (2011) 1346–1348
1347
temperature during the contact annealing step, the microstructural results should be valid for to the real stack, too. A comparison of the J–V characteristics (Fig. 2) shows no big differences between FLA treated samples and the one without FLA. Measured leakage currents at VG = -1 V were near the measurement limit of some 10 fA, which is corresponding to leakage current densities of 2 1010 A/cm2. Similarly, the width of the C–V hysteresis and flat band voltages (VFB) were for all samples less than 50 mV and around VFB = 0 V, respectively, whereby the variation between different samples was as low as the variation between different devices on one sample. Another evaluation of the measured C–V measurements revealed the results printed in Fig. 3, where the measured maximum capacitance (CMAX) of the C–V curves and the calculated capacitance equivalent oxide thickness (CET) are plotted in closed and open symbols, respectively. The CMAX-values were extracted from the C–V curves in the accumulation regime at 1.5 V, while the given CET-values were calculated from the measured maximum capacitance (CMAX) of the C–V curves by
CET ¼
Fig. 1. HRTEM picture of layer stack (a) without flash (b) after flash with 1200 °C and 20 ms. (c) GiXRD-spectra which show no crystallization of LaLuO3-film after FLA.
of the RCA cleaning process and can be found in all samples with thicknesses of 0.7–1.4 nm. The high-k film itself is still 10 nm thick and remains amorphous after FLA, which can also be seen in the GiXRD-spectra (compare Fig. 1c). Since the real gate stack for electrical measurements got an additional Pt-layer on top of the high-k layer as well as a 400 °C, 10 min forming gas annealing, it might happen that metal interdiffusion occurs, but in experiments on Si and TiN capped systems this effect was found to be very small for annealing temperatures and times of up to 700 °C and 10 min, respectively. Moreover, no crystallization was found under such conditions. For this reasons and because of the even lower
Ae0 eSiO2 C MAX
where A, e0 and eSiO2 ¼ 3; 9 are the area of the capacitor, the vacuum permittivity and the relative permittivity of silicon dioxide, respectively. Therefore, a higher measured capacitance is correlated with a decrease of the CET. At first, the results for 3 ms flash durations with different peak temperatures are going to be discussed (Fig. 3a). As clearly visible from the plotted capacitance and CET-values, the FLA-treatment is able to improve them compared to the unflashed control sample, whose CET-values are in good agreement with formerly reported values for LaLuO3 [8]. Increasing the FLA peak temperatures from 900 to 1100 °C increases the measured capacitances even more, whereby at 1000 °C an optimum could have been reached. This is going to be inspected more closely, soon, within a new series with FLA peak temperatures of up to 1300 °C, currently under preparation. From the dependence on the flash durations (Fig. 3b) it can be concluded that for peak temperatures of 1000 °C short flash durations of 1–3 ms are more beneficial than longer ones such as 20 ms, because no improvement of CET is visible for this sample. A similar effect was found for LaScO3 in Ref. [9], were the authors found a correlation between the improved k-value and the oxygen content of the high-k film. If the same is valid for LaLuO3 has to be shown by further experiments, which are currently carried out. Inspecting the normalized C–V curves of Fig. 4 leads to the observation, that the characteristics of flashed samples have a steeper transition from the accumulation to inversion region. Only some selected C–V characteristics are shown, because the slopes
Fig. 2. J–V curves of devices with (a) different peak temperatures and (b) different flash durations of the FLA.
1348
J. Lehmann et al. / Microelectronic Engineering 88 (2011) 1346–1348
Fig. 3. Areal capacitance and CET plotted as a function of the flash lamp annealing (a) temperature and (b) time. The preheating conditions before the flash were the same with 700 °C, 30 s.
capacitance or CET of the gate stack as well as an improvement in the Dit. The material remains in an amorphous state and keeps its very low leakage current. Acknowledgement This work was supported in part by the Project KZWEI which is funded in line with the technology funding for regional development (ERDF) of the European Union and by funds of the Free State of Saxony. References
Fig. 4. Selection of normalized C–V curves, measured under a frequency of 100 kHz.
are quite similar for all flashed samples. These stepper transitions in flashed samples point to a decreased number of Dit. Corresponding Dit-values for the unflashed and the flashed samples were calculated by Terman’s method and range around 5 and 1 1011 eV1 cm2, respectively [10]. 4. Conclusion It could be shown that a LaLuO3 gate dielectric can benefit from a post deposition flash lamp treatment by an improvement in the
[1] J.M.J. Lopez, E. Durg˘un Özben, M. Roeckerath, U. Littmark, R. Lupták, St. Lenk, M. Luysberg, A. Besmehn, J. Schubert, S. Mantl, Microelectron. Eng. 86 (2009) 1646. [2] M. Roeckerath, T. Heeg, J.M.J. Lopes, J. Schubert, S. Mantl, A. Besmehn, P. Myllymäki, L. Niinstö, Thin Solid Films 517 (2008) 201. [3] C. Radtke, C. Krug, G.V. Soares, I.J.R. Baumvol, J.M.J. Lopez, E. Durg˘un Özben, A. Nichau, J. Schubert, S. Mantl, Electrochem. Solid State 13 (2010) G37. [4] J.J. Gu, Y.Q. Liu, M. Xu, G.K. Celler, R.G. Gordon, P.D. Ye, Appl. Phys. Lett. 97 (2010) 012106. [5] Y. Liu, M. Xu, J. Heo, P.D. Ye, R.G. Gordon, Appl. Phys. Lett. 97 (2010) 162910. [6] W. Skorupa, T. Gebel, R.A. Yankov, S. Paul, W. Lerch, D.F. Downey, E.A. Arevalo, J. Electrochem. Soc. 152 (2005) G436. [7] C.T.M. Kwo, R.D. Braatz, S. Paul, W. Lerch, E.G. Seebauer, J. Appl. Phys. 105 (2009) 063514. [8] J.M.J. Lopez, M. Roeckerath, T. Heeg, E. Rije, J. Schubert, S. Mantl, V.V. Afanase’ev, S. Shamuilia, A. Stesmans, Y. Jia, D.G. Schlom, Appl. Phys. Lett. 89 (2006) 222902. [9] J.M.J. Lopez, U. Littmark, M. Roeckerath, St. Lenk, J. Schubert, S. Mantl, A. Besmehn, J. Appl. Phys. 101 (2007) 104109. [10] E.H. Nicollian, J.R. Brews, MOS Physics and Technology, Wiley Interscience, New York, 1982.