Int. J. Electron. Commun. (AEÜ) 66 (2012) 789–796
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International Journal of Electronics and Communications (AEÜ) journal homepage: www.elsevier.com/locate/aeue
Miniaturized integrated antennas for far-field wireless powering Karim Mohammadpour-Aghdam a,b,∗ , Soheil Radiom a , Reza Faraji-Dana b , Guy A.E. Vandenbosch a , Georges G.E. Gielen a a b
ESAT-Katholieke Universiteit Leuven, Belgium Center of Excellence on Applied Electromagnetic Systems, School of Electrical and Computer Engineering, University of Tehran, Iran
a r t i c l e
i n f o
Article history: Received 9 May 2011 Accepted 15 January 2012 Keywords: Miniaturized antenna Integrated antenna RFID tag Radiation pattern Wireless powering
a b s t r a c t This paper describes a series of high-efficiency miniaturized antennas of different sizes that can be integrated with the same wireless-powered RFID chip. Since this RFID chip has power scavenging capability in different ISM bands, several integrated on-chip and off-chip antennas in the three ISM bands of 900 MHz, 2.4 GHz and 5.8 GHz are designed, including one antenna integrated on chip. All proposed antennas are derived from a new planar antenna structure which can be designed toward arbitrary input impedance within a given area constraint. The measurement results for the presented antennas show a different read range. The resulting read range versus antenna size diagram specifies the best operating frequency band for a given read range and occupied area. Though this diagram depends on the chip’s specifications like the power-on sensitivity and input impedance, it can be generated for any chip. In addition, the measurement results concerning read range and radiation patterns for the proposed antennas are presented and compared with simulation results, showing very good agreement. © 2012 Elsevier GmbH. All rights reserved.
1. Introduction The design of high-performance but electrically small antennas for integration with wireless systems represents one of the most challenging design problems for antenna engineers. As electronic components and devices continue to decrease in size, there is an increasing demand for physically smaller antennas. This requirement opens a new challenge in Radio Frequency IDentification (RFID) systems, which are one of the most rapidly growing segments in industry. The most limiting factor in the cost and size reduction in current RFID systems is the implementation and integration of passive components like a large antenna. Miniaturization of the antennas is therefore the focus of this paper. The target chip used for this exploration was designed by the authors and presented in [1]. It is a far-field wireless-powered RFID tag with monolithically integrated on-chip antennas in standard CMOS technology. The chip actively transmits UWB pulses through an on-chip transmit antenna. Measurements show an operating distance of the RFID tag of 7 cm with these on-chip antennas.
Although an operating distance of 7 cm is state-of-the-art for an RFID tag with on-chip antennas, there are many applications that require a coverage distance in the order of meters. The designed chip therefore has the capability of wire-bond connection with an external off-chip antenna to increase the coverage distance. The simulation results for the designed chip circuitry show that the needed input impedance of the off-antenna at the different frequencies is as shown in Table 1. In this paper several off-chip antennas with integration capability with the designed chip are presented. The different antennas with different sizes explore wireless powering at three ISM bands including 900 MHz, 2.4 GHz, and 5.8 GHz. According to these frequency bands an interesting question is the selection of the operating frequency for a required read range and available area for the tag’s antenna. This paper aims at answering this question by designing and comparing antennas of different sizes with different efficiencies at the three considered ISM bands, leading to the read range versus occupied area diagram for this RFID chip. 2. RFID antenna design challenges
∗ Corresponding author. E-mail addresses:
[email protected],
[email protected],
[email protected],
[email protected] (K. Mohammadpour-Aghdam),
[email protected] (S. Radiom),
[email protected] (R. Faraji-Dana),
[email protected] (G.A.E. Vandenbosch),
[email protected] (G.G.E. Gielen). 1434-8411/$ – see front matter © 2012 Elsevier GmbH. All rights reserved. doi:10.1016/j.aeue.2012.01.009
2.1. Conjugate impedance matching The most important performance characteristic for an RFID tag is the read range – the maximum distance at which the RFID reader can power up the tag and detect the signal from the tag. In the
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Table 1 Input impedance and sensitivity of the chip after considering the additional pads and bondwires on the chip to connect to an off-chip antenna. Specification
Scavenging
Freq. (GHz) Impedance () Sensitivity (dBm)
0.915 15–j505 −12.6
UWB Tx 2.4 2.2–j195 −12.2
5.8 0.65–j82 −11
3.5–6.5 50–j125 –
far field the read range d can be calculated using Friis free-space formula as [2]: d=
4
Pt Gt Gr Smin
(1)
where is the wavelength, Pt is the power transmitted by the reader, Gt is the gain of the transmit antenna, Gr is the gain of the receiving tag antenna, Smin is the minimum threshold power necessary to provide sufficient power to the RFID tag chip, and is the conjugate match factor, CMF, which is the power transmission coefficient given by [2]: =
4R R
c a , 0≤≤1 Zc + Za 2
(2)
where Zc = Rc + jXc is the chip impedance and Za = Ra + jXa is the antenna impedance. is the polarization efficiency which is equal to one when the reader and chip antenna have matching polarizations. When there is a conjugate match between the antenna and the chip, = 1. 2.2. Antenna structure selection Considering the requirement for conjugate matching and low cost production, the impedance behavior of the chip determines the overall structure of the antenna. A new antenna structure optimizable toward an arbitrary input impedance and with a high miniaturization capability is used in this paper to design several onchip and off-chip antennas in the different ISM bands. This structure is shown in Fig. 1 with its equivalent circuit.
This general structure covers most of the reported RFID antennas, see [3–9], and has three main parts: the small feeding loop and the extension part(s) forming a modified dipole. In the structure in Fig. 1, these two parts are combined together by a direct connection, while in other case; they could be connected by mutual coupling. The structure of Fig. 1 permits a nearly independent tuning of the resistance and reactance of the antenna by modifying the tag’s geometrical parameters. Fig. 1(c) shows a simple equivalent circuit model for this geometry, where Zloop is the impedance of the loop and Zdipole is the impedance of the extension parts. The connection is modeled by a transformer representing the mutual coupling M. By changing the geometry of the loop or of the modified dipoles, the impedance of these parts changes and therefore the impedance of the antenna ZAnt can be controlled. The main considerations regarding this antenna structure can be summarized as follows: 1. Both the real and the imaginary part of the input impedance tend to increase by increasing the loop length. 2. Folding of the extension parts introduces a size reduction of the area of the antenna, while causing a drop in gain and bandwidth. Therefore the designer must minimize the number of folds while fitting the antenna in the specified area. 3. The gain is not too sensitive to the loop length which implies that the multi-turn extension parts perform the radiating task and the feeding loop mainly affects the input impedance rather than to participate in the radiation. This is an interesting result for the antenna designer, because one can focus on designing the feeding loop to reach the desired impedance without having to worry about the antenna gain. With the antenna structure of Fig. 1 and considering the above design rules, 1 on-chip and 11 off-chip antenna sets have been designed, fabricated and measured, as will be discussed in the next sections. Fig. 1(b) shows an inductive-shape meandered dipole. Folding the elements in a meander form produces resonances at frequencies much lower than the resonances of a single-element antenna of equal length [10]. As discussed in [9], the important feature provided by the folded structure is that the cancellation of oppositepolarity currents from the various elements generally results in a higher average impedance by introducing a distributed capacitive and inductive reactance along the folded element as the number of folds increases. In this antenna in-phase coupled lines mainly control the radiation resistance and the real part of the input impedance while adjacent opposite-phase lines give storage of electric energy and loss. The overall conductor length affects the inductance of the input impedance. 3. Examples of RFID integrated antennas 3.1. On-chip scavenging/UWB antennas at 5.8/5.5 GHz
Fig. 1. General RFID antenna geometry designable toward an arbitrary input impedance, and its equivalent circuit.
The on-chip antennas for the scavenging circuit at 5.8 GHz and for the UWB transmitter around 5.8 GHz emanate both from the structure shown in Fig. 1(b). A very important issue is the fabrication of the antenna on the silicon substrate in standard CMOS technology where the silicon is quite lossy. The lossy substrate works as a resistive loading on the main current path and forces the current to rapidly go to zero over a small physical length. So the dipole arms are truncated to have a single turn with only 4 folds in the radiating parts with minimum physical length. The same structure but mirrored horizontally is used for the UWB antenna. It is placed between the empty regions of the scavenging antenna in the same metal layer on the CMOS metal layer stack. At the crossing
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Fig. 2. Integrated on-chip scavenging and UWB antennas. The strip width and two strip separation are 15 m and 150 m respectively. The loop length is 2.9 mm for the UWB and 3.2 mm for the scavenging antenna.
Fig. 5. Designed off-chip antenna sets with scavenging at different ISM bands and UWB Tx antenna around 5.5 GHz (antennas are on scale). Fig. 3. Simulation results of return loss versus the frequency for on-chip scavenging and UWB antennas.
point, internal vias have been used down to the layer below to avoid any interception. Fig. 2 shows these two on-chip antennas located inside and on top of each other as they appear on the chip [1]. Results simulated with IE3D [11] for the optimized structures are shown in Figs. 3 and 4. The objective of the optimization was
to maximize the achievable gain for a specified occupied area. The scavenging antenna is the largest area occupying component of the entire chip, slightly less than 3 mm × 1.5 mm. The simulated realized gain is −29.5 dBi at 5.8 GHz for the scavenging antenna and −27 dBi at 5.5 GHz for the UWB antenna. The realized gain is defined as Grlzd = (1 − | |2 )GIEEE , where is the reflection coefficient and GIEEE is the IEEE definition of gain. 3.2. Off-chip scavenging/UWB antennas at different ISM bands
Fig. 4. Simulation results of conjugate match gain and conjugate match factor versus frequency for the on-chip Scavenging and UWB Tx antennas. Conjugate match gain, CMG, is the realized gain of the antenna when conjugate matched to its input impedance while it is modeled with a voltage source [11].
Overall, five off-chip antenna sets at 915 MHz, three antenna sets at 2.45 GHz and three antenna sets at 5.8 GHz with a different maximum area have been designed. Each antenna set has two antennas; the first one is the scavenging antenna at 915 MHz or 2.45 GHz or 5.8 GHz and the second one is a UWB antenna at 5.5 GHz with at least 500 MHz bandwidth. The substrate is Rogers RT/Duroid 5880. These two antennas are folded and merged into each other without electrical contact. Fig. 5(a)–(c) shows the layout of these 11 off-chip antenna sets which are on scale in each part. The size of these antennas is different; therefore the gain is different as well, and consequently the read range for the RFID tag. Table 2 summarizes the sizes and the Zeland IE3D simulation results for the realized gain, impedance bandwidth, gain bandwidth, and read range. As an example, the antenna set no. 2.2 is discussed in detail. The design and optimization of other antenna sets follows the same procedure. This antenna set is shown in Fig. 6 with separated scavenging and UWB antennas, just for clarity; in reality the antennas are interwoven as shown in Fig. 5(b). In each antenna the feeding loop and the extension parts are highlighted. The extension parts in the scavenging antenna form a long loop with some folds to form a multi-turn meander line. In the UWB antenna these parts form two dipoles: one fat and one meandered dipole connected serially to each other to generate a wideband response. With this structure the UWB antenna can be tuned to work within two separate frequency bands or within one wide band. The simulation results for the input impedance, conjugate match gain and conjugate match factor of the scavenging antenna
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Table 2 Simulation and measurement result summary of the proposed scavenging antennas. Freq
Ant. set
Dim. (mm2 )
BW (%)
Realized gain (dBi)
Read range (cm)
Sim
Mea
Sim
Mea
915 MHz
1.1 1.2 1.3 1.4 1.5
14 × 38 13 × 25 12 × 22 11 × 18 10 × 10
0.7 0.7 1.3 1.2 1.2
−2.4 −7.0 −15.1 −15.2 −26.5
−3.1 −7.7 −15.4 −16.1 −28
533 314 124 122 33
495 290 120 111 28
2.45 GHz
2.1 2.2 2.3
7 × 15 7 × 12 7×7
0.7 1.1 1.2
−3 −9.7 −17.8
−3.8 −10.5 −18.7
177 82 32
162 75 29
5.8 GHz
3.1 3.2 3.3 OCA
5×9 4×6 3.5 × 6 1.5 × 3
0.9 0.7 0.9 –
−2.7 −5.4 −6.0 −30
−4.2 −6.8 −7.2 −28.2
67 50 46 6
57 42 40 7
are shown in Fig. 7. The antenna has an optimal return loss better than 20 dB and an impedance bandwidth of BWIMP = 26 MHz = 1.1%. 4. Fabrication and measurement results 4.1. Fabrication The RFID tag with the on-chip antenna set has been implemented in a UMC 0.18 m CMOS process. The chip microphotograph, which occupies 1.5 mm × 3 mm, is shown in Fig. 8. The active circuitry in the center is very small compared to the area of the two on-chip antennas and its visibility is blocked by the upper layers. All other presented off-chip antenna sets have been fabricated on a Rogers RT/Duroid 5880 substrate with a relative permittivity of 2.2 and a thickness of 0.78 mm. Fig. 9 shows all constructed antennas before the mounting of the RFID chip, with the correct scaling compared to each other. For the measurements, one RFID chip is mounted on the specified area of each constructed antenna and the ports of the scavenging circuitry are wire-bonded to the input ports of the scavenging antenna. In order to measure the read range and the radiation patterns discussed in the next section, it is necessary to
Fig. 7. Simulation results for the scavenging antenna of set no. 2.2.
reach the DC voltage output of the scavenging circuit. To that purpose, the DC output is temporarily wire-bonded to the terminals of the UWB antenna and two long external wires are soldered to these terminals, as shown in Fig. 10 for antenna set no. 1.2.
Fig. 6. Scavenging (at 2.45 GHz) and UWB (at 5.5 GHz) antennas of set no. 2.2. The strip width and parallel strip separation are 0.18 mm and 0.25 mm respectively. The loop length is 25.5 mm for the UWB and 7.5 mm for the scavenging antenna.
Fig. 8. Die microphotograph of the RFID tag and two on-chip antennas for RF energy scavenging and UWB transmission.
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Fig. 12. Output DC voltage of the scavenging circuit versus the transmit power at a fix frequency of 915 MHz for the antenna set no. 1.4 with 100 cm antenna separation from the reader.
Fig. 9. Picture of the constructed off-chip antenna sets.
Fig. 10. The constructed antenna set no. 1.2 with mounted RFID chip. The strip width and parallel strip separation are 0.42 mm and 0.52 mm respectively. The loop length is 81.5 mm for the scavenging and 3.4 mm for the UWB antenna. The overall dimension is 13 mm × 25 mm.
4.2. Measurements
far-field region of the horn antenna. The DC voltage at the output of the rectifier circuit, which was wire-bonded to the terminals of the UWB antenna, was monitored with a digital voltmeter. Fig. 12 shows the measurement results of the output DC voltage versus the transmit power for the antenna no. 1.4. For this graph, the tag was fixed at 100 cm away from the Tx horn antenna and the Tx output EIRP was increased from 20 dBm to 40 dBm at 915 MHz while the DC voltage on the output of the scavenging circuit was recorded. As shown, for the power-on edge point of the chip, that is around 1.8 V, the required Tx power is +35.1 dBm. Therefore the exact read range for a power of +36 dBm, can be calculated to be 111 cm, as shown in Table 2. The same procedure is used for all antennas to fill Table 2. In this table Eq. (2) is used to extract the realized gain of the antenna from the measured read range. The maximum deviation between measured and simulated read range is smaller than 7%, except for antenna no. 1.5 where it is around 15%. This big value is due to the low gain of this antenna so that an error of a few centimeters in the read range measurement causes a large deviation. From the measured values of the read range, the estimated values for the antenna gain can be derived, as shown in Table 2. These measurements overall prove that the impedance and gain behavior of the constructed antennas are in good agreement with the simulations.
4.2.1. Read range measurement The most important tag characteristic is the read range. In order to measure the read range of each antenna, a measurement setup as shown in Fig. 11 was installed in an anechoic chamber. A horn antenna with a signal generator and a power amplifier mimic the tag reader by radiating the required RF energy to the tag. The RFID chip with scavenging antenna is placed on a wooden holder in the
4.2.2. Radiation pattern measurement The radiation patterns of the proposed on-chip and off-chip antennas were measured with an in-house developed wooden setup. This setup has a manually controlled positioner with 5◦ resolution. The chip/antenna PCB was installed on this holder and the whole structure was placed in the far-field region of the Tx antenna that was used to irradiate the tag. While rotating the tag antenna the level of the transmit power was changed to produce a fixed DC voltage of 0.2 V on the scavenging output and the required power was recorded as a relative value for each angle. Based on this setup the radiation patterns have been measured. Fig. 13 shows a
Fig. 11. Measurement setup for wireless powering.
Fig. 13. Measured radiation pattern of the on-chip scavenging antenna in comparison with the simulation at 5.8 GHz.
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radiation pattern of the small antennas. This is a consequence of their huge size in comparison with the antenna size, and the fact that they would have to be placed in the near-field region. 5. Discussion
Fig. 14. Measured radiation pattern of the scavenging antenna from set no. 1.4 in comparison with the simulation at 915 MHz.
comparison of the measured and simulated patterns for the presented on-chip antenna at 5.8 GHz in the E (XZ) and H (YZ)-planes. It should be mentioned that the main problem in miniaturized antenna measurement is the size and effect of the connector, RF probe or detector which must be placed near the antenna to feed it. But in our case the internal detector of the chip is used to detect the absorbed RF power by the antenna. As seen in Fig. 13, there is a very good agreement between the simulation and measurement results. The effect of the holder PCB and the tracks and pins on the PCB was intended in the simulation. These results are similar to the radiation of a single dipole for at least half of the full azimuth range (270 ± 90◦ ). For other angles, especially for the angles 30◦ and 150◦ , the effect of the PCB holder and the wooden positioner which has been used to stick the on-chip antenna and the microstrip tracks on the holding PCB used to connect to the scavenging output, introduce some discrepancy in comparison with a dipole omni-directional pattern. Fig. 14 shows the radiation pattern results for the off-chip scavenging antenna from set 1.4 at 915 MHz. Here, the measured patterns are in better agreement with the simulated ones both in E- and H-plane. It has to be emphasized that the input impedance of the proposed antennas, especially for the on-chip antenna, cannot be measured correctly. Although there are a number of works studying balanced antenna impedance measurements [14] and [15], these methods were not successful in this case; because these methods use components which would affect the input impedance and the
The proposed 11 antenna sets, including five sets at 915 MHz, three sets at 2.45 GHz, and three sets at 5.8 GHz, can be mounted with the designed active RFID chip. Fig. 15 shows the read range of these antennas versus the occupied area of the antennas as determined by the scavenging antenna. We propose to call this read range occupied area graph the “RFID antenna performance diagram” for the given RFID chip. As can be seen, the read range of the RFID system is increased from 7 cm for the on-chip antenna to more than 500 cm with off-chip antennas. As shown in this graph, the designed antenna sets at 915 MHz (antenna sets 1.1 and 1.2) have a better read range while they occupy more area, due to the inverse relation of the free space loss with frequency. On the other hand, despite the larger occupied area by the antenna sets 1.3 and 1.4 in comparison with antenna set 2.1, their read range is smaller. A similar observation can be made when comparing antenna set 1.5 with 2.3 or antenna set 2.3 with 3.1, 3.2 and 3.3. This observation leads to the following conclusion: when miniaturizing antennas for RFID applications, due to the losses and drop in realized gain (and therefore the read range), there is a minimum antenna area below which it is better to move to a higher frequency (ISM band) to have a smaller antenna with a better read range. This turning point depends on the chip sensitivity, the frequency band and, of course, the designer’s ability in miniaturization antennas. According to this conclusion and considering the performance diagram of Fig. 15, four separate regions can be defined. These regions allow the antenna designer to choose the best operation frequency band for the RFID chip in order to maximize the read range while minimizing the antenna occupied area. These regions are separated in the occupied area axis in Fig. 15. The first region starts from 5 mm2 (i.e., the chip area) till 70 mm2 (6 × 12) and is named as the 5.8 GHz region. In this region, the maximum feasible read range is around 70 cm and the frequency of 5.8 GHz has the better coverage. The second region is from 70 mm2 to 250 mm2 (12 × 22), and is named as the 2.45 GHz region. In this region the maximum coverable read range is around 200 cm. The third region is from 250 mm2 till 600 mm2 and labeled as the 915 MHz region
Fig. 15. Performance diagram (read range versus antenna occupied area) for the presented off-chip antennas.
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Acknowledgment The authors would like to acknowledge the financial support of the Flemish IWT under the Pinballs SBO project. References
Fig. 16. The read range versus ka for the proposed antennas.
and provides a maximum read range of 600 cm. As mentioned, for each region there is a maximum read range that cannot be exceeded due to the omni-directional coverage requirement on the RFID antenna, limiting the antenna gain. The non-obtainable area is labeled as the impractical region and is also shown in Fig. 15. In this region, a hypothetical small antenna has to realize a gain of more than +3 dBi. This is very hard to accomplish. Small antennas in practice have a directivity close to 1.5 or 1.7 dBi [13]. This figure implies that although it is possible to have several RFID antennas in each region with different operating frequency, the better read range is reached with antennas whose operating frequency matches the specified area label. It has to be noted that the above results are derived from the proposed antennas and, in general, are affected by the RFID chip sensitivity and input impedance. In fact, a different graph can be generated for every chip with known sensitivity and input impedance. Qualitatively though, the graphs will be similar. Another remark is the little kink in the curve of the 915 MHz antennas, which is because antenna sets 1.3 and 1.4 have the same gain and read range, but the antenna set 1.3 has more occupied area due to blank region which was left for the UWB antenna. Fig. 16 shows the read range versus electrical size of the proposed antennas. As seen, the electrical size of the proposed antennas for 915 MHz is smaller than the antennas for 5.8 GHz. This verifies the conclusion of Fig. 15 regarding the better performance of lower bond antennas during the miniaturization for RFID applications. 6. Conclusion This paper has presented a range of integrated antennas for a wireless-powered UWB RFID tag. Several off-chip antenna sets, including five sets at 915 MHz, three sets at 2.45 GHz, and also three sets at 5.8 GHz, plus one on-chip antenna at 5.8 GHz, have been designed, constructed, and measured. All these antennas are impedance matched to the RF scavenging circuit, but they have a different size and shape and of course a different read range. This provides many degrees of freedom to fit the tag to a large variety of RFID applications. All the antennas have a similar structure, derived from the same basic antenna topology. The read range and the gain of the presented antennas have been measured and compared with simulations. It has been observed that with the proposed antennas, the read range of the same RFID tag can be increased from 7 cm for the on-chip antenna to more than 500 cm with the off-chip antennas. A “Read Range-Occupied Area” diagram has been presented, which is specific for this RFID chip. This diagram shows the maximum achievable read range versus the specified maximum area for the antenna in the three available ISM bands. In addition, the radiation pattern of the presented antennas integrated with the RFID chip has been measured and compared with simulations, showing good agreement.
[1] Radiom S, Baghayi-Nejad M, Mohammadpour-Aghdam K, Vandenbosch G, Zheng L, Gielen G. Far-field on-chip antennas monolithically integrated in a wireless-powered 5.8 GHz downlink/UWB uplink RFID tag in 0.18 m Standard CMOS. IEEE J Solid-State Circuits 2010;45(9):1746–58. [2] Seshagiri Rao KV, Nikitin PV, Lam SF. Antenna design for UHF RFID tags: a review and a practical application. IEEE Trans Antennas Propag 2005;53(12):3870–6. [3] Son HW, Pyo CS. Design of RFID tag antennas using an inductively coupled feed. Electron Lett 2005;41(18):994–6. [4] Basat S, Bhattacharya S, Rida A, Johnston S, Yang L, Tentzeris MM, et al. Fabrication and assembly of a novel high-efficiency UHF RFID tag on flexible LCP substrate. In: Proceedings of Electronic Components and Technology. 2006. p. 1352–5. [5] Tikhov Y, Kim Y, Min YH. Compact low cost antenna for passive RFID transponder. In: Proceedings of IEEE Antennas and Propagation Symposium. 2006. p. 1015–8. [6] Jang H, Lee B. UHF-band inductively coupled RFID antenna with near-isotropic radar cross section Patterns. In: Proceedings of IEEE Antennas and Propagation Symposium. 2007. p. 1209–12. [7] Nikitin PV, Rao KV, Lazar S. An overview of near field UHF RFID. In: Proceedings of IEEE International Conference on RFID. 2007. p. 167–73. [8] Marrocco G. The art of UHF RFID antenna design: impedance matching and size-reduction techniques. IEEE Antennas Propag Mag 2008;50(1):66–79. [9] Warnagiris TJ, Minardo TJ. Performance of a meandered line as electrically small transmitting antenna. IEEE Trans Antennas Propag 1998;46(12):1797–801. [10] Rashed J, Tai C-T. A new class of resonant antennas. IEEE Trans Antennas Propag 1991;39:1428–30. [11] Zeland IE3D user manual, www.zeland.com. [13] Gustafsson M, Sohl C, Kristensson G. Illustration on new physical bounds on linearly polarized antennas. IEEE Trans Antennas Propag 2009;57(5):1319–27. [14] Palmer KD, Rooyen MWV. Simple broadband measurements of balanced loads using a network analyzer. IEEE Trans Antennas Propag 2006;55:266–72. [15] Meys R, Janssens F. Measuring the impedance of balanced antennas by an Sparameter method. IEEE Antennas Propag Mag 1998;40:62–5. Karim Mohammadpour-Aghdam received his B.S. and M.S. degrees in Electrical Engineering from Sharif University of Technology and University of Tehran, Tehran, Iran, in 2001 and 2003, respectively. From 2003 to 2006, he was a research assistant with antenna type approval laboratory at University of Tehran, where he started his Ph.D. in 2006. In January 2009, he was admitted as a joint Ph.D. student at Katholieke Universiteit Leuven, Belgium. For 11 months, he was with Interuniversity Microelectronics Center (IMEC), Leuven, Belgium working on accurate measurement solutions for 60 GHz communication systems. His general research interests include modeling and simulation of wideband antennas, miniaturized integrated antennas, theoretical bounds on small antennas, and modeling and optimization of microwave passive devices. Soheil Radiom received the M.S. degree in electrical engineering from Ferdowsi University, Mashad, Iran, in 2006. He is currently working toward the Ph.D. in electronics and telecommunications at MICAS-ESAT, Katholieke Universiteit Leuven, Leuven, Belgium. During his graduate work, he focused on current-steering DAC converters as well as CT-DSM ADCs. His doctoral work is focused on the design of integrated on-chip antennas and ultralowpower low-voltage analog circuits for sensor interfaces in RFID and wireless sensor networks application. He also works on small UWB antennas and their miniaturization techniques. Reza Faraji-Dana received the B.Sc. degree (with honors) from the University of Tehran, Tehran, Iran, in 1986 and the M.A.Sc. and Ph.D. degrees from the University of Waterloo, Waterloo, ON, Canada, in 1989 and 1993, respectively, all in electrical engineering. He was a Postdoctoral Fellow with the University of Waterloo for one year. In 1994, he joined the School of Electrical and Computer Engineering, University of Tehran, where he is currently a Professor. He has been engaged in several academic and executive responsibilities, among which was his deanship of the Faculty of Engineering for more than four years, up until summer 2002, when he was elected as the University President by the university council. He was
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the President of the University of Tehran until December 2005. He is the author of several technical papers published in reputable international journals and refereed conference proceedings. He received the Institution of Electrical Engineers Marconi Premium Award in 1995. Prof. Faraji-Dana has been the Chairman of the IEEE-Iran Section from 2007 till 2009. He is now an associate member of Iran Academy of Science. Guy A.E. Vandenbosch was born in Sint-Niklaas, Belgium, on May 4, 1962. He received the M.S. and Ph.D. degrees in Electrical Engineering from the Katholieke Universiteit Leuven, Belgium, in 1985 and 1991, respectively. From 1991 to 1993, he held a postdoctoral research position at the K.U. Leuven. Since 1993, he has been a Lecturer, and since 2005, a Full Professor at this university. His research interests are in the area of electromagnetic theory, computational electromagnetics, planar antennas and circuits, electromagnetic radiation, electromagnetic compatibility, and bio-electromagnetics. Guy Vandenbosch has been a member of the “Management Committees” of the consecutive European COST actions on antennas since 1993, where he is leading the working group on modeling and software for antennas. Within the ACE Network of Excellence of the EU (2004–2007), he was a member of the Executive Board and coordinated the activity on the creation of a European antenna software platform. In the period 1999–2004, he was vice-chairman, and in the period 2005–2009 secretary of the IEEE Benelux Chapter on Antennas en Propagation. Currently he holds the position of chairman of this Chapter. In the period 2002–2004 he was secretary of the IEEE Benelux Chapter on EMC.
Georges G.E. Gielen received the M.Sc. and Ph.D. degrees in electrical engineering from the Katholieke Universiteit Leuven, Leuven, Belgium, in 1986 and 1990, respectively. In 1990, he was appointed as a Postdoctoral Research Assistant and Visiting Lecturer with the Department of Electrical Engineering and Computer Science, University of California, Berkeley. From 1991 to 1993, he was a Postdoctoral Research Assistant with the Belgian National Fund of Scientific Research, ESAT Laboratory, Katholieke Universiteit Leuven. In 1993, he was appointed an Assistant Professor with the Katholieke Universiteit Leuven, where he was promoted to Full Professor in 2000. He is coordinator or partner of several (industrial) research projects in this area, including several European projects (EU, MEDEA, ESA). He has authored or coauthored five books and more than 300 papers in edited books, international journals and conference proceedings. He regularly is a member of the Program Committees of international conferences (e.g., DAC, ICCAD, ISCAS, DATE, and CICC), and served as General Chair of the DATE Conference in 2006 and of the ICCAD Conference in 2007. He serves regularly as member of editorial boards of international journals such as Analog Integrated Circuits and Signal Processing and Integration. His research interests are in the design of analog and mixed-signal integrated circuits, and especially in analog and mixedsignal CAD tools and design automation (modeling, simulation and symbolic analysis, analog synthesis, analog layout generation, and analog and mixed-signal testing).