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CURRENT TOPICS
Minimum Drag S h a p e s . - - T h r e e Air Force Scientists of the Aeronautical Research Laboratories at WrightPatterson AFB, O...
Minimum Drag S h a p e s . - - T h r e e Air Force Scientists of the Aeronautical Research Laboratories at WrightPatterson AFB, Ohio have developed a new way to compute minimum drag shapes for use in the design of supersonic aircraft and missiles. Determination of inlet shapes and fuselages for supersonic vehicles has been extremely difficult. A necessary mathematical correlation between a body's change in contour and its resultant change in pressure distribution at supersonic speeds, must be established. It is hard to relate the pressure distribution mathematically to the shape of a body that is yet undetermined. Previous research by Dr. Karl G. Guderley of ARL, on a related problem, supersonic thrust nozzles, led to a system of ordinary differential equations which were solved by a numerical method. Recent research by G. V. Rao determined that because of special conditions which apply to supersonic thrust nozzles, these equations are solvable in a closed form. This approach was extended to actual supersonic flow which is affected by friction and compression. A remarkable simplification was achieved. Also simplified was the problem of best nose and inlet shapes. The resulting method does not lead to a complete solution. The true optimum body shapes have blunt noses; modifications in the methods are necessary to take account of this fact. A R L Technical Report 62-342 gives, besides the underlying theory, a catalogue of best nose and inlet shapes over a wide range of M a c h numbers and values of the thickness ratio. Assumptions made are close enough to technical reality so that results are directly applicable for engineering considerations.
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Automatic M e m o r y C o r e Tester. - - T h e development of the Model 2045A Automatic Memory Core Tester, designed to analyze miniature ferrite memory cores with switching speeds of up to 100 nanoseconds, has been announced by Computer Instrumentation Corporation, Cherry Hill, N . J . The tester incorporates a complete system of stabilized, programmed drive current pulses to excite the memory core, and a core output signal analysis system to distinguish acceptable cores from reject cores based on signal response and switching time. Front panel electro-mechanical counters record complete test results including total rejected cores, total accepted cores, and the several causes of core rejection. Characterized by very fast transistor drive circuitry, precise voltage discriminators, wideband core signal analysis circuits and a f0-nanosecond strobe pulse width, the Model 2045A has the ability to test the newer high speed memory cores and partial switching cores, in addition to cores switching in the 1 to 4 ttsec range. Current pulses in the Model 2045A are continuously variable from 60 ma to 1.25 amperes and have a voltage amplitude of 55 volts maximum. Both rise and fall time are linear and can be adjusted independently from 50 nonoseconds to 3 #sec. Duty cycle is 75 per cent m a x i m u m into a 50-ohm load and source impedance is 3000 ohms minimum. Each current pulse driver in the system is driven by its own independently variable width and delay generator. Pulse width varies from 100 nanoseconds to 10 #sec and pulse delay ranges from 0 to 10/~sec. In operation, the Model 2045A develops a periodically repeated 8-step basic pulse program which has been selected for the particular type memory or switch core under test.