Mitigation of potential-induced degradation (PID) based on anti-reflection coating (ARC) structures of PERC solar cells

Mitigation of potential-induced degradation (PID) based on anti-reflection coating (ARC) structures of PERC solar cells

Microelectronics Reliability xxx (xxxx) xxxx Contents lists available at ScienceDirect Microelectronics Reliability journal homepage: www.elsevier.c...

1MB Sizes 0 Downloads 12 Views

Microelectronics Reliability xxx (xxxx) xxxx

Contents lists available at ScienceDirect

Microelectronics Reliability journal homepage: www.elsevier.com/locate/microrel

Mitigation of potential-induced degradation (PID) based on anti-reflection coating (ARC) structures of PERC solar cells ⁎

Kyoung-suk Oha, Soohyun Baeb, Kyung-jin Leed, Donghwan Kimb,c, , Sung-il Chana,



a

New & Renewable Energy Research Center, Korea Electronics Technology Institute, 25, Saenari-ro, Bundang-gu, Seongnam-si, Gyeonggi-do 13509, South Korea Department of Materials Science and Engineering, Korea University, 145, Anam-ro, Seongbuk-gu, Seoul 02841, South Korea c KU-KIST Green School Graduate School of Energy and Environment, 145, Anam-ro, Seongbuk-gu, Seoul 02841, South Korea d Government Policy Coordination, Prime Minister's Secretariat, 261, Dasom-ro, Sejong-si 30107, South Korea b

A B S T R A C T

Most of solar power plants use high efficiency solar cell modules using PERC solar cells. Recently, Potential-induced degradation (PID) has been reported in which leakage current occurs due to voltage difference due to grounding, and efficiency and power are reduced within several years. In this work, we tried to change the structure of Anti-reflection coating (ARC) layer in order to mitigate PID in cell-level PERC solar cell. The ARC structure without SiO2, the structure with SiO2 on the surface, and the structure with SiO2 on the bottom are compared, and SiO2 must be located between SiNx and P-N junction to mitigate PID. In addition, PID phenomena occurring in PERC cells were tested for 96 h at 60 °C and 1000 V and used an improved method over the cell-level test method based on the TS IEC 628041 standard. Characteristics of PID phenomenon in solar cell were analysed by light I-V, dark I-V and electroluminescence. As a result, SiO2 must be between SiNx and P-N junctions to mitigate the PID. The PERC solar cell PID test using structural studies has mitigated PID by reducing efficiency by 0.04%, output power by 0.001 W, and shunt resistance by 11.77 Ω.

1. Introduction Some of the most important requirements of photovoltaic power plants based on photovoltaic (PV) technology are low maintenance costs and a long lifespan of more than 30 years. However, owing to various decomposition mechanisms, the solar efficiency decreases or the solar cell modules are destroyed. In 2002, it was first discovered that the humidity penetration into PV modules where high voltage is applied causes leakage current. In 2002, it was first discovered that such modules have a wet leakage current when a high voltage is applied [1]. In 2010, the potential-induced degradation (PID) of crystalline silicon solar cells was reported to be one of the major degradation mechanisms [2]. The PID phenomenon of a p-type crystalline silicon solar cell module has received significant attention because it involves a serious initial power loss. For this reason, as the solar power generation increases, solar modules are connected in-series to generate high voltage and power. However, solar panels can be exposed to high-voltage stresses of up to several hundred volts between the grounded module frame and the solar cell. Frequent high-voltage stresses cause a power dissipation in the module, which is a performance degradation called PID [2–5]. Most of built PV modules are based on p-type crystalline silicon solar cells, although various studies regarding PID are underway with a focus on modules such as p-type silicon solar cells and backsurface (BSF) solar cells. In 2014, researches regarding the PID



mechanism of p-type solar cells showed that Na-ion decay from silicon stacking faults causes a reduction in the shunt resistance after PID testing [6–10]. Various efforts have been made at the cell and module levels to reduce or minimize the PID. SiNx films as anti-reflective coatings of solar cells have been modified to reduce the loss of shunt resistance [11]. High-volume resistive encapsulates or other types of polymers such as polyethylene or ionomers are used instead of conventional ethylene vinyl acetate (EVA) to improve/reduce/avoid/prevent something [12,13]. Chemically modified cover glasses are used for module fabrication [14]. Choosing the proper earth pole in a PV system is also one possible solution to PID. Most PV modules used in recently constructed solar power plants are based on PERC solar cells. However, the PID phenomenon is still ongoing, and efforts to mitigate it are continuing. In addition, only a PID test method based on the TS IEC 62804-1 standard is being implemented to modify a module and ensure its reliability. However, such a method cannot be free from the PID phenomenon unless it is prevented from cell-based solar cells. In this study, we tested the conventional PID test method based on a c-Si solar cell using an improved method. The PID phenomenon varies depending on the structure of the anti-reflection coating (ARC) of a highly efficient PERC solar cell and the proposed ARC structures that can mitigate the PID.

Corresponding author. E-mail address: [email protected] (S.-i. Chan).

https://doi.org/10.1016/j.microrel.2019.113462 Received 15 May 2019; Received in revised form 19 July 2019; Accepted 21 July 2019 0026-2714/ © 2019 Published by Elsevier Ltd.

Please cite this article as: Kyoung-suk Oh, et al., Microelectronics Reliability, https://doi.org/10.1016/j.microrel.2019.113462

Microelectronics Reliability xxx (xxxx) xxxx

K.-s. Oh, et al.

Fig. 1. Conventional cell level PID test method.

Fig. 2. Improved cell level PID test method.

Fig. 3. I-V curve of SiO2-free ARC-layer structure PERC solar cells (a) Light I-V curve (b) Dark I-V curve.

experiment, a PERC solar cell with three types of ARC structure was applied ten times or more. There are many types of solar cell deterioration, and several different visual test standards for warranty. The TS IEC 62804-1 specifications are widely used to test the PID phenomenon. However, this test condition only covers solar cell modules exclusively, while cell-based solar cells were left behind. Without considering the PID in a unit cell, the PID phenomenon still occurs in the solar cell module, and shortages such as a poor stability, reliability, and performance drop are obvious. Fig. 1 shows a conventional PID test method of c-Si-based technology. Fraunhofer CSP also examined in using these methods. The temperature of the solar cells is constantly controlled using a hot plate. An encapsulated foil layer and glass, conventionally used for fabricating PV modules, are stacked on top of the solar cell. An Al chuck and Al block are located at the bottom and top of the test structure, respectively, to apply a high voltage. This method is a conventional cell-level PID test method [15]. However, this method is not suitable for the PID

Table 1 Efficiency parameters of SiO2-free ARC-layer structure PERC solar cells. Sample

Voc (V)

Initial 96 h PID

0.658 0.648

Jsc (mA/cm2)

38.96 38.48

F·F (%)

Eff. (%)

Pmax (W)

Rsh (ohm)

78.30 62.70

20.08 15.64

0.502 0.391

71.43 3.506

2. Experimental In this study, a PID test was conducted by constructing a PERC solar cell with three types of ARC structure. The first type is a PERC solar cell with an ARC structure composed using a SiNx single thin film without a SiO2 thin film. The second is a PERC solar cell with an ARC structure in which a SiO2 thin film is formed on top of a SiNx thin film. Finally, the third is a SiO2 thin film used in an ARC structure PERC solar cell formed on the bottom of a SiNx thin film. To verify the reproducibility of the 2

Microelectronics Reliability xxx (xxxx) xxxx

K.-s. Oh, et al.

Fig. 4. SiO2-free ARC-layer structure PERC solar cells EL measurement (a) Initial (b) 96 h PID tested.

Fig. 5. I-V curve of Upper SiO2 ARC-layer structure PERC solar cells (a) Light I-V curve (b) Dark I-V curve.

test in PERC solar cells, and the test was carried out by changing the material and structure. Fig. 2 shows an improved PID test method of a PERC solar cell. First, Al was converted into Cu to improve the electrical and thermal conductivities. Second, a vacuum is used to increase the contact rate between the PERC solar cell back electrode and the Cu chuck. Third, by increasing the weight of the metal block on the glass, the pressure is increased to create a lamination-like environment. It has been reported that the amount of degradation is related to the pressure

Table 2 Efficiency parameters of Upper SiO2 ARC-layer structure PERC solar cells. Sample

Voc (V)

Initial 96 h PID

0.661 0.642

Jsc (mA/cm2) 39.20 38.12

F·F (%)

Eff. (%)

Pmax (W)

Rsh (ohm)

76.70 56.20

19.88 13.76

0.497 0.344

80.00 2.019

Fig. 6. Upper SiO2 ARC-layer structure PERC solar cells EL measurement (a) Initial (b) 96 h PID tested. 3

Microelectronics Reliability xxx (xxxx) xxxx

K.-s. Oh, et al.

Fig. 7. I-V curve of Lower SiO2 ARC-layer structure PERC solar cells (a) Light I-V curve (b) Dark I-V curve.

3. Results and discussion

Table 3 Efficiency parameters of Lower SiO2 ARC-layer structure PERC solar cells. Sample

Voc (V)

Initial 96 h PID

0.629 0.627

Jsc (mA/cm2) 36.84 36.48

F·F (%)

Eff. (%)

Pmax (W)

Rsh (ohm)

77.50 78.30

17.96 17.92

0.449 0.448

89.29 77.52

In a PERC solar cell, the PID phenomenon is due to the Na ions being diffused into a solar cell to form a stacking fault defect [18]. The maximum power (Pmax), efficiency, and shunt resistance (Rsh) are mainly degraded during a cell unit test based on the IEC 62804 standard. From the literature, the interpretation of the PID is studied with dark current-voltage characteristics using Rsh and dark leakage current (Jo). [19] As shown in Eq. (3), the basic working principle of the solar cell is governed by the diode equation. Rsh and Jo affect the fill factor of the solar cell, and Pmax and Efficiency decrease, as shown in Eqs. (1), (2).

of the test structure. Although the degradation rate was not compared with a different pressure in this study, we found that 4 kg of the Cu electrode block was sufficient for the PID test [16]. The temperature of each solar cell is controlled using a hot plate at 60 °C. The test was conducted in air, and the level of humidity was not controlled. The humidity used in the PID test method from Fraunhofer CSP [17] was also not controlled, and it is well known that the humidity is simply an acceleration factor for the PID [2–4]. The (+) positive electrode is connected to the front surface of the glass, and the (−) negative electrode is connected to the rear side of the 25 cm2 area of a mechanical diced solar cell. The area of the (+) electrode used in the PID test is 16 cm2. A 1000-V bias is applied between the front and rear electrodes for 96 h using a high-voltage source measurement unit (Keithley 2410). To evaluate the electrical properties, a light I-V analysis (using a solar simulator, Wacom Electric Co., Ltd.) and a dark I-V analysis (using a 2401 source measurement unit, Keithley Instruments) were conducted, and the electroluminescence (EL) was measured. We confirmed that these improved structures are effective.

Pmax = Isc × Voc × FF

(1)

Efficiency = Jsc × Voc × FF

(2)

J = J01 exp ⎧ ⎨ ⎩

q (V − JRs ) ⎫ q (V − JRs ) ⎫ V − JRs + + J02 exp ⎧ ⎬ ⎬ ⎨ 2kT Rsh kT ⎭ ⎭ ⎩

(3)

Pmax and the efficiency of solar cells are defined as Eq (1) , where Isc denotes the short-circuit current, Voc the open-circuit voltage, Rs the series resistance, FF the fill factor, and Jsc the short-circuit current density. Therefore, to compare the amount of degradation by the PID, the dark current-voltage characteristic was measured as well as light current-voltage characteristic. In this study, we found that the PID phenomena can be addressed through a change in the ARC structure in a PERC solar cell. We designed three different cases for a 96 h PID test: 1) An ARC-layer PERC solar cell

Fig. 8. Lower SiO2 ARC-layer structure PERC solar cells EL measurement (a) Initial (b) 96 h PID tested. 4

Microelectronics Reliability xxx (xxxx) xxxx

K.-s. Oh, et al.

without a SiO2 thin film (SiO2-Free ARC-layer structure PERC solar cells), 2) an ARC-layer PERC solar cell with a SiO2 thin film on top of a SiNx thin film (upper SiO2 ARC-layer PERC solar cells), and 3) ARClayer PERC solar cell with a SiO2 thin film on the bottom of the SiNx thin film (lower SiO2 ARC-layer PERC solar cells). The Pmax, efficiency and Rsh were calculated and investigated as a result of light I-V and dark I-V evaluations through the above Eqs. (1)-(3), and the stability and reliability of the PERC solar cell were determined.

value of Rsh decreased from 89.29 to 77.52 Ω, as indicated in Table 3. Fig. 8 shows the failure of the lower SiO2 ARC-layer PERC solar cells using EL. Fig. 6(a) and (b) shows the initial state and the PID-tested sample for 96 h, respectively. Interestingly, both exhibit clear conditions without any defects for the entire solar cell area of 25 cm2, indicating that the lower SiO2 ARC-layer PERC mitigates the PID phenomenon effectively. In fact, Pmax decreased by 0.001 W, Eff. decreased by 0.04%, and Rsh decreased by 11.77 Ω. Such small drops of these parameters imply that the lower SiO2 ARC-layer PERC solar cells generate a negligible leakage current in a unit cell and can resolve the PID phenomenon eventually. Furthermore, it is expected that the stability and reliability of this structure will be extremely effective [20].

3.1. SiO2-free ARC-layer structure PERC solar cells Fig. 3 shows the electrical properties of a SiO2-free ARC-layer PERC solar cell. Fig. 3(a) shows I-V curve under illumination. In the PID tested a SiO2-free ARC layer PERC solar cell, Voc decreased from 0.658 to 0.648 V, Jsc decreased from 38.96 to 38.47 mA/cm2, and FF decreased from 78.30% to 62.70%. As a result, the conversion efficiency (Eff.) decreased from 20.08% to 15.64%, and the Pmax decreased from 0.502 to 0.391 W. Fig. 3(b) shows a dark I-V measurement, which is represented using a log scale and shows an Rsh with a range of less than 0.6 V. A dark I-V is able to derive the Rsh value through a two-diode equation, which shows a significant decrease from 71.42 to 3.506 Ω. This is shown in Table 1. Fig. 4 shows the defects of the SiO2-Free ARC layer PERC solar cell using EL. Fig. 4(a) shows an initial state, and it can be seen that an entire solar cell with an area of 25 cm2 is clean without defects, although in the case of (b) of Fig. 4, it was found that there is a concentrated defect at the bottom of the area of 16 cm2. In other words, Pmax decreased by 0.111 W, Eff. decreased by 4.44%, and Rsh decreased by 67.92 Ω. As leakage currents are generated even in the unit cell of the SiO2-free ARC-layer structure, modules that consists of series of those cells are deteriorated by the PID phenomenon, leading to poor stability and reliability [20].

4. Conclusion The purpose of this study was to investigate how PID can be mitigated by modifying the ARC structure in PERC solar cells. PERC solar cells of three types of ARC structure were subjected to a PID test for 96 h at 60 °C and 1000 V conditions using the improved test method based on the TS IEC 62804–1 standard. The factors to detect the PID occurrence were identified as Eff., Pmax, and Rsh, and an image analysis was conducted using the EL. As reported, PID degradation in the cell unit is the same in the module, and thus predictions of the stability and reliability are possible [20]. The SiO2-Free ARC-layer PERC solar cell decreased Eff. by 4.44%, Pmax by 0.111 W, and Rsh by 67.92 Ω. The ARC-layer composed of a single SiNx film is not prevented from experiencing PID. The upper SiO2 ARC-layer PERC solar cell further reduced Eff. to 6.12%, Pmax to 0.153 W, and Rsh to 77.98 Ω. In that, the ARC-layer structure in which SiO2 exists on the surface accelerates the PID further. However, it is noticeable that Eff. of the lower SiO2 ARClayer PERC solar cell samples was reduced by 0.04%, Pmax by 0.001 W, and Rsh by 11.77 Ω, respectively. That is, the ARC structure in which SiO2 exists between the SiNx and P-N junction showed the lowest reduction rate when a 96-h PID test was conducted, and this structure can effectively mitigate the PID while delivering an outstanding stability and reliability.

3.2. Upper SiO2 ARC-layer structure PERC solar cells Fig. 5 shows the electrical properties of the upper SiO2 ARC-layer PERC solar cell. Fig. 5(a) shows the I-V curve under illumination. In the 96-h PID tested PERC solar cell, Voc decreased from 0.661 to 0.642 V, Jsc decreased from 39.20 to 38.12 mA/cm2, and F·F decreased from 76.70% to 56.20%. As a result, Eff. decreased from 19.88% to 13.76% and Pmax decreased from 0.497 to 0.344 W. Fig. 5(b) shows the dark I-V measurement, as represented by the log scale, and demonstrates an Rsh with a range of less than 0.6 V. The calculated Rsh is greatly reduced from 80.00 to 2.019 Ω, as shown in Table 2. Fig. 6 shows the failure of the upper SiO2 ARC-layer PERC solar cell using EL. Fig. 6(a) shows the initial state, where it is clear that the entire solar cell of a 25 cm2 area is clean without the presence of defects. Fig. 6(b), the defects are observed in the entire area of the 16 cm2 PID tested, and the defects are concentrated on the upper end. In other words, Pmax decreased by 0.153 W, Eff. decreased by 6.12%, and Rsh decreased by 77.98 Ω. Similar to the SiO2-free ARC-layer structure, since the upper SiO2 ARC-layer structure PERC solar cells also have leakage currents generated in a unit cell, the module with a series of such structures is deteriorated by the PID phenomenon. In addition, it shows a significantly poor stability and reliability, compared to the SiO2-free ARC-layer structure PERC solar cells [20].

Acknowledgements This work was supported by the New & Renewable Energy Core Technology Program of the Korea Institute of Energy Technology Evaluation and Planning (KETEP), with financial resources granted from the Ministry of Trade, Industry & Energy, Republic of Korea (Grant no. 20183010014320). References [1] T.J. McMahon, G.I. Jorgensen, NCPV Program Review Meeting, (2001). [2] S. Pingel, O. Frank, M. Winkler, S. Daryan, T. Geipel, H. Hoehne, J. Berghold, 35th IEEE Photovoltaic Spec. Conf, (2010), pp. 2817–2822. [3] J. Berghold, O. Frank, H. Hoehne, S. Pingel, B. Richardson, M. Winkler, 25th EUPVSEC, (2010), pp. 3753–3759. [4] P. Hacke, K. Terwilliger, R. Smith, S. Glick, J. Pankow, M. Kempe, et al., Photovoltaic Specialists Conference (PVSC), 2011 37th IEEE, (2011). [5] M. Schütze, M. Junghänel, M.B. Koentopp, S. Cwikla, S. Friedrich, J.W. Müller, et al., Photovoltaic Specialists Conference (PVSC), 2011 37th IEEE, (2011). [6] V. Naumann, D. Lausch, A. Graff, M. Werner, S. Swatek, J. Bauer, et al., Phys. Status Solidi Rapid Res. Lett. 7 (5) (2013) 315–318. [7] V. Naumann, D. Lausch, A. Hähnel, J. Bauer, O. Breitenstein, A. Graff, et al., Sol. Energy Mater. Sol. Cells 120 (2014) 383–389. [8] D. Lausch, V. Naumann, O. Breitenstein, J. Bauer, A. Graff, J. Bagdahn, et al., Photovoltaics, IEEE J. 4 (3) (2014) 834–840. [9] B. Ziebarth, M. Mrovec, C. Elsässer, P. Gumbsch, J. Appl. Phys. 116 (9) (2014) 093510. [10] V. Naumann, D. Lausch, A. Hähnel, O. Breitenstein, C. Hagendorf, Phys. Status Solidi C 12 (8) (2015) 1103–1107. [11] K. Mishina, A. Ogishi, K. Ueno, T. Doi, K. Hara, N. Ikeno, et al., Jpn. J. Appl. Phys. 53 (2014) 03CE01. [12] C.G. Reid, S.A. Ferrigan, M. JIF, J.T. Woods, 28th EUPVSEC, (2013), pp. 3340–3346. [13] J. Kapur, K.M. Stika, C.S. Westphal, J.L. Norwood, B. Hamzavytehrany, IEEE J.

3.3. Lower SiO2 ARC-layer PERC solar cells Fig. 7 shows the electrical characteristics of a lower SiO2 ARC-layer PERC solar cell. Fig. 7(a) shows the light I-V curve. The PERC solar cells with a 96-h PID showed negligible change in Voc from 0.629 to 0.627 V, Jsc showed a slight change of 36.48 to 36.84 mA/cm2, and F·F slightly increased from 77.50% to 78.30%. As a result, both Eff. and Pmax slightly decreased from 17.96% to 17.92% and from 0.449 to 0.448 W. Fig. 7(b) shows the dark I-V measurement, expressed as a log scale, and Rsh with a curve within the range of less than 0.6 V. The calculated 5

Microelectronics Reliability xxx (xxxx) xxxx

K.-s. Oh, et al.

[17] W. Luo, Y.S. Khoo, et al., Energy Environ. Sci. 10 (2017) 43–68. [18] V. Naumann, et al., Sol. Energy Mater. Sol. Cells 120 (2014) 383. [19] W.W. Oh, S.H. Bae, D.H. Kim, N.C. Park, Microelectron. Reliab. 88–90 (2018) 998–1002. [20] W.W. Oh, B.J. Kim JH, S.H. Bae, K.D. Lee, H.S. Lee, D.H. Kim, S.I. Chan, Microelectron. Reliab. 64 (2016) 646–649.

Photovoltaics 5 (1) (2015) 219–223. [14] M. Kambe, K. Hara, K. Mitarai, S. Takeda, M. Fukawa, N. Ishimaru, et al., Photovoltaic Specialist Conference (PVSC), 2013 39th IEEE, (2014). [15] D. Lausch, V. Naumann, O. Breitenstein, J. Bauer, A. Graff, J. Bagdahn, C. Hagendorf, IEEE J. Photovoltaics 4 (2014) 834–840. [16] S. Yamaguchi, K. Ohdaira, Sol. Energy 155 (2017) 739–744.

6