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Mobility enhancement by using silk fibroin in F16CuPc organic thin film transistors
Organic Electronics 13 (2012) 3315–3318
Contents lists available at SciVerse ScienceDirect
Organic Electronics journal homepage: www.elsevier.com/locate/orgel
Letter
Mobility enhancement by using silk fibroin in F16CuPc organic thin film transistors Cheng-Lun Tsai, Li-Shiuan Tsai, Jenn-Chang Hwang ⇑ Department of Materials Science and Engineering, National Tsing Hua University, Hsin-Chu City 30043, Taiwan, ROC
a r t i c l e
i n f o
Article history: Received 13 June 2012 Received in revised form 9 October 2012 Accepted 9 October 2012 Available online 25 October 2012 Keywords: OTFT Silk fibroin F16CuPc
a b s t r a c t High performance n-type F16CuPc organic thin-film transistors (OTFTs) were fabricated on polyethylene terephthalate (PET) using silk fibroin as the gate dielectric. The average fieldeffect mobility (lFE) value in the saturation regime is 0.39 cm2 V1 s1 approximately one order of magnitude higher than the reported values in the literature. A typical F16CuPc OTFT exhibits an on/off current ratio of 9.3 102, a low threshold voltage of 0.65 V, and a subthreshold swing value of 730 mV/decade. The enhancement of lFE results from very good crystal quality of F16CuPc on silk fibroin, supported by grazing incidence X-ray diffraction (GIXD) data. Ó 2012 Elsevier B.V. All rights reserved.
1. Introduction Organic thin-film transistors (OTFTs) have attracted much attention in the past decades because of the merits of low cost, large area, and flexibility. One of the drawbacks of OTFTs is poor device performance that is much inferior to inorganic thin-film transistors (TFTs) such as amorphous InGaO3(ZnO)5 (a-IGZO) TFTs [1]. Recently, Wang et al. have reported that silk fibroin is an excellent gate dielectric for p-type pentacene OTFTs with a field-effect mobility (lFE) value of ca. 23 cm2 V1 s1 comparable to or higher than that of a-IGZO TFTs [2,3]. Pentacene is easier to crystallize on silk fibroin than on SiO2 supported by their grazing incident X-ray diffraction (GIXD) data [2]. The crystallized pentacene on silk fibroin plays a primary role in the enhancement of lFE. This inspires us to investigate whether silk fibroin also assists other organic semiconductors to crystallize in favor of higher lFE. Note that the lFE values of n-type OTFTs are usually approximately one order of magnitude lower than those of p-type OTFTs [4]. The enhancement of lFE is important for n-type OTFTs, since the lFE values of p- and n-type
⇑ Corresponding author. E-mail address: [email protected] (J.-C. Hwang). 1566-1199/$ - see front matter Ó 2012 Elsevier B.V. All rights reserved. http://dx.doi.org/10.1016/j.orgel.2012.10.007
OTFTs must be comparable for complementary metal– oxide-semiconductor (CMOS) applications. In the present work, we choose n-type F16CuPc to investigate whether silk fibroin may assist F16CuPc to crystallize in favor of higher lFE or not. F16CuPc is a good material to examine the effect of silk fibroin on its crystal quality because of its stability in air [5]. However, it lFE value is very low in the range of 1.04 103–0.08 cm2 V1 s1 [5–9]. The best reported lFE value of 0.08 cm2 V1 s1 was achieved by depositing F16CuPc onto SiO2 at high temperature (125 °C) in order to obtain better crystal quality. Here we report a much higher lFE value of F16CuPc OTFTs with silk fibroin as the gate dielectric. F16CuPc was deposited onto silk fibroin at room temperature. The effect of silk fibroin on the crystal quality of F16CuPc is addressed.
2. Experimental The bottom gate configuration of the F16CuPc OTFT with silk fibroin as the gate dielectric is schematically shown in Fig. 1. The silk fibroin thin film was spin-coated onto the polyethylene terephthalate (PET) substrate patterned with Au gate electrodes using an aqueous solution of silk fibroin. The preparation of the silk fibroin aqueous solution can be found in our previous work [2]. A dipping step is required
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NSS ¼
Fig. 1. Schematic showing the structure of the F16CuPc OTFT with silk fibroin as the gate dielectric.
to obtain a thicker silk fibroin thin film that is important to reduce possible current leakage. The silk fibroin thin film is amorphous [2]. The silk fibroin thin film was determined to be ca. 420 nm thick. A F16CuPc (Sigma–Aldrich) thin layer of 21 nm thick was thermally evaporated onto the silk fibroin thin film at different temperature. The deposition rate was 0.2 Å/sec at a base pressure of 106 torr. The source and drain electrodes were defined by Au in the F16CuPc OTFTs. The channel length and width were 50 lm and 600 lm, respectively. Grazing incidence X-ray diffraction (GIXD) was performed to characterize the crystal quality of F16CuPc using a diffractometer (Rigaku TTRax III) with Cu Ka radiation (k = 1.54 Å). The capacitance versus voltage curve was taken at sweep rate of 0.1 V/s in the quasistatic regime and current–voltage characteristics of OTFTs were taken using Agilent 4155C in ambient air. The surface roughness of the F16CuPc layer was determined to be ca. 1.5 nm by atomic force microscopy (AFM). 3. Results and discussion The optimum performance of F16CuPc OTFT occurs when F16CuPc was thermally deposited at room temperature. A typical F16CuPc OTFT exhibits output characteristics with pinch-off and current saturation (Fig. 2a). The fieldeffect mobility in the saturation regime (lFE,sat) was obtained from the transfer characteristics in Fig. 2b using:
IDS;sat ¼ ðC i lFE W=2LÞðV GS V th Þ2
ð1Þ
where IDS,sat, Ci, VGS, Vth, W and L denote the drain current in the saturation regime, gate capacitance, gate voltage, threshold gate voltage, channel width and length, respectively. A metal–insulator–metal (MIM) structure with silk fibroin as the insulator was fabricated next to each F16CuPc OTFT device in order to obtain a correct Ci value for the derivation of lFE,sat. The derived lFE,sat value is 0.51 cm2 V1 s1 using the Ci value of ca. 14 nF/cm2 in the quasi-static regime in Fig. 2c. The Ci value was taken at a sweep rate of 0.1 Vs1. An on/off current ratio of 9.3 102, a low threshold voltage of 0.65 V, and a subthreshold swing value of 730 mV/decade are derived from transfer characteristics in Fig. 2a. The subthreshold swing value of 730 mV per decade yields a maximum interface trap density (NSS) of ca. 2.3 1012 cm2 eV1, derived from [10]
S logðeÞ Ci 1 kT=q q
ð2Þ
where S is the subthreshold swing; Ci is the capacitance per unit area; k is Boltzmann’s constant, and T is the absolute temperature. A large hysteresis appears in the IDS–VGS curves at a constant VDS of 8 V (Fig. 2d), indicating large charge trap density at or near the F16CuPc/silk fibroin interface. The large charge trap density may explain the high threshold voltage (0.65 V) that is required to attract electrons to fill the charge trap states before accumulation to occur during the OTFT operation. The performance of F16CuPc OTFTs varies in a range under the same fabrication process. Fig. 3 shows the variation of the lFE,sat values of F16CuPc OTFTs from 14 test devices. The average lFE,sat value is 0.39 cm2/Vs with a standard deviation of 0.12 m2/vs. Note that the average lFE,sat value of 0.39 cm2 V1 s1 is at least one order of magnitude higher than the reported values of F16CuPc OTFTs by Bao et al. [5]. In their work, the lFE,sat value of F16CuPc OTFTs with SiO2 as the gate dielectric was affected by the deposition temperature of F16CuPc. The lFE,sat value increases from 0.005 cm2 V1 s1 at room temperature to 0.03 cm2 V1 s1 at 125 °C. A better crystal quality of F16CuPc was achieved at higher deposition temperature (125 °C). In contrast, F16CuPc is thermally deposited onto PET patterned with Au gate electrodes at room temperature in our work. No high temperature or post annealing is required in our process. This implies that silk fibroin thin film serves as a substrate better than SiO2 for F16CuPc to deposit on. The better crystal quality of F16CuPc on silk fibroin is further confirmed by the GIXD data in Fig. 4. A very thin F16CuPc layer of 21 nm thick was deposited simultaneously onto silk fibroin and SiO2 at room temperature for comparison. A prominent (0 0 2) peak of F16CuPc at 2h = 5.9° [11] is used to determine the crystal quality of F16CuPc on both silk fibroin and SiO2. From the material point of view, grain size and quantity may be used to evaluate the crystal quality of F16CuPc. The full-width at half-maximum (FWHM) of a GIXD peak is inversely proportional to the grain size of F16CuPc. If we assume that the grain of F16CuPc is isotropic, its grain size can be estimated using the equation B = 0.9k/ (t cos(h)) where B is the FWHM of an X-ray peak, k is the Xray wavelength 1.54 Å, t is the grain size, and h is the diffraction angle [12]. The grain size of F16CuPc is thus estimated to be 107 Å on Silk fibroin and 132 Å on SiO2, respectively. The grain size of F16CuPc on silk fibroin is slightly smaller than that on SiO2. In contrast, F16CuPc on silk fibroin exhibits much higher (2 0 0) peak intensity than that on SiO2 when F16CuPc is deposited at room temperature. The amount of crystalline F16CuPc formed on silk fibroin is estimated to be 8 times larger than that on SiO2 based on their (2 0 0) peak area ratio. This agrees very well with the lFE,sat values of F16CuPc OTFTs with silk fibroin (0.51 cm2 V1 s1) and SiO2 (0.005 cm2 V1 s1) [5] as the gate dielectrics. Therefore, the amount of crystalline F16CuPc is more dominant than grain size in affecting the lFE,sat values in our case. Note that the reported lFE value of 0.03 cm2 V1 s1 was achieved by depositing F16CuPc onto SiO2 at high temper-
C.-L. Tsai et al. / Organic Electronics 13 (2012) 3315–3318
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Fig. 2. Electrical characteristics of the F16CuPc OTFT and MIM devices with silk fibroin as the dielectric material. (a) Output characteristics. (b) Transfer and gate leakage current characteristics. The inset is the I1=2 D versus VG plot for the determination of lFE,sat. (c) Quasi-capacitance versus voltage curve of the MIM device taken at sweep rate 0.1 V/s. (d) Hysteresis in the transfer characteristics of the F16CuPc OTFT device. The gate voltage is swept from 1 to 5 V and back to 1 V.
Fig. 3. Variation of the lFE,sat values of F16CuPc OTFTs from 14 test devices.
Fig. 4. GIXD spectra taken from the F16CuPc layer (21 nm) deposited onto silk fibroin and SiO2 at different temperature.
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ade are obtained. Bao et al. reported a better device performance of F16CuPc OTFTs for F16CuPc deposited onto SiO2 at 125 °C [5]. However, the deposition temperature of 125 °C is too high for PET in the fabrication of F16CuPc OTFTs. No experiments can be done for comparison. Chua et al. reported that the polar groups of the dielectric surface, such as hydroxyl groups, may act as ‘‘electron traps’’, thus causing the reduction of electron mobility for n-type OTFTs [13]. It seems that large amount of polar NAH and C@O groups in the silk fibroin would reduce the lFE value. However, experimental data show that F16CuPc OTFTs exhibit a high lFE value. This can be explained by the molecular structure of F16CuPc where fluorine is surrounding outside. The electrons in F16CuPc may be confined inside F16CuPc due to flourine so that they are not easily trapped by the polar NAH and C@O groups of silk fibroin during transport along the channel. The influence of ‘‘electron traps’’ is thus reduced. Fig. 5. Transfer characteristics of a F16CuPc OTFT before and after storing the same device in ambient air for three days.
ature (125 °C) [5]. Fig. 3 also shows the (2 0 0) peak intensity of the F16CuPc layer deposited on SiO2 at 125 °C. The amount of crystalline F16CuPc on SiO2 is less than that on silk fibroin with F16CuPc deposited at room temperature. This may explain the reason why our F16CuPc OTFTs exhibit a higher lFE value. Pentacene was reported easier to crystallize on silk fibroin than on SiO2 during deposition at room temperature [2]. The lFE,sat value of the pentacene OTFT increases by 100 times from 0.22 (on SiO2) to 23 cm2 V1 s1 (on silk fibroin). Similarly, the crystal quality of F16CuPc is enhanced by changing the gate dielectric from SiO2 to silk fibroin, supported by the GIXD data in Fig. 4. The lFE,sat value also increases by 66 times from 0.005 (on SiO2) to 0.51 cm2 V1 s1 (on silk fibroin). This implies that small molecules such as pentacene or F16CuPc are easier to move around and to crystallize on silk fibroin than on SiO2. In other words, pentacene or F16CuPc molecules are not attached tightly to the silk fibroin surface. This provides pentacene or F16CuPc molecules more freedom to move around and to crystalize on the silk fibroin surface. F16CuPc was reported to be an air stable material [5]. However, the device performance of F16CuPc OTFTs degrades with time in ambient air. Fig. 5 shows the transfer characteristics of a F16CuPc OTFT before and after storing the same device in ambient air for three days. The saturation current reduces and the off-current increases. The derived lFE,sat value decays from 0.51 to 0.33 cm2 V1 s1. The performance of F16CuPc OTFTs depends on the deposition temperature of F16CuPc. When deposition temperature increases to 70 °C, the performance of F16CuPc OTFTs degrades in our case. A lFE value of 0.19 cm2 V1 s1, an on/off current ratio of 1.8 102, a low threshold voltage of 0.18 V, and a subthreshold swing value of 604 mV/dec-
4. Conclusions In conclusion, crystallization of F16CuPc is strongly correlated to the substrate in the fabrication of n-type F16CuPc OTFTs. Silk fibroin serves as a substrate better than SiO2 for F16CuPc to crystallize. The crystal quality of F16CuPc on silk fibroin is much better than that on SiO2, even when F16CuPc is deposited at room temperature. Better crystal quality of F16CuPc leads to a higher average lFE,sat value of 0.39 cm2 V1 s1 for n-type F16CuPc OTFTs with silk fibroin as the gate dielectric. Acknowledgements The authors like to thank for the financial support from National Science Council, Republic of China through the project NSC 100-2221-E-007-067-MY3. References [1] K. Nomura, A. Takagi, T. Kamiya, H. Ohta, M. Hirano, H. Hosono, Jpn. J. Appl. Phys. 45 (2006) 4303–4308. [2] C.-H. Wang, C.-Y. Hsieh, J.-C. Hwang, Adv. Mater. 23 (2011) 1630– 1634. [3] J.S. Lee, S. Chang, S.M. Koo, S.Y. Lee, IEEE Electron. Dev. Lett. 31 (2010) 225–227. [4] H. Klauk, Chem. Soc. Rev. 39 (2010) 2643–2666. [5] Z. Bao, A.J. Lovinger, J. Brown, J. Am. Chem. Soc. 120 (1998) 207–208. [6] M.M. Ling, Z. Bao, Org. Electron. 7 (2006) 568–575. [7] K. Kim, T.H. Kwak, M.Y. Cho, J.W. Lee, J. Joo, Synthetic Met. 158 (2008) 553–555. [8] C. Keil, D. Schlettwein, Org. Electron. 12 (2011) 1376–1382. [9] R. Ye, M. Baba, K. Mori, Jpn. J. Appl. Phys. 44 (2005) L581–L583. [10] K.N.N. Unni, S. Dabos-Seignon, J.M. Nunzi, J. Phys. D – Appl. Phys. 38 (2005) 1148–1151. [11] J.L. Yang, S. Schumann, T.S. Jones, J. Mater. Chem. 21 (2011) 5812– 5816. [12] B.D. Cullity, S.R. Stock, Elements of X-Ray Diffraction, third ed., Prentice Hall, New Jersey, 2001 (Chapter 14). [13] L.-L. Chua, J. Zaumseil, J.-F. Chang, E.C.-W. Ou, P.K.-H. Ho, H. Sirringhau, R.H. Friend, Nature 434 (2005) 194–199.
Contents lists available at SciVerse ScienceDirect
Organic Electronics journal homepage: www.elsevier.com/locate/orgel
Letter
Mobility enhancement by using silk fibroin in F16CuPc organic thin film transistors Cheng-Lun Tsai, Li-Shiuan Tsai, Jenn-Chang Hwang ⇑ Department of Materials Science and Engineering, National Tsing Hua University, Hsin-Chu City 30043, Taiwan, ROC
a r t i c l e
i n f o
Article history: Received 13 June 2012 Received in revised form 9 October 2012 Accepted 9 October 2012 Available online 25 October 2012 Keywords: OTFT Silk fibroin F16CuPc
a b s t r a c t High performance n-type F16CuPc organic thin-film transistors (OTFTs) were fabricated on polyethylene terephthalate (PET) using silk fibroin as the gate dielectric. The average fieldeffect mobility (lFE) value in the saturation regime is 0.39 cm2 V1 s1 approximately one order of magnitude higher than the reported values in the literature. A typical F16CuPc OTFT exhibits an on/off current ratio of 9.3 102, a low threshold voltage of 0.65 V, and a subthreshold swing value of 730 mV/decade. The enhancement of lFE results from very good crystal quality of F16CuPc on silk fibroin, supported by grazing incidence X-ray diffraction (GIXD) data. Ó 2012 Elsevier B.V. All rights reserved.
1. Introduction Organic thin-film transistors (OTFTs) have attracted much attention in the past decades because of the merits of low cost, large area, and flexibility. One of the drawbacks of OTFTs is poor device performance that is much inferior to inorganic thin-film transistors (TFTs) such as amorphous InGaO3(ZnO)5 (a-IGZO) TFTs [1]. Recently, Wang et al. have reported that silk fibroin is an excellent gate dielectric for p-type pentacene OTFTs with a field-effect mobility (lFE) value of ca. 23 cm2 V1 s1 comparable to or higher than that of a-IGZO TFTs [2,3]. Pentacene is easier to crystallize on silk fibroin than on SiO2 supported by their grazing incident X-ray diffraction (GIXD) data [2]. The crystallized pentacene on silk fibroin plays a primary role in the enhancement of lFE. This inspires us to investigate whether silk fibroin also assists other organic semiconductors to crystallize in favor of higher lFE. Note that the lFE values of n-type OTFTs are usually approximately one order of magnitude lower than those of p-type OTFTs [4]. The enhancement of lFE is important for n-type OTFTs, since the lFE values of p- and n-type
⇑ Corresponding author. E-mail address: [email protected] (J.-C. Hwang). 1566-1199/$ - see front matter Ó 2012 Elsevier B.V. All rights reserved. http://dx.doi.org/10.1016/j.orgel.2012.10.007
OTFTs must be comparable for complementary metal– oxide-semiconductor (CMOS) applications. In the present work, we choose n-type F16CuPc to investigate whether silk fibroin may assist F16CuPc to crystallize in favor of higher lFE or not. F16CuPc is a good material to examine the effect of silk fibroin on its crystal quality because of its stability in air [5]. However, it lFE value is very low in the range of 1.04 103–0.08 cm2 V1 s1 [5–9]. The best reported lFE value of 0.08 cm2 V1 s1 was achieved by depositing F16CuPc onto SiO2 at high temperature (125 °C) in order to obtain better crystal quality. Here we report a much higher lFE value of F16CuPc OTFTs with silk fibroin as the gate dielectric. F16CuPc was deposited onto silk fibroin at room temperature. The effect of silk fibroin on the crystal quality of F16CuPc is addressed.
2. Experimental The bottom gate configuration of the F16CuPc OTFT with silk fibroin as the gate dielectric is schematically shown in Fig. 1. The silk fibroin thin film was spin-coated onto the polyethylene terephthalate (PET) substrate patterned with Au gate electrodes using an aqueous solution of silk fibroin. The preparation of the silk fibroin aqueous solution can be found in our previous work [2]. A dipping step is required
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NSS ¼
Fig. 1. Schematic showing the structure of the F16CuPc OTFT with silk fibroin as the gate dielectric.
to obtain a thicker silk fibroin thin film that is important to reduce possible current leakage. The silk fibroin thin film is amorphous [2]. The silk fibroin thin film was determined to be ca. 420 nm thick. A F16CuPc (Sigma–Aldrich) thin layer of 21 nm thick was thermally evaporated onto the silk fibroin thin film at different temperature. The deposition rate was 0.2 Å/sec at a base pressure of 106 torr. The source and drain electrodes were defined by Au in the F16CuPc OTFTs. The channel length and width were 50 lm and 600 lm, respectively. Grazing incidence X-ray diffraction (GIXD) was performed to characterize the crystal quality of F16CuPc using a diffractometer (Rigaku TTRax III) with Cu Ka radiation (k = 1.54 Å). The capacitance versus voltage curve was taken at sweep rate of 0.1 V/s in the quasistatic regime and current–voltage characteristics of OTFTs were taken using Agilent 4155C in ambient air. The surface roughness of the F16CuPc layer was determined to be ca. 1.5 nm by atomic force microscopy (AFM). 3. Results and discussion The optimum performance of F16CuPc OTFT occurs when F16CuPc was thermally deposited at room temperature. A typical F16CuPc OTFT exhibits output characteristics with pinch-off and current saturation (Fig. 2a). The fieldeffect mobility in the saturation regime (lFE,sat) was obtained from the transfer characteristics in Fig. 2b using:
IDS;sat ¼ ðC i lFE W=2LÞðV GS V th Þ2
ð1Þ
where IDS,sat, Ci, VGS, Vth, W and L denote the drain current in the saturation regime, gate capacitance, gate voltage, threshold gate voltage, channel width and length, respectively. A metal–insulator–metal (MIM) structure with silk fibroin as the insulator was fabricated next to each F16CuPc OTFT device in order to obtain a correct Ci value for the derivation of lFE,sat. The derived lFE,sat value is 0.51 cm2 V1 s1 using the Ci value of ca. 14 nF/cm2 in the quasi-static regime in Fig. 2c. The Ci value was taken at a sweep rate of 0.1 Vs1. An on/off current ratio of 9.3 102, a low threshold voltage of 0.65 V, and a subthreshold swing value of 730 mV/decade are derived from transfer characteristics in Fig. 2a. The subthreshold swing value of 730 mV per decade yields a maximum interface trap density (NSS) of ca. 2.3 1012 cm2 eV1, derived from [10]
S logðeÞ Ci 1 kT=q q
ð2Þ
where S is the subthreshold swing; Ci is the capacitance per unit area; k is Boltzmann’s constant, and T is the absolute temperature. A large hysteresis appears in the IDS–VGS curves at a constant VDS of 8 V (Fig. 2d), indicating large charge trap density at or near the F16CuPc/silk fibroin interface. The large charge trap density may explain the high threshold voltage (0.65 V) that is required to attract electrons to fill the charge trap states before accumulation to occur during the OTFT operation. The performance of F16CuPc OTFTs varies in a range under the same fabrication process. Fig. 3 shows the variation of the lFE,sat values of F16CuPc OTFTs from 14 test devices. The average lFE,sat value is 0.39 cm2/Vs with a standard deviation of 0.12 m2/vs. Note that the average lFE,sat value of 0.39 cm2 V1 s1 is at least one order of magnitude higher than the reported values of F16CuPc OTFTs by Bao et al. [5]. In their work, the lFE,sat value of F16CuPc OTFTs with SiO2 as the gate dielectric was affected by the deposition temperature of F16CuPc. The lFE,sat value increases from 0.005 cm2 V1 s1 at room temperature to 0.03 cm2 V1 s1 at 125 °C. A better crystal quality of F16CuPc was achieved at higher deposition temperature (125 °C). In contrast, F16CuPc is thermally deposited onto PET patterned with Au gate electrodes at room temperature in our work. No high temperature or post annealing is required in our process. This implies that silk fibroin thin film serves as a substrate better than SiO2 for F16CuPc to deposit on. The better crystal quality of F16CuPc on silk fibroin is further confirmed by the GIXD data in Fig. 4. A very thin F16CuPc layer of 21 nm thick was deposited simultaneously onto silk fibroin and SiO2 at room temperature for comparison. A prominent (0 0 2) peak of F16CuPc at 2h = 5.9° [11] is used to determine the crystal quality of F16CuPc on both silk fibroin and SiO2. From the material point of view, grain size and quantity may be used to evaluate the crystal quality of F16CuPc. The full-width at half-maximum (FWHM) of a GIXD peak is inversely proportional to the grain size of F16CuPc. If we assume that the grain of F16CuPc is isotropic, its grain size can be estimated using the equation B = 0.9k/ (t cos(h)) where B is the FWHM of an X-ray peak, k is the Xray wavelength 1.54 Å, t is the grain size, and h is the diffraction angle [12]. The grain size of F16CuPc is thus estimated to be 107 Å on Silk fibroin and 132 Å on SiO2, respectively. The grain size of F16CuPc on silk fibroin is slightly smaller than that on SiO2. In contrast, F16CuPc on silk fibroin exhibits much higher (2 0 0) peak intensity than that on SiO2 when F16CuPc is deposited at room temperature. The amount of crystalline F16CuPc formed on silk fibroin is estimated to be 8 times larger than that on SiO2 based on their (2 0 0) peak area ratio. This agrees very well with the lFE,sat values of F16CuPc OTFTs with silk fibroin (0.51 cm2 V1 s1) and SiO2 (0.005 cm2 V1 s1) [5] as the gate dielectrics. Therefore, the amount of crystalline F16CuPc is more dominant than grain size in affecting the lFE,sat values in our case. Note that the reported lFE value of 0.03 cm2 V1 s1 was achieved by depositing F16CuPc onto SiO2 at high temper-
C.-L. Tsai et al. / Organic Electronics 13 (2012) 3315–3318
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Fig. 2. Electrical characteristics of the F16CuPc OTFT and MIM devices with silk fibroin as the dielectric material. (a) Output characteristics. (b) Transfer and gate leakage current characteristics. The inset is the I1=2 D versus VG plot for the determination of lFE,sat. (c) Quasi-capacitance versus voltage curve of the MIM device taken at sweep rate 0.1 V/s. (d) Hysteresis in the transfer characteristics of the F16CuPc OTFT device. The gate voltage is swept from 1 to 5 V and back to 1 V.
Fig. 3. Variation of the lFE,sat values of F16CuPc OTFTs from 14 test devices.
Fig. 4. GIXD spectra taken from the F16CuPc layer (21 nm) deposited onto silk fibroin and SiO2 at different temperature.
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ade are obtained. Bao et al. reported a better device performance of F16CuPc OTFTs for F16CuPc deposited onto SiO2 at 125 °C [5]. However, the deposition temperature of 125 °C is too high for PET in the fabrication of F16CuPc OTFTs. No experiments can be done for comparison. Chua et al. reported that the polar groups of the dielectric surface, such as hydroxyl groups, may act as ‘‘electron traps’’, thus causing the reduction of electron mobility for n-type OTFTs [13]. It seems that large amount of polar NAH and C@O groups in the silk fibroin would reduce the lFE value. However, experimental data show that F16CuPc OTFTs exhibit a high lFE value. This can be explained by the molecular structure of F16CuPc where fluorine is surrounding outside. The electrons in F16CuPc may be confined inside F16CuPc due to flourine so that they are not easily trapped by the polar NAH and C@O groups of silk fibroin during transport along the channel. The influence of ‘‘electron traps’’ is thus reduced. Fig. 5. Transfer characteristics of a F16CuPc OTFT before and after storing the same device in ambient air for three days.
ature (125 °C) [5]. Fig. 3 also shows the (2 0 0) peak intensity of the F16CuPc layer deposited on SiO2 at 125 °C. The amount of crystalline F16CuPc on SiO2 is less than that on silk fibroin with F16CuPc deposited at room temperature. This may explain the reason why our F16CuPc OTFTs exhibit a higher lFE value. Pentacene was reported easier to crystallize on silk fibroin than on SiO2 during deposition at room temperature [2]. The lFE,sat value of the pentacene OTFT increases by 100 times from 0.22 (on SiO2) to 23 cm2 V1 s1 (on silk fibroin). Similarly, the crystal quality of F16CuPc is enhanced by changing the gate dielectric from SiO2 to silk fibroin, supported by the GIXD data in Fig. 4. The lFE,sat value also increases by 66 times from 0.005 (on SiO2) to 0.51 cm2 V1 s1 (on silk fibroin). This implies that small molecules such as pentacene or F16CuPc are easier to move around and to crystallize on silk fibroin than on SiO2. In other words, pentacene or F16CuPc molecules are not attached tightly to the silk fibroin surface. This provides pentacene or F16CuPc molecules more freedom to move around and to crystalize on the silk fibroin surface. F16CuPc was reported to be an air stable material [5]. However, the device performance of F16CuPc OTFTs degrades with time in ambient air. Fig. 5 shows the transfer characteristics of a F16CuPc OTFT before and after storing the same device in ambient air for three days. The saturation current reduces and the off-current increases. The derived lFE,sat value decays from 0.51 to 0.33 cm2 V1 s1. The performance of F16CuPc OTFTs depends on the deposition temperature of F16CuPc. When deposition temperature increases to 70 °C, the performance of F16CuPc OTFTs degrades in our case. A lFE value of 0.19 cm2 V1 s1, an on/off current ratio of 1.8 102, a low threshold voltage of 0.18 V, and a subthreshold swing value of 604 mV/dec-
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