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Modelling of the temperature distribution during field assisted sintering
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Switch Short-Circuit Fault Diagnosis and Remedial Strategy for Full-Bridge DC-DC Converters Xuejun Pei, Songsong Nie, and Yong Kang Abstract—Switch fault diagnosis and remedial actions are an important design aspect for isolated full-bridge dc-dc converters, and they can highly improve reliability of the whole system. In this paper, a fast switch short-circuit fault (SCF) diagnostic method is proposed for the phase-shifted full-bridge (PSFB) converter. The dc-link current and transformer primary voltage are treated as diagnosis criteria. Based on the combination of real-time criteria and switch gate-driver signals, the switch SCF can be identified rapidly, and thus further damage can be avoided. Besides, a remedial action for the faulty PSFB converter is introduced to keep the continuity of the system. The converter under fault can be reconfigured into an asymmetrical half-bridge (AHB) converter. Moreover, a boost unit, including a switch and a diode, is inserted into between the output rectifier and filter capacitor to compensate the output voltage. The operational principle, design considerations, and implementation are discussed in this paper. Experimental results are shown to verify the validity of theoretical analysis. Index Terms—short-circuit fault, fault diagnosis, remedial actions, dc-link current, gate-driver signals, boost unit.
I. INTRODUCTION hase-shifted full-bridge (PSFB) converter with zero voltage switching (ZVS) is extensively used in hybrid electric vehicles, communication, aeronautics, and astronautics applications [1]-[3], due to its advantages such as high efficiency, and simple control. In these applications, since an accident or fault can result in malfunctions of the whole system, reliability of the PSFB converter is one of the most important factors to keep the safe, continuous and high performance operation. In order to achieve the high reliability, redundant concept has been proposed in [4]-[5]. This is a costly option because additional converters are connected in parallel to achieve the required redundancy, in case of failure of the main converter. Instead, a “fault-tolerant control”, which consists of the following tasks [6]-[7]: 1) fault detection; 2) fault
P
This work was supported by the Lite-On Power Electronics Technology Research Fund, Grant No. 2014-04. The authors are with the State Key Laboratory of Advanced Electromagnetic Engineering and Technology, Huazhong University of Science and Technology, Wuhan, 430074 Hubei, China (e-mail: [email protected]; [email protected]; [email protected]).
identification; and 3) remedial actions, is introduced. The fault detection and identification (usually called “fault diagnosis”) are used to identify the location and type of the fault. The remedial actions are the process to isolate faulty devices and reconfigure the converter for a safe and continuous operation. With fault-tolerant technology, a system under fault may be able to continue the sustained operation with reduced performance, instead of disconnecting a portion of the system. It was estimated that about 38% of all failures were found in power converters, and most of faults occur in power switches because of the high electrical and thermal stress [7]. Failures of power switches can take place in forms of open-circuit faults (OCF) or short-circuit faults (SCF) [8]. The switch OCF can be caused by the lifting of the bonding wires during thermic cycling, a driver failure or a SCF induced rupture. Some switch OCF diagnostic methods for dc-dc converters have been developed in [9]-[19]. Besides, some open-circuit fault-tolerant strategies have been also introduced in [14]-[19]. The switch SCF often occurs due to either an improper gate-driver (caused by driver circuit malfunction or auxiliary power supply failure) or an intrinsic failure (caused by overvoltage/avalanche stress or temperature overshoot). This fault results in a shoot-through of the dc-link that blows out other components, particularly switches. Therefore, the switch SCF is one of the most fatal accidents, and the crucial thing is to minimize the time between SCF initiation and appropriate reaction. Some researchers have published technical papers to deal with the switch SCF in power converters [9]-[11], [20]-[22]. Generally speaking, switch SCF protection is already a standard practical integrated part in the gate-driver [20]. However, this method is high-cost and commonly utilized in high-power inverter applications. Some switch SCF diagnostic methods based on the output current or voltage were proposed for dc-ac inverters in [21]-[22]. Nevertheless, these methods are unsuitable for dc-dc converters. A fast switch SCF diagnostic method for single-switch converters was proposed in [9]. Another fault protection method for a three-level half-bridge converter, which utilized the flying capacitor voltage as the diagnostic variable, was proposed in [10]. Obviously, these methods cannot be applied to the PSFB converter. In order to detect the switch SCF in the PSFB converter, S. Y. Kim et al. [11] treated the dc-link current as the diagnostic variable, in which the switch SCF is detected by comparing the peak and integral value of the dc-link current.
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IEEE TRANSACTIONS ON POWER ELECTRONICS However, the fault detection time is long, and the precise position of faulty switches cannot be located. In this paper, a new SCF diagnosis and remedial strategy is proposed for the PSFB converter. The dc-link current and transformer primary voltage are utilized as the fault diagnostic criteria. Since the transformer primary voltage can be measured by a simple auxiliary winding, only one sensor is needed. Based on the combination of real-time criteria and switch gate-driver signals, switch SCF characteristics are instantaneously extracted, and the SCF fault is immediately isolated. Then, the faulty switch can be located within one switching period, and the faulty PSFB converter is reconfigured into an asymmetrical half-bridge (AHB) converter. The proposed method can minimize the detection time and keep continuous operation of the converter. Therefore, it has the advantages of low cost, fast fault diagnosis, and high reliability. The remaining parts of the paper are organized as follows. In Section II, basic configuration and operational processes of the overall system are presented first, including the diagnostic signal selection. In Section III, switch SCF behaviors and fault detection method of the PSFB converter are analyzed. Then, detailed explanations of the fault identification method and remedial strategy are presented in Sections IV and V, respectively. The proposed methodology is verified by experimental results in Section VI. Finally, the conclusion is presented in Section VII. II. SYSTEM OVERVIEW A. Basic Configuration and Operational Processes Fig. 1 shows the proposed PSFB dc-dc converter with DSP controller and fault diagnostic unit. Here, power switches (Q1–Q4) denote MOSFET or insulated gate bipolar transistor (IGBT) devices. The power stage of the converter consists of four switches, an additional primary inductor Lp, a blocking capacitor Cb, a transformer T (the turns ratio of primary winding np to secondary winding ns1 is K), full-bridge rectifier (D1–D4), an output inductor Lf, an output capacitor Cf, critical loads Rm and noncritical loads RS. In the control part, the output voltage vo(t) is fed back to the DSP controller. Switches Q1–Q4 are controlled by the DSP controller. A binary variable “sk” (k=1, 2, 3, and 4) is utilized to represent the gate-driver signal of Qk, which is set to “1” when the signal is high-level and “0” when low-level. In the normal state, the power stage works as a conventional PSFB converter, and the voltage vo(t) is regulated by the phase-shifted d. When the switch SCF occurs, the diagnostic circuit can quickly take action to locate the faulty switch. When the exact location of faulty switch is determined, the DSP controller reconfigures the converter for post-fault operation. In the switch SCF state, the PSFB converter can be reconfigured into an AHB converter by changing the control scheme. For example, if the switch SCF occurs in the lower switch of a leg, the upper switch in the same leg is turned off, and thus the middle point in this leg is connected to the negative dc-bus. Therefore, the shoot-through of dc-link is avoided
2
Fig. 1. Structure of the overall system.
Fig. 2. Post-fault operation. naturally, and the healthy leg can be controlled as an AHB converter. Likewise, the AHB converter can be also obtained when the switch SCF occurs in the upper switch. The reconfigured converter shown in Fig. 2(a) is an example of the switch Q4 SCF. Based on the above analysis, under different switch SCF states, the control schemes are also different, as shown in Fig. 2(b). Compared to the normal PSFB converter, the output voltage of the reconfigured AHB converter is reduced [19], [23]-[24]. To ensure the continuity of the whole system, the output voltage of the reconfigured converter should be kept consistent. Therefore, the output voltage should be compensated, and it will be illustrated in the Section V. B. Diagnostic Signal Selection In order to locate the faulty switch and reconfigure the converter, a diagnostic signal with adequate information should be selected. Since the dc-link current flows through switches whenever the PSFB converter works, and its shape is highly determined by the switch state, the dc-link current is the most suitable criterion for the switch SCF diagnosis [11]. The current can be sensed by a hall sensor or via a current transformer, and the measured signal is named as idc. III. SWITCH SHORT-CIRCUIT FAULT DETECTION To detection the switch SCF, switch fault behaviors should be analyzed first. For the illustrative purpose, several assumptions are made as following: 1) All the switches and diodes are ideal. 2) Cb is large enough, and its voltage vcb is treated as zero under the normal state.
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Fig. 3. Key waveforms under normal state and Q3 SCF. TABLE I SIGNAL SID UNDER NORMAL AND ABNORMAL STATE sid
s1
s3
( s2 )
( s4 )
normal
Q1 SCF
Q2 SCF
Q3 SCF
Q4 SCF
0
0
0
1
0
1
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
0
0
0
1
1
0
discussed in this paper. Once the switch SCF occurs, a rather high current pulse must appear at the dc-link side (see Fig. 2, taking Q3 SCF as an example). Thus, the switch SCF can be detected by evaluating the current idc. A comparator N1 is designed as shown in Fig. 3, and the comparator output sid is used to represent the signal idc: sid 1 idc I th , (1) sid 0 idc I th , where Ith is the threshold value of the comparator N1, and it depends on the rated load current Io of the converter. Under the normal state, the maximum value of the dc-link current, Idcmax, can be expressed theoretically as Io/K (in comparison with Io/K, the magnetizing current is small enough to be neglected). In order to avoid misdiagnosis caused by noise or transition operation, Ith should be far more than Idcmax. However, it means that high current switches should be selected, which increases the cost. Therefore, compromising the sensitivity and cost, Ith is empirically set to be 3Io/K. Obviously, Ith is valid for all wide load ranges, and thus the switch SCF detection is independent of the load. From (1), it can be concluded that when the signal sid keeps low-level, the converter is normal; once the signal sid becomes high-level, the switch SCF comes about. For the current idc, when the switch SCF occurs during the dead time, high current pulse cannot appear, thus the dead time can be ignored. Therefore, based on gate-driver signals (s1, s3), the PSFB converter can operate in four modes: (1, 1), (1, 0), (0, 0), and (0, 1). The signal sid under normal and faulty states is presented in Table I. Apparently, no matter which switch is under the SCF state, the signal sid must become high-level. Thus, the switch SCF detection based on the dc-link current is feasible. IV. SCF IDENTIFICATION METHODOLOGY A. Combination of Gate-Driver Signals and DC-Link Current
Fig. 4. Diagnostic circuit and diagram.
3) Ignoring the small current ripple, the current flowing through Lf can be treated as the load current. 4) The magnetizing inductance of the transformer is large, so that the magnetizing current Im can be treated as a constant current. Fig. 3 shows key waveforms of the converter under normal and faulty states. These waveforms under the normal state have been analyzed in [1]; therefore, operational modes are not
Definite faulty switch cannot be identified only by the dc-link current. From Table I, it can be found that in any operation mode, only two faulty types can make the signal sid become high-level. For example, when sid becomes high-level at the mode (1, 1), only the switch Q2 or Q4 can be under the short-circuit state. If the switch SCF occurring time is detected, the range of the faulty switch can be determined. To exactly identify the mode that the switch SCF occurs in, another four signals are introduced which can be obtained by combining sid and gate-driver signals: A13 s1 & s3 & sid A13 s2 & s4 & sid A s & s & s A s & s & s 14 1 2 3 id 3 id (2) 14 A s & s & s A s & s & s 24 1 3 id 3 id 24 1 A23 s1 & s4 & sid A23 s1 & s3 & sid Obviously, when the signal A13 becomes high-level first, the switch SCF occurs in the mode (0, 0). Likewise, the signals A14, A24, and A23 becoming high-level first mean that the switch SCF occurs in the modes (0, 1), (1, 1), and (1, 0), respectively.
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Fig. 5. Key waveforms from the normal state to: (b) Q2 SCF, (c) Q4 SCF.
4 can be identified during one switching period, the capacitor voltage vcb is treated as zero in comparison with the dc-link voltage Vdc. The diagnostic circuit and diagram are illustrated in Fig. 4. Switch SCF occurring in the mode (1, 1): Fig. 4 shows the time sequence from the normal state to the switch SCF state. Once the switch SCF appears at this mode, the signal A24 becomes high-level first, thus the switch Q2 or Q4 may be under the short-circuit state. In general, the short-circuit resistance of the faulty switch is less than the normal conduction resistance. When the switch Q2 SCF occurs as shown in Fig. 5 (a), the voltage of node A is less than Vdc/2, and thus the voltage vm is less than -Vdc/2kau (kau is the turns ratio of primary winding np to auxiliary winding nau). However, when the switch Q4 SCF occurs as shown in Fig. 5 (b), the voltage of node B is less than Vdc/2, and thus the voltage vm is more than Vdc/2 kau. Apparently the positive or negative characteristic of vm is enough for fault diagnosis. This implies that the analog signal vm should be transferred to a logical signal. Thus a comparator N2 as shown in Fig. 4 is designed to convert vm into a logical signal sm: vm Vth , sm 1 (3) vm Vth , sm 0 where Vth is the threshold value of the comparator. Due to the appearance of zero voltage in vm under the normal case, Vth should be set a little less (or more) than zero, and it can be chosen as 0 Vdc / 2kau Vdc 0 Vdc / 2kau Vdc Vth or Vth 2 4kau 2 4kau (4) In our experiment, Vth is set to be –Vdc/4kau in order to facilitate the switch fault diagnosis in the mode (1, 1). From the equation (4), it is seen that when switch Q2 SCF occurs in this mode, the signal sm is low-level; while switch Q3 SCF occurs, the signal sm is high-level. According to the analysis, Q2 SCF and Q4 SCF can be diagnosed by combining signals A24 and sm:
F2 A24 & sm
Fig. 6. Key waveforms from the normal state to: (a) Q2 SCF, (b) Q3 SCF. B. Switch SCF Identification Based on the above analysis, it can be concluded that once the signal Ajk (j=1, 2; k=3, 4) becomes high-level first, only the switch Qj SCF or Qk SCF occurs. However, this signal still cannot locate the exact faulty switch. Hence, the transformer primary voltage, which can be measured by an auxiliary winding and used to detect the switch OCF, is introduced to cooperate with the signals A13, A14, A23 and A24. As shown in Fig. 1, an auxiliary winding nau is added to the transformer, and the auxiliary winding voltage is named as vm. Due to the symmetrical structure of the converter, just the switch SCF occurring in the modes (1, 1) and (1, 0) is analyzed in this section. Here, it is emphasized that since the switch SCF
(5)
F4 A24 & sm (6) It is noted that signals F2 and F4 are pulse-form and cannot be directly used to identify the switch fault, thus two Reset-Set (RS) triggers are designed to latch the signals. The outputs of the triggers FS2 and FS4 are utilized to signify Q2 SCF and Q4 SCF respectively: as shown in Fig. 5, under the normal case, both signals FS2 and FS4 are high-level; when FS2 becomes low-level, the switch Q2 SCF occurs; when FS4 becomes low-level, the switch Q4 SCF comes about. Switch SCF occurring in the mode (1, 0): Once the switch SCF appears at this mode, the signal A23 becomes high-level first, thus the switch Q2 or Q3 may be under the short-circuit state. In this mode, no matter whether switch Q2 SCF or Q3 SCF occurs, the voltage vm is positive and sm is still high-level as shown in Fig. 6. Therefore, the switch fault cannot be directly identified by combining the signal A23 and sm. Instead, the switch fault identification in this mode is realized by the cooperation of the hardware circuit and DSP controller. As shown in Fig. 4, a RS trigger is designed to latch
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Fig. 7. Output voltage compensation.
Fig. 8. Reconfigured converter. the signal A23 , and the DSP captures the trigger output T23. Once the signal T23 becomes low-level, gate-driver signals are locked (make vm become zero so that it does not have an effect on later diagnosis). After a short time, gate-driver signals are reset and only the signal s2 keeps high-level. When the switch Q2 SCF occurs, the voltage vm keeps zero and the signal sm keeps high-level. However, when the switch Q3 SCF occurs, the voltage vm is almost -Vdc/kau and less than Vth at the beginning, so sm becomes low-level. The DSP controller captures the signal sm. Based on the analysis, when the signal T23 is high-level and sm is high-level, the switch Q2 SCF occurs; when the signal T23 is high-level and sm is low-level, the switch Q3 SCF occurs. Key waveforms under Q2 SCF and Q3 SCF are displayed in Fig. 6. Similarly, the switch SCF occurring in the modes (0, 0) and (0, 1) can be identified by the proposed way.
V. OUTPUT VOLTAGE COMPENSATION A. Review of Output Voltage Compensation Methods After identifying the faulty switch, the DSP controller reconfigures the converter into an AHB converter for post-fault operation. However, it is noted that when the converter works as an AHB converter, the output voltage gain is reduced. To ensure the continuity of the whole system, the output voltage of the reconfigured converter should be compensated and kept consistent. Indeed, some methods are proposed in the following. Method 1: The secondary winding can be doubled in order to compensate the output voltage. As shown in Fig. 7 (a), the topology proposed in [19] can keep the output voltage consistent before and after the fault. Once the fault is located, the single-pole double-throw relays SR is driver to low level. Therefore, the new secondary winding ns2 is inserted into the secondary side and turns ratio of the transformer is also halved.
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IEEE TRANSACTIONS ON POWER ELECTRONICS However, voltage stresses of the secondary side diodes D1-D4 are increased. Method 2: Fig. 7 (b) shows a reconfigurable structure dc-dc converter [25]. In the normal state, the switch Q5 keeps off and the two output channels are in parallel. Once the switch SCF occurs, the converter is reconfigured and the switch Q5 is on. The two output channels are in series, thus the output voltage can be compensated. Compared to the previous method, voltage stresses of diodes D1-D4 are not increased. However, more components are needed and the cost is high. Method 3: A boost unit can be inserted into the converter so as to keep the output voltage constant as shown in Fig. 7(c). In Fig. 7(c), the boost unit is put at the dc-link side [26]. After the fault, the output voltage can be regulated by the switch Q5. However, an additional inductor is needed. Besides, voltage stresses of switches Q1-Q4 and diodes D1-D4 are highly increased. Method 4: In Fig. 7(d), the boost unit is put behind the rectifier [27]. Compared to the methods mentioned in Fig.7 (a)-(c), voltage stresses of rectifier diodes are not increased and required additional components are the most minimum. In terms of cost and size, the output voltage component topology in Fig. 7(d) is utilized.
6
Fig. 9. Photograph of the experimental prototype. Table II ELEMENT PARAMETERS Q1 - Q5
IRFP450
D1-D5
MBR2060CT
Lp
10uH
Llk
150uH
Cb
4uF
Vdc
100V
Vo
12V
K
28:4
Switching frequency
50KHz
B. Operation of the Reconfigured Converter In the normal state, the switch Q5 keeps off all along, and the system is actually operating as a traditional PSFB converter. Once the exact location of the faulty switch is determined, the DSP controller reconfigures the faulty PSFB converter into an AHB converter. Taking the switch Q4 SCF as an example, the reconfigured converter is shown in Fig. 8. The converter can be considered as a two-stage converter: AHB and boost converter. To simplify the control strategy, the duty cycle of the AHB converter keeps 0.5 and the output voltage is regulated only by the switch Q5. The operational mode of the converter can be similar with the analysis in [23], [27]-[28]. Besides, ignoring the duty cycle losses, the voltage gain of the reconfigured converter can be expressed as following: KVo 1 AHB+Boost: G AHBB (7) 2(1 D ) Vdc where D is the duty cycle of the switch Q5 as shown in Fig. 8. C. Limitations of the Proposed Remedial Strategy Although the proposed remedial strategy can provide the continuous power to the load, there are three major limitations: (1) Supposing that the output current is io, the average inductor current ilf is io/(1-D) due to the boost unit. If the converter still provides the rated power for the reconfigured converter, switches Q1-Q4 and diodes D1-D4 may suffer from the excess current stresses. To avoid this situation, the noncritical loads of the converter RS can be disconnected by the single-pole double-throw relay SR1, whereas the critical loads Rm are supplied continuously. (2) When the converter works as a traditional PSFB converter, the diode D5 is always on, thus the efficiency of the converter is decreased. (3) Since the PSFB and the boost units share an inductor, the switching frequency of switch Q5 should be two times that of
switch Q1- Q4, in order to reduce the inductor current ripple and optimize the inductor design [27]. VI.
EXPERIMENTAL RESULTS
In order to verify the proposed fault diagnosis and remedial method, an isolated dc-dc PSFB converter prototype has been implemented. The photograph of the experimental prototype is shown in Fig. 9. The TI DSP TMS320F2812 is used as the controller. The converter is designed to have a rated output voltage and current of 12 V and 6 A at 100 V dc-bus. The power rating is 72 W and the switching frequency is 50 KHz. The relevant parameters are shown in Table II. The magnetic component voltage is sensed by adding an auxiliary winding to the magnetic component, and the dc-link current is measured by a hall. It is noticed that noise or transition operation may influence the transformer primary voltage and dc-link current, incorrect result can happen. To ovoid the effect of noise or transition operation, a low-pass RC filter and regulation circuits are used for the measured voltage and current signals. Due to the symmetrical structure of the PSFB converter, just the switch fault occurring in the modes (1, 1) and (1, 0) is concerned. The switch SCF is implemented by shorting it with a 0-Ωresistor [11], and to avoid huge current resulted from the switch SCF, four 1- Ω resistors are series with the switches Q1-Q4 respectively. Fig. 10 shows the complete and typical
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Fig. 10. Complete fault diagnosis processes under: (a) Q2 SCF, and (b) Q4 SCF.
Fig. 11. Complete fault diagnosis processes under: (a) Q2 fault, and (b) Q3 fault. diagnosis processes when the switch SCF occurs in the mode (1, exceeds Ith. At the time tb, the signal T23 becomes low-level, and 1). The capacitor voltage vcb is almost zero, thus it does not the switch SCF is detected. At the time tc, DSP controller reads have an effect on the fault diagnosis. Fig. 10(a) shows the the signal T23 and gate-driver signals are locked. At the time td, process when the switch Q2 SCF occurs. Before ta, the power gate-driver signals are reset and only the signal s2 keeps stage works as a PSFB converter and the output vo(t) is high-level. Then, it can be seen that the voltage vm keeps zero. regulated to the desired value by the phase-shifted d. Then, The experimental results verify the above analysis in Fig. 5(a). when switch SCF occurs at ta, it can be seen that the dc-link Therefore, DSP controller can consider that switch Q2 SCF current idc is highly increased and exceeds the threshold value occurs. When the fault occurs in Q3, the signal T23 also becomes Ith (in our experiment, Ith is set to 5A). Meantime, the voltage vm low-level. However, after DSP actions, the voltage vm is less than zero in a rather long time (until the capacitor voltage vcb is becomes negative and is less than Vth. At the time tb, the signal equal to -Vdc), which is the same as that in Fig. 5(b), thus DSP FS2 becomes low-level. Thus the DSP controller considers that controller considers that switch Q3 SCF occurs. Here, it is still switch Q2 SCF occurs. Here, it is emphasized that in order to emphasized that in the real experiment, gate-driver signals are show the high short-circuit current, the switch gate-driver locked at the time t , and the interval t -t can be emitted. b b c signals are not locked after the SCF is identified. However, the Therefore, shoot-through of dc-link only exists during the gate-driver signals are quickly locked once the fault is interval ta-tb, which does not lead to disastrous overcurrent in identified in the real experiment. The similar process is also the dc-link current. shown in Fig. 10(b) when the SCF occurs in Q4. Once the switch SCF is identified, the PSFB converter is Fig. 11 shows the complete and typical diagnosis processes reconfigured into an AHB converter. The duty cycle of the when the switch SCF occurs at the mode (1, 0). Fig. 11(a) AHB converter is set to 0.5, and the output voltage vo is shows the process when the fault occurs in Q2. Before ta, the regulated by the switch Q5. Due to the symmetrical structure of power stage works as a PSFB converter, dc-link current idc does the PSFB converter, just switch Q2 SCF is takes as an example. not exceed the threshold value Ith. When the switch Q2 SCF Switch Q2 SCF can occur in the mode (1, 1) or (1, 0), and the occurs at ta, it can be seen that current idc is highly increased and
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Fig. 12. Key waveforms under switch Q2 pre-and fault diagnosis time is longer when the fault occurs in the mode (1, 0). Thus, for the illustrative purpose, just the remedial process of Q2 SCF occurring in the mode (1, 0) is displayed in Fig. 12. Due to the fast fault diagnosis and remedy, the output voltage is almost constant. Here, it is noticed that current idc under post-fault is increased because of the boost unit, thus the maximum load current of reconfigured converter is almost half of the rated load current Io [19], and the rated power is halved. VII. CONCLUSION A new switch SCF diagnostic and remedial strategy is put forward for the isolated PSFB dc-dc converter. The proposed method can detect the switch SCF, identify the exact location of the faulty switch, and reconfigure the faulty converter into an AHB one. Besides, a boost unit is inserted into the converter in order to compensate the output voltage. The diagnostic principle and implementation are presented. Experimental results validate the feasibility of the proposed method. According to the aforementioned analysis and implementation, the following advantages can be obtained: 1) The diagnostic results are exact and fast. The converter can provide the continuous dc power to the critical load when the SCF occurs in any switch. Therefore, the reliability of the system is enhanced greatly. 2) The cost of the remedial system is low because only a switch and a diode are added. 3) Before and after the fault, voltage stresses of switches and rectifier diodes are consistent. Therefore, redundant parts do not affect normal parameter designs of the PSFB converter. For the aforementioned advantages, the proposed approach is an effective solution, in terms of the reliability and cost. REFERENCES J.G. Cho, J. A. Sabate, G. Hua, and F. C. Lee, “Zero-voltage and zero-current-switching full bridge PWM converter for high-power applications,” IEEE Trans. Power Electron., vol. 11, no. 4, pp. 622–628, Jul. 1996. [2] J. Zhang, F. Zhang, X. Xie, D. Jiao, and Z. Qian, “A novel ZVS DC/DC converter for high power applications,” IEEE Trans. Power Electron., vol. 19, no. 2, pp. 420–429, Mar. 2004. [1]
8 [3] W. Chen, X. Ruan, et al, “A novel zero-voltage-switching PWM full bridge converter,” IEEE Trans. Power Electron., vol. 23, no. 2, pp. 793–801, Mar. 2008. [4] P. A. Kullstam, “Availability, MTBF and MTTR For repairable M out of N system,” IEEE Trans. Rel., vol. R-30, no. 4, pp. 393–394, Oct. 1981.. [5] R. V.White and F.M.Miles, “Principles of fault tolerance,” in IEEE Appl. Power Electron. Conf. (APEC), 1996, pp. 18–25. [6] R. L. A. Ribeiro, C. B. Jacobina, E. R. C. Silva, and A. M. N. Lima, “Fault detection of open-switch damage in voltage-fed PWM motor drive systems,” IEEE Trans. Power Electron., vol. 18, no. 2, pp. 587–593, 2003. [7] Shin-Myung Jung, Jin-Sik Park, Hag-Wone Kim, Kwan-Yuhl Cho, and Myung-Joong Youn, “An MRAS-based diagnosis of open-circuit fault in PWM voltage-source inverters for PM synchronous motor drive systems,” IEEE Trans. Power Electron., vol. 28, no. 5, pp. 2514–2526, 2013. [8] B. Lu and S. K. Sharma, “A literature review of IGBT fault diagnostic and protection methods for power inverters,” IEEE Trans. Ind. Appl., vol. 45, no. 5, pp. 1770-1777, 2009. [9] M. Shahbazi, E.Jamshidpour, P. Poure, S. Saadate, and M. Zolghadri, “Open and short-circuit switch fault diagnosis for nonisolated DC-DC converters using field programmable gate array,” IEEE Trans. Ind. Electron., vol. 60, no. 9, pp. 4136-4146, 2013. [10] H. Sheng, F. Wang and C.W. Tipton, “A fault detection and protection scheme for three-level DC-DC converters based on monitoring flying capacitor voltage,” IEEE Trans. Power. Electron., vol. 27, pp. 685 – 697, 2012. [11] S. Y. Kim, K. Nam, H.S. Song, and H.G. Kim, “Fault diagnosis of a ZVS DC-DC converter based on DC-link current pulse shapes,” IEEE Trans. Power. Electron., vol. 55, no. 3, pp. 1491-1494, 2008. [12] Y. Chen, X. Pei, S. Nie and Y. Kang, “Monitoring and diagnosis for the DC-DC converter using the magnetic near field waveform,” IEEE Trans. Ind. Electron., vol. 58, no. 5, pp. 1634-1647, 2011. [13] E. Ribeiro, A. J. M. Cardoso, C. Boccaletti, “Open-circuit fault diagnosis in interleaved DC-DC converters,” IEEE Trans. Power. Electron., vol 25, no. 6, pp. 3091-3102, 2014. [14] V. Choudhary, E. Ledezma, R. Ayyanar, and R.M. Button, “Fault tolerant circuit topology and control method for input-series and output-parallel modular DC-DC converters,” IEEE Trans. Power Electron., vol.23, no.1, pp. 402-411, 2008. [15] K. Ambusaidi, V.Pickert, and B.Zahawi, “New circuit topology for fault tolerant H-bridge DC-DC converter,” IEEE Trans. Power. Electron., vol 29, no. 6, pp. 1509-1516, 2010. [16] L. Palma and P.N. Enjeti, “A modular fuel cell, modular DC–DC converter concept for high performance and enhanced reliability,” IEEE Trans. Power. Electron., vol 24, no. 6, pp. 1437-1443, 2009. [17] T. Park, and T. Kim, “Novel fault tolerant power conversion system for hybrid electric vehicles,” in IEEE Vehicle Power and Propulsion Conf. (VPPC), 2011. [18] E. Ribeiro, A.J.M, Cardoso and C. Boccaletti, “Fault-tolerant strategy for a photovoltaic DC-DC converter,” IEEE Trans. Power. Electron., vol.28, no.6, pp.3008-3018, 2013. [19] X. Pei, S. Nie, Y. Chen and Y. Kang, “Open-circuit fault diagnosis and fault-tolerant strategies for full-bridge DC-DC converters,” IEEE Trans. Power. Electron., vol. 27 no. 5, pp. 2550-2565, 2012. [20] K. Rothenhagen, F. W. Fuchs, “ Performance of diagnosis Methods for IGBT open circuit faults in voltage source active rectifiers,”in IEEE Power Electron. Spec. Conf., (PESC), 2004, pp. 4348- 4354.
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IEEE TRANSACTIONS ON POWER ELECTRONICS [21] A. M. S. Mendes and A. J. Marques Cardoso, “Voltage source inverter fault diagnosis in variable speed ac drives, by the average current Park’s vector approach,” in Proc. IEMDC, 1999, pp. 704–706. [22] F. Richardeau, P. Baudesson, and T. A. Meynard, “Failures-tolerance and remedial strategies of a PWM multicell inverter,” IEEE Trans. Power Electron., vol. 17, no. 6, pp. 905–912, Nov. 2002. [23] R. T. Chen, Y. Y. Chen, et al. “Single-stage asymmetrical half-bridge regulator with ripple reduction technique,” IEEE Trans. Power Electron., vol. 23, no. 4, pp. 1358-1369, 2008. [24] I, Lee, Gu. Moon “A new asymmetrical half-bridge converter with zero DC-offset current in transformer", IEEE Trans. Power Electron., vol. 28, no. 5, pp. 2297-2306, 2013. [25] P. Sun, L. Zhou, K. M. Smedley. “A reconfigurable structure DC-DC converter with wide output range and constant peak power,” IEEE Trans. Power Electron., vol. 26, no. 10, pp. 2925-2935, 2011. [26] J.Y.Lee, Y.S. Jeong, et al. “An isolated DC/DC converter using high-frequency unregulated LLC resonant converter for fuel cell applications ,” IEEE Trans. Ind. Electron., vol. 58, no. 7, pp. 2926-2934, 2011. [27] C. Yao, X Ruan, X. Wang, et al. “Isolated Buck-Boost DC/DC converters suitable for wide input-voltage range,” IEEE Trans. Power Electron., vol. 26, no. 9, pp. 2599-2613, 2011. [28] C. Yao, X Ruan, W. Cao, et al. “A two-mode control scheme with input voltage feed-forward for the two-Switch buck-boost DC–DC converter,” IEEE Trans. Power Electron., vol. 29, no. 4, pp. 2037-2048, 2014.
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Yong Kang was born in Hubei Province, China, on October 16, 1965. He received the B.E. M.E, and Ph.D. degrees from Huazhong University of Science and Technology, Wuhan China, in 1988, 1991 and 1994, respectively. In 1994, he joined Huazhong University of Science and Technology as a Lecturer and was promoted to Associate professor in 1996 and to Full Professor in 1998. He is presently the Head of the College of Electrical and Electronic Engineering, Huazhong University of Science and Technology. He is the author of more than 60 technical papers. His research interests include power electronic converter, ac drivers, electromagnetic compatibility, and their digital control techniques.
Xuejun Pei received the B.E. degree, the M.E. degree and Ph.D. degree in electrical engineering from Huazhong University of Science and Technology, Wuhan, China, in 1998, 2001, and 2004, respectively. In 2004, he joined Huazhong University of Science and Technology as a teaching Assistant. From 2006 to present, he was an Associate Professor with the College of Electrical and Electronic Engineering. His research interests focus on high power converter, EMC issue, fault diagnosis of power electronics and the related control techniques. Songsong Nie (S’10) was born in Hubei Province, China, on November 5, 1986. He received the B.E. degree in electrical and electronic engineering from Huazhong University of Science and Technology, Wuhan, China, in 2008, where he is currently pursuing the Ph.D. degree. His research interests include power electronic circuits and fault diagnosis.
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Switch Short-Circuit Fault Diagnosis and Remedial Strategy for Full-Bridge DC-DC Converters Xuejun Pei, Songsong Nie, and Yong Kang Abstract—Switch fault diagnosis and remedial actions are an important design aspect for isolated full-bridge dc-dc converters, and they can highly improve reliability of the whole system. In this paper, a fast switch short-circuit fault (SCF) diagnostic method is proposed for the phase-shifted full-bridge (PSFB) converter. The dc-link current and transformer primary voltage are treated as diagnosis criteria. Based on the combination of real-time criteria and switch gate-driver signals, the switch SCF can be identified rapidly, and thus further damage can be avoided. Besides, a remedial action for the faulty PSFB converter is introduced to keep the continuity of the system. The converter under fault can be reconfigured into an asymmetrical half-bridge (AHB) converter. Moreover, a boost unit, including a switch and a diode, is inserted into between the output rectifier and filter capacitor to compensate the output voltage. The operational principle, design considerations, and implementation are discussed in this paper. Experimental results are shown to verify the validity of theoretical analysis. Index Terms—short-circuit fault, fault diagnosis, remedial actions, dc-link current, gate-driver signals, boost unit.
I. INTRODUCTION hase-shifted full-bridge (PSFB) converter with zero voltage switching (ZVS) is extensively used in hybrid electric vehicles, communication, aeronautics, and astronautics applications [1]-[3], due to its advantages such as high efficiency, and simple control. In these applications, since an accident or fault can result in malfunctions of the whole system, reliability of the PSFB converter is one of the most important factors to keep the safe, continuous and high performance operation. In order to achieve the high reliability, redundant concept has been proposed in [4]-[5]. This is a costly option because additional converters are connected in parallel to achieve the required redundancy, in case of failure of the main converter. Instead, a “fault-tolerant control”, which consists of the following tasks [6]-[7]: 1) fault detection; 2) fault
P
This work was supported by the Lite-On Power Electronics Technology Research Fund, Grant No. 2014-04. The authors are with the State Key Laboratory of Advanced Electromagnetic Engineering and Technology, Huazhong University of Science and Technology, Wuhan, 430074 Hubei, China (e-mail: [email protected]; [email protected]; [email protected]).
identification; and 3) remedial actions, is introduced. The fault detection and identification (usually called “fault diagnosis”) are used to identify the location and type of the fault. The remedial actions are the process to isolate faulty devices and reconfigure the converter for a safe and continuous operation. With fault-tolerant technology, a system under fault may be able to continue the sustained operation with reduced performance, instead of disconnecting a portion of the system. It was estimated that about 38% of all failures were found in power converters, and most of faults occur in power switches because of the high electrical and thermal stress [7]. Failures of power switches can take place in forms of open-circuit faults (OCF) or short-circuit faults (SCF) [8]. The switch OCF can be caused by the lifting of the bonding wires during thermic cycling, a driver failure or a SCF induced rupture. Some switch OCF diagnostic methods for dc-dc converters have been developed in [9]-[19]. Besides, some open-circuit fault-tolerant strategies have been also introduced in [14]-[19]. The switch SCF often occurs due to either an improper gate-driver (caused by driver circuit malfunction or auxiliary power supply failure) or an intrinsic failure (caused by overvoltage/avalanche stress or temperature overshoot). This fault results in a shoot-through of the dc-link that blows out other components, particularly switches. Therefore, the switch SCF is one of the most fatal accidents, and the crucial thing is to minimize the time between SCF initiation and appropriate reaction. Some researchers have published technical papers to deal with the switch SCF in power converters [9]-[11], [20]-[22]. Generally speaking, switch SCF protection is already a standard practical integrated part in the gate-driver [20]. However, this method is high-cost and commonly utilized in high-power inverter applications. Some switch SCF diagnostic methods based on the output current or voltage were proposed for dc-ac inverters in [21]-[22]. Nevertheless, these methods are unsuitable for dc-dc converters. A fast switch SCF diagnostic method for single-switch converters was proposed in [9]. Another fault protection method for a three-level half-bridge converter, which utilized the flying capacitor voltage as the diagnostic variable, was proposed in [10]. Obviously, these methods cannot be applied to the PSFB converter. In order to detect the switch SCF in the PSFB converter, S. Y. Kim et al. [11] treated the dc-link current as the diagnostic variable, in which the switch SCF is detected by comparing the peak and integral value of the dc-link current.
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IEEE TRANSACTIONS ON POWER ELECTRONICS However, the fault detection time is long, and the precise position of faulty switches cannot be located. In this paper, a new SCF diagnosis and remedial strategy is proposed for the PSFB converter. The dc-link current and transformer primary voltage are utilized as the fault diagnostic criteria. Since the transformer primary voltage can be measured by a simple auxiliary winding, only one sensor is needed. Based on the combination of real-time criteria and switch gate-driver signals, switch SCF characteristics are instantaneously extracted, and the SCF fault is immediately isolated. Then, the faulty switch can be located within one switching period, and the faulty PSFB converter is reconfigured into an asymmetrical half-bridge (AHB) converter. The proposed method can minimize the detection time and keep continuous operation of the converter. Therefore, it has the advantages of low cost, fast fault diagnosis, and high reliability. The remaining parts of the paper are organized as follows. In Section II, basic configuration and operational processes of the overall system are presented first, including the diagnostic signal selection. In Section III, switch SCF behaviors and fault detection method of the PSFB converter are analyzed. Then, detailed explanations of the fault identification method and remedial strategy are presented in Sections IV and V, respectively. The proposed methodology is verified by experimental results in Section VI. Finally, the conclusion is presented in Section VII. II. SYSTEM OVERVIEW A. Basic Configuration and Operational Processes Fig. 1 shows the proposed PSFB dc-dc converter with DSP controller and fault diagnostic unit. Here, power switches (Q1–Q4) denote MOSFET or insulated gate bipolar transistor (IGBT) devices. The power stage of the converter consists of four switches, an additional primary inductor Lp, a blocking capacitor Cb, a transformer T (the turns ratio of primary winding np to secondary winding ns1 is K), full-bridge rectifier (D1–D4), an output inductor Lf, an output capacitor Cf, critical loads Rm and noncritical loads RS. In the control part, the output voltage vo(t) is fed back to the DSP controller. Switches Q1–Q4 are controlled by the DSP controller. A binary variable “sk” (k=1, 2, 3, and 4) is utilized to represent the gate-driver signal of Qk, which is set to “1” when the signal is high-level and “0” when low-level. In the normal state, the power stage works as a conventional PSFB converter, and the voltage vo(t) is regulated by the phase-shifted d. When the switch SCF occurs, the diagnostic circuit can quickly take action to locate the faulty switch. When the exact location of faulty switch is determined, the DSP controller reconfigures the converter for post-fault operation. In the switch SCF state, the PSFB converter can be reconfigured into an AHB converter by changing the control scheme. For example, if the switch SCF occurs in the lower switch of a leg, the upper switch in the same leg is turned off, and thus the middle point in this leg is connected to the negative dc-bus. Therefore, the shoot-through of dc-link is avoided
2
Fig. 1. Structure of the overall system.
Fig. 2. Post-fault operation. naturally, and the healthy leg can be controlled as an AHB converter. Likewise, the AHB converter can be also obtained when the switch SCF occurs in the upper switch. The reconfigured converter shown in Fig. 2(a) is an example of the switch Q4 SCF. Based on the above analysis, under different switch SCF states, the control schemes are also different, as shown in Fig. 2(b). Compared to the normal PSFB converter, the output voltage of the reconfigured AHB converter is reduced [19], [23]-[24]. To ensure the continuity of the whole system, the output voltage of the reconfigured converter should be kept consistent. Therefore, the output voltage should be compensated, and it will be illustrated in the Section V. B. Diagnostic Signal Selection In order to locate the faulty switch and reconfigure the converter, a diagnostic signal with adequate information should be selected. Since the dc-link current flows through switches whenever the PSFB converter works, and its shape is highly determined by the switch state, the dc-link current is the most suitable criterion for the switch SCF diagnosis [11]. The current can be sensed by a hall sensor or via a current transformer, and the measured signal is named as idc. III. SWITCH SHORT-CIRCUIT FAULT DETECTION To detection the switch SCF, switch fault behaviors should be analyzed first. For the illustrative purpose, several assumptions are made as following: 1) All the switches and diodes are ideal. 2) Cb is large enough, and its voltage vcb is treated as zero under the normal state.
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Fig. 3. Key waveforms under normal state and Q3 SCF. TABLE I SIGNAL SID UNDER NORMAL AND ABNORMAL STATE sid
s1
s3
( s2 )
( s4 )
normal
Q1 SCF
Q2 SCF
Q3 SCF
Q4 SCF
0
0
0
1
0
1
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
0
0
0
1
1
0
discussed in this paper. Once the switch SCF occurs, a rather high current pulse must appear at the dc-link side (see Fig. 2, taking Q3 SCF as an example). Thus, the switch SCF can be detected by evaluating the current idc. A comparator N1 is designed as shown in Fig. 3, and the comparator output sid is used to represent the signal idc: sid 1 idc I th , (1) sid 0 idc I th , where Ith is the threshold value of the comparator N1, and it depends on the rated load current Io of the converter. Under the normal state, the maximum value of the dc-link current, Idcmax, can be expressed theoretically as Io/K (in comparison with Io/K, the magnetizing current is small enough to be neglected). In order to avoid misdiagnosis caused by noise or transition operation, Ith should be far more than Idcmax. However, it means that high current switches should be selected, which increases the cost. Therefore, compromising the sensitivity and cost, Ith is empirically set to be 3Io/K. Obviously, Ith is valid for all wide load ranges, and thus the switch SCF detection is independent of the load. From (1), it can be concluded that when the signal sid keeps low-level, the converter is normal; once the signal sid becomes high-level, the switch SCF comes about. For the current idc, when the switch SCF occurs during the dead time, high current pulse cannot appear, thus the dead time can be ignored. Therefore, based on gate-driver signals (s1, s3), the PSFB converter can operate in four modes: (1, 1), (1, 0), (0, 0), and (0, 1). The signal sid under normal and faulty states is presented in Table I. Apparently, no matter which switch is under the SCF state, the signal sid must become high-level. Thus, the switch SCF detection based on the dc-link current is feasible. IV. SCF IDENTIFICATION METHODOLOGY A. Combination of Gate-Driver Signals and DC-Link Current
Fig. 4. Diagnostic circuit and diagram.
3) Ignoring the small current ripple, the current flowing through Lf can be treated as the load current. 4) The magnetizing inductance of the transformer is large, so that the magnetizing current Im can be treated as a constant current. Fig. 3 shows key waveforms of the converter under normal and faulty states. These waveforms under the normal state have been analyzed in [1]; therefore, operational modes are not
Definite faulty switch cannot be identified only by the dc-link current. From Table I, it can be found that in any operation mode, only two faulty types can make the signal sid become high-level. For example, when sid becomes high-level at the mode (1, 1), only the switch Q2 or Q4 can be under the short-circuit state. If the switch SCF occurring time is detected, the range of the faulty switch can be determined. To exactly identify the mode that the switch SCF occurs in, another four signals are introduced which can be obtained by combining sid and gate-driver signals: A13 s1 & s3 & sid A13 s2 & s4 & sid A s & s & s A s & s & s 14 1 2 3 id 3 id (2) 14 A s & s & s A s & s & s 24 1 3 id 3 id 24 1 A23 s1 & s4 & sid A23 s1 & s3 & sid Obviously, when the signal A13 becomes high-level first, the switch SCF occurs in the mode (0, 0). Likewise, the signals A14, A24, and A23 becoming high-level first mean that the switch SCF occurs in the modes (0, 1), (1, 1), and (1, 0), respectively.
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Fig. 5. Key waveforms from the normal state to: (b) Q2 SCF, (c) Q4 SCF.
4 can be identified during one switching period, the capacitor voltage vcb is treated as zero in comparison with the dc-link voltage Vdc. The diagnostic circuit and diagram are illustrated in Fig. 4. Switch SCF occurring in the mode (1, 1): Fig. 4 shows the time sequence from the normal state to the switch SCF state. Once the switch SCF appears at this mode, the signal A24 becomes high-level first, thus the switch Q2 or Q4 may be under the short-circuit state. In general, the short-circuit resistance of the faulty switch is less than the normal conduction resistance. When the switch Q2 SCF occurs as shown in Fig. 5 (a), the voltage of node A is less than Vdc/2, and thus the voltage vm is less than -Vdc/2kau (kau is the turns ratio of primary winding np to auxiliary winding nau). However, when the switch Q4 SCF occurs as shown in Fig. 5 (b), the voltage of node B is less than Vdc/2, and thus the voltage vm is more than Vdc/2 kau. Apparently the positive or negative characteristic of vm is enough for fault diagnosis. This implies that the analog signal vm should be transferred to a logical signal. Thus a comparator N2 as shown in Fig. 4 is designed to convert vm into a logical signal sm: vm Vth , sm 1 (3) vm Vth , sm 0 where Vth is the threshold value of the comparator. Due to the appearance of zero voltage in vm under the normal case, Vth should be set a little less (or more) than zero, and it can be chosen as 0 Vdc / 2kau Vdc 0 Vdc / 2kau Vdc Vth or Vth 2 4kau 2 4kau (4) In our experiment, Vth is set to be –Vdc/4kau in order to facilitate the switch fault diagnosis in the mode (1, 1). From the equation (4), it is seen that when switch Q2 SCF occurs in this mode, the signal sm is low-level; while switch Q3 SCF occurs, the signal sm is high-level. According to the analysis, Q2 SCF and Q4 SCF can be diagnosed by combining signals A24 and sm:
F2 A24 & sm
Fig. 6. Key waveforms from the normal state to: (a) Q2 SCF, (b) Q3 SCF. B. Switch SCF Identification Based on the above analysis, it can be concluded that once the signal Ajk (j=1, 2; k=3, 4) becomes high-level first, only the switch Qj SCF or Qk SCF occurs. However, this signal still cannot locate the exact faulty switch. Hence, the transformer primary voltage, which can be measured by an auxiliary winding and used to detect the switch OCF, is introduced to cooperate with the signals A13, A14, A23 and A24. As shown in Fig. 1, an auxiliary winding nau is added to the transformer, and the auxiliary winding voltage is named as vm. Due to the symmetrical structure of the converter, just the switch SCF occurring in the modes (1, 1) and (1, 0) is analyzed in this section. Here, it is emphasized that since the switch SCF
(5)
F4 A24 & sm (6) It is noted that signals F2 and F4 are pulse-form and cannot be directly used to identify the switch fault, thus two Reset-Set (RS) triggers are designed to latch the signals. The outputs of the triggers FS2 and FS4 are utilized to signify Q2 SCF and Q4 SCF respectively: as shown in Fig. 5, under the normal case, both signals FS2 and FS4 are high-level; when FS2 becomes low-level, the switch Q2 SCF occurs; when FS4 becomes low-level, the switch Q4 SCF comes about. Switch SCF occurring in the mode (1, 0): Once the switch SCF appears at this mode, the signal A23 becomes high-level first, thus the switch Q2 or Q3 may be under the short-circuit state. In this mode, no matter whether switch Q2 SCF or Q3 SCF occurs, the voltage vm is positive and sm is still high-level as shown in Fig. 6. Therefore, the switch fault cannot be directly identified by combining the signal A23 and sm. Instead, the switch fault identification in this mode is realized by the cooperation of the hardware circuit and DSP controller. As shown in Fig. 4, a RS trigger is designed to latch
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Fig. 7. Output voltage compensation.
Fig. 8. Reconfigured converter. the signal A23 , and the DSP captures the trigger output T23. Once the signal T23 becomes low-level, gate-driver signals are locked (make vm become zero so that it does not have an effect on later diagnosis). After a short time, gate-driver signals are reset and only the signal s2 keeps high-level. When the switch Q2 SCF occurs, the voltage vm keeps zero and the signal sm keeps high-level. However, when the switch Q3 SCF occurs, the voltage vm is almost -Vdc/kau and less than Vth at the beginning, so sm becomes low-level. The DSP controller captures the signal sm. Based on the analysis, when the signal T23 is high-level and sm is high-level, the switch Q2 SCF occurs; when the signal T23 is high-level and sm is low-level, the switch Q3 SCF occurs. Key waveforms under Q2 SCF and Q3 SCF are displayed in Fig. 6. Similarly, the switch SCF occurring in the modes (0, 0) and (0, 1) can be identified by the proposed way.
V. OUTPUT VOLTAGE COMPENSATION A. Review of Output Voltage Compensation Methods After identifying the faulty switch, the DSP controller reconfigures the converter into an AHB converter for post-fault operation. However, it is noted that when the converter works as an AHB converter, the output voltage gain is reduced. To ensure the continuity of the whole system, the output voltage of the reconfigured converter should be compensated and kept consistent. Indeed, some methods are proposed in the following. Method 1: The secondary winding can be doubled in order to compensate the output voltage. As shown in Fig. 7 (a), the topology proposed in [19] can keep the output voltage consistent before and after the fault. Once the fault is located, the single-pole double-throw relays SR is driver to low level. Therefore, the new secondary winding ns2 is inserted into the secondary side and turns ratio of the transformer is also halved.
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IEEE TRANSACTIONS ON POWER ELECTRONICS However, voltage stresses of the secondary side diodes D1-D4 are increased. Method 2: Fig. 7 (b) shows a reconfigurable structure dc-dc converter [25]. In the normal state, the switch Q5 keeps off and the two output channels are in parallel. Once the switch SCF occurs, the converter is reconfigured and the switch Q5 is on. The two output channels are in series, thus the output voltage can be compensated. Compared to the previous method, voltage stresses of diodes D1-D4 are not increased. However, more components are needed and the cost is high. Method 3: A boost unit can be inserted into the converter so as to keep the output voltage constant as shown in Fig. 7(c). In Fig. 7(c), the boost unit is put at the dc-link side [26]. After the fault, the output voltage can be regulated by the switch Q5. However, an additional inductor is needed. Besides, voltage stresses of switches Q1-Q4 and diodes D1-D4 are highly increased. Method 4: In Fig. 7(d), the boost unit is put behind the rectifier [27]. Compared to the methods mentioned in Fig.7 (a)-(c), voltage stresses of rectifier diodes are not increased and required additional components are the most minimum. In terms of cost and size, the output voltage component topology in Fig. 7(d) is utilized.
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Fig. 9. Photograph of the experimental prototype. Table II ELEMENT PARAMETERS Q1 - Q5
IRFP450
D1-D5
MBR2060CT
Lp
10uH
Llk
150uH
Cb
4uF
Vdc
100V
Vo
12V
K
28:4
Switching frequency
50KHz
B. Operation of the Reconfigured Converter In the normal state, the switch Q5 keeps off all along, and the system is actually operating as a traditional PSFB converter. Once the exact location of the faulty switch is determined, the DSP controller reconfigures the faulty PSFB converter into an AHB converter. Taking the switch Q4 SCF as an example, the reconfigured converter is shown in Fig. 8. The converter can be considered as a two-stage converter: AHB and boost converter. To simplify the control strategy, the duty cycle of the AHB converter keeps 0.5 and the output voltage is regulated only by the switch Q5. The operational mode of the converter can be similar with the analysis in [23], [27]-[28]. Besides, ignoring the duty cycle losses, the voltage gain of the reconfigured converter can be expressed as following: KVo 1 AHB+Boost: G AHBB (7) 2(1 D ) Vdc where D is the duty cycle of the switch Q5 as shown in Fig. 8. C. Limitations of the Proposed Remedial Strategy Although the proposed remedial strategy can provide the continuous power to the load, there are three major limitations: (1) Supposing that the output current is io, the average inductor current ilf is io/(1-D) due to the boost unit. If the converter still provides the rated power for the reconfigured converter, switches Q1-Q4 and diodes D1-D4 may suffer from the excess current stresses. To avoid this situation, the noncritical loads of the converter RS can be disconnected by the single-pole double-throw relay SR1, whereas the critical loads Rm are supplied continuously. (2) When the converter works as a traditional PSFB converter, the diode D5 is always on, thus the efficiency of the converter is decreased. (3) Since the PSFB and the boost units share an inductor, the switching frequency of switch Q5 should be two times that of
switch Q1- Q4, in order to reduce the inductor current ripple and optimize the inductor design [27]. VI.
EXPERIMENTAL RESULTS
In order to verify the proposed fault diagnosis and remedial method, an isolated dc-dc PSFB converter prototype has been implemented. The photograph of the experimental prototype is shown in Fig. 9. The TI DSP TMS320F2812 is used as the controller. The converter is designed to have a rated output voltage and current of 12 V and 6 A at 100 V dc-bus. The power rating is 72 W and the switching frequency is 50 KHz. The relevant parameters are shown in Table II. The magnetic component voltage is sensed by adding an auxiliary winding to the magnetic component, and the dc-link current is measured by a hall. It is noticed that noise or transition operation may influence the transformer primary voltage and dc-link current, incorrect result can happen. To ovoid the effect of noise or transition operation, a low-pass RC filter and regulation circuits are used for the measured voltage and current signals. Due to the symmetrical structure of the PSFB converter, just the switch fault occurring in the modes (1, 1) and (1, 0) is concerned. The switch SCF is implemented by shorting it with a 0-Ωresistor [11], and to avoid huge current resulted from the switch SCF, four 1- Ω resistors are series with the switches Q1-Q4 respectively. Fig. 10 shows the complete and typical
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7
Fig. 10. Complete fault diagnosis processes under: (a) Q2 SCF, and (b) Q4 SCF.
Fig. 11. Complete fault diagnosis processes under: (a) Q2 fault, and (b) Q3 fault. diagnosis processes when the switch SCF occurs in the mode (1, exceeds Ith. At the time tb, the signal T23 becomes low-level, and 1). The capacitor voltage vcb is almost zero, thus it does not the switch SCF is detected. At the time tc, DSP controller reads have an effect on the fault diagnosis. Fig. 10(a) shows the the signal T23 and gate-driver signals are locked. At the time td, process when the switch Q2 SCF occurs. Before ta, the power gate-driver signals are reset and only the signal s2 keeps stage works as a PSFB converter and the output vo(t) is high-level. Then, it can be seen that the voltage vm keeps zero. regulated to the desired value by the phase-shifted d. Then, The experimental results verify the above analysis in Fig. 5(a). when switch SCF occurs at ta, it can be seen that the dc-link Therefore, DSP controller can consider that switch Q2 SCF current idc is highly increased and exceeds the threshold value occurs. When the fault occurs in Q3, the signal T23 also becomes Ith (in our experiment, Ith is set to 5A). Meantime, the voltage vm low-level. However, after DSP actions, the voltage vm is less than zero in a rather long time (until the capacitor voltage vcb is becomes negative and is less than Vth. At the time tb, the signal equal to -Vdc), which is the same as that in Fig. 5(b), thus DSP FS2 becomes low-level. Thus the DSP controller considers that controller considers that switch Q3 SCF occurs. Here, it is still switch Q2 SCF occurs. Here, it is emphasized that in order to emphasized that in the real experiment, gate-driver signals are show the high short-circuit current, the switch gate-driver locked at the time t , and the interval t -t can be emitted. b b c signals are not locked after the SCF is identified. However, the Therefore, shoot-through of dc-link only exists during the gate-driver signals are quickly locked once the fault is interval ta-tb, which does not lead to disastrous overcurrent in identified in the real experiment. The similar process is also the dc-link current. shown in Fig. 10(b) when the SCF occurs in Q4. Once the switch SCF is identified, the PSFB converter is Fig. 11 shows the complete and typical diagnosis processes reconfigured into an AHB converter. The duty cycle of the when the switch SCF occurs at the mode (1, 0). Fig. 11(a) AHB converter is set to 0.5, and the output voltage vo is shows the process when the fault occurs in Q2. Before ta, the regulated by the switch Q5. Due to the symmetrical structure of power stage works as a PSFB converter, dc-link current idc does the PSFB converter, just switch Q2 SCF is takes as an example. not exceed the threshold value Ith. When the switch Q2 SCF Switch Q2 SCF can occur in the mode (1, 1) or (1, 0), and the occurs at ta, it can be seen that current idc is highly increased and
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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2014.2310201, IEEE Transactions on Power Electronics
IEEE TRANSACTIONS ON POWER ELECTRONICS
Fig. 12. Key waveforms under switch Q2 pre-and fault diagnosis time is longer when the fault occurs in the mode (1, 0). Thus, for the illustrative purpose, just the remedial process of Q2 SCF occurring in the mode (1, 0) is displayed in Fig. 12. Due to the fast fault diagnosis and remedy, the output voltage is almost constant. Here, it is noticed that current idc under post-fault is increased because of the boost unit, thus the maximum load current of reconfigured converter is almost half of the rated load current Io [19], and the rated power is halved. VII. CONCLUSION A new switch SCF diagnostic and remedial strategy is put forward for the isolated PSFB dc-dc converter. The proposed method can detect the switch SCF, identify the exact location of the faulty switch, and reconfigure the faulty converter into an AHB one. Besides, a boost unit is inserted into the converter in order to compensate the output voltage. The diagnostic principle and implementation are presented. Experimental results validate the feasibility of the proposed method. According to the aforementioned analysis and implementation, the following advantages can be obtained: 1) The diagnostic results are exact and fast. The converter can provide the continuous dc power to the critical load when the SCF occurs in any switch. Therefore, the reliability of the system is enhanced greatly. 2) The cost of the remedial system is low because only a switch and a diode are added. 3) Before and after the fault, voltage stresses of switches and rectifier diodes are consistent. Therefore, redundant parts do not affect normal parameter designs of the PSFB converter. For the aforementioned advantages, the proposed approach is an effective solution, in terms of the reliability and cost. REFERENCES J.G. Cho, J. A. Sabate, G. Hua, and F. C. Lee, “Zero-voltage and zero-current-switching full bridge PWM converter for high-power applications,” IEEE Trans. Power Electron., vol. 11, no. 4, pp. 622–628, Jul. 1996. [2] J. Zhang, F. Zhang, X. Xie, D. Jiao, and Z. Qian, “A novel ZVS DC/DC converter for high power applications,” IEEE Trans. Power Electron., vol. 19, no. 2, pp. 420–429, Mar. 2004. [1]
8 [3] W. Chen, X. Ruan, et al, “A novel zero-voltage-switching PWM full bridge converter,” IEEE Trans. Power Electron., vol. 23, no. 2, pp. 793–801, Mar. 2008. [4] P. A. Kullstam, “Availability, MTBF and MTTR For repairable M out of N system,” IEEE Trans. Rel., vol. R-30, no. 4, pp. 393–394, Oct. 1981.. [5] R. V.White and F.M.Miles, “Principles of fault tolerance,” in IEEE Appl. Power Electron. Conf. (APEC), 1996, pp. 18–25. [6] R. L. A. Ribeiro, C. B. Jacobina, E. R. C. Silva, and A. M. N. Lima, “Fault detection of open-switch damage in voltage-fed PWM motor drive systems,” IEEE Trans. Power Electron., vol. 18, no. 2, pp. 587–593, 2003. [7] Shin-Myung Jung, Jin-Sik Park, Hag-Wone Kim, Kwan-Yuhl Cho, and Myung-Joong Youn, “An MRAS-based diagnosis of open-circuit fault in PWM voltage-source inverters for PM synchronous motor drive systems,” IEEE Trans. Power Electron., vol. 28, no. 5, pp. 2514–2526, 2013. [8] B. Lu and S. K. Sharma, “A literature review of IGBT fault diagnostic and protection methods for power inverters,” IEEE Trans. Ind. Appl., vol. 45, no. 5, pp. 1770-1777, 2009. [9] M. Shahbazi, E.Jamshidpour, P. Poure, S. Saadate, and M. Zolghadri, “Open and short-circuit switch fault diagnosis for nonisolated DC-DC converters using field programmable gate array,” IEEE Trans. Ind. Electron., vol. 60, no. 9, pp. 4136-4146, 2013. [10] H. Sheng, F. Wang and C.W. Tipton, “A fault detection and protection scheme for three-level DC-DC converters based on monitoring flying capacitor voltage,” IEEE Trans. Power. Electron., vol. 27, pp. 685 – 697, 2012. [11] S. Y. Kim, K. Nam, H.S. Song, and H.G. Kim, “Fault diagnosis of a ZVS DC-DC converter based on DC-link current pulse shapes,” IEEE Trans. Power. Electron., vol. 55, no. 3, pp. 1491-1494, 2008. [12] Y. Chen, X. Pei, S. Nie and Y. Kang, “Monitoring and diagnosis for the DC-DC converter using the magnetic near field waveform,” IEEE Trans. Ind. Electron., vol. 58, no. 5, pp. 1634-1647, 2011. [13] E. Ribeiro, A. J. M. Cardoso, C. Boccaletti, “Open-circuit fault diagnosis in interleaved DC-DC converters,” IEEE Trans. Power. Electron., vol 25, no. 6, pp. 3091-3102, 2014. [14] V. Choudhary, E. Ledezma, R. Ayyanar, and R.M. Button, “Fault tolerant circuit topology and control method for input-series and output-parallel modular DC-DC converters,” IEEE Trans. Power Electron., vol.23, no.1, pp. 402-411, 2008. [15] K. Ambusaidi, V.Pickert, and B.Zahawi, “New circuit topology for fault tolerant H-bridge DC-DC converter,” IEEE Trans. Power. Electron., vol 29, no. 6, pp. 1509-1516, 2010. [16] L. Palma and P.N. Enjeti, “A modular fuel cell, modular DC–DC converter concept for high performance and enhanced reliability,” IEEE Trans. Power. Electron., vol 24, no. 6, pp. 1437-1443, 2009. [17] T. Park, and T. Kim, “Novel fault tolerant power conversion system for hybrid electric vehicles,” in IEEE Vehicle Power and Propulsion Conf. (VPPC), 2011. [18] E. Ribeiro, A.J.M, Cardoso and C. Boccaletti, “Fault-tolerant strategy for a photovoltaic DC-DC converter,” IEEE Trans. Power. Electron., vol.28, no.6, pp.3008-3018, 2013. [19] X. Pei, S. Nie, Y. Chen and Y. Kang, “Open-circuit fault diagnosis and fault-tolerant strategies for full-bridge DC-DC converters,” IEEE Trans. Power. Electron., vol. 27 no. 5, pp. 2550-2565, 2012. [20] K. Rothenhagen, F. W. Fuchs, “ Performance of diagnosis Methods for IGBT open circuit faults in voltage source active rectifiers,”in IEEE Power Electron. Spec. Conf., (PESC), 2004, pp. 4348- 4354.
0885-8993 (c) 2013 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2014.2310201, IEEE Transactions on Power Electronics
IEEE TRANSACTIONS ON POWER ELECTRONICS [21] A. M. S. Mendes and A. J. Marques Cardoso, “Voltage source inverter fault diagnosis in variable speed ac drives, by the average current Park’s vector approach,” in Proc. IEMDC, 1999, pp. 704–706. [22] F. Richardeau, P. Baudesson, and T. A. Meynard, “Failures-tolerance and remedial strategies of a PWM multicell inverter,” IEEE Trans. Power Electron., vol. 17, no. 6, pp. 905–912, Nov. 2002. [23] R. T. Chen, Y. Y. Chen, et al. “Single-stage asymmetrical half-bridge regulator with ripple reduction technique,” IEEE Trans. Power Electron., vol. 23, no. 4, pp. 1358-1369, 2008. [24] I, Lee, Gu. Moon “A new asymmetrical half-bridge converter with zero DC-offset current in transformer", IEEE Trans. Power Electron., vol. 28, no. 5, pp. 2297-2306, 2013. [25] P. Sun, L. Zhou, K. M. Smedley. “A reconfigurable structure DC-DC converter with wide output range and constant peak power,” IEEE Trans. Power Electron., vol. 26, no. 10, pp. 2925-2935, 2011. [26] J.Y.Lee, Y.S. Jeong, et al. “An isolated DC/DC converter using high-frequency unregulated LLC resonant converter for fuel cell applications ,” IEEE Trans. Ind. Electron., vol. 58, no. 7, pp. 2926-2934, 2011. [27] C. Yao, X Ruan, X. Wang, et al. “Isolated Buck-Boost DC/DC converters suitable for wide input-voltage range,” IEEE Trans. Power Electron., vol. 26, no. 9, pp. 2599-2613, 2011. [28] C. Yao, X Ruan, W. Cao, et al. “A two-mode control scheme with input voltage feed-forward for the two-Switch buck-boost DC–DC converter,” IEEE Trans. Power Electron., vol. 29, no. 4, pp. 2037-2048, 2014.
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Yong Kang was born in Hubei Province, China, on October 16, 1965. He received the B.E. M.E, and Ph.D. degrees from Huazhong University of Science and Technology, Wuhan China, in 1988, 1991 and 1994, respectively. In 1994, he joined Huazhong University of Science and Technology as a Lecturer and was promoted to Associate professor in 1996 and to Full Professor in 1998. He is presently the Head of the College of Electrical and Electronic Engineering, Huazhong University of Science and Technology. He is the author of more than 60 technical papers. His research interests include power electronic converter, ac drivers, electromagnetic compatibility, and their digital control techniques.
Xuejun Pei received the B.E. degree, the M.E. degree and Ph.D. degree in electrical engineering from Huazhong University of Science and Technology, Wuhan, China, in 1998, 2001, and 2004, respectively. In 2004, he joined Huazhong University of Science and Technology as a teaching Assistant. From 2006 to present, he was an Associate Professor with the College of Electrical and Electronic Engineering. His research interests focus on high power converter, EMC issue, fault diagnosis of power electronics and the related control techniques. Songsong Nie (S’10) was born in Hubei Province, China, on November 5, 1986. He received the B.E. degree in electrical and electronic engineering from Huazhong University of Science and Technology, Wuhan, China, in 2008, where he is currently pursuing the Ph.D. degree. His research interests include power electronic circuits and fault diagnosis.
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