Modelling the complexity of parallel and VLSI computations with Boolean circuits

Modelling the complexity of parallel and VLSI computations with Boolean circuits Constantinos V Papadopoulos* and Theodoros S Andronikos t

Complexity theory seeks to understand the resource requirements inherent in the solution of problems on computers. It also seeks to understand the relative computational power of different models. The Turing model is difficult to work with, in part because of the impossibility of studying strictly finite structures. Boolean circuits are playing a more important role in our understanding of computation. They are useful as models in situations as far removed as VLSI design and parallel computation. The branching program challenges our intuitions. It has been shown in an indirect fashion that constant-width branching programs can 'count', but not exactly how. Algebraic methods give a handle and allow us for the first time to study complicated combinatorial structures.

Keywords: sequential complexity, Boolean circuits, lower bounds

In the mid 1960s Hartmanis and Stearns began the study of computational complexity: the theory of time and space bounded Turing machines t. This theory forms the basis of our understanding of the nature of feasible, as opposed to existentially possible, computation. Research into the nature of what is realistically computable led to the formulation of the famous P ~ NP conjecture. Our understanding of Turing machine-based complexity, as originally conceived, is hampered by a lack of tools and techniques for proving bounds on resource requirements. Since the Turing model allows any finite function to be computed trivially, the theory forces us to focus primarily on the asymptotic behaviour of algorithms. This represents a significant philosophical as well as technical difficulty. In contrast, when we analyse the complexity of a problem such as sorting on a machine that uses comparisons to make its decisions we achieve essentially complete success. Comparison-tree arguments yield very closely upper and *Department of Informatics, University of Piraeus, Greece tComputer Science Division, Department of Electrical and Computer Engineering, National Te(hnical University of Athens, Greece Paper r~ceived: 20 August 1993. Revised: 16 September 1994

lower bounds on the number of times values need to be compared in order to arrange n objects in order. The bounds hold not just in the limit, but for every value of n. Boolean circuits, as a model, are somewhat like Turing machines and somewhat like comparison trees. Studied first by electrical engineers who used them to model digital switching circuits, they are attracting renewed interest as a good general model of parallelism and as a strictly finite model for the study of computational complexity. An important relationship between circuits and Turing machines has been established 2'3 where it is shown that t steps of the computation of an arbitrary Turing machine can be simulated by a Boolean circuit that contains O ( t log t) gates and has depth O(t) ~. (The outline of a weaker theorem is described in the Circuits and sequential complexity section.) The connection between Turing machines and circuits means, for example, that a nonpolynomial lower bound on the circuit-size complexity of a language L implies that L is not computable in polynomial time by a Turing machine. Polynomial-size, bounded fan-in Boolean circuits are currently viewed as the most general model of feasible parallelism. (Fan-in refers to the number of wires input to any gate.) The subclass of special interest comprises those circuits that have small depth and which, therefore, correspond to parallel algorithms that run last. The family N C k introduced by Pippenger is defined to be the collection of problems solvable by depth O((log n) ~) circuits that have a polynomial number of bounded fan-in Boolean gates. The class NC, namely the set union of all subclasses N C k for every possible value of k, is in some sense the class of feasibly parallelizable problems. Many important problems are not known to be feasibly parallelizable, and just as we do not know whether P = NP we also do not know the relation between N C and NP. *The notation O(t) is pronounced 'order of I and means 'upper-bounded by a multiple of t'.

0141-9331/95/$09.50 1995Elsevier Science B.V. All rights reserved Microprocessors and Microsystems Volume 19 Number 1 February 1995

43

Modelling with Boolean circuits: C V Papadopoulos and T S Andronikos The class* AC = U k A C k in which A C k is the collection of problems solvable by polynomial-size circuits of depth O((log n) k) that contain unbounded (arbitrary) fan-in AND and OR gates is closely related to the class NC. It is straightforward to observe that: A C ° c_ N C 1 C_ A C t C_ N C 2 c_ ... c P C N P . . .

and hence that A C = NC. Furst et al. 4 proved the only nontrivial relation known to hold among these classes. They showed that the PARITY function is not in A C °. Since PARITY is easily seen to be in N C l, the Furst et al. result shows that the first inclusion in the hierarchy is proper, i.e. A C ° ~Z N C

1.

The structure of computation down at the level of A C ° and N C t is fundamental to our understanding of parallel computing, and yet it is not well understood. It is widely believed that tools for dealing with the complexity issues at this level need to be developed before we can grasp the complexity issues around P and NP. Th°is review describes some of the work being done using circuits and branching programs to gain insight into the workings of computation in the A C ° and N C 1 world. Several important tools have been invented. One, the method of random restrictions, was introduced by Furst et al. 4. The other, an algebraic encoding of complexity questions, was introduced by Razborov 5. Random restrictions of circuits were used by Yao, Hastad and Cai to improve the super-polynomial lower bounds of Furst et al. to exponential lower bounds 6-8. All the lower bound proofs which use the random restriction method are surprisingly intricate and delicate. The algebraic methods, on the other hand, are more direct. By mapping Boolean functions into rings ~ of polynomials, Razborov 5 and Smolensky 9 were able to prove exponential lower bounds on bounded-depth circuit size in comparatively simple ways. The random restriction and algebraic approaches are discussed in the sections on Random restrictions and Algebraic approaches, respectively. Over the past few years a model of computation called branching programs has generated considerable interest. Branching programs abstract the comparison-tree model to the domain of Boolean functions. The abstraction is twofold: the decision of whether to go left or right at a node is based on the value of a specified Boolean input variable instead of the outcome of a comparison, and the program itself is a levelled directed acyclic graph instead of just a tree. As with a comparison tree, the leaf nodes of a branching program are labelled with the output. See the section on Constant width branching programs for the definitions. Without restrictions, every n-variable Boolean function can be computed by a branching program of depth n having 2 n leaves. The 'width' of a branching program is the maximum number of nodes at any level. The 'length' is the number of levels. Any Boolean function computable in space S(n) on *The notation Uk A C k means set union of all subclasses A C k for every possible value of k lRings are algebraic structures with two defined operators and finitely many contained elements

44

a Turing machine is also computable by a branching program of width O(2S(n)). Hence, lower bounds on branching program width imply lower bounds on Turing machine space. Borodin et al., for instance, used the branching program model to prove a time-space trade-off theorem for sorting ~°. Branching programs, as a computational model, enjoy the same simple elegance displayed by circuits. Initially they arose as intriguing devices with a computational power that seemed somehow subtly greater than the computational power of similar-sized constant-depth circuits. For theorists it was natural to try to understand how branching programs relate to the more familiar models of computation. As it turned out the connections are more than casual. Borodin et al. 1~ provided a characterization of the class of functions computed by the simplest non-trivial class of branching programs, those of constant width two. This permitted them to show that many easy functions, such as the function on four variables which is true when exactly one of its inputs is true, are not even computable. Chandra et al. 12 were able to show that the MAJORITY function (MAJORITY is true if more than half its inputs are on) is not computable by any bounded-width branching program of length O(n). (This result has been strengthened13-15.) For the more restricted width-2 programs, Shearer and Yao were able to show that MAJORITY requires exponential length. The standard conjecture, and prevailing intuition, was that for a branching program to compute MAJORITY in constant-width, it would take an exponential number of steps. After all, a program that only has constant-width appears to be able to remember only a constant amount of information about the input at any point in time: the epitome of a device that cannot count. In one of the most startling and elegant theorems, Barrington proved the opposite. He showed 16 that the class of functions computable by width-5 polynomial-length branching programs is exactly the same as N C 1. The MAJORITY function is in N C ~, therefore Barrington proved MAJORITY can be computed in width and polynomial length.

CIRCUITS Circuits are abstract computational devices built of gates (Boolean functions of one or more Boolean variables) connected by wires that communicate Boolean values. Every gate has at least one input and an output, and the output of one gate may go through wires to be the input of other gates as long as no cycles are formed. The inputs to some gates come from outside the circuit, are labelled xl . . . . . Xn and are the inputs. The output of one gate does not go to the input of another gate and is the output of the circuit. A typical circuit is shown in Figure 1. We consider the behaviour of the circuit when input values are continuously applied. Since the circuit contains no cycles, the computation proceeds from the inputs towards the output and quickly achieves a steady state. The 'size' of a circuit is its number of gates. The 'depth' of a circuit is the length of the longest path from an input to the

Microprocessors and Microsystems Volume 19 Number 1 February 1995

Modelling with Boolean circuits: C V Papadopoulos and T S Andronikos

PARITY

Level

Key

6

=OR

function that can be computed by a 1 -tape Turing machine in time T(n) can be computed by a circuit that has O(T(n) 2) gates 2,19. The proof is nice and is illustrated pictorially in

Figure 2. Take a Turing machine M that computes a function

5

= AND

= NOT 4

3

2

XI

X2

X5

X4

Figure 1 A Booleancircuit

output. The size of the circuit in Figure 1 is 1 5 gates, and its depth is six. It is usual to consider circuits with gates that compute the simplest Boolean functions such as AND, OR and NOT. As a model of computation, circuits are subtly different from machine-based models. A Turing machine program describes what computation is to take place on input strings of all lengths. However, a circuit only describes computation on input strings of a given fixed length, namely, the number of inputs to the circuit. For instance, the circuit of Figure 1 computes the mod 2 sum (PARITY) function, but only on inputs of length four. In order to recognize infinite languages we organize circuits into sequences. To compute t a function f: {0, 1 }* -~ {0, 1 } we consider a sequence

f(xl ... x,) in time T(n). Observe that even if M did nothing except use up tape squares, it could never use more than T(n) tape. For a fixed n, build a circuit out of T(n) 2 small cells, or circuit elements, Cq, 1~
G , C2... in which circuit C, has n inputs and computes function fon inputs of length n. Circuit complexity questions are always described in the framework of sequences of circuits. The theory deals with the rate at which size and depth grow in a sequence that computes a specified function. One correspondence between circuit complexity and sequential Turing machine complexity is described below.

Circuits and s e q u e n t i a l c o m p l e x i t y

Circuit size is Turing time, and circuit depth is Turing space. (As a model of parallel computation, circuit size is the number of processors and circuit depth is time.) Any X0 ' ~

~{0, 1}* is the Cartesian product of zero or more instances of the set {o, ~}.

Xl

X 2 ooe

oOOXn

ooo

ooo B l a n k

Figure 2 Turing machine circuit

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Modelling with Boolean circuits: C V Papadopoulos and T S Andronikos

Outputs [

Symbol

Final State

•

Head

~

A

h •

'III--I I "'III--I al

an

ql

State?

F

qk

Ci, j Left Symbol, Head, State

Center Right Symbol, Symbol, Head, Head, State State

\

v

J

Inputs

qlq2 q3 q4

k

qk

]

V

Figure 3 Primarytransition element

Input Providing a circuit lower bound such as 'SAT requires more than a polynomial number of gates', would thus imply P ~ NP. At present, such a lower bound for arbitrary circuits is well out of reach. However, recently, striking new lower bound arguments for dealing with circuits have been developed. We are just beginning to see the emergence of serious tools.

States

Figure 4 Finalstatedetector formulae that describe sets. The NP-complete set, SAT, which is the set of Boolean formulae fthat have satisfying assignments, can be described as the set of Boolean formulae fwhich satisfy the following logical sentence: 'There exists assignment A such that A satisfies f'

Constant depth circuits Polynomial space (PSPACE) is the collection of languages that can be computed by Turing machines that use no more than a polynomial amount of tape although they have unbounded time. It is clear that: P c NP c_ PSPACE

However, it is not known whether any of the inclusions are proper. Between what can be computed in polynomial time and what can be computed with polynomial space, there may be an infinite hierarchy of computation classes. Meyer and Stockmeyer discovered this polynomial hierarchy while searching for natural problems that are intractible 2°'21. Of course, if it turns out that P - PSPACE, then the hierarchy does not exist. However, most people conjecture P ~ PSPACE, in which case understanding the structure of the hierarchy is important. An intuitive way to think about the polynomial hierarchy is in terms of logical

46

For our purposes, the two important aspects of this logical sentence are: 1. The existential quantifies over objects whose lengths are relatively short (only polynomial long in the size of the formula f), and 2. The predicate 'A satisfies f' is checkable in polynomial time. The class NP is the same as the class of languages that can be characterized by sentences that need exactly one existential quantifier. Similarly, the class coNP corresponds to sentences that need exactly one universal quantifier. The languages of the class at the kth level of the Meyer-Stockmeyer hierarchy are characterized by sentences that require k alterations of quantifiers, e.g.: k

]3v...3f

Microprocessors and Microsystems Volume 19 Number 1 February 1995

Modelling with Boolean circuits: C V Papadopoulos and T S Andronikos this framework, P is at the 0th level of the hierarchy, NP is at the l st level, and so on. An existential quantifier is similar to an OR gate, and a universal quantifier is similar to an A N D gate. This observation can be pushed quite far. The kth level of the hierarchy relates to depth k + 1 circuits (the +1 is for a technical reason) that have AND, OR and NOT gates of unbounded fan-in. This relationship between levels of the polynomial hierarchy and circuits led Furst et al. to define and consider the more general question of what can be computed by circuits of constant depth. They proved that many natural functions including binary multiplication and transitive closure of matrices cannot be computed by constant-depth circuits of polynomial size. Constant-depth circuits turn out to be the right model of study from many points of view. For example, constant-depth circuits model programmable logic arrays (PLAs), configurable arrays of gates of constant depth, which are used in VLSI design. For years VLSI folklore held that PLAs could not be used for certain kinds of computations, such as multiplication. It was an open question whether this was simply because no one was clever enough to design efficient PLAs or because PLAs are inherently limited. Furst et al. settled the question by showing that their lower bound on the size of constant-depth circuits implies that unless they use more than a polynomial amount of chip area PLAs cannot, for example, multiply. Polynomial-size constant-depth circuits also model what can be computed in constant time by a polynomial number of processors that have access to shared memory 22. The model and results give insights into the power of parallelism.

Lower bounds for constant depth circuits Any Boolean function can be written in disjunctive normal form as an OR of ANDs. Therefore, every function can be expressed as a depth-2 circuit. However, describing a function in disjunctive normal form requires writing down as many product terms as there are truth assignments that satisfy the function. The PARITY function, for example, takes on the value 1 for half, or 2 n 1, of its inputs. Thus, PARITY's description in DNF has 2" 1 terms. The smallest depth-2 circuit for PARITY can thus be shown to have size f~(2 n- 1),. How large does a circuit of depth k have to be in order for it to compute PARITY? The first proof that any constantdepth circuit contains more than polynomially-many gates was by reductio ad absurdum. The following is a threesentence overview. Show that any depth-2 circuit for PARITY must have exponential size (by extending the DNF argument). Then show that the existence of polynomialsize, depth k > 2 circuits for PARITY implies the existence of polynomial-size, depth k - 1 circuits for PARITY. From this it follows that any constant-depth circuits must have greater than polynomial size 4. The next subsection elaborates on the second step of the PARITY proof. *[~(2" ~) is pronounced'omega of 2" - 1' and means'lower bounded by a multiple of 2" 1.

R e d u c i n g d e p t h k to d e p t h k - 1 Let Cn (xl . . . . X n) be a circuit computing PARITY on n variables. Hold any input xi constant at 0 or 1, say 0. The function C,(xl . . . . . 0 . . . . . Xn) of n-- 1 variables that results is also PARITY. (As a technical aside, the astute reader should realize that restricting an odd number of inputs to 1 causes the output of the new function to be complementary of PARITY. Since it cannot be easily computed then neither can its complement, and whenever we say PARITY we mean either it or its complement.) As input information is propagated through the circuit, any 1 going into an OR gate forces that gate to 1. If a 0 goes into an AND gate, the gate can be re~01aced by a wire that has 0 on it. Fixing the values of some inputs to a PARITY circuit has the effect of revealing a new smaller circuit inside the original circuit that computes PARITY on a reduced variable set. By judiciously setting variables, this approach enables us to prove that if PARITY can be computed by depth-k, polynomial-size circuits, then it can be computed by depth-k, polynomial-size circuits whose lowest-level gates have only constant fan-in. Suppose G , C2. . . . is a sequence of polynomial-size, depth k circuits in which the nth circuit computes PARITY of n inputs. There is some constant c such that all gates closest to the inputs have fan-in less than c. The number of subsets of n of size c or less is roughly n C. This means, assuming PARITY could be computed by polynomial-size, constant-depth circuits, that given the ANDs and ORs of all the subsets of the inputs of size c or less, as input, it is possible, with a polynomial-size circuit of depth k - / , to compute PARITY. This is an impossible state of affairs. Since PARITY requires exponential-sized depth-2 circuits, there has to be some minimal k such that PARITY (:an be computed by polynomial-sized depth k circuits, but not by polynomialsized depth k - / circuits. However, these depth k circuits can be constructed to have bottom level gates with constant fan-in, c. The number of subsets of n inputs of size c or less is polynomial in n. So, choosing to throw in the ANDs and ORs of every possible subset of inputs of size c or less at the first level could turn an inherently exponential problem into a polynomial problem.

R a n d o m restrictions We do not actually know how to intentionally set the values of inputs so as to affect the meanings of second-level gates. Randomly restricting a circuit by fixing some of the inputs at 0, some of the inputs at 1 and marking some of the inputs so that they will not be fixed, a polynomial-size, depth k PARITY circuit will, with non-zero probability, be transformed into a polynomial-size, depth k circuit that can be rewired to have depth k - / . This does not mean that a random setting of the inputs gives a desired restriction. It means that the probability a random setting gives a desirable restriction is non-zero, therefore there must be some restriction that has the property we want.

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Modelling with Boolean circuits: C V Papadopoulos and T S Andronikos Furst et al. introduced random restrictions to obtain the first lower bound. Yao, Hastad and Cai made significant technical improvements using the random-restriction approach. Yao strengthened the lower bound enough that oracles for separating the polynomial hierarchy are obtained. Hastad proved a lower bound that is almost tight with respect to the upper bound, and Cai showed that any sub-exponential sized circuits computing PARITY are wrong on at least 50% of the inputs. Cai's result is important because it implies that the polynomial hierarchy is separated with probability 1 by any oracle chosen at random.

Since all Boolean functions can be expressed in terms of AND and NOT this gives a complete description of q~. Using DeMorgan's laws, we can compute directly that, for example: q~(xl v x2) = xl + x2 - xl x2 If two Boolean expressions el and e2 represent the same Boolean function, then they are both represented by the same polynomial. The PARITY function is represented by a particularly nice element: q)(PARITY(xl

. . . . .

Xn)) = - 1 = [ ' [ (xi + 1) i=1

Algebraic approaches Instead of looking directly at circuits and analysing them in terms of gates and propagation of values, it is possible to establish a map between Boolean functions and elements of algebraic structures s'9. This approach is due to Razborov s. For an example, and for the rest of our discussion, consider the ring of polynomials: R 2 = Z 3 [xl . . . . .

xn]/{x

2 =

Xl,

x 22 = X 2 ,

....

x n2 =

Xn}

Elements of this ring are polynomials in the x] with coefficients from the set Z3 = { - 1 , O, 1 }. The relations x)2 = xj which hold imply that no variable appears with a power greater than two. The polynomial: XlX3X4

-}- X I X 2 - - X2X3 - - X4 -t- t

is an example of an element of/?3. All arithmetic in R3 is computed modulo 3. So, for example: (xtx2 + x ~ + x3)(x2 +x3)

= x t 4 + 4 + x x3 + x, x2x3 + x x, + 4 = x2 + x 3 + x l x 2 - x2x3 + x l x 2 x 3

Each element of /?3 is a map t from { - 1 , O, 1}" to { - 1 , 0, 1}. Some of these are special in the sense that if variables xi are restricted to be {0, 1 } then the value of the function is restricted to {0, 1 }. The ring element 1 - xl has this special property. If xl = 0, the value is 1, and if xl = 1 the value is 0. Most polynomials are not special in this way. For instance, xl + 1 evaluates to -1 at xl = 1. The number of special ring elements is 22~, the same as the number of Boolean functions on n variables. We can establish a mapping • from Boolean functions to special ring elements by the following natural inductive scheme:

To see this, observe that every xi that is 1 contributes a - 1 to the product on the RHS. Thus, this product evaluates to (-1) k, where k is the number of xi that are 1. If k is even, the product is 1 and the polynomial evaluates to 1. If the product is - 1 , the polynomial evaluates to 0. In either case, the ring element evaluates to PARITY of the xi. The ring of polynomials R3 forms a vector space of dimension 2" over Z3. The set of vectors: 1,Xl,X2, ...,Xn, Xl,X2, . . . , X n

lXn, ...,XlX2X:~, . . . , X , }

forms one basis, i.e. every element of R3 can be written as a linear combination of these vectors. Using the change of variables Yi = xi + 1 we have that the sett:

1-I (x, + 1)lW c {1 ..... n}} JEW

is also a basis. This means that any Boolean function can be written as the mod 3 sum of mod 2 sums of subsets of inputs. Such striking facts fall out of the algebra and are difficult to fathom in more traditional settings. Razborov introduced a notion of approximation s in order to deal with circuits that include PARITY gates. Smolensky refined the idea and techniques and proved that any constant depth circuit with gates AND, OR, NOT and MOD-p, for any fixed prime p, cannot compute the MAJORITY function. Roughly what they show is that the function computed by any constantdepth not-too-large circuit is, up to behaviour on a small set of input assignments, equivalent to a polynomial in /?3 of degree around v'n. MAJORITY is an essentially high degree polynomial and has no low-degree approximation.

CONSTANT-WIDTH BRANCHING PROGRAMS

• (xi) = xi

for any Boolean formulae el, e2.

More powerful than constant-depth circuits, constant-width branching programs are coming to have importance in their own right. A branching program is a generalization of a decision tree, as shown in Figure 5. There are 'states' (represented by nodes) and 'transitions' (represented by labelled arcs). As in

t { - 1 , 0, 1 }" is the Cartesian product of n instances of ,[-1, O, 1 }

~W is assumed to be a genuine subset of the set {1, 2 . . . . . n}

q~(ei) = (1 - ~(ei)) for any Boolean formula ei (I)(el A e2) = ~(el) (])(e2)

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Microprocessors and Microsystems Volume 19 Number 1 February 1995

Modelling with Boolean circuits: C V Papadopoulos and T S Andronikos

XI O.O

o

0

X3 • • O@

•

-..C)

O •

...(~

O •

Key

~x=O

x--I Figure 5 A width-3 branching program

Key × = 0

the assignment goes to B, and otherwise the path defined by the assignment goes to C?.

x = 1

Permutation branching programs A constant-width branching program of width k may also be thought of as a map from {1 . . . . . k} into {1 . . . . . k} determined by assignments to the variables xi. That is, for a given Boolean assignment to the xi there is a path from each of the k states at level 0, to one of k states at the highest level. If, for each assignment, the map so defined is a permutation, i.e. one-to-one, the branching program is called a permutation branching program (PBP). These were introduced by Barrington in his thesis 16. Permutation branching programs are also set recognizers. For instance, we can say an assignment is accepted by a PBP if the map defined is the identity and rejected if the map defined is not the identity. Contrary to the conjectures of many people, Barrington proved that width-5 permutation branching programs of polynomial length accept the same languages as are accepted by log-depth polynomialsize bounded-fan-in circuits, i.e. N C t.

0 CONCLUSION

X

(23) Figure 6

(123)

l+x

Samplepermutation transitions

Figure 5, branching programs for us are 'levelled' and 'oblivious'. This means the states are organized into levels such that all transitions go from states at level i to states at level i + 1, and then all transitions from states at level i depend on the same variable. The width of a branching program is the maximum, over all levels i, of the number of states at level I", and the length is just the number of levels. Constant-width branching programs can be used to recognize sets in at least two distinct ways. The most obvious and natural borrows from finite automata theory. Define a unique start state from the nodes at level 0 and define a unique access state from the nodes at the highest level. Let an input assignment to the variables xi be accepted if and only if, starting at the start state, the path specified by the assignment leads to the accept state. A very interesting variation is to consider the different nodes at the end of the constant-width branching to be different outcomes of the computation. For example, a width-3 branching program can be thought of as computing a 3-partition of the input assignments. Label the three states at the end of a width-3 branching program A, B and C Let s be the sum of the Boolean variables x t , . . . , x,. Is it possible to construct a width-3 branching program such that: if s - 0 mod 5 the assignment goes to A, if - 1 mod 5

Techniques for understanding the power of Boolean circuits with given size, depth and components have been developed at an appreciable rate. Considering Boolean functions embedded in algebras, together with the possible manipulations there, is a new idea that is sure to have great consequence. Future research plans concern the application of the above idea to specific applications areas, such as parallel processing, as well as to the theory of computational randomness.

REFERENCES 1 Hartmanis, J, Lewis, P and Stearns, R 'Hierarchies memory limited computations' IEEEConference of Switching Circuit Theory and Logical Design (1965) pp 179-190 2 Borodin, A 'On relating time and space to size and depth' SIAM J. Comput. Vol 6 No 4 (1977) pp 733-744 3 Pippenger, N and Fischer, M J 'Relationsamong complexity measures' JACM Vol 26 No 2 (1979) pp361-381 4 Furst,M L, Saxe, J B and Sipser,M 'Parity, circuits and the polynomialtime hierarchy' Math. 5yst. Theory Vol 17 No 1 (1984) pp 13-27 5 Razborov,A A 'Lower bounds for the size of circuits of bounded depth with basisAND, XOR' Matem. Zam. Vol 65 (August 1986) reprint from Russian 6 Yao, A 'Seperating the polynomial-time hierarchy by oracles' 26th FOCS (1985) pp 1-10 7 Hastad, J 'Almost optimal lower bounds for smart depth circuits' 18th 5TOC (1986) pp 6-20 8 Cai, J-Y 'With probability one a random oracle separatesPSPACEfrom the polynomial hierarchy' 18 5TOC (1986) 9 Smolensky, R 'Algebraic methods in the theory of lower bounds for Boolean circuit complexity' 19th Symposium on Theory of Computation (1987) pp 77-82 10 Borodin, A, Fischer, M J, Kirkpatrick, D, Lynch, N and Tompa, M 'A time-space tradeofffor sorting and related non-obliviouscomputations' Tech. Report 79-01-01 Toronto, Dept. Computer Science (1979) 11 Borodin, A, Dolev, D, Fich, F and Paul, W 'Bounds for width two branching programs' 15th STOC (1983)

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Modelling with Boolean circuits: C V Papadopoutos and T S Andronikos 12 Chandra, A, Furst, M L and Lipton, R I 'Multi-part protocols' 15th STOC (1983) 13 Alon, N and Maass, W 'Meanders, Ramsey Theory and lower bounds for branching programs' Proc. 27 ACM Foundations of Computer Science (1986) pp 410~.17 14 Pudlak, P 'A lower bound on the complexity of branching programs' Proceedings Conf. on the Math. Foundations of Computer Science

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16 17 18 19

1984 Lecture Notes in Computer Science 176, Springer (1984) pp 480 489 Ajtai, M, Babai, L, Hajnal, P, Komlos, J, Pudlak, P, Rodl, V and Szemerdi, E 'Two lower bounds for branching programs' Proc. 18th ACM 5TOC (1986) pp 30-38 Barrington, D A 'Bounded-width polynomial-size branching programs recognize exactly those language in NC' 18th STOC (1986) pp 1-5 Savage, J E 'Computational work and time on finite machines' JACM Vo119 No 4 (1972) pp660-674 Stockmeyer, L 'The polynomial-time hierarchy' TCS3 (1977) pp 1-20 Stockmeyer, L and Meyer, A 'Word problems requiring exponential time' Preliminary Report. Fifth ACM Symposium on Theory of Computing ( 1973)

20 Chandra, A, Stockmeyer, L I and Vishkin, U 'A complexity theory for unbounded fan-in parallelism' Tech Report, IBM Research, Yorktown Heights, NY (1986)

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Mr Papadopoulos was born in Athens, Greece in 1962. He graduated in mathematics from Athens University in 1984 and then followed postgraduate studies in computer science at the University of Essex (UK), from which he obtained a Diploma in 1986. Currently he is conducting research on distributed and parallel computation at the University of Piraeus, Greece. His research interests include network design, formal description techniques, dis tributed and parallel computation, as well as theoretical aspects of VLSI. He has been acting as Senior System Consultant at the Computing Division of the Greek Ministry of Finance (MHKYO) since 1992.

Mr Andronikos was born in Athens, Greece in 1968. He holds an engineering diploma in electrical and computer engineering from the National Technical University of Athens and is now studying at the same university for a PhD in computer science. His research interests include parallel computation, computational logic and analysis of algorithms.

M i c r o p r o c e s s o r s and M i c r o s y s t e m s V o l u m e 19 N u m b e r 1 F e b r u a r y 1995