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Monemolecular resists: a new class of high resolution resists for electron beam microlithography
World abstracts continued from page 41
Silicon epitaxy M A R T I N L. HAMMOND Microelecton. J. 10, (2) 4 (1979). A general survey of the technology of epitaxy and its application to silicon devices. The more common deposition techniques are described and compared in respect of their application to present day devices. A n extensive bibliography is given. Aging of solder connection to Ti-Pd-Au films P E T E R M. HALL and LLOYD W. CONDRA
IEEE Trans. Components, Hybrids, Mfg Technol. Chmt-2, (3) 279 (September 1979). Soldered connections to TiPdAu film composites show enhanced resistance changes (up to 0.02 ohms) during elevated temperature aging. This is attributed to solid-state dissolution by solder of Au from under the fillet edge, forming a AuSn intermetallic phase. The pull strength of soldered external leads decreases by as much as 40 percent during aging, probably by solid-state dissolution of Pd, forming PdSn4. Neither of these effects is expected to be troublesome at normal operating temperatures. The MPUR mask projection and alignment repeater of VEB Carl Zeiss JENA STEPHAN H A R T U N G , SIEGFRIED SOLLFRANK and KARLH E I N Z SULFRIAN Jena Review 211979, p. 71 One approach to photolithographic transfer of smallest patterns on to the semiconductor wafer leads to alignment and exposure systems with repeat equipment. In their operation they are comparable to repeaters used in mask production. However, additional instrument functions required by the special alignment procedures during the exposure of semiconductor wafers increase the complexity of these equipments considerably.
Monemolecular resists: a new class of hlgh resolution resists for electron beam mtcrolithography A. B A R R A U D , C. ROSILIO and A. RUAUDEL-TEIXIER SolidSt. Technol. p. 120 (August 1979). A new class of ultrathin (30 to 1000 A) electron-resists based on monomolecular layers is described. These negative resists make it possible, with a proper choice of the accelerating voltage, to achieve a very high resolution, even on thick substrates. The thickness-voltage combination is shown to be the main parameter, contrast being second order. These properties are illustrated by the example of ta-tricosenoie acid, which provides a resolution of 600 A when 450 A thick, despite a contrast value of 0.7.
3. Testing Analysis of the effects of mechanical stress on the properties of p-channel MOS structures. Part I. Choice of the theoretical model. The effect of stress on the valence band structure in silicon B O G D A N MOESCHKE Electron Technol. 12, (1) 29. The effect of mechanical stress on the properties of silicon P/MOS structure is analysed theoretically and experimentally from the viewpoint of possible application of this structure as a direct pressure transducer. The choice of the theoretical model of the investigated structure is given. The effect of stress on the valence band structure in silicon is considered. Further theoretical experimental results will be presented in Part II of the paper. Radiation hardened MOS technology G. W. H U G H E S and G. J. BRUCKER SolidSt. TechnoL p. 70 (July 1979). The basic mechanisms responsible for radiation damage in CMOS and CMOS/SOS devices and circuits are reviewed. Several hardenedoxide processes in use today are discussed, and the various radiation hardened circuits that have become available in the past few years are described.
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Study of the surface properties of thermally oxldised silicon using surface acoustic wave attenuation R. T. WEBSTER, H. E S T R A D A - V A Z Q U E Z , P. DAS and R. BHARAT Solid-St. Electron. 22, 541 (1979). In the separate media space charged coupled convolver, the interaction of a surface acoustic wave (SAW) with the free carriers in an adjacent semiconductor results in attenuation of the acoustic wave. The magnitude of the attenuation is dependent on the concentration of the free carriers near the surface. A n externally applied d.c. voltage changes the surface carrier concentration and this change is reflected in SAW attenuation. Analysis of the SAW attenuation caused by a continuous d.c. field gives an estimate of the surface state density. The time required for the SAW attenuation to reach steady state after the semiconductor is driven into deep depletion is an indication of the rate of carrier generation in the depletion region. Transient effects have also been observed using a synochronously applied d.c. pulse. Experience gathered with the application of the special-type ZRM-12 scanning electron mircroscope in the semiconductor industry S. A. INOZEMTSEV, V. G. POPOV and V. N. YUDAYEV Jena Review 2/1979, 61. The ZRM-12 was predominantly employed as a precision measuring instrument for the non-destructive inspection of geometrical pattern parameters on photomasks and semiconductor wafers.
Experimental verification of the model of silicon epitaxy J A C E K KOREC Electron Technol. 11, (4)33 (1978). The validity of the theoretical model of epitaxial growth kinetics is verified experimentally for various process parameters, i.e. substrate orientation, reactor geometry and carrier gas flow. The obtained results are in good agreement with the theoretical model describing the rate of epitaxial growth in SiCh-Hz system. Vibration, shock and intense noise testing for reliability W A Y N E TUSTIN IEEE Trans. Reliab. R-28, (2) 129 (June 1979). Avionic units (particularly those used aboard high-performance aircraft and missiles) should be tested with vibration, shock, and intense noise. The goal of such laboratory testing is to identify weaknesses so that corrective steps toward high reliability can be taken. Test equipments and their applications to simulating potentially damaging environments are considered. These subjects are noteworthy because of the 1977 revision of MIL-STD-781C. Advances in testing LSI populated boards B. P. DAVIS Proc. Internepcon, Brighton, U.K., p. 231 (October 1978). The rapid increase in the use of LSI devices in today's digital printed circuit boards presents a new and difficult challenge to board testing that is necessary, where in the production process that testing should be performed, and the testing strategies to employ. In any company it is necessary to minimise the costs of development, manufacturing, testing, and field service in order that a product may compete effectively with similar products from other companies. Minimising testing costs has become a complex problem since so many alternative strategies exist within the "testing mix". The "testing mix" may be defined as the degree of emphasis placed upon the various testing stages that are possible within an eleetonic manufacturing operation; such as, incoming inspection, bare board testing, in-circuit testing (automatic inspection), functional board testing, sub-assembly testing, and final system test. It is widely accepted that the cost of locating a fault increases by a factor of between 3 and 10 at each subsequent testing stage, with the cost of finding a fault in the field being as much as several hundred pounds, depending upon the time taken and the necessary travelcosts incurred. It is, however, equally inefficient to perform too much testing as it is to do too little. Determining the optimum "testing" is a complex problem, the answer to which will be different from company to company and even product to product, depending upon such factors as volume, complexity, nature of use, required reliability, etc. etc.
Silicon epitaxy M A R T I N L. HAMMOND Microelecton. J. 10, (2) 4 (1979). A general survey of the technology of epitaxy and its application to silicon devices. The more common deposition techniques are described and compared in respect of their application to present day devices. A n extensive bibliography is given. Aging of solder connection to Ti-Pd-Au films P E T E R M. HALL and LLOYD W. CONDRA
IEEE Trans. Components, Hybrids, Mfg Technol. Chmt-2, (3) 279 (September 1979). Soldered connections to TiPdAu film composites show enhanced resistance changes (up to 0.02 ohms) during elevated temperature aging. This is attributed to solid-state dissolution by solder of Au from under the fillet edge, forming a AuSn intermetallic phase. The pull strength of soldered external leads decreases by as much as 40 percent during aging, probably by solid-state dissolution of Pd, forming PdSn4. Neither of these effects is expected to be troublesome at normal operating temperatures. The MPUR mask projection and alignment repeater of VEB Carl Zeiss JENA STEPHAN H A R T U N G , SIEGFRIED SOLLFRANK and KARLH E I N Z SULFRIAN Jena Review 211979, p. 71 One approach to photolithographic transfer of smallest patterns on to the semiconductor wafer leads to alignment and exposure systems with repeat equipment. In their operation they are comparable to repeaters used in mask production. However, additional instrument functions required by the special alignment procedures during the exposure of semiconductor wafers increase the complexity of these equipments considerably.
Monemolecular resists: a new class of hlgh resolution resists for electron beam mtcrolithography A. B A R R A U D , C. ROSILIO and A. RUAUDEL-TEIXIER SolidSt. Technol. p. 120 (August 1979). A new class of ultrathin (30 to 1000 A) electron-resists based on monomolecular layers is described. These negative resists make it possible, with a proper choice of the accelerating voltage, to achieve a very high resolution, even on thick substrates. The thickness-voltage combination is shown to be the main parameter, contrast being second order. These properties are illustrated by the example of ta-tricosenoie acid, which provides a resolution of 600 A when 450 A thick, despite a contrast value of 0.7.
3. Testing Analysis of the effects of mechanical stress on the properties of p-channel MOS structures. Part I. Choice of the theoretical model. The effect of stress on the valence band structure in silicon B O G D A N MOESCHKE Electron Technol. 12, (1) 29. The effect of mechanical stress on the properties of silicon P/MOS structure is analysed theoretically and experimentally from the viewpoint of possible application of this structure as a direct pressure transducer. The choice of the theoretical model of the investigated structure is given. The effect of stress on the valence band structure in silicon is considered. Further theoretical experimental results will be presented in Part II of the paper. Radiation hardened MOS technology G. W. H U G H E S and G. J. BRUCKER SolidSt. TechnoL p. 70 (July 1979). The basic mechanisms responsible for radiation damage in CMOS and CMOS/SOS devices and circuits are reviewed. Several hardenedoxide processes in use today are discussed, and the various radiation hardened circuits that have become available in the past few years are described.
42
Study of the surface properties of thermally oxldised silicon using surface acoustic wave attenuation R. T. WEBSTER, H. E S T R A D A - V A Z Q U E Z , P. DAS and R. BHARAT Solid-St. Electron. 22, 541 (1979). In the separate media space charged coupled convolver, the interaction of a surface acoustic wave (SAW) with the free carriers in an adjacent semiconductor results in attenuation of the acoustic wave. The magnitude of the attenuation is dependent on the concentration of the free carriers near the surface. A n externally applied d.c. voltage changes the surface carrier concentration and this change is reflected in SAW attenuation. Analysis of the SAW attenuation caused by a continuous d.c. field gives an estimate of the surface state density. The time required for the SAW attenuation to reach steady state after the semiconductor is driven into deep depletion is an indication of the rate of carrier generation in the depletion region. Transient effects have also been observed using a synochronously applied d.c. pulse. Experience gathered with the application of the special-type ZRM-12 scanning electron mircroscope in the semiconductor industry S. A. INOZEMTSEV, V. G. POPOV and V. N. YUDAYEV Jena Review 2/1979, 61. The ZRM-12 was predominantly employed as a precision measuring instrument for the non-destructive inspection of geometrical pattern parameters on photomasks and semiconductor wafers.
Experimental verification of the model of silicon epitaxy J A C E K KOREC Electron Technol. 11, (4)33 (1978). The validity of the theoretical model of epitaxial growth kinetics is verified experimentally for various process parameters, i.e. substrate orientation, reactor geometry and carrier gas flow. The obtained results are in good agreement with the theoretical model describing the rate of epitaxial growth in SiCh-Hz system. Vibration, shock and intense noise testing for reliability W A Y N E TUSTIN IEEE Trans. Reliab. R-28, (2) 129 (June 1979). Avionic units (particularly those used aboard high-performance aircraft and missiles) should be tested with vibration, shock, and intense noise. The goal of such laboratory testing is to identify weaknesses so that corrective steps toward high reliability can be taken. Test equipments and their applications to simulating potentially damaging environments are considered. These subjects are noteworthy because of the 1977 revision of MIL-STD-781C. Advances in testing LSI populated boards B. P. DAVIS Proc. Internepcon, Brighton, U.K., p. 231 (October 1978). The rapid increase in the use of LSI devices in today's digital printed circuit boards presents a new and difficult challenge to board testing that is necessary, where in the production process that testing should be performed, and the testing strategies to employ. In any company it is necessary to minimise the costs of development, manufacturing, testing, and field service in order that a product may compete effectively with similar products from other companies. Minimising testing costs has become a complex problem since so many alternative strategies exist within the "testing mix". The "testing mix" may be defined as the degree of emphasis placed upon the various testing stages that are possible within an eleetonic manufacturing operation; such as, incoming inspection, bare board testing, in-circuit testing (automatic inspection), functional board testing, sub-assembly testing, and final system test. It is widely accepted that the cost of locating a fault increases by a factor of between 3 and 10 at each subsequent testing stage, with the cost of finding a fault in the field being as much as several hundred pounds, depending upon the time taken and the necessary travelcosts incurred. It is, however, equally inefficient to perform too much testing as it is to do too little. Determining the optimum "testing" is a complex problem, the answer to which will be different from company to company and even product to product, depending upon such factors as volume, complexity, nature of use, required reliability, etc. etc.