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New LSI packaging opens the way for the micromini era
308
WORLD
ABSTRACTS
ON MICROELECTRONICS
displays, and thin-film circuitry in designing a counter and a D V M ; the units provide performance usually available only at higher prices.
Stripline Gunn oscillators are c o m p a t i b l e w i t h m i c r o w a v e ICs. D. J. ELLIS and M. W. GUr~N,
Electron. Engng., May (1971), p. 50. Gunn-effcct devices are now well established as reliable solid-state microwave oscillator devices. Details are given of the design and performance of these oscillators, constructed in triplate stripline, with either fixed or variable frequency tuning, operating in the range 8-10 GHz.
5. M I C R O E L E C T R O N I C S - - D E S I G N
Chip h a n d l i n g e q u i p m e n t for hybrid microcircuits. B. M. AUSTIN, Solid St. Technol., November (1970), p. 55. Basically, chip handling equipment conceives of the individual chips being handled en masse, piece-by-piece, and thus processed. There are possibilities, perhaps, of a better approach if chips could be handled piece-by-piece directly from their original wafer matrix. This article will deal mainly with handling the chips en masse, though we will call attention to other means.
FET input r e d u c e s IC op a m p ' s bias and offset. T. MCCAFFREYand R. BRANDT, Electronics, 7 December (1970), p. 85. With junction FETs processed on the same chip, monolithic operational amplifier maintains the high impedance of discrete input devices and features sharply lower bias and offset currents, as well as significantly higher slew rates.
D i a p h r a g m c o n n e c t i o n - - a n e w package for c o m plex ICs. Electron. Engnr, February (1971), p. 27. Before insertion on the pins mounted on the PC board, each package terminal is a taut diaphragm of 1-mil Kovar, part of a leadframe which connects to the terminals of the IC chip. The leadframe is sandwiched between two pieces of ceramic wafer whose holes register with the diaphragms. T h e chip is attached to a Kovar header, which is prebrazed to the rim of a hole in the center of one of the ceramic wafers. Conventional wirebonds, or even spider-bonds or solder bumps, connect the leadframe to the chip. Capping the header seals the chip hermetically, a relatively simple operation thanks to the thin leadframe.
ICs on f i l m strip l e n d t h e m s e l v e s to a u t o m a t i c h a n d l i n g by m a n u f a c t u r e r and user too. S. E. SCRUPSKI, Electronics, 1 February (1971), p. 44. A promising new packaging and bonding method, developed by General Electric, is said to produce increased IC packaging yield and higher reliability, while offering automatic processing for both manufacturer and user. The new production technique features lead frames etched out of a copper strip laminated to rolls of polyimide film; chips are bonded directly to the rolls and are encapsulated in plastic.
S u b n a n o s e c o n d d e l a y s in circuit c o m p l e x e s m e a s u r e s by s l i c e probing. J. B. COUGHLIN and R. W. LINDOP, Solid St. Technol., March (1971), p. 12. A probe-head is described which enables measurement
AND RELIABILITY
AND CONSTRUCTION
of integrated circuits to be made at the slice stage. Several such probe-heads have been fitted to an automatic probe station and fast switching circuits checked before and after mounting to confirm the accuracy and applicability of the machine. Fast logic circuits (delay < 0 . 8 n s e c ) evaluated by this technique are briefly described.
Thermal
control
for
high
density
packaging.
MARY L. RAUKE, Proc. IEEE Reliab. Phys. Symp., Las Vegas, U.S.A. 31 March-2 April (1971). This paper discusses the effect of high packaging density on the reliability of semiconductor components. A limiting factor on packaging density is thermal control. This paper discusses various methods of direct and indirect cooling using air and liquid coolants. Practical limits for the cooling methods are presented. Possible methods for reducing the thermal resistance within the first level package are discussed.
Part T w o : s y s t e m designers eye m u l t i c h i p LSI packages. S. E. SCRUPSKI,Electronics, 26 April (1971), p. 65. Developments in ceramics, beam leads and LSI testing appear to be making a practical proposition of the multilayer, multichip package.
N e w LSI packaging opens the w a y for the m i c r o m i n i era. J. N. KESSLER, Electron. Des. 5, 4 March (1971), p. 24. The upcoming developments in LSI packaging include these: multilevel, multichip packaging is emerging, and it may make dual-in-line packaging obsolete. The designer will be working with larger chips that will require more leads. The one-chip calculator and one-chip central processor units are already here; the road ahead is limited only by the designer's ingenuity. Plastic, once considered unacceptable for operation in high-temperature, high-humidity environments because of its lack of hermeticity, is being developed for LSI use, and it promises to slash costs drastically. Better automated techniques have been announced for LSI packaging, with increased reliability and decreased costs.
T h e case for e m i t t e r - c o u p l e d logic. A. A. VACCA, Electronics, 26 April (1971), p. 48. Saturated circuit families still cannot beat emitter-coupled logic for high performance at not too high a price. But this older style of logic demands rather different handling from the designer.
WORLD
ABSTRACTS
ON MICROELECTRONICS
displays, and thin-film circuitry in designing a counter and a D V M ; the units provide performance usually available only at higher prices.
Stripline Gunn oscillators are c o m p a t i b l e w i t h m i c r o w a v e ICs. D. J. ELLIS and M. W. GUr~N,
Electron. Engng., May (1971), p. 50. Gunn-effcct devices are now well established as reliable solid-state microwave oscillator devices. Details are given of the design and performance of these oscillators, constructed in triplate stripline, with either fixed or variable frequency tuning, operating in the range 8-10 GHz.
5. M I C R O E L E C T R O N I C S - - D E S I G N
Chip h a n d l i n g e q u i p m e n t for hybrid microcircuits. B. M. AUSTIN, Solid St. Technol., November (1970), p. 55. Basically, chip handling equipment conceives of the individual chips being handled en masse, piece-by-piece, and thus processed. There are possibilities, perhaps, of a better approach if chips could be handled piece-by-piece directly from their original wafer matrix. This article will deal mainly with handling the chips en masse, though we will call attention to other means.
FET input r e d u c e s IC op a m p ' s bias and offset. T. MCCAFFREYand R. BRANDT, Electronics, 7 December (1970), p. 85. With junction FETs processed on the same chip, monolithic operational amplifier maintains the high impedance of discrete input devices and features sharply lower bias and offset currents, as well as significantly higher slew rates.
D i a p h r a g m c o n n e c t i o n - - a n e w package for c o m plex ICs. Electron. Engnr, February (1971), p. 27. Before insertion on the pins mounted on the PC board, each package terminal is a taut diaphragm of 1-mil Kovar, part of a leadframe which connects to the terminals of the IC chip. The leadframe is sandwiched between two pieces of ceramic wafer whose holes register with the diaphragms. T h e chip is attached to a Kovar header, which is prebrazed to the rim of a hole in the center of one of the ceramic wafers. Conventional wirebonds, or even spider-bonds or solder bumps, connect the leadframe to the chip. Capping the header seals the chip hermetically, a relatively simple operation thanks to the thin leadframe.
ICs on f i l m strip l e n d t h e m s e l v e s to a u t o m a t i c h a n d l i n g by m a n u f a c t u r e r and user too. S. E. SCRUPSKI, Electronics, 1 February (1971), p. 44. A promising new packaging and bonding method, developed by General Electric, is said to produce increased IC packaging yield and higher reliability, while offering automatic processing for both manufacturer and user. The new production technique features lead frames etched out of a copper strip laminated to rolls of polyimide film; chips are bonded directly to the rolls and are encapsulated in plastic.
S u b n a n o s e c o n d d e l a y s in circuit c o m p l e x e s m e a s u r e s by s l i c e probing. J. B. COUGHLIN and R. W. LINDOP, Solid St. Technol., March (1971), p. 12. A probe-head is described which enables measurement
AND RELIABILITY
AND CONSTRUCTION
of integrated circuits to be made at the slice stage. Several such probe-heads have been fitted to an automatic probe station and fast switching circuits checked before and after mounting to confirm the accuracy and applicability of the machine. Fast logic circuits (delay < 0 . 8 n s e c ) evaluated by this technique are briefly described.
Thermal
control
for
high
density
packaging.
MARY L. RAUKE, Proc. IEEE Reliab. Phys. Symp., Las Vegas, U.S.A. 31 March-2 April (1971). This paper discusses the effect of high packaging density on the reliability of semiconductor components. A limiting factor on packaging density is thermal control. This paper discusses various methods of direct and indirect cooling using air and liquid coolants. Practical limits for the cooling methods are presented. Possible methods for reducing the thermal resistance within the first level package are discussed.
Part T w o : s y s t e m designers eye m u l t i c h i p LSI packages. S. E. SCRUPSKI,Electronics, 26 April (1971), p. 65. Developments in ceramics, beam leads and LSI testing appear to be making a practical proposition of the multilayer, multichip package.
N e w LSI packaging opens the w a y for the m i c r o m i n i era. J. N. KESSLER, Electron. Des. 5, 4 March (1971), p. 24. The upcoming developments in LSI packaging include these: multilevel, multichip packaging is emerging, and it may make dual-in-line packaging obsolete. The designer will be working with larger chips that will require more leads. The one-chip calculator and one-chip central processor units are already here; the road ahead is limited only by the designer's ingenuity. Plastic, once considered unacceptable for operation in high-temperature, high-humidity environments because of its lack of hermeticity, is being developed for LSI use, and it promises to slash costs drastically. Better automated techniques have been announced for LSI packaging, with increased reliability and decreased costs.
T h e case for e m i t t e r - c o u p l e d logic. A. A. VACCA, Electronics, 26 April (1971), p. 48. Saturated circuit families still cannot beat emitter-coupled logic for high performance at not too high a price. But this older style of logic demands rather different handling from the designer.