Microelectronics Reliability 46 (2006) 2085–2095 www.elsevier.com/locate/microrel
Novel charge neutralization techniques applicable to wide current range of FIB processing in FIB-SEM combined system Hirotaka Komoda a,d,*, Masaaki Yoshida a, Yoh Yamamoto b, Kouji Iwasaki b, Ikuko Nakatani c, Heiji Watanabe d, Kiyoshi Yasutake d a Electronic Devices Company, Ricoh Co., Ltd., 13-1 Himemuro-cho, Ikeda, Osaka 563-8501, Japan Engineering Department R&D Department, SII NanoTechnology Inc., 36-1 Takenoshita, Oyama-cho, Sunto-gun, Shizuoka 410-1393, Japan c Application Engineering Department, SII NanoTechnology Inc., 36-1 Takenoshita, Oyama-cho, Sunto-gun, Shizuoka 410-1393, Japan Department of Precision Science and Technology, Graduate School of Engineering, Osaka University, 2-1 Yamadaoka, Suita, Osaka 565-0871, Japan b
d
Received 22 November 2005; received in revised form 18 January 2006 Available online 5 June 2006
Abstract FIB-induced charging is one of the most critical issues for achieving successful circuit modifications of LSI. We have developed novel charge neutralization techniques applicable to a wide current range (from pico to nanoampere-order) of FIB processing in a FIB-SEM combined system. The method utilizes a 500 eV focused electron beam instead of an electron shower, and also a combination of microprobing and FIB-assisted deposition to make a current path from FIB processing point to the grounded microprobe. The effects of our techniques on charge neutralization capability were investigated using electrically erasable-programmable read-only memory devices and n-MOS transistors. For the low FIB current condition of less than 500 pA, it is found that the focused electron beam prevents threshold voltage shifts of both irradiated and neighboring transistors, and that the ratio of electron to ion beam currents is a key parameter to achieving effective charge neutralization. We also demonstrated that the combined method of microprobing and FIB-assisted deposition prevents parameter shifts of transistors even for high-current (nanoampere-order) FIB irradiation. Moreover, we evaluated the upperlimit resistance of the current path formed by FIB-assisted carbon deposition to prevent charging induced by a given FIB current. 2006 Elsevier Ltd. All rights reserved.
1. Introduction FIB systems are now routinely used for circuit modifications during the debugging phase of LSI development [1]. However, FIB-induced charging causes electrostatic discharge (ESD) damage and changes transistor parameters, such as threshold voltage (Vth) and subthreshold swing (S) [2,3]. Thus, for LSI makers, achieving successful and efficient circuit edit without the FIB-induced charging is one of the top-priority issues to reduce the development costs and time-to-market of new devices.
* Corresponding author. Address: Electronic Devices Company, Ricoh Co., Ltd., 13-1 Himemuro-cho, Ikeda, Osaka 563-8501, Japan. Tel.: +81 72 748 6735; fax: +81 72 748 6233. E-mail address:
[email protected] (H. Komoda).
0026-2714/$ - see front matter 2006 Elsevier Ltd. All rights reserved. doi:10.1016/j.microrel.2006.01.014
A wide range of FIB current (from pico to nanoampereorder) is often used to perform circuit modifications of LSIs. For example, high current (nanoampere-order) FIB processing is practically needed to cut wide metal strips (>100 lm) or to remove upper-layer dummy-metals in multilayer LSIs. On the other hand, picoampere-order FIB processing is needed to make high-aspect-ratio holes. Although higher FIB current is preferable for productivity of circuit edit, the risk of FIB-induced charging increases. Therefore, for successful circuit edit with high productivity, charge neutralization techniques that are fast and applicable to a wide current range of FIB processing in the same FIB system are desired. As charge neutralization technique, an electron shower [2,4] has been used for many years. However, the broad electron beam often causes parameter shifts of transistors located outside the FIB irradiation area. To avoid this
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problem, an adequate number of low-energy electrons should be delivered only to the FIB irradiation area. Another antistatic technique is the conductive-line formation using FIB-assisted deposition [5], where a current path from a grounded line (generally a pad electrode or a power line located on the edge of LSI chip) to a FIB processing point is made by FIB-assisted deposition. In recent largesized LSI chips, however, this method frequently needs several tens of minutes for forming a long current-path from a grounded line to the FIB processing point. To realize a wide current range of FIB processing without reducing productivity in the same FIB system, we have developed novel charge neutralization techniques in a FIBSEM combined system. One is a method using a 500 eV focused electron beam (FEB) instead of the electron shower. This method delivers an adequate number of low-energy electrons only to the FIB irradiation area to prevent parameter shifts of devices located outside the FIB irradiation area. Although this method has an advantage of no additional time for charge neutralization, the maximum FIB current is limited to about 500 pA due to the maximum FEB current of about 10 nA. Thus, for high-current (nanoampere-order) FIB processing, a combined method of microprobing and FIB-assisted deposition is developed instead of the conventional FIB-assisted deposition method to reduce the processing time. We first investigated the charge neutralization in the low ion-current range (<500 pA) using 500 eV FEB and clarified the optimum ratio of electron to ion probe currents for achieving successful charge neutralization using electrically erasable-programmable read-only memory (EEPROM) devices. Charging phenomena induced by FIB and/or FEB irradiation were discussed in terms of secondary-electron (SE) yield d and the redistribution of SEs. Next, for high-current FIB processing, the efficiency and effectiveness of the combined method of microprobing and FIB-assisted deposition were evaluated using n-MOS transistors.
Ga+ ion source (Vacc= 30 kV)
FIB column Secondary-electron/ion detector
Gas injector Electron gun
Microprobe SEM column
55º
Sample holder
Fig. 1. Schematic diagram of FIB-SEM combined system.
system, FIB-assisted deposition of tungsten, platinum, carbon and silicon-oxide can be conducted [5]. When ion beam scans a sample surface, source gas is fed to the ion beam irradiation region through a fine injector nozzle. SEs generated by ion beam irradiation dissociate the source gas molecules into film-forming precursors. Therefore, selective deposition on ion beam scanning area can be performed. In addition, a tungsten microprobe (tip diameter is about 1 lm) connected to the system power ground (GND) is equipped to the FIB-SEM combined system [7]. The microprobe is controllable with a position accuracy of nanometer-order in the sample stage by observing SEM or SIM image. 3. Charge neutralization in low ion-current range (<500 pA) using 500 eV FEB 3.1. Evaluation method of surface charges using EEPROM devices
2. Apparatus We used FIB-SEM combined systems: SMI2050MS2 and SMI3050SE from SII NanoTechnology, as shown in Fig. 1. The acceleration voltage (Vacc) of FIB is 30 kV. A focused Ga+ ion beam less than 0.1 lm in diameter at a probe current (Ii) between 1 pA and 20 nA irradiates a sample surface. The beam current density is about 10– 30 A/cm2. The electron gun for SEM is at a 55 angle to the FIB column [6]. In our study, we utilized this electron gun as a charge neutralizer. The electron acceleration voltage is 500 V and FEB of about 50 lm diameter irradiates the same point as the ion beam irradiation point. The probe current (Ie) of FEB is precisely controlled and can be changed up to 10 nA, which allows us to control the amount of low-energy SEs existing around the ion beam. SE or secondary-ion (SI) image can be obtained by biasing a scintillator/photomultiplier-type SE/SI detector at a positive or negative voltage, respectively. Using a gas injection
Surface charge with its polarity induced by FIB and/or FEB irradiation was evaluated using EEPROM devices. The test device is a single cell of EEPROM fabricated by 0.6 lm technology and two-layer metallization. The tunnel oxide thickness of the device is 8.7 nm. The length and width of the floating gate (FG) are 1.5 and 2.0 lm, respectively. An optical image and schematic of the cross section of the EEPROM device are shown in Fig. 2. Three EEPROM devices are aligned at intervals of about 250 lm. Programming (writing and erasing) is performed by applying a positive or negative voltage to the control gate (CG) that controls the number of electrons in the FG. For reading the programmed data, the select gate (SG) is used to select one memory cell. The CG, SG, drain, source and substrate electrodes are connected with the corresponding pad electrodes (70 · 70 lm2). Prior to FEB and/or FIB irradiation, the programming characteristics of the EEPROM were measured to evaluate the minimum
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SG
CG
D
Control gate (CG)
Select gate (SG) Substrate Source (S) (Sub)
S
Sub
2087
Drain (D) Floating gate
D P+
N+
N+
N+
CG
SG EEPROM cell
20 µm Sub
P-Si
S (a)
(b)
Fig. 2. Optical image (a) and schematic of cross section (b) of EEPROM device. The CG, SG, D, S and Sub electrodes are connected with the corresponding pad electrodes (70 · 70 lm2).
detectable CG voltage as a Vth shift. The CG voltage that produced the source-drain current of 1 lA (drain and SG biased at 1.2 and 5 V, respectively, substrate and source electrodes connected to the ground) was defined as the Vth. An area of 20 · 20 lm2 in the floating CG pad electrode was scanned by FIB with or without FEB irradiation at a wafer level. Since the diameter of FEB is about 50 lm, the primary electrons irradiate only the CG pad. The other terminals are exposed to redistributed secondary electrons and negatively charged. But, as shown in Fig. 2(b), the terminal (Sub) is connected to P+ region and grounded through Si backside, and terminals (S and D) are connected to N+ region and these PN junctions are forward biased by the negative charging. Thus, these terminals discharge and are always grounded. In general, three to five devices were measured for each experimental condition. Fig. 3 shows programming characteristics of the EEPROM devices. Biasing CG beyond ±12 V for 1 ms causes Vth shifts, and the polarity of Vth shifts corresponds to that of CG bias. Thus, the EEPROM devices can detect surface charge with its polarity induced by FIB and/or
FEB irradiation at the floating CG pad electrode when CG is charged up beyond ±12 V. This charge-induced high voltage of CG causes Fowler–Nordheim (FN) tunneling from the FG to the substrate (or the reverse direction), and result in Vth shifts. 3.2. Surface charges induced by FEB exposure Firstly, we have studied the surface charges induced solely by FEB exposure, which is used for charge neutralization in FIB processing. Fig. 4 shows the average Vth shifts of the irradiated and neighboring EEPROM devices in the case of 500 eV FEB exposure to the floating CG pad electrode. In all cases, the exposure time was 300 s. As shown in Fig. 4, the exposure of 500 eV FEB induces positive Vth shifts in the irradiated devices. On the other hand, the average Vth shifts of the neighboring devices (250 and 500 lm apart from the irradiated device) are negligible or negative. This indicates that the changes in the CG voltages 3 Irradiated 2
Vth shift (V)
10
Vth shift (V)
5
250 μm apart 500 μm apart
1 0 -1
0
-2
-5 -3
-10 -30
0
1
2
3
4
5
Probe current (nA)
-20
-10 0 10 Control gate voltage (V)
20
Fig. 3. Programming characteristics of EEPROM device.
30 Fig. 4. Dependence of Vth shifts of irradiated and the neighboring (250 lm and 500 lm apart from the irradiated device) EEPROM devices on probe current of 500 eV electron beam.
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of the irradiated devices are about 15 V (for 0.5 nA) and 13 V (for 1 and 4 nA), and that those of the neighboring devices are within ±12 V (for 0.5 and 1 nA) and about 16 V (for 4 nA) (see Fig. 3). To understand these results, let us now consider the SE yield d for electron beam irradiation. Here, we used the d as defined for an electron beam impinging on a blank unpatterned substrate. The d depends on the electron energy Ee as shown in Fig. 5 [8,9]. Ecr1 and Ecr2 are the energies corresponding to d = 1. Surface charging potential Vp is classified in three regions depending on Ee as follows: [10]. (1) 0 < Ee < Ecr1 Since d < 1, the irradiated area becomes negatively charged. This means that the Ee relative to qVp is lowered. When Vp = Ee/q, the electron beam cannot reach the surface. Thus, the Vp stabilizes at Ee/q. Here, q is elementary electric charge. (2) Ecr1 < Ee < Ecr2 Since d > 1, the irradiated area becomes positively charged and a retarding field for SE emission forms above the irradiated area. Since this retarding field induces the return of low-energy SEs to the surface [11], which causes the positive charging to be suppressed, the Vp stabilizes within ten-odd volts [12]. (3) Ecr2 < Ee Since d < 1, the irradiated area becomes negatively charged and the Ee relative to qVp is lowered. When Vp = (Ee Ecr2)/q, the d become unity. Thus, the Vp stabilizes at (Ee Ecr2)/q.
Secondary-electron yield δ
For charge neutralization using electron exposure, it is ideal to use electrons whose energy is lower than 10 eV or nearly equal to Ecr1 or Ecr2. However, the amount of low-energy electrons deliverable to sample surface is restricted by space charge limitation and the values of Ecr1 and Ecr2 depend on material and surface conditions. Thus, electron beam irradiation in the energy range with d > 1 is a practical answer for minimum beam-induced charging.
Negative charging
Positive charging
Negative charging
In our case, a 500 eV electron beam irradiates the sample surface at an incidence angle of 55. Generally, Ecr1 is less than 500 eV and Ecr2 ranges from 500 eV to 3 keV for almost all materials employed in LSI manufacture [8,9] for normal primary beam incidence. Moreover, d increases with incidence angle of electron beam. Therefore, it is reasonable to assume that d in our case is higher than unity and that the irradiated area by FEB is positively charged. Fig. 6 shows a SEM image taken under the same condition to confirm this assumption. The image was acquired using a field-emission SEM (Hitachi, S-4100) at Vacc = 500 V. In this image, the floating electrodes are observed darker than the grounded electrode. Therefore, we can say that the floating electrodes are positively charged and d > 1 in our experiments. In the case of electron beam irradiation for d > 1, redistribution of SEs determines the potential distribution of the irradiated region and the periphery. Thus, the trajectories of SEs emitted from a positively charged region were simulated by the boundary element method using the commercial software Lorentz (Integrated Engineering Software) for charged particle analysis. Here, we put an insulator (thickness: 1 lm and relative permittivity: 7) on a grounded substrate, and put surface charges uniformly (which produced potential of about 20 V) on the insulator in the region of 50 lm diameter. The electric field was then calculated solving Poisson equation, and in this field, the trajectories of SEs emitted with various initial energy Einit, position x and emitting angle (with respect to the surface normal) b were simulated. Fig. 7 shows a simulation result of three typical trajectories of SEs (labeled as SE1-3) emitted from a positively charged (22.3 V) region. So as to represent three different trajectories, the Einit, x and b of the three SEs were selected as follows: SE1 (Einit = 12.2 eV, x = 0 lm, b = 0), SE2 (Einit = 40 eV, x = 16 lm, b = 68), SE3 (Einit = 23 eV, x = 0 lm, b = 45). While SE1 is redistributed within the positively charged region
Floating
Floating
electrode
electrode Polyimide
1
0
Ecr1
Ecr2
Electron energy Ee (eV)
Fig. 5. Dependence of secondary-electron yield on electron energy.
Grounded
Floating
electrode
electrode
Fig. 6. Scanning electron micrograph of floating and grounded electrodes of EEPROM devices at acceleration voltage of 500 V. The angle of sample tilt is 55.
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30 V because the Vp stabilizes within ten-odd volts, as mentioned before. In our case, primary electrons charge the floating CG pad electrodes of irradiated EEPROM devices positively and the redistributed SEs charge those of the neighboring devices negatively. As a result, we observe positive and negative Vth shifts of the irradiated and neighboring devices, respectively, during the FEB exposure as shown in Fig. 4.
1V
10 V
5V SE3
3.3. Effectiveness of 500 eV FEB for charge neutralization in FIB processing
SE2
-25
0
25
x (μm)
Positively charged (22.3 V) region Fig. 7. Simulation result of SE trajectories (labeled as SE1-3) emitted from positively charged (22.3 V) region. The initial energy Einit, position x and emitting angle (with respect to the surface normal) b of the SEs are as follows: SE1 (Einit = 12.2 eV, x = 0 lm, b = 0), SE2 (Einit = 40 eV, x = 16 lm, b = 68), SE3 (Einit = 23 eV, x = 0 lm, b = 45).
Surface potential
by the retarding field, SE2 and 3 can escape this region. Moreover, although the SE3 flies away from the surface, SE2 is redistributed to the periphery. Based on this result and the one concerning the critical energy of SEs returning to the surface reported by Feng et al. [13], trajectories of SEs emitted from a positively charged region can be classified as follows: (1) SEs whose energy is lower than the potential Vp of the charged region are redistributed within the charged region, (2) SEs whose energy is higher than Vp are redistributed to the periphery or fly away from the surface. If the energy of SEs is less than Ecr1 (d < 1), the redistributed SEs cause the surface to become negatively charged and neutralize the positively charged region. As a result, in the case of electron beam irradiation for d > 1, the potential distribution of a surface is schematically illustrated as shown in Fig. 8 (the core model proposed by Fujioka et al. [14]). Since generally there exist SEs with the energy of about 50 eV [8,11], the periphery can be negatively charged up to about (50 Vp)V. Thus, the charged potential of the periphery can reach lower than
In the next experiment, the floating CG pad electrode was irradiated with FIB and FEB simultaneously. Fig. 9 shows the Vth shifts of the irradiated and neighboring devices as a function of the ratio (Ie/Ii) of electron to ion beam currents. FEB current was varied from 0 to 4 nA while FIB current was kept at 50 pA. In all cases, the irradiation time was 300 s. For FIB irradiation without FEB exposure (Ie/Ii = 0), while the average Vth shift of the irradiated devices is 7.4 V, those of the neighboring devices (250 and 500 lm apart from the irradiated device) are negligible. This indicates that the CG electrodes of the irradiated devices are positively charged up to about 20 V by the FIB exposure, and that those of the neighboring devices are within ±12 V. In the case of FIB irradiation with FEB exposure, the average Vth shifts of the irradiated and neighboring devices depend on Ie/Ii. While the average Vth shift of the irradiated devices for Ie/Ii = 10 is positive, those for Ie/Ii = 20 and 80 are negligible. As for neighboring devices, while the average Vth shifts for Ie/Ii = 10 and 20 are negligible, those for Ie/Ii = 80 are negative. These results can be explained as follows. For 30 keV FIB irradiation, Ga+ ions are implanted into the sample and several particles (electrons, ions and neutrals) are emitted from the surface. Since the emission yield of SEs is
8 Irradiated 250 μm apart
6
500 μm apart Vth shift (V)
SE1
4
2
0
+
0
-
Irradiated region
SE redistribution region Fig. 8. Illustration of surface potential distribution in the case of electron beam exposure (SE yield d > 1).
-2
0
20
40
60
80
100
Ie / I i Fig. 9. Dependence of Vth shifts of irradiated and the neighboring (250 lm and 500 lm apart from the irradiated device) EEPROM devices on current ratio (Ie/Ii) of electron (500 eV) to ion (30 keV) beam. The ion current Ii was kept at 50 pA.
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about 10 times greater than that of SIs [15], the sample surface is charged up positively by Ga+ ion implantation and SE emission. As a result, we observe positive Vth shifts of EEPROM devices during FIB irradiation without FEB exposure (Ie/Ii = 0). The projected range of the implanted Ga+ ions is about 20 nm. Since the FIB irradiated the surface of aluminum CG pad (whose thickness is about 0.5 lm and there is a thicker interlayer dielectric between the CG pad and the gate layer), Ga+ ions could not reach the gate oxide layers of the CG and SG. In the case of simultaneous FIB and FEB irradiations, the low-energy SEs created by the FIB and FEB irradiations are thought to play an important role in the neutralization of FIB- and FEBinduced positive charges. When Ie/Ii = 10, the low-energy SEs are not sufficient to neutralize the positive charges induced by the FIB and FEB irradiations. This results in the Vth shifts of the irradiated devices for Ie/Ii = 10 to be positive. In contrast, when Ie/Ii = 80, a large number of low-energy SEs exist around the irradiation area. Although a portion of low-energy SEs neutralize the FIB- and FEBinduced positive charges, the rest of these SEs are redistributed and charge the periphery negatively. As a result, the Vth shifts of the irradiated devices for Ie/Ii = 80 are negligible, but those of the neighboring devices are negative as shown in Fig. 9. The optimum condition (zero Vth shift) is almost achieved at Ie/Ii = 20 for both the irradiated and neighboring devices. In this case, the number of lowenergy SEs is adequate to neutralize the FIB- and FEBinduced positive charges. Let us discuss the effects of ion beam irradiation on the trajectory of low-energy SEs. There are two effects as follows: (1) ion beam potential, (2) surface positive charging induced by ion beam irradiation. It is well known that, in the case of ion implantation systems employed in the LSI process, ion beam potential can reach about 1 kV and attracts low-energy electrons existing around the beam (result in a beam plasma [16]). The ion beam potential of FIB can be estimated referring to Fig. 10. A floating electrode is placed in the center of a cylindrical chamber whose radius is Rc. Ga+ ion beam (radius: Rb and beam current: Ii) irradiates the electrode. We assume that inside of the chamber is high vacuum and collisions of Ga+ ions with residual gas molecules are negligible. Thus, there are only Ga+ ions as space charges. In this case, Ga+ ion beam forms a positive potential relative to the metal wall. For simplicity, it is assumed that Ga+ ion beam is cylindrical and that the distribution of the charge density is uniform. By applying Gauss’ law to an assumed infinitely long cylinder as FIB, the potential Vf of ion beam center relative to the metal wall can be described as Ii Rc Vf ¼ 2 log þ1 ð1Þ 4pe0 vi Rb where e0 is the dielectric constant of vacuum and vi is the velocity of Ga+ ions. By calculating a kinetic energy of Ga+ ion get from a potential energy, vi is connected to the Vacc of FIB as
FIB column
Metal wall
Ii Ga+ ion beam
Rc
Rb Electrode
Insulator
Fig. 10. Model of ion beam exposure onto floating electrode for calculating ion beam potential.
rffiffiffiffiffiffiffiffiffiffiffi ZV acc vi ¼ 1:38 10 M 4
½m=s
ð2Þ
where Z is the valence and M is the atomic mass number of the ion. For Ga+ ion beam, Z = 1 and M = 69.72. In our case (Vacc = 30 kV, Ii = 50 pA, Rb = 50 nm and Rc = 10 cm), Vf is calculated using Eq. (1) to be 4.7 · 105 V. Even for the maximum Ii (20 nA) of our FIB-SEM combined system, Vf = 1.9 · 102 V. Therefore, the Vf of FIB is very small and the effect of ion beam potential on the trajectory of low-energy SEs is negligible. On the other hand, FIB exposure causes the surface to be positively charged and the charged potential rises until dielectric breakdown occurs. Thus, the surface positive charges induced by ion beam irradiation become non-negligible and cause low-energy SEs to redistribute and neutralize the positive charges. The fact that the negative Vth shifts of the neighboring devices for Ie/Ii = 80 (Fig. 9) are less than those for the FEB (4 nA) irradiation in Fig. 4 supports this explanation. The optimum Ie/Ii (=20) is higher than those in ion implantation systems employed in the LSI process, Ie/Ii = 5, which may be due to the high current density of our FIB system. The use of FEB with a diameter smaller than that in our experiments (about 50 lm) has a possibility of reducing the optimum Ie/Ii. It needs further consideration to theoretically derive the optimum condition for the FIB system. In addition, to make a detailed analysis of the charging phenomenon on the micrometer order, the development of more charge-sensitive monitor devices, whose parameters can be measured easily and which can be used repeatedly, is critical. Using the optimized condition (Ie/Ii = 20), the 500 eV FEB charge neutralizer has been successfully applied to the circuit modifications of present-generation analog devices, such as circuit edits and
H. Komoda et al. / Microelectronics Reliability 46 (2006) 2085–2095
probing pad creations of power management ICs and realtime clock ICs. However, the maximum Ii satisfying the optimized condition is limited at 500 pA because of the maximum Ie (10 nA) available in our FIB-SEM combined system. Moreover, there is a concern of adverse influence of a large number of SEs generated by the high-current electron beam irradiation on the neighboring devices. Therefore, alternative antistatic techniques are needed for high-current (nanoampere-order) FIB processing.
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FIB-deposited carbon line FIB-irradiated area Bonded-wire to GND pad
Bonded-wire to gate pad
4. Charge neutralization in high ion-current range (nanoampere-order) using microprobing and FIB-deposition 4.1. Sample
20 μm
For evaluating the effectiveness of our microprobing and FIB-deposition method, n-MOS transistors fabricated by 0.35 lm technology and three-layer metallization were used. An optical image of the n-MOS transistor is shown in Fig. 11. The gate length and width of the n-MOS transistor are 0.35 and 25 lm, respectively. The gate oxide thickness is 7.5 nm. The samples were packaged in 24-pin ceramic dual in-line packages (DIPs). The gate, drain, source and substrate pad electrodes are connected with the corresponding DIP pins by aluminum bonding wires. 4.2. Resistance of FIB-deposited current path Prior to perform the microprobing and FIB-deposition method, the upper-limit resistance (RUL) of FIB-deposited current path for preventing FIB-induced charging was evaluated. A current path from GND to gate pad of nMOS transistor was formed by FIB-assisted carbon deposition as shown in Fig. 12. The width and length of the deposited carbon line were 1.5 and 35 lm, respectively. The deposition time of the carbon line was varied to form current paths with various resistances. The resistivity of the carbon line was 10–30 X cm. In all cases, the Ii for FIBassisted deposition was 200 pA. After measuring the resistance (R) of the carbon line, DIP pins except for gate pin
Substrate
Fig. 12. Scanning ion micrograph showing FIB-deposited carbon line and FIB-irradiated area. The FIB-deposited carbon line connects the floating gate pad of n-MOS transistor to GND pad.
were electrically contacted to the sample holder which was connected to GND of FIB-SEM combined system. In this state, the gate of n-MOS transistor was connected to GND only through the current path of FIB-deposited carbon line. An area of 10 · 10 lm2 on the bonded-wire to gate pad was scanned by FIB (Ii = 13.5 nA) for 120 s, as shown in Fig. 12. Fig. 13 shows the dependence of R of the FIB-deposited carbon line on the deposition time and the Vth shift of nMOS transistors induced by FIB irradiation at 13.5 nA as a function of the R. From Fig. 13(a), the R shows almost exponential decrease with the deposition time and reaches below 100 MX within 60 s. Since the film is in the early stage of formation in the experimental time range < 60 s, the quality of the material corresponding to this part is thought to be inferior to the bulk region. However, the reason of the time dependence of R is not clear and it needs further research. When R 6 500 MX, the FIB-induced Vth shift of n-MOS transistors is negligible due to the effect of the FIB-deposited carbon line (Fig. 13(b)). Thus, when R 6 500 MX, the FIB-induced increase in Vg of the
Source Substrate
Source
Gate
Drain
Gate
Drain
40 μm Fig. 11. Optical image of n-MOS transistor.
10 μm
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(a)
(b) 350 300
1010
Vth shift (mV)
Resistance of FIB-deposited carbon line (Ω)
1011
109
250 200 150 100
108
50 107
0
10
20
30
40
50
60
Deposition time (s)
0 107
108
109
1010
1011
Resistance of FIB-deposited carbon line (Ω)
Fig. 13. (a) Dependence of resistance R of FIB-deposited carbon line on deposition time for FIB current Ii = 200 pA and (b) dependence of FIB-induced Vth shift of n-MOS transistors on R of FIB-deposited carbon line for Ii = 13.5 nA.
n-MOS transistor is less than VFN, the voltage that causes FN tunneling current through the gate oxide. Let us estimate the RUL of FIB-deposited current path for preventing the FIB-induced increase in Vg. In the case of 30 keV FIB irradiation, Ga+ ions are implanted into a sample and SEs (whose emission yield is approximately two [17]) are emitted from the surface. Thus, the sample surface is positively charged with approximately 3Ii per second by an FIB irradiation at Ii. Therefore, the R needed to maintain Vg below VFN for FIB irradiation at Ii is given as R6
V FN : 3I i
holder of the FIB-SEM combined system. In this state, the gate of n-MOS transistor was electrically floating. The shifts of Id versus Vg curves induced by FIB irradiation at the bonded-wire to gate pad were measured. By conducting similar experiments with and without the combined method using microprobing and FIB-deposition, effectiveness of the method was evaluated. The samples were mainly observed by SEM at Vacc = 1 kV and with electron beam current (Ie) of 14 pA. SIM image (Ii = 10 pA) was also observed if necessary. The details of the experimental procedure are described as follows in reference to Fig. 14.
ð3Þ
In general, when the electric field of gate oxide exceeds 6 MV/cm, FN tunneling current becomes apparent. So, we take the VFN of our n-MOS transistor to be about 4.5 V from the gate oxide thickness of 7.5 nm. Using Eq. (3), RUL for maintaining the change in Vg 6 4.5 V during FIB irradiation of 13.5 nA is estimated to be about 100 MX, which is smaller than the experimentally obtained value of 500 MX from Fig. 13(b). In practice, when the irradiated area becomes positively charged, the redistribution of low-energy SEs occurs as mentioned in the previous section. Since these redistributed SEs limit the FIB-induced positive charging, the RUL of FIB-deposited current path becomes higher than 100 MX. Therefore, the RUL = 100 MX estimated from Eq. (3) gives a reasonable agreement with the result shown in Fig. 13(b). 4.3. Combined method of microprobing and FIB-deposition A sample whose source-drain current (Id) versus gate voltage (Vg) curve was pre-measured was fixed on the FIB sample holder. In the Id versus Vg curve measurement, Vg was swept from 0 to 3 V with 10 mV intervals while drain was biased at 3 V and substrate and source electrodes were connected to GND. The DIP pins except for the gate pin were electrically contacted to the sample
(1) Touchdown of the microprobe Microprobe was touched down on the desired point of sample surface by monitoring with SEM image. The SEM image monitoring with high-resolution makes it possible to confirm whether microprobe touches the sample surface or not. Using low Vacc and low beam current, the beam-induced charging during SEM monitoring is suppressed. The time needed for touchdown of the microprobe including positioning in the right position was less than 60 s. (2) First FIB-deposition of carbon film The purpose of the first deposition is to ensure electrical contact of microprobe to FIB-deposited carbon line. A 0.5 lm-thick carbon film was deposited on the tip of microprobe with an area of 5 · 5 lm2. The time needed was 133 s at Ii = 300 pA. A SEM image taken after the first FIB-deposition is shown in Fig. 14(a). (3) Second FIB-deposition to form carbon line The second deposition was conducted to form a carbon line connecting the first carbon film to the floating gate pad. The width and length of the carbon line were 1.5 and 40 lm, respectively. This made a current path from the gate pad to microprobe (GND). The Ii of second FIB-deposition was 300 pA. The targeted R of the carbon line fabricated by the second FIB-deposition was 20 MX considering the addition of contact
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FIB-irradiated area 20 μm Fig. 14. Scanning electron micrographs showing the procedure of our antistatic technique using microprobing and FIB-assisted deposition method: (a) after touchdown of the microprobe on the sample surface and first FIB-deposition of carbon film, (b) after second FIB-deposition to form carbon line, (c) after FIB irradiation to the bonded-wire to gate pad of n-MOS transistor and (d) after liftoff of the microprobe.
resistance between the microprobe and the first FIBdeposited carbon film. The time needed was 200 s. A SEM image taken after the second FIB-deposition is shown in Fig. 14(b). (4) FIB irradiation An area of 10 · 10 lm2 on the bonded-wire to gate pad was scanned by FIB (Ii = 300 pA or 6.9 nA) for 120 s. A SEM image taken after FIB irradiation is shown in Fig. 14(c). (5) Liftoff of the microprobe Liftoff of the microprobe can be performed directly by monitoring with SEM image. There was no need of FIB processing to cut off the deposited carbon line from the microprobe. The time needed for this process was a few seconds. This ensures a small number of beam-induced charges while this method is carried out. A SEM image taken after the liftoff of the microprobe is shown in Fig. 14(d). 4.4. Effectiveness of the microprobing and FIB-deposition method Fig. 15 shows the pre- and post-FIB Id versus Vg curves for n-MOS transistors. FIB irradiation (Ii = 300 pA or 6.9 nA) was performed with or without our microprobing and FIB-deposition method. From Fig. 15(a) and (c), after
FIB irradiation without the microprobing and FIB-deposition method, the subthreshold swing (S) and Vth of the nMOS transistors shift to higher values (for Ii = 300 pA: DS = 13 mV/decade and DVth = 80 mV, for Ii = 6.9 nA: DS = 29 mV/decade and DVth = 220 mV). In contrast, with our method, the DS and DVth of the n-MOS transistors are limited within 1.5 mV/decade and 10 mV, respectively (Fig. 15(b) and (d)). It is well known that hot carrier injection to the gate oxide of n-MOS transistors shifts the S and Vth to higher values [18]. When there is no current path to GND, the floating gate pad of n-MOS transistor is positively charged by FIB irradiation. This charge-induced high voltage causes FN tunneling current through the gate oxide. The hot carriers generate interface states and trapped charges, result in the shift of S and Vth of the n-MOS transistor to higher values. In contrast, in the case of FIB irradiation with the microprobing and FIB-deposition method, there is a current path from the gate pad to GND (the resistance is several tens of MX). Since this current path makes FIBinduced positive charges flow to GND, the increase in Vg is restricted. Consequently, the combined method of microprobing and FIB-assisted deposition prevents device parameter shifts even for high-current (nanoampere-order) FIB irradiation with additional time of several minutes.
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Fig. 15. Pre- and post-FIB Id vs Vg curves for n-MOS transistors: for FIB current Ii = 300 pA (a) without or (b) with microprobing and FIB deposition method and for FIB current Ii = 6.9 nA (c) without or (d) with microprobing and FIB deposition method.
5. Conclusions
References
We have developed effective charge neutralization techniques for circuit modifications with a wide current range of FIB processing. For low-current (<500 pA) FIB processing, a 500 eV focused electron beam is utilized. This method needs no additional time for charge neutralization. For high-current (nanoampere-order) FIB processing, a combined method of microprobing and FIB-assisted deposition is utilized. The additional time for this method is several minutes. Using EEPROM devices, we demonstrated that the focused electron beam prevents threshold voltage shifts of both irradiated and neighboring transistors and that the ratio of electron to ion beam currents is a key parameter to achieving effective charge neutralization. Using n-MOS transistors, we showed that the combined method prevents parameter shifts of transistors even for high-current (nanoampere-order) FIB irradiation. We also evaluated the upper-limit resistance of the current path formed by FIB-assisted carbon deposition to prevent charging induced by a given FIB current. Using the 500 eV focused electron beam and the combined method of microprobing and FIB-assisted deposition for low-current (<500 pA) and for higher current FIB processing, respectively, efficient circuit edit without FIB-induced charging can be performed in the same FIBSEM combined system.
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Acknowledgements The authors would like to thank Hiroyuki Suhara and Takeshi Ueda for performing the simulation of trajectory of secondary-electrons.
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[15] Campbell AN, Soden JM. Voltage contrast in the FIB as a failure analysis tool. Microelectronic failure analysis, desk reference. 4th ed. Ohio: ASM International; 1999. p. 161–7. [16] Holmes AJT. Theoretical and experimental study of space charge in intense ion beams. Phys Rev A 1979;19:389–407. [17] Adachi T. Focused ion beam system and its application. Denshi Kenbikyo 1996;30:237–44 (in Japanese). [18] Tsuchiya T, Kobayashi T, Nakajima S. Hot-carrier-injected oxide region and hot-electron trapping as the main cause in Si nMOSFET degradation. IEEE Trans Electr Dev 1987;34: 386–91.