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Novel dielectrics for gate oxides and surface passivation on GaN
Solid-State Electronics 50 (2006) 1016–1023 www.elsevier.com/locate/sse
Novel dielectrics for gate oxides and surface passivation on GaN B.P. Gila a,*, G.T. Thaler a, A.H. Onstine a, M. Hlad a, A. Gerger a, A. Herrero a, K.K. Allums a, D. Stodilka a, S. Jang b, B. Kang b, T. Anderson b, C.R. Abernathy a, F. Ren b, S.J. Pearton a a
Department of Materials Science and Engineering, University of Florida, P.O. Box 116400, Gainesville, FL 32611, United States b Department of Chemical Engineering, University of Florida, PO Box 116005, Gainesville, FL 32611, United States Received 3 April 2006; accepted 6 April 2006
The review of this paper was arranged by A.A. Iliadis and P.E. Thompson
Abstract We review recent progress in obtaining low interface state densities on GaN and reducing current collapse with dielectrics on AlGaN/ GaN high electron mobility transistors (HEMTs). New oxides of scandium and magnesium have shown promise for surface passivation on HEMTs however the lattice mismatches of 6.5% for MgO and +9.1% for Sc2O3 have led to efforts to find lower lattice mismatch oxides to increase oxide/nitride interfacial stability. By adding calcium to MgO, a crystalline film of MgCaO can be produced that has a closer lattice match to GaN. Stability of the dielectric films was determined for environmental and thermal processes and a 5 nm cap of Sc2O3 was found to increase the stability of the MgCaO over that of MgO and produce a 15% increase in carrier concentration over the non-passivated samples. This increase in sheet carrier density was maintained for several weeks at temperatures of 200 C. 2006 Elsevier Ltd. All rights reserved. Keywords: GaN; HEMTs; Passivation
1. Introduction High electron mobility transistors (HEMTs) utilizing the two dimensional electron channel formed in good quality AlGaN/GaN heterojunctions are of great interest for high-frequency/high-power/high-temperature applications due to the very high density of the 2D gas and an extremely high breakdown voltage [1–18]. Applications for such devices include high frequency wireless base stations and broad-band links, commercial and military radar, and satellite communications. The use of metal–oxide–semiconductor (MOS) or metal–insulator–semiconductor (MIS) gates for HEMTs produces a number of advantages over the more conventional Schottky metal gates, including
*
Corresponding author. Tel.: +1 352 846 1091; fax: +1 352 846 1182. E-mail address: [email protected]fl.edu (B.P. Gila).
0038-1101/$ - see front matter 2006 Elsevier Ltd. All rights reserved. doi:10.1016/j.sse.2006.04.001
lower leakage current and greater voltage swing [11–14]. Several of the dielectrics use for GaN to date and their properties are displayed in Table 1. Commercialization of AlGaN/GaN HEMTs has encountered difficulties because of surface and bulk carrier trapping phenomena causing the power performance to degrade substantially at high frequencies and high signal levels. This phenomenon can also be observed as a current dispersion between dc and pulsed test conditions or a degraded rf output power. One technique to mitigate the surface carrier traps is to passivate the HEMT structure with a dielectric layer such as SiNx, Sc2O3, or MgO over the source/gate and gate/drain regions [3–9,20,21]. The role of surface treatments prior to dielectric deposition has also been found to have a profound effect on the reduction of surface traps [19–24]. Another important feature is how the various surface passivation films and processes affect the device isolation current. We have observed significant variations in the effective
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Table 1 Candidate dielectrics for use in GaN-based electronic devices
Structure Mismatch to GaN (%) Bandgap (eV) Dielectric Constant, e
SiO2
Si3N2
Ga2O3
Gd2O3
Sc2O3
MgO
GaN
Amor na 9.0 3.9
Amor na 5.0 5.0
Hex/Mono 56 4.4 10–11.4
Bix 20 5.3 11.4
Bix 9.2 6.3 14
NaCl 6.5 8 9.8
2H 0 3.39 3.4
resistance between mesa-isolated devices, which are directly related to the sequence of surface cleaning processes prior to deposition of the passivation dielectric. It is interesting to note that not all successful passivation techniques lead to low device–device isolation current. Crystalline oxides that provide excellent passivation also provide the lowest isolation current of the dielectrics tested to date. In our research we are looking into crystalline dielectrics rather than amorphous dielectrics for GaN. The MgO, when looked at from the (1 1 1) plane, has a hexagonal symmetry like the (0 0 01) plane of GaN with a 6% lattice mismatch. The trend we predicted (and later observed) is as the lattice mismatch between the dielectric and the GaN is reduced, the interface trap density (Dit) will decrease, i.e. less broken bonds. This reduction in Dit was observed as we went from Gd2O3 (20% lattice mismatch) to Sc2O3(9% lattice mismatch) to MgO (6% lattice mismatch) [25]. In all cases, there is a thin single crystal dielectric layer that forms on the GaN. Then depending upon the growth conditions, we can either maintain the single crystal structure of the dielectric or allow it to turn polycrystalline above this interfacial layer. Currently we are growing MgCaO which we can tune the lattice constant to be lattice matched to GaN, thus providing the lowest Dit possible. In this paper we report the nitride surface preparation and growth of these crystalline oxide dielectrics, efforts to further improve the oxide/nitride interface properties by reducing the lattice mismatch and accelerated aging effects. 2. Experimental The processed HEMTs were first tested in both dc mode and pulsed gate mode to determine the level of current collapse prior to dielectric deposition. The HEMT dc parameters were measured in dc and pulsed mode at 25 C, using a parameter analyzer for the dc measurements and pulse generator, dc power supply, and oscilloscope for the pulsed measurements. We have described the results of gate lag measurements elsewhere, in which the gate voltage VG was pulsed from 25 to 0 V at different frequencies with a 10% duty cycle [9,14]. This provides a base to compare the surface preparation treatments and the passivation dielectric. 2.1. Surface preparation of processed HEMTs Before the passivation dielectric can be deposited on the processed HEMT, the surface must be cleaned. Failure to
remove all of the surface contamination (native oxide, organic residue from photolithography and particulate debris) will lead to a less effective passivation. Several steps were taken to remove the majority of the surface contaminates. The typical cleaning procedure for as-received GaN wafers (without fabricated devices) includes ex situ wet chemical solutions of hydrochloric acid, phosphoric acid, nitric acid, potassium hydroxide, sulfuric acid and hydrofluoric acid [22–24]. In addition to these wet chemistries, the intentional oxidation of this as-received surface via ozone exposure has also been studied to reduce the carbon contamination of these surfaces. In situ surface cleaning treatments include Ga deposition and desorption, ion bombardment, nitrogen plasma exposure, ammonia exposure and thermal cleaning [25–28]. Several combinations of these treatments have been investigated, however, to date there is no procedure to completely remove the native oxide from either AlGaN or GaN. Beginning with a known cleaning procedure employed for MOSFET fabrication on as-received GaN wafers, a new ex situ and in situ treatment of the processed HEMT devices had to be created to avoid device degradation [15]. The ex situ chemical treatment was eliminated due to possible damage of the contact metals, especially the fragile gate metal. The HEMT substrate cleaning begins with a solvent wash to completely remove any trace photoresist that may have been overlooked during processing. Next, the processed HEMTs received an UV–ozone exposure for 25 min in a UV Cleaner model 42-220 to remove any residual carbon contamination. The sample is heated slightly from the UV lamp’s close proximity to the sample surface. This has been measured with a thermocouple to be approximately 60 C. The HEMTs are then indium mounted to molybdenum blocks (170 C) and loaded into the MBE load/lock chamber. Each sample received an in situ thermal clean of 300–350 C for 5 min in the growth chamber with a background pressure of <10 9 Torr. This pre-deposition cleaning recipe was developed to ensure no damage would occur to the finished HEMT device. 2.2. Oxide growth All oxide growth was performed in a modified RIBER 2300 MBE equipped with a reflection high-energy electron diffraction (RHEED) system. Oxide growth was performed using a standard effusions oven containing Mg (99.99%) operating at 360 C, Ca (99.99%) operating at 400 C and
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Sc (99.999%) operating at 1190 C. Atomic oxygen was supplied from a Oxford MPD21 radio frequency plasma source with 300 W forward power at 8 · 10 6 Torr oxygen pressure. The substrate temperature was measured using a backside thermocouple that was calibrated using the melting points of In (156 C), InSb (525 C) and GaSb (712 C). Materials characterization was provided from RHEED, transmission electron microscopy (TEM), X-ray diffraction (XRD), atomic force microscopy (AFM) and Auger electron spectroscopy (AES). Initially these oxide films were processed into capacitors to measure their breakdown fields and dielectric constant. This lead to the development of oxide recipes for the field passivation of HEMTs [13,14,19]. 2.3. Reliability experiments Environmental stability is important for the viability of a passivation oxide under processing conditions and device operation. The environmental stability of the oxides was tested under accelerated aging conditions of 99% humidity and elevated temperature (>100 C). The stability of the films was measured as the change of the index of refraction, n, over time. The index of refraction was measured using an ellipsometer. The thermal stability of the dielectric is important for both operation and processing. If the oxide degrades upon exposure to moderate temperatures over an extended time it will also degrade at operational temperatures. More importantly if the oxide degrades upon annealing at elevated temperatures of up to 1000 C then processing limitations may become an issue as these dielectrics are employed as gate dielectrics for MOSFETs. The activation and implant anneals and Ohmic contact anneals are typically done at temperatures exceeding 700 C. The oxide films were annealed in an RTA at 1000 C for 2 min in N2 ambient to test their thermal stability. X-ray reflectivity (XRR), was used to measure the interface roughness before and after annealing to determine the thermal stability of the oxide/nitride interface. For the analysis, the XRR raw data is compared to models where film thickness, density and interfacial roughness are the fitting parameters. Hall effect samples were fabricated from unprocessed HEMT material. This material was MOCVD grown on sapphire substrates and consisted of a 2 lm GaN buffer layer and 24 nm Al0.23Ga0.77N layer. Conventional van der Pauw patterns with Ti/Al/Pt/Au corner contacts were used. These samples were tested on a daily basis for a baseline error for the Hall system. The samples were then treated with the standard HEMT cleaning recipe and dielectric deposition recipe as used in the standard passivation. Samples were then tested for several weeks to determine the effects and stability of the passivation. The samples were then placed into an oven at 100–200 C for several more weeks to determine the aging effects on the passivation and HEMT.
3. Results and discussion 3.1. Substrate preparation The first step in the cleaning is the UV–ozone exposure. The HEMT samples were measured before and after the UV–ozone exposure to determine the changes, if any, to the dc and pulsed I–V data. From these measurements, UV–ozone exposure has been shown to be effective as a screening method for evaluation of HEMT device material, i.e. a link between nitride material/device quality and the effect of UV–ozone exposure on the HEMT device performance has been observed. Typically in high quality HEMT material, it is noticed that the pulsed Vds–Ids plot will slightly increase immediately after the UV treatment. After three days, the pulsed Vds–Ids increases further, as shown in Fig. 1. This time period is required to refill the traps that were emptied from the UV light exposure. These high quality devices showed further improvement after the dielectric passivation was deposited. When this same procedure is preformed on a HEMT device fabricated from poorer quality material as determined by full-width-at-half maximum of the XRD peak and with higher levels (>25%) of current collapse, exposure to the UV–ozone produces little or no immediate effect and the three day test improves only slightly. On a few occasions, the pulsed Vds–Ids decreased after the UV–ozone treatment and never recovered after the three day period. This is due to a very large number of carrier traps in the nitride material that have a lifetime far greater than this recovery period. This data indicated that irreversible damage had occurred to the HEMT structure from the UV–ozone treatment. The UV–ozone treatment was found to reduce the current collapse, however, the isolation current between devices was slightly increased. This increase in isolation current is due to the UV illumination emptying deep traps in the GaN buffer, the AlGaN is etched away during the
Fig. 1. Vds–Ids of both pulsed mode (hollow plots) and dc mode (solid plots) for a high quality HEMT device as-processed (j), same device immediately after UV–ozone treatment (d), and three days after UV– ozone treatment and passivation (m).
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age to the poorer HEMTs are likely located within the AlGaN and/or the AlGaN/GaN interface region, within the top 35 nm of the device structure. 3.2. Oxide growth The detailed growth and characterization of scandium oxide and magnesium oxide have been previously reported in detail [28,29].
Fig. 2. I–V characteristics for isolation current between adjacent devices.
mesa formation process. This isolation current was reduced simply by waiting three days, allowing for the carriers to refill the traps. In almost all cases, the isolation current returned to the same level as, or slightly lower than, the original as-received HEMT isolation current, as shown in Fig. 2. The UV–ozone process was added to other passivation schemes for a comparison on the effects of the isolation current. Fig. 3 indicates the UV–ozone cleaning improved the passivation with various dielectrics. Note that the untreated surface usually gives the lowest leakage, but is unusable because of the poor rf performance of the device due to the surface trapping. The UV–ozone in combination with the crystalline oxides produces the lowest isolation current. Also shown are more aggressive cleaning recipes with the inclusion of ammonium hydroxide (method 5) or more aggressive oxygen cleaning from an ashing system (method 6). In both cases with the SiNx, the isolation was found to improve. It is also interesting to note that the isolation current of the poorer quality HEMT devices is still relatively good, remaining in the nA range. This indicates that the carrier traps that cause the irreversible dam-
Fig. 3. Isolation current at 60 V bias for various dielectrics employing a UV–ozone clean before the dielectric deposition. The hollow box represents SiNx without UV–ozone cleaning.
3.2.1. Scandium oxide The crystal structure of scandium oxide is Bixbyite, which is an FCC array of scandium atoms with oxygen occupying 3/4 of the tetrahedral sites. The symmetry of the (1 1 1) of the FCC array is identical to the (0 0 0 1) of the hexagonal array. The (1 1 1)//(0 0 0 1) is the lowest energy configuration for the interface of these two materials and the expected growth plane for the Sc2O3, which produces the lattice mismatch between the Sc2O3 (1 1 1) and the GaN (0 0 0 1) of 9%. For a substrate temperature of 600 C, the films are single crystal with a growth rate of 1.8 nm/min. When grown at a substrate temperature of 100 C, the single crystal nature of the oxide film is lost after a few nanometers and the remaining growth is polycrystalline. There is no measured loss in growth rate between the two substrate temperatures and the film stoichiometries are similar within error of the Auger electron spectroscopy detection limits [28]. 3.2.2. Magnesium oxide The crystal structure of magnesium oxide is rocksalt, which is an FCC array of magnesium atoms with an interpenetrating FCC array of oxygen atoms. The (1 1 1)// (0 0 0 1) is the lowest energy configuration for the interface of these two materials and the expected growth plane for the MgO, which produces the lattice mismatch between the MgO (1 1 1) and the GaN (0 0 0 1) of 6.5%. At a substrate temperature of 100 C, the single crystal nature of the oxide film appears to remains for the duration of the growth and the growth rate is 2.5–3.0 nm/min. From the cross-section TEM micrograph it appears that the MgO becomes polycrystalline after 4 nm of growth, which is not indicated in the RHEED diffraction images. However, the film actually rotates, maintaining the (1 1 1)//(0 0 0 1) symmetry as no other XRD peaks were seen other than the (2 2 2) [29]. 3.2.3. Magnesium calcium oxide To further improve the passivation effect of the dielectric film, the number of surface traps must be reduced. One way to accomplish this goal is to further reduce the lattice mismatch between the nitride semiconductor and the crystalline dielectric. Calcium oxide has the same rocksalt crystal structure as magnesium oxide. Also, the dielectric constant and bandgap are similar to that of MgO. The ˚ , which is lattice parameter of CaO, however, is 4.779 A +6.8% mismatch to GaN. From Vegard’s law, a 50–50%
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Fig. 4. AES depth profiling of MgCaO grown using Ca and Mg BEP of 8 · 10 8 and 10 · 10 8 (bottom).
mixture of Mg and Ca in an oxide should produce a lattice match to GaN. The standard MgO growth conditions have produced oxide/GaN interfaces with low Dit consist of a Mg beam equivalent pressure, BEP, of 10 · 10 8 Torr [21]. The addition of Ca to this beam at a comparable Ca BEP produced an increase of less than 50% in growth rate. This suggests that the sticking coefficient of the Ca is significantly lower than that of the Mg. This is further confirmed
Fig. 5. XRD of MgCaO shows no signs of phase separation or secondary phases.
by AES analysis, which shows a Mg/Ca ratio less than that expected for a 50/50 composition film. In addition, AES depth profiling analysis shows that the Ca has severely segregated to the surface, Fig. 4. This would also indicate a low Ca sticking coefficient. These films were grown at a substrate temperature of 100 C. In spite of the apparent segregation of the Ca, XRD analysis of the MgCaO layer shows no evidence of phase separation, Fig. 5. MgO layers grown under similar conditions typically show primarily a (2 2 2) peak due to the texturing of the film. The MgCaO layer shows no evidence of either the MgO or the CaO (2 2 2) peaks suggesting that phase separation into the two binaries has not occurred. Instead there appears to be a shoulder on the GaN (0 0 4) peak that is not observed in spectra taken from either GaN substrates or MgO layers grown on GaN. This peak is the (2 2 2) peak from the ternary MgCaO. The peak position continues to shift to larger plane spacing relative to the MgO peak as the BEP of Ca is increased, Fig. 6. The proximity of this peak to the GaN (0 0 4) peak is encouraging and suggests that the addition of Ca may be useful in reducing the lattice mismatch between the dielectric and the GaN. Unfortunately due to the severe segregation indicated by the AES analysis, conventional MBE growth techniques cannot be employed and an alternative method must be explored. In order to reduce the segregation, a digital growth technique was used. Initially conditions were set so that the Mg and Ca fluxes were equal and the substrate temperature was 300 C. An initial shutter sequence of 10 s of Mg and 10 s of Ca, repeatedly, with a continuous exposure from the oxygen plasma was used. AFM shows that the digital samples have a slightly smoother surface than the continuous samples. Also the growth rate of the continuous samples is about twice that of the digital samples. Due to a combination of the growth rate and the growth sequence, the digital samples all showed a much more uniform depth profile in AES especially near the surface, as shown in Fig. 7. In the continuous samples there is a dip in the oxygen concentration near the surface as well as in the Ca profile.
Fig. 6. Powder XRD showing increase in lattice constant with the addition of increasing amounts of Ca. The sample at left has 0% Ca, the one in the center 50% and the one at right 75%.
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Fig. 7. AES scans of continuously grown sample (at left), and digitally grown sample (at right). Both films were deposited under the same substrate and BEP conditions.
Table 2 Composition and mismatch for ternary oxides as determined by XRD Layer C- continuous D- digital
2-theta
% Mg
MgO MgCaO-C MgCaO-D MgCaO-C MgCaO-D 50/50 CaO
78.59 75.43 75.41 74.79 74.47 72.9 67.375
100 72.8 72.8 74.79 74.47 50 0
% Mismatch to GaN 6.45 3.11 3.09 2.40 2.05 0.23 6.86
The 50/50 layer composition mismatch is calculated.
Powder XRD showed no oxide peaks other than those expected for the MgCaO. The oxide (2 2 2) peak is found to shift toward the GaN peak as the amount of Ca incorporated into the film is increased for both the digital and the continuous growth sequences. This peak position is the same for either growth method grown under the same fluxes. By increasing the Ca concentration, the lattice mismatch has been reduced from 6.5% for MgO to 2.05% for the ternary, as shown in Table 2. Similar to the XRD data, XTEM shows improved crystal quality in the ternary, shown in Fig. 8. The oxide/GaN interface is single crystal. For MgO, continued growth produces a change in micro-
Fig. 8. High resolution XTEM showing the epitaxial nature of the ternary oxide layer grown on GaN.
structure indicative of a nanocrystalline film. For MgCaO, this transition is not observed and the overall defect density determined by TEM appears to be significantly lower. 3.3. Stability 3.3.1. Environmental stability Despite the attractive qualities of MgO, it has been found to be environmentally unstable. The MgO films degrade over time in atmosphere due to the presence of water vapor. The water vapor reacts with the MgO to form magnesium hydroxide, Mg(OH)2 [30,31]. From capacitor processing and testing, it does not appear that the MgO under the metal contacts degrades, only the areas exposed to atmosphere. Capping layers of scandium oxide of various thicknesses have been investigated in order to prevent this degradation. Scandium oxide caps of 5 nm, 10 nm, and 20 nm on MgO were compared to bare MgO under accelerated aging conditions. The uncapped MgO shows rapid decrease in refractive index (n) over time as shown in Fig. 9. A capping layer of 5 nm greatly improved the environmental stability of the MgO.
Fig. 9. Ellipsometry of the degradation of MgO with and without a capping layer.
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Fig. 12. Hall effect data of a control and aged MgO passivated HEMT. Fig. 10. XRR of capped MgO before and after annealing at 1000 C for 2 min.
3.3.2. Thermal stability Uncapped MgO showed severe degradation as determined by significant change in interfacial roughness after annealing at 1000 C. The surface and interface roughness increased and the density of the oxide layer changed. This is likely due to recrystallization of the MgO since it is polycrystalline. From previous experiments, scandium oxide showed little degradation from a 1000 C, 2 min anneal. The Sc2O3 capping layer seems to reduce these effects, Fig. 10, but the heterostructure interface is still not stable under these conditions. Uncapped MgCaO also showed degradation after annealing, but less severely than the MgO. The capped MgCaO shows only slight differences after annealing, Fig. 11. The majority of this difference comes from a change in the capping layer possibly due to recrystallization of the polycrystalline scandium oxide capping layer. More importantly, the interface roughness of the oxide/ nitride interface does not appear to be greatly affected by the 1000 C anneal, indicating that the additional Sc2O3 cap layer will play a major role in any additional high temperature processing.
Hall Effect samples were fabricated from unprocessed HEMT material. The samples were first tested in the Hall system to define a baseline for this particular structure. The sheet carrier density was measured to be 1.4 · 1011 cm 2, which is low for state of the art HEMT structures, although preliminary data on a sample with higher carrier density (1.3 · 1012 cm 2) showed similar results. The samples were then subjected to the standard HEMT cleaning process and MgO passivation deposition. An increase in sheet carrier density of 15% was observed after the passivation process. This increase in sheet carrier density is due to the reduction of surface traps, freeing more carriers in the channel. This trend is consistent with others reported for passivation with SiO2 and SiNx [32,33]. These values were stable over several days. One sample was annealed at 100 C in a box furnace open to room ambient while the other was maintained at room temperature. These samples were tested daily at first, then every few days, for a total of 25 days. No appreciable decrease in the sheet carrier concentration was observed. The anneal temperature was increased to 200 C, leading to the sheet carrier concentration showing a steady decrease of 3% over the 21 day test interval while the control sample showed no indication of deterioration. These results indicate that the passivation is very stable at room temperature and only a slight degradation is observed at 200 C. This stability should only increase as the lattice mismatch decreases and the 5 nm Sc2O3 cap is employed (Fig. 12). To get a clearer handle on the exact mechanisms that limit the reliability, we need to sample a large enough set of devices to extract whether the devices follow either a Weibull or lognormal distribution for failure? This will enable a better handle on whether the passivation degradation mechanism is a series or parallel process. 4. Summary
Fig. 11. XRR of MgCaO capped before and after annealing at 1000 C for 2 min.
The surface preparation procedure that leads to the cleanest obtainable surface for passivation of HEMT devices, without leading to device degradation, can also provide a simple test of the device structure by exposing
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the HEMT to a UV light source. This procedure can be used as a cursory exam of as-grown HEMT structures prior to device fabrication. Additionally, the ability to maintain low isolation leakage has become a standard with the UV–ozone cleaning treatment in combination with the crystalline oxide passivation. This has been reproduced on all HEMT samples that have been passivated with this technique, regardless of how the HEMT performed. For discrete devices, the isolation current is less of an issue. For the realization of GaN based circuitry, however, maintaining low device–device isolation current is of utmost importance. Further studies are underway to determine the passivation effects on isolation current at elevated temperature. The current passivation technique is shown to be stable at temperatures of 200 C for duration of several weeks. Development of lattice matched dielectrics is currently underway [34]. These should reduce the interface trap density and thus increase the passivation effect of the dielectric layer for combating the current collapse phenomena. The near lattice-matched MgCaO grown via a digital alloy approach has proven to be more thermally stable than the currently employed MgO oxide. The approach of using a reduced defect density single crystal MgCaO interfacial layer capped with a poly-crystalline Sc2O3 layer appears to represent the most stable heterostructure for passivation. Acknowledgements The authors gratefully acknowledge the support from ONR Contract No. N00014-98-1-0204 (H.B. Dietrich) and AFOSR Contract No. F49602-02-1-0366 (G.L. Witt) for this work. The authors also acknowledge the Major Analytical Instrumentation Center at UF for providing the materials characterization instruments. References [1] Kohn E, Daumiller I, Schmid P, Nguyen NX, Nguyen CN. Electron Lett 1999;35:1022. [2] Pearton SJ, Ren F, Zhang AP, Lee KP. Mater Sci Eng R 2000;30:55. [3] Green BM, Chu KK, Chumbes EM, Smart JA, Shealy JR, Eastman LF. IEEE Electron Dev Lett 2000;21:268. [4] Simin G, Hu X, Ilinskaya N, Kumar A, Koudymov A, Zhang J, et al. Electron Lett 2000;36:2043. [5] Daumiller I, Theron D, Gaquiere C, Vescan A, Dietrich R, Wieszt A, et al. IEEE Electron Dev Lett 2001;22:62.
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[6] Klein PB, Binari SC, Ikossi K, Wickenden AE, Koleske DD, Henry RL. Appl Phys Lett 2001;79:3527. [7] Binari SC, Ikossi K, Roussos JA, Kruppa W, Park D, Dietrich HB, et al. IEEE Trans Electron Dev 2001;48:465. [8] Eastman LF, Tilak V, Smart J, Green BM, Chumbes EM, Dimitrov R, et al. IEEE Trans Electron Dev 2001;48:479. [9] Luo B, Johnson JW, Kim J, Mehandru RM, Ren F, Gila BP, et al. Appl Phys Lett 2002;80(9):1661. [10] Vertiatchik A, Eastman LF, Schaff WJ, Prunty T. Electron Lett 2002;38:388. [11] Khan MA et al. IEEE Electron Dev Lett 2000;21:63. [12] Khan MA et al. Appl Phys Lett 2000;77:1339. [13] Luo B, Johnson JW, Gila BP, Onstine A, Abernathy CR, Ren F, et al. Solid State Electron 2002;46:467. [14] Luo B, Mehandru R, Kim J, Ren F, Gila BP, Onstine AH, et al. J Electrochem Soc 2002;149:G613. [15] Luo B, Mehandru RM, Kim J, Ren F, Gila BP, Abernathy CR, et al. Solid State Electron 2002;46:2185. [16] Vetury R, Zhang NW. IEEE Trans Electron Dev 2001;48:416. [17] Binari SC, Doverspike K, Kelner G, Dietrich HB, Wickenden AE. Solid State Electron 1997;41:177. [18] Kim H, Park S-J, Hwang H. J Vac Sci Technol B 2001;19:579. [19] Gillespie JK, Fitch RC, Sewell J, Dettmer R, Via GD, Crespo A, et al. IEEE Electron Dev Lett 2002;23:505. [20] Mehandru R, Luo B, Kim J, Ren F, Gila BP, Onstine AH, et al. Appl Phys Lett 2003;82(15):2530. [21] Kim J, Mehandru R, Luo B, Ren F, Gila BP, Onstine AH, et al. Appl Phys Lett 2002;80:4555. [22] Machuca F, Liu Z, Sun Y, Pianetta P, Spicer WE, Pease RFW. J Vac Sci Technol A 2002;20(5):1784. [23] Shalish I, Shapira Y, Burstein L, Salzman J. J Appl Phys 2001;89(1):390. [24] Lee KN, Donovan SM, Gila B, Overberg M, MacKenzie JD, Abernathy CR, et al. J Electrochem Soc 2000;147:3087. [25] Gila BP, Ren F, Abernathy CR. Mat Sci Eng R Rep 2004;44:151. [26] Bermudez VM, Koleske DD, Wickenden AE. Appl Sur Sci 1998;126:69. [27] Prabhakaran K, Andersson TG, Nozawa K. Appl Phys Lett 1996;69:3212. [28] Gila BP, Johnson JW, Mehandru R, Luo B, Onstine AH, Allums KK, et al. Phys Stat Sol 2001;188:239. [29] Gila BP, Onstine AH, Kim J, Allums KK, Ren F, Abernathy CR, et al. J Vac Sci Technol B 2003;21:2368. [30] Kuroda Y, Yasugi E, Aoi H, Miura K, Morimoto T. J Chem Soc Faraday Trans 1988;84(7):2421–30. [31] Refson J, Wogelius M, Fraser H, Payne JT, Lee B, Milman D. Phys Rev B 1995;52:4590. [32] Dang XZ, Yu ET, Piner EJ, McDermott BT. J Appl Phys 2001;90:1357. [33] Bernat J, Javorka P, Marso M, Kordos P. Appl Phys Lett 2003;83:5455. [34] Gila BP, Hlad M, Onstine AH, Frazier R, Thaler GT, Herrero A, et al. Appl Phys Lett 2005;87:163503.
Novel dielectrics for gate oxides and surface passivation on GaN B.P. Gila a,*, G.T. Thaler a, A.H. Onstine a, M. Hlad a, A. Gerger a, A. Herrero a, K.K. Allums a, D. Stodilka a, S. Jang b, B. Kang b, T. Anderson b, C.R. Abernathy a, F. Ren b, S.J. Pearton a a
Department of Materials Science and Engineering, University of Florida, P.O. Box 116400, Gainesville, FL 32611, United States b Department of Chemical Engineering, University of Florida, PO Box 116005, Gainesville, FL 32611, United States Received 3 April 2006; accepted 6 April 2006
The review of this paper was arranged by A.A. Iliadis and P.E. Thompson
Abstract We review recent progress in obtaining low interface state densities on GaN and reducing current collapse with dielectrics on AlGaN/ GaN high electron mobility transistors (HEMTs). New oxides of scandium and magnesium have shown promise for surface passivation on HEMTs however the lattice mismatches of 6.5% for MgO and +9.1% for Sc2O3 have led to efforts to find lower lattice mismatch oxides to increase oxide/nitride interfacial stability. By adding calcium to MgO, a crystalline film of MgCaO can be produced that has a closer lattice match to GaN. Stability of the dielectric films was determined for environmental and thermal processes and a 5 nm cap of Sc2O3 was found to increase the stability of the MgCaO over that of MgO and produce a 15% increase in carrier concentration over the non-passivated samples. This increase in sheet carrier density was maintained for several weeks at temperatures of 200 C. 2006 Elsevier Ltd. All rights reserved. Keywords: GaN; HEMTs; Passivation
1. Introduction High electron mobility transistors (HEMTs) utilizing the two dimensional electron channel formed in good quality AlGaN/GaN heterojunctions are of great interest for high-frequency/high-power/high-temperature applications due to the very high density of the 2D gas and an extremely high breakdown voltage [1–18]. Applications for such devices include high frequency wireless base stations and broad-band links, commercial and military radar, and satellite communications. The use of metal–oxide–semiconductor (MOS) or metal–insulator–semiconductor (MIS) gates for HEMTs produces a number of advantages over the more conventional Schottky metal gates, including
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0038-1101/$ - see front matter 2006 Elsevier Ltd. All rights reserved. doi:10.1016/j.sse.2006.04.001
lower leakage current and greater voltage swing [11–14]. Several of the dielectrics use for GaN to date and their properties are displayed in Table 1. Commercialization of AlGaN/GaN HEMTs has encountered difficulties because of surface and bulk carrier trapping phenomena causing the power performance to degrade substantially at high frequencies and high signal levels. This phenomenon can also be observed as a current dispersion between dc and pulsed test conditions or a degraded rf output power. One technique to mitigate the surface carrier traps is to passivate the HEMT structure with a dielectric layer such as SiNx, Sc2O3, or MgO over the source/gate and gate/drain regions [3–9,20,21]. The role of surface treatments prior to dielectric deposition has also been found to have a profound effect on the reduction of surface traps [19–24]. Another important feature is how the various surface passivation films and processes affect the device isolation current. We have observed significant variations in the effective
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Table 1 Candidate dielectrics for use in GaN-based electronic devices
Structure Mismatch to GaN (%) Bandgap (eV) Dielectric Constant, e
SiO2
Si3N2
Ga2O3
Gd2O3
Sc2O3
MgO
GaN
Amor na 9.0 3.9
Amor na 5.0 5.0
Hex/Mono 56 4.4 10–11.4
Bix 20 5.3 11.4
Bix 9.2 6.3 14
NaCl 6.5 8 9.8
2H 0 3.39 3.4
resistance between mesa-isolated devices, which are directly related to the sequence of surface cleaning processes prior to deposition of the passivation dielectric. It is interesting to note that not all successful passivation techniques lead to low device–device isolation current. Crystalline oxides that provide excellent passivation also provide the lowest isolation current of the dielectrics tested to date. In our research we are looking into crystalline dielectrics rather than amorphous dielectrics for GaN. The MgO, when looked at from the (1 1 1) plane, has a hexagonal symmetry like the (0 0 01) plane of GaN with a 6% lattice mismatch. The trend we predicted (and later observed) is as the lattice mismatch between the dielectric and the GaN is reduced, the interface trap density (Dit) will decrease, i.e. less broken bonds. This reduction in Dit was observed as we went from Gd2O3 (20% lattice mismatch) to Sc2O3(9% lattice mismatch) to MgO (6% lattice mismatch) [25]. In all cases, there is a thin single crystal dielectric layer that forms on the GaN. Then depending upon the growth conditions, we can either maintain the single crystal structure of the dielectric or allow it to turn polycrystalline above this interfacial layer. Currently we are growing MgCaO which we can tune the lattice constant to be lattice matched to GaN, thus providing the lowest Dit possible. In this paper we report the nitride surface preparation and growth of these crystalline oxide dielectrics, efforts to further improve the oxide/nitride interface properties by reducing the lattice mismatch and accelerated aging effects. 2. Experimental The processed HEMTs were first tested in both dc mode and pulsed gate mode to determine the level of current collapse prior to dielectric deposition. The HEMT dc parameters were measured in dc and pulsed mode at 25 C, using a parameter analyzer for the dc measurements and pulse generator, dc power supply, and oscilloscope for the pulsed measurements. We have described the results of gate lag measurements elsewhere, in which the gate voltage VG was pulsed from 25 to 0 V at different frequencies with a 10% duty cycle [9,14]. This provides a base to compare the surface preparation treatments and the passivation dielectric. 2.1. Surface preparation of processed HEMTs Before the passivation dielectric can be deposited on the processed HEMT, the surface must be cleaned. Failure to
remove all of the surface contamination (native oxide, organic residue from photolithography and particulate debris) will lead to a less effective passivation. Several steps were taken to remove the majority of the surface contaminates. The typical cleaning procedure for as-received GaN wafers (without fabricated devices) includes ex situ wet chemical solutions of hydrochloric acid, phosphoric acid, nitric acid, potassium hydroxide, sulfuric acid and hydrofluoric acid [22–24]. In addition to these wet chemistries, the intentional oxidation of this as-received surface via ozone exposure has also been studied to reduce the carbon contamination of these surfaces. In situ surface cleaning treatments include Ga deposition and desorption, ion bombardment, nitrogen plasma exposure, ammonia exposure and thermal cleaning [25–28]. Several combinations of these treatments have been investigated, however, to date there is no procedure to completely remove the native oxide from either AlGaN or GaN. Beginning with a known cleaning procedure employed for MOSFET fabrication on as-received GaN wafers, a new ex situ and in situ treatment of the processed HEMT devices had to be created to avoid device degradation [15]. The ex situ chemical treatment was eliminated due to possible damage of the contact metals, especially the fragile gate metal. The HEMT substrate cleaning begins with a solvent wash to completely remove any trace photoresist that may have been overlooked during processing. Next, the processed HEMTs received an UV–ozone exposure for 25 min in a UV Cleaner model 42-220 to remove any residual carbon contamination. The sample is heated slightly from the UV lamp’s close proximity to the sample surface. This has been measured with a thermocouple to be approximately 60 C. The HEMTs are then indium mounted to molybdenum blocks (170 C) and loaded into the MBE load/lock chamber. Each sample received an in situ thermal clean of 300–350 C for 5 min in the growth chamber with a background pressure of <10 9 Torr. This pre-deposition cleaning recipe was developed to ensure no damage would occur to the finished HEMT device. 2.2. Oxide growth All oxide growth was performed in a modified RIBER 2300 MBE equipped with a reflection high-energy electron diffraction (RHEED) system. Oxide growth was performed using a standard effusions oven containing Mg (99.99%) operating at 360 C, Ca (99.99%) operating at 400 C and
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Sc (99.999%) operating at 1190 C. Atomic oxygen was supplied from a Oxford MPD21 radio frequency plasma source with 300 W forward power at 8 · 10 6 Torr oxygen pressure. The substrate temperature was measured using a backside thermocouple that was calibrated using the melting points of In (156 C), InSb (525 C) and GaSb (712 C). Materials characterization was provided from RHEED, transmission electron microscopy (TEM), X-ray diffraction (XRD), atomic force microscopy (AFM) and Auger electron spectroscopy (AES). Initially these oxide films were processed into capacitors to measure their breakdown fields and dielectric constant. This lead to the development of oxide recipes for the field passivation of HEMTs [13,14,19]. 2.3. Reliability experiments Environmental stability is important for the viability of a passivation oxide under processing conditions and device operation. The environmental stability of the oxides was tested under accelerated aging conditions of 99% humidity and elevated temperature (>100 C). The stability of the films was measured as the change of the index of refraction, n, over time. The index of refraction was measured using an ellipsometer. The thermal stability of the dielectric is important for both operation and processing. If the oxide degrades upon exposure to moderate temperatures over an extended time it will also degrade at operational temperatures. More importantly if the oxide degrades upon annealing at elevated temperatures of up to 1000 C then processing limitations may become an issue as these dielectrics are employed as gate dielectrics for MOSFETs. The activation and implant anneals and Ohmic contact anneals are typically done at temperatures exceeding 700 C. The oxide films were annealed in an RTA at 1000 C for 2 min in N2 ambient to test their thermal stability. X-ray reflectivity (XRR), was used to measure the interface roughness before and after annealing to determine the thermal stability of the oxide/nitride interface. For the analysis, the XRR raw data is compared to models where film thickness, density and interfacial roughness are the fitting parameters. Hall effect samples were fabricated from unprocessed HEMT material. This material was MOCVD grown on sapphire substrates and consisted of a 2 lm GaN buffer layer and 24 nm Al0.23Ga0.77N layer. Conventional van der Pauw patterns with Ti/Al/Pt/Au corner contacts were used. These samples were tested on a daily basis for a baseline error for the Hall system. The samples were then treated with the standard HEMT cleaning recipe and dielectric deposition recipe as used in the standard passivation. Samples were then tested for several weeks to determine the effects and stability of the passivation. The samples were then placed into an oven at 100–200 C for several more weeks to determine the aging effects on the passivation and HEMT.
3. Results and discussion 3.1. Substrate preparation The first step in the cleaning is the UV–ozone exposure. The HEMT samples were measured before and after the UV–ozone exposure to determine the changes, if any, to the dc and pulsed I–V data. From these measurements, UV–ozone exposure has been shown to be effective as a screening method for evaluation of HEMT device material, i.e. a link between nitride material/device quality and the effect of UV–ozone exposure on the HEMT device performance has been observed. Typically in high quality HEMT material, it is noticed that the pulsed Vds–Ids plot will slightly increase immediately after the UV treatment. After three days, the pulsed Vds–Ids increases further, as shown in Fig. 1. This time period is required to refill the traps that were emptied from the UV light exposure. These high quality devices showed further improvement after the dielectric passivation was deposited. When this same procedure is preformed on a HEMT device fabricated from poorer quality material as determined by full-width-at-half maximum of the XRD peak and with higher levels (>25%) of current collapse, exposure to the UV–ozone produces little or no immediate effect and the three day test improves only slightly. On a few occasions, the pulsed Vds–Ids decreased after the UV–ozone treatment and never recovered after the three day period. This is due to a very large number of carrier traps in the nitride material that have a lifetime far greater than this recovery period. This data indicated that irreversible damage had occurred to the HEMT structure from the UV–ozone treatment. The UV–ozone treatment was found to reduce the current collapse, however, the isolation current between devices was slightly increased. This increase in isolation current is due to the UV illumination emptying deep traps in the GaN buffer, the AlGaN is etched away during the
Fig. 1. Vds–Ids of both pulsed mode (hollow plots) and dc mode (solid plots) for a high quality HEMT device as-processed (j), same device immediately after UV–ozone treatment (d), and three days after UV– ozone treatment and passivation (m).
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age to the poorer HEMTs are likely located within the AlGaN and/or the AlGaN/GaN interface region, within the top 35 nm of the device structure. 3.2. Oxide growth The detailed growth and characterization of scandium oxide and magnesium oxide have been previously reported in detail [28,29].
Fig. 2. I–V characteristics for isolation current between adjacent devices.
mesa formation process. This isolation current was reduced simply by waiting three days, allowing for the carriers to refill the traps. In almost all cases, the isolation current returned to the same level as, or slightly lower than, the original as-received HEMT isolation current, as shown in Fig. 2. The UV–ozone process was added to other passivation schemes for a comparison on the effects of the isolation current. Fig. 3 indicates the UV–ozone cleaning improved the passivation with various dielectrics. Note that the untreated surface usually gives the lowest leakage, but is unusable because of the poor rf performance of the device due to the surface trapping. The UV–ozone in combination with the crystalline oxides produces the lowest isolation current. Also shown are more aggressive cleaning recipes with the inclusion of ammonium hydroxide (method 5) or more aggressive oxygen cleaning from an ashing system (method 6). In both cases with the SiNx, the isolation was found to improve. It is also interesting to note that the isolation current of the poorer quality HEMT devices is still relatively good, remaining in the nA range. This indicates that the carrier traps that cause the irreversible dam-
Fig. 3. Isolation current at 60 V bias for various dielectrics employing a UV–ozone clean before the dielectric deposition. The hollow box represents SiNx without UV–ozone cleaning.
3.2.1. Scandium oxide The crystal structure of scandium oxide is Bixbyite, which is an FCC array of scandium atoms with oxygen occupying 3/4 of the tetrahedral sites. The symmetry of the (1 1 1) of the FCC array is identical to the (0 0 0 1) of the hexagonal array. The (1 1 1)//(0 0 0 1) is the lowest energy configuration for the interface of these two materials and the expected growth plane for the Sc2O3, which produces the lattice mismatch between the Sc2O3 (1 1 1) and the GaN (0 0 0 1) of 9%. For a substrate temperature of 600 C, the films are single crystal with a growth rate of 1.8 nm/min. When grown at a substrate temperature of 100 C, the single crystal nature of the oxide film is lost after a few nanometers and the remaining growth is polycrystalline. There is no measured loss in growth rate between the two substrate temperatures and the film stoichiometries are similar within error of the Auger electron spectroscopy detection limits [28]. 3.2.2. Magnesium oxide The crystal structure of magnesium oxide is rocksalt, which is an FCC array of magnesium atoms with an interpenetrating FCC array of oxygen atoms. The (1 1 1)// (0 0 0 1) is the lowest energy configuration for the interface of these two materials and the expected growth plane for the MgO, which produces the lattice mismatch between the MgO (1 1 1) and the GaN (0 0 0 1) of 6.5%. At a substrate temperature of 100 C, the single crystal nature of the oxide film appears to remains for the duration of the growth and the growth rate is 2.5–3.0 nm/min. From the cross-section TEM micrograph it appears that the MgO becomes polycrystalline after 4 nm of growth, which is not indicated in the RHEED diffraction images. However, the film actually rotates, maintaining the (1 1 1)//(0 0 0 1) symmetry as no other XRD peaks were seen other than the (2 2 2) [29]. 3.2.3. Magnesium calcium oxide To further improve the passivation effect of the dielectric film, the number of surface traps must be reduced. One way to accomplish this goal is to further reduce the lattice mismatch between the nitride semiconductor and the crystalline dielectric. Calcium oxide has the same rocksalt crystal structure as magnesium oxide. Also, the dielectric constant and bandgap are similar to that of MgO. The ˚ , which is lattice parameter of CaO, however, is 4.779 A +6.8% mismatch to GaN. From Vegard’s law, a 50–50%
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Fig. 4. AES depth profiling of MgCaO grown using Ca and Mg BEP of 8 · 10 8 and 10 · 10 8 (bottom).
mixture of Mg and Ca in an oxide should produce a lattice match to GaN. The standard MgO growth conditions have produced oxide/GaN interfaces with low Dit consist of a Mg beam equivalent pressure, BEP, of 10 · 10 8 Torr [21]. The addition of Ca to this beam at a comparable Ca BEP produced an increase of less than 50% in growth rate. This suggests that the sticking coefficient of the Ca is significantly lower than that of the Mg. This is further confirmed
Fig. 5. XRD of MgCaO shows no signs of phase separation or secondary phases.
by AES analysis, which shows a Mg/Ca ratio less than that expected for a 50/50 composition film. In addition, AES depth profiling analysis shows that the Ca has severely segregated to the surface, Fig. 4. This would also indicate a low Ca sticking coefficient. These films were grown at a substrate temperature of 100 C. In spite of the apparent segregation of the Ca, XRD analysis of the MgCaO layer shows no evidence of phase separation, Fig. 5. MgO layers grown under similar conditions typically show primarily a (2 2 2) peak due to the texturing of the film. The MgCaO layer shows no evidence of either the MgO or the CaO (2 2 2) peaks suggesting that phase separation into the two binaries has not occurred. Instead there appears to be a shoulder on the GaN (0 0 4) peak that is not observed in spectra taken from either GaN substrates or MgO layers grown on GaN. This peak is the (2 2 2) peak from the ternary MgCaO. The peak position continues to shift to larger plane spacing relative to the MgO peak as the BEP of Ca is increased, Fig. 6. The proximity of this peak to the GaN (0 0 4) peak is encouraging and suggests that the addition of Ca may be useful in reducing the lattice mismatch between the dielectric and the GaN. Unfortunately due to the severe segregation indicated by the AES analysis, conventional MBE growth techniques cannot be employed and an alternative method must be explored. In order to reduce the segregation, a digital growth technique was used. Initially conditions were set so that the Mg and Ca fluxes were equal and the substrate temperature was 300 C. An initial shutter sequence of 10 s of Mg and 10 s of Ca, repeatedly, with a continuous exposure from the oxygen plasma was used. AFM shows that the digital samples have a slightly smoother surface than the continuous samples. Also the growth rate of the continuous samples is about twice that of the digital samples. Due to a combination of the growth rate and the growth sequence, the digital samples all showed a much more uniform depth profile in AES especially near the surface, as shown in Fig. 7. In the continuous samples there is a dip in the oxygen concentration near the surface as well as in the Ca profile.
Fig. 6. Powder XRD showing increase in lattice constant with the addition of increasing amounts of Ca. The sample at left has 0% Ca, the one in the center 50% and the one at right 75%.
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Fig. 7. AES scans of continuously grown sample (at left), and digitally grown sample (at right). Both films were deposited under the same substrate and BEP conditions.
Table 2 Composition and mismatch for ternary oxides as determined by XRD Layer C- continuous D- digital
2-theta
% Mg
MgO MgCaO-C MgCaO-D MgCaO-C MgCaO-D 50/50 CaO
78.59 75.43 75.41 74.79 74.47 72.9 67.375
100 72.8 72.8 74.79 74.47 50 0
% Mismatch to GaN 6.45 3.11 3.09 2.40 2.05 0.23 6.86
The 50/50 layer composition mismatch is calculated.
Powder XRD showed no oxide peaks other than those expected for the MgCaO. The oxide (2 2 2) peak is found to shift toward the GaN peak as the amount of Ca incorporated into the film is increased for both the digital and the continuous growth sequences. This peak position is the same for either growth method grown under the same fluxes. By increasing the Ca concentration, the lattice mismatch has been reduced from 6.5% for MgO to 2.05% for the ternary, as shown in Table 2. Similar to the XRD data, XTEM shows improved crystal quality in the ternary, shown in Fig. 8. The oxide/GaN interface is single crystal. For MgO, continued growth produces a change in micro-
Fig. 8. High resolution XTEM showing the epitaxial nature of the ternary oxide layer grown on GaN.
structure indicative of a nanocrystalline film. For MgCaO, this transition is not observed and the overall defect density determined by TEM appears to be significantly lower. 3.3. Stability 3.3.1. Environmental stability Despite the attractive qualities of MgO, it has been found to be environmentally unstable. The MgO films degrade over time in atmosphere due to the presence of water vapor. The water vapor reacts with the MgO to form magnesium hydroxide, Mg(OH)2 [30,31]. From capacitor processing and testing, it does not appear that the MgO under the metal contacts degrades, only the areas exposed to atmosphere. Capping layers of scandium oxide of various thicknesses have been investigated in order to prevent this degradation. Scandium oxide caps of 5 nm, 10 nm, and 20 nm on MgO were compared to bare MgO under accelerated aging conditions. The uncapped MgO shows rapid decrease in refractive index (n) over time as shown in Fig. 9. A capping layer of 5 nm greatly improved the environmental stability of the MgO.
Fig. 9. Ellipsometry of the degradation of MgO with and without a capping layer.
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Fig. 12. Hall effect data of a control and aged MgO passivated HEMT. Fig. 10. XRR of capped MgO before and after annealing at 1000 C for 2 min.
3.3.2. Thermal stability Uncapped MgO showed severe degradation as determined by significant change in interfacial roughness after annealing at 1000 C. The surface and interface roughness increased and the density of the oxide layer changed. This is likely due to recrystallization of the MgO since it is polycrystalline. From previous experiments, scandium oxide showed little degradation from a 1000 C, 2 min anneal. The Sc2O3 capping layer seems to reduce these effects, Fig. 10, but the heterostructure interface is still not stable under these conditions. Uncapped MgCaO also showed degradation after annealing, but less severely than the MgO. The capped MgCaO shows only slight differences after annealing, Fig. 11. The majority of this difference comes from a change in the capping layer possibly due to recrystallization of the polycrystalline scandium oxide capping layer. More importantly, the interface roughness of the oxide/ nitride interface does not appear to be greatly affected by the 1000 C anneal, indicating that the additional Sc2O3 cap layer will play a major role in any additional high temperature processing.
Hall Effect samples were fabricated from unprocessed HEMT material. The samples were first tested in the Hall system to define a baseline for this particular structure. The sheet carrier density was measured to be 1.4 · 1011 cm 2, which is low for state of the art HEMT structures, although preliminary data on a sample with higher carrier density (1.3 · 1012 cm 2) showed similar results. The samples were then subjected to the standard HEMT cleaning process and MgO passivation deposition. An increase in sheet carrier density of 15% was observed after the passivation process. This increase in sheet carrier density is due to the reduction of surface traps, freeing more carriers in the channel. This trend is consistent with others reported for passivation with SiO2 and SiNx [32,33]. These values were stable over several days. One sample was annealed at 100 C in a box furnace open to room ambient while the other was maintained at room temperature. These samples were tested daily at first, then every few days, for a total of 25 days. No appreciable decrease in the sheet carrier concentration was observed. The anneal temperature was increased to 200 C, leading to the sheet carrier concentration showing a steady decrease of 3% over the 21 day test interval while the control sample showed no indication of deterioration. These results indicate that the passivation is very stable at room temperature and only a slight degradation is observed at 200 C. This stability should only increase as the lattice mismatch decreases and the 5 nm Sc2O3 cap is employed (Fig. 12). To get a clearer handle on the exact mechanisms that limit the reliability, we need to sample a large enough set of devices to extract whether the devices follow either a Weibull or lognormal distribution for failure? This will enable a better handle on whether the passivation degradation mechanism is a series or parallel process. 4. Summary
Fig. 11. XRR of MgCaO capped before and after annealing at 1000 C for 2 min.
The surface preparation procedure that leads to the cleanest obtainable surface for passivation of HEMT devices, without leading to device degradation, can also provide a simple test of the device structure by exposing
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the HEMT to a UV light source. This procedure can be used as a cursory exam of as-grown HEMT structures prior to device fabrication. Additionally, the ability to maintain low isolation leakage has become a standard with the UV–ozone cleaning treatment in combination with the crystalline oxide passivation. This has been reproduced on all HEMT samples that have been passivated with this technique, regardless of how the HEMT performed. For discrete devices, the isolation current is less of an issue. For the realization of GaN based circuitry, however, maintaining low device–device isolation current is of utmost importance. Further studies are underway to determine the passivation effects on isolation current at elevated temperature. The current passivation technique is shown to be stable at temperatures of 200 C for duration of several weeks. Development of lattice matched dielectrics is currently underway [34]. These should reduce the interface trap density and thus increase the passivation effect of the dielectric layer for combating the current collapse phenomena. The near lattice-matched MgCaO grown via a digital alloy approach has proven to be more thermally stable than the currently employed MgO oxide. The approach of using a reduced defect density single crystal MgCaO interfacial layer capped with a poly-crystalline Sc2O3 layer appears to represent the most stable heterostructure for passivation. Acknowledgements The authors gratefully acknowledge the support from ONR Contract No. N00014-98-1-0204 (H.B. Dietrich) and AFOSR Contract No. F49602-02-1-0366 (G.L. Witt) for this work. The authors also acknowledge the Major Analytical Instrumentation Center at UF for providing the materials characterization instruments. References [1] Kohn E, Daumiller I, Schmid P, Nguyen NX, Nguyen CN. Electron Lett 1999;35:1022. [2] Pearton SJ, Ren F, Zhang AP, Lee KP. Mater Sci Eng R 2000;30:55. [3] Green BM, Chu KK, Chumbes EM, Smart JA, Shealy JR, Eastman LF. IEEE Electron Dev Lett 2000;21:268. [4] Simin G, Hu X, Ilinskaya N, Kumar A, Koudymov A, Zhang J, et al. Electron Lett 2000;36:2043. [5] Daumiller I, Theron D, Gaquiere C, Vescan A, Dietrich R, Wieszt A, et al. IEEE Electron Dev Lett 2001;22:62.
1023
[6] Klein PB, Binari SC, Ikossi K, Wickenden AE, Koleske DD, Henry RL. Appl Phys Lett 2001;79:3527. [7] Binari SC, Ikossi K, Roussos JA, Kruppa W, Park D, Dietrich HB, et al. IEEE Trans Electron Dev 2001;48:465. [8] Eastman LF, Tilak V, Smart J, Green BM, Chumbes EM, Dimitrov R, et al. IEEE Trans Electron Dev 2001;48:479. [9] Luo B, Johnson JW, Kim J, Mehandru RM, Ren F, Gila BP, et al. Appl Phys Lett 2002;80(9):1661. [10] Vertiatchik A, Eastman LF, Schaff WJ, Prunty T. Electron Lett 2002;38:388. [11] Khan MA et al. IEEE Electron Dev Lett 2000;21:63. [12] Khan MA et al. Appl Phys Lett 2000;77:1339. [13] Luo B, Johnson JW, Gila BP, Onstine A, Abernathy CR, Ren F, et al. Solid State Electron 2002;46:467. [14] Luo B, Mehandru R, Kim J, Ren F, Gila BP, Onstine AH, et al. J Electrochem Soc 2002;149:G613. [15] Luo B, Mehandru RM, Kim J, Ren F, Gila BP, Abernathy CR, et al. Solid State Electron 2002;46:2185. [16] Vetury R, Zhang NW. IEEE Trans Electron Dev 2001;48:416. [17] Binari SC, Doverspike K, Kelner G, Dietrich HB, Wickenden AE. Solid State Electron 1997;41:177. [18] Kim H, Park S-J, Hwang H. J Vac Sci Technol B 2001;19:579. [19] Gillespie JK, Fitch RC, Sewell J, Dettmer R, Via GD, Crespo A, et al. IEEE Electron Dev Lett 2002;23:505. [20] Mehandru R, Luo B, Kim J, Ren F, Gila BP, Onstine AH, et al. Appl Phys Lett 2003;82(15):2530. [21] Kim J, Mehandru R, Luo B, Ren F, Gila BP, Onstine AH, et al. Appl Phys Lett 2002;80:4555. [22] Machuca F, Liu Z, Sun Y, Pianetta P, Spicer WE, Pease RFW. J Vac Sci Technol A 2002;20(5):1784. [23] Shalish I, Shapira Y, Burstein L, Salzman J. J Appl Phys 2001;89(1):390. [24] Lee KN, Donovan SM, Gila B, Overberg M, MacKenzie JD, Abernathy CR, et al. J Electrochem Soc 2000;147:3087. [25] Gila BP, Ren F, Abernathy CR. Mat Sci Eng R Rep 2004;44:151. [26] Bermudez VM, Koleske DD, Wickenden AE. Appl Sur Sci 1998;126:69. [27] Prabhakaran K, Andersson TG, Nozawa K. Appl Phys Lett 1996;69:3212. [28] Gila BP, Johnson JW, Mehandru R, Luo B, Onstine AH, Allums KK, et al. Phys Stat Sol 2001;188:239. [29] Gila BP, Onstine AH, Kim J, Allums KK, Ren F, Abernathy CR, et al. J Vac Sci Technol B 2003;21:2368. [30] Kuroda Y, Yasugi E, Aoi H, Miura K, Morimoto T. J Chem Soc Faraday Trans 1988;84(7):2421–30. [31] Refson J, Wogelius M, Fraser H, Payne JT, Lee B, Milman D. Phys Rev B 1995;52:4590. [32] Dang XZ, Yu ET, Piner EJ, McDermott BT. J Appl Phys 2001;90:1357. [33] Bernat J, Javorka P, Marso M, Kordos P. Appl Phys Lett 2003;83:5455. [34] Gila BP, Hlad M, Onstine AH, Frazier R, Thaler GT, Herrero A, et al. Appl Phys Lett 2005;87:163503.