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InAlAs quantum wire field-effect transistor
Physica B 272 (1999) 117}122
Observation of N-shaped negative di!erential resistance in ridge-type InGaAs/InAlAs quantum wire "eld-e!ect transistor S.J. Kim!,",*, T. Sugaya!, M. Ogura!, Y. Sugiyama!, K. Tomizawa# !Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba, Ibaraki 305-8568, Japan "New Energy and Industrial Technology Development Organization (NEDO), 3-1-1 Higashi-Ikebukuro, Tokyo 170-6027, Japan #Meiji University, 1-1-1 Higashimita, Taka-ku, Kawasaki 214-8571, Japan
Abstract N-shaped negative di!erential resistance (NDR) with high peak-to-valley ratio (PVR) and low onset voltage (< ) are NDR clearly observed in a 50-nm gate ridge-type InGaAs/InAlAs quantum wire "eld-e!ect transistor (QWR-FET). The NDR of low onset voltage (< ) and its dependence on the gate voltage are attributed to the real space transfer of channel NDR carriers into a barrier layer underneath the gate by "eld-assisted tunneling. The NDR characteristic of the QWR-FET is enhanced compared with that of InGaAs/InAlAs quantum well "eld-e!ect transistor (QW-FET). The narrower channel width and shorter gate length e!ectively improve the PVR and < . ( 1999 Elsevier Science B.V. All rights reserved. NDR Keywords: Quantum wire; Negative di!erential resistance; Real space transfer; FET
1. Introduction The negative di!erential resistance (NDR) phenomena based on real space transfer (RST) in heterostructures have attracted great interest for various device applications such as microwave sources [1], logic circuits [2], memory elements [3], and light-emission device [4]. The NDR devices have been reported in three terminal devices with source, drain and collector [1}6] or in d-doped "eld e!ect transistors (FET) with source, drain and gate [7}10]. In the former case, the source-collector bias induces charge injection into the collector. In the latter case, the NDR is
* Corresponding author. Tel.: #81-298-54-3389; fax: 81-29854-3357. E-mail address: [email protected] (S.J. Kim)
attributed to the real space transfer by "eld-assisted tunneling (RSTT) at a large positive gate bias. However, the NDR characteristics reported in these RST devices are not satisfactory in terms of peak-tovalley ratio (PVR) and onset voltage (< ). NDR We have incorporated short channel and lowdimensional ridge-type quantum wire (QWR) structure in the d-doped FETs for obtaining a more pronounced NDR characteristics. The electrons are e!ectively accelerated in the short channel due to the reduced scattering probability. The low-dimensional QWR buried with mesa-sidewall can e$ciently con"ne the channel electrons. An InGaAs/InAlAs quantum wire "eld-e!ect transistor (QWR-FET) with a 2 lm-long gate grown on patterned InP (1 0 0) substrate was reported previously [11]. These FETs showed good I}< characteristic with maximum g "105 mS/ . mm at < "0.6 V. DS
0921-4526/99/$ - see front matter ( 1999 Elsevier Science B.V. All rights reserved. PII: S 0 9 2 1 - 4 5 2 6 ( 9 9 ) 0 0 3 7 5 - 0
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Fig. 1. (a) Schematic diagram of QWR structure and (b) SEM image for 50 nm-gate QWR-FET.
In this paper, we demonstrate the pronounced N-shaped NDR characteristic in 50-nm gate InGaAs/InAlAs QWR-FET. The NDR characteristic of 50-nm gate quantum well "eld-e!ect transistor (QW-FET) is also compared to deduce the mechanism of NDR.
2. Experimental InP (1 0 0) substrate was patterned with 2-lm line and space along [0 1 11 ] by positive photoresist (AZ1500), it was then chemical-etched with the depth of about 1 lm by HCl : CH COOH : H O 3 2 2 (1 : 2 : 1) solution for 25 s at 153C to form a truncated-ridge structure. The sidewall of the ridge was (3 1 1) A. Two types of FET structures were grown by solid-source molecular beam epitaxy (MBE). The "rst type was an InGaAs/InAlAs quantum wire (QWR) grown on patterned InP (1 0 0) substrate. The second type was an InGaAs/InAlAs quantum well (QW) grown on non-patterned InP (1 0 0) substrate. The structures were grown at 4603C after the thermal cleaning for 5 min at 5503C. The QWR structure consists of a non-alloyed ohmic contact layer, a 15-nm i-InAlAs barrier layer, and a 5-nm i-InGaAs channel sandwiched between a 10-nm i-InAlAs spacer and a 1000-nm i-InAlAs bu!er layers, as shown in Fig. 1(a). The d-doped layer for supplying electrons into the InGaAs channel was inserted between the barrier and spacer layers. The non-alloyed ohmic contact layer
consists of a 1-nm n`-InAlAs, a 5-nm n`-InGaAs, a 1-nm n`-InGaAs, and a 1-nm n`-InAs layers. The d-doped layers were also inserted in the nonalloyed ohmic contact layer between the 15-nm i-InAlAs and 1-nm n`-InAlAs layers, and between the 5-nm n`-InGaAs and 1-nm n`-InGaAs layers to reduce the barrier height of hetero-interfaces. The width and thickness of QWR were estimated to be approximately 200 and 7 nm, respectively, by scanning electron microscopy (SEM). The thickness of InGaAs channel in the ridge-type QWR was thicker than 5 nm predicted by the growth rate of planar (1 0 0) substrate, due to the migration of group III-atoms from the (3 1 1) sidewall into the (1 0 0) plane. The (3 1 1) sidewall was very thin and had a worse morphology than that of the (1 0 0) plane, which was due to the di!erent optimum growth condition. A 10-nm i-InGaAs channel was also grown for the QW structure, while the other growth parameters remained constant. The sheet carrier of the InGaAs channel was estimated to be 5]1012 cm~2 by Hall measurement. The sidewall and bottom parts of the QWR-FET were "rstly etched down to InAlAs bu!er layer by H PO : H O : H O (3 : 1 : 50) solution for 40 s 3 4 2 2 2 at 153C. A 100-nm SiO "lm was deposited by 2 ion-beam sputtering technique. After the SiO "lm 2 was partially removed for ohmic contact, AuGe (100 nm)/Ni (30 nm)/Au (200 nm) metal "lms for the non-alloyed ohmic contact and electron-beam alignment marks were formed by conventional photolithography and lift-o! process. A Ti (30 nm)/ Pt (5 nm)/Au (30 nm) Schottky gates with the gate
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length of 50 nm were fabricated by the electronbeam exposure, self-aligned recess etching, and lifto! process. The resistance between source and drain was monitored during the recess etching. The recess etching was stopped when the source-drain resistance was saturated. The 50-nm gate across the QWR is shown in Fig. 1(b). The QW-FET with the channel width of ¸ " 8 0.5 lm was fabricated for comparison with the QWR-FET. The fabrication procedure of QWFET was same as that of QWR-FET. I}< characteristics were measured by a HP-4156A semiconductor parameter analyzer. Fig. 3. I}< characteristic for 50-nm gate QWR-FET at 60 K.
3. Experimental results Fig. 2 shows the I}< characteristic of QW-FET with the gate length of 50 nm at 28 K. The Nshaped NDR characteristic is clearly observed in the range of < "0.2}0.35 V by increasing the DS applied gate bias. Such a low onset voltage (< ) NDR has never been observed in the NDR devices previously reported. The NDR characteristic is enhanced at a large gate bias. The sharp drop of valley current is observed from < "5 V, in which G < is 0.3 V. The valley current at the large drain NDR voltage (< "0.8 V) increases with the applied DS gate bias. The measured maximum PVR is 5.8 at < "3.5 V and < "0.2 V. G DS
Fig. 2. I}< characteristic for 50-nm gate QW-FET at 28 K.
The N-shaped NDR is more distinct in the QWR-FET, as shown in Fig. 3. The sharp drop of valley current is also clearly observed from < " G 3.5 V, in which < is 0.28 V. The valley current at NDR the large drain voltage (< "0.8 V) is nearly indeDS pendent on the applied gate bias. < is depenNDR dent on the applied gate bias, similar to that of QW-FET. The measured maximum PVR is 7.7 at < "4.5 V and < "0.32 V. The observed maxG DS imum PVR is nearly consistent with the mobility ratio between the InGaAs channel and d-doped InAlAs layers, which are 12 000 cm2/V s and 1700 cm2/V s [10], respectively, at 300 K. Fig. 4 shows the NDR characteristic of the QWR-FET at elevated temperatures. The NDR is
Fig. 4. I}< characteristic of QWR-FET at elevated temperatures.
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Fig. 5. Hysteresis of NDR and source}gate current for 50-nm gate ridge-type QWR-FET. Arrows indicate the directions of the < -bias sweep. DS
observable until 140 K. < decreases with increasNDR ing temperature. The sharp descent of I above DS < is seen until NDR peak disappears. The NDR I above < was nearly "xed against temperDS NDR ature and gate voltage. Fig. 5 shows the drain-source (I }< ) and DS DS gate-source (I }< ) current characteristics of the SG DS QWR-FET in the di!erent sweep directions of < at < "1 and 4.5 V. The shift of < is small DS G NDR between both directions of the < sweep, indicatDS ing that the space charge is instantaneously balanced during the < sweep. DS The source-gate leak current was no more than 0.1 nA at a large positive gate bias. Therefore, the gate leak current is negligible against I which DS is a order of several micro ampere. The gate leak current is only detectable at the onset of the NDR. There is no gate leak current for entire sweep range of < at the gate voltage of 1V nor at < smaller DS DS than < at the gate voltage of 4.5 V. This supNDR ports the real space transfer of hot electrons toward the barrier layer under the gate.
4. Discussion The mechanisms yielding the NDR for the studied device can be attributed to (i) transfer of hot electrons from a high-mobility layer to a low-mobility layer in the real space (real space transfer:
Fig. 6. Schematic diagram of conduction-band energy for the studied device at large positive gate bias.
RST) or (ii) transfer of hot electrons from a highmobility valley to a low-mobility valley in momentum space (Gunn e!cet). The schematic representation of conductionband diagram for the studied device is illustrated in Fig. 6. The band-gap energies of In Ga As 0.53 0.47 and In Al As are 0.77 and 1.44 eV, respec0.53 0.47 tively. The Schottky barrier height is 0.87 eV. The conduction-band discontinuity between In Ga As and In Al As is *E " 0.53 0.47 0.53 0.47 # &0.5 eV. The separation energy between C and the lowest satellite valleys in In Ga As con0.53 0.47 duction band is *C "&0.55 eV. The calculated L subband levels of 7-nm thick-InGaAs QWR channel are above 56, 223, and 342 meV from the C conduction-band edge of InGaAs QWR channel for the "rst, second, and third subband level, respectively. The e!ective mass of electron in the C valley is m"0.042m . The potential drop of d-doped 0 layer calculated by the Poisson equation is about 230 meV. The calculated subband levels of the ddoped layer are above the conduction-band edge of the d-doped layer by 89, 179, and 216 meV. The "rst subband state of the d-doped layer locates above 359 meV from the C conduction-band edge of InGaAs QWR channel, which is near the third subband state of 342 meV in the InGaAs QWR channel. Therefore, the energy necessary for RSTT from the InGaAs QWR channel to the d-doped InAlAs
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layer is 286 meV corresponding to the separation energy between the "rst and the third subband state in the InGaAs QWR channel. This is nearly consistent with the observed < of 0.28 V, in which the NDR sharp drop of valley current was clearly observed. On the other hand, the "rst subband level of the 7-nm thick-InGaAs QWR channel in the L valley is above 1.3 meV from the L conduction-band edge of InGaAs QWR channel because the e!ective mass of electron in the L valley is large (m"1.98m ). The 0 onset voltage for momentum transfer is estimated to be about 495 meV which is higher than that for the real space transfer. This indicates that the RST can occur at a lower threshold "eld than the momentum space transfer (Gunn e!ect). The gateleakage current above the onset voltage of NDR also supports the real space transfer of hot electrons into the barrier layer. Conductivity of channel electrons based on the RST mechanism is determined by the ratio of electron population between the high- and low-mobility layers. The hot electrons transfer into the low-mobility layer if the momentum obtained by source-drain "eld becomes lager than the barrier height U [12]. The PVR is determined by the magnitude of the transferred hot electron density and the ratio of mobilities between the high- and lowmobility layers. The channel e!ective conductivity G can be described as follows: G"n qk #n qk , 1 1 2 2 where n and k denote the carrier density and 1 1 mobility, respectively, in the high-mobility layer. n and k denote the carrier density and mobility, 2 2 respectively, in the low-mobility layer. The total amount of carriers (n #n ) is constant under the 1 2 "xed gate bias. The observed < is much lower than 0.34 V NDR which is the lowest < reported for the InGaAs/ NDR InAlAs FET so far [13]. This is attributable to the suppression of scattering with the reduction of gate length. The source carriers in the short channel move quasi-ballistically through the channel, without loss of energy by scattering. The sharp drop of I above < in Fig. 3 is DS NDR distinct at large gate bias. While, it is less evident with smaller gate bias. We believe that these sharp descendent characteristics of I are attributed to DS
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the real space transfer by "eld-assisted tunneling (RSTT). If the subband state of the InGaAs QWR channel aligns with the quantized level of the Vshaped potential well generated by the d-doped layer inserted between the barrier and spacing InAlAs layers, the hot electrons in the InGaAs QWR channel resonantly tunnel into the V-shaped well of the d-doped layer. This phenomenon can occur at the large positive gate voltage in the studied device. The I current above < in QWR-FET has DS NDR no gate voltage dependence, contrary to that of QW-FET. It suggests that QWR has a low-mobility region in which it is insensitive to the gate potential. The existence of (3 1 1) side wall and its compositional variation on the corrugated substrate should be the only di!erence in QWR and QW, because the channel width of 200 nm does not a!ect the electron density of state. Further study on the behavior of hot electrons in a short acceleration range by Monte-Carlo simulation, identi"cation of subband level, and spatially resolved characterization of the compositional variation of ridge-type QWR should be undertaken. 5. Summary We had demonstrated the real space transfer (RST) of hot electrons in 50-nm gate ridge-type InGaAs/AlGaAs QWR-FET and QW-FET. The pronounced N-shaped NDR characteristic with high peak-to-valley ratio (PVR"&7.7) and low onset voltage (< "&0.25 V) was clearly obNDR served due to the real space transfer by "eld-assisted tunneling (RSTT). The NDR characteristic of QWR-FET was enhanced compared with that of QW-FET. Its structure is simple and performance is equivalent with more complicated combination of a resonant tunneling diode and hetero-bipolar transistor [14]. The low onset voltage of NDR is favorable for low power consumption functional high-speed circuit.
Acknowledgements The authors would like to appreciate Drs. T. Sakamoto and M. Komuro for the useful
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discussions and encouragement of this study. They also appreciate Drs. H. Hiroshima and S. Haraichi for the valuable suggestions about the electron beam exposure technique, and Mr. K. Hikosaka for PC based instrumentation. References [1] A. Katalsky, R.A. Kiehl, S. Luryi, A.C. Gossard, R. Hendel, IEEE Electron Devices Lett. 5 (1984) 321. [2] S. Luryi, P.M. Menze, M.R. Pinto, P.A. Garbinski, A.Y. Cho, D.L. Sivco, Appl. Phys. Lett. 57 (1990) 1787. [3] S. Luryi, A. Katalsky, A.C. Gossard, R. Hendel, Appl. Phys. Lett. 45 (1984) 1294. [4] P.M. Mensz, P.A. Garbinski, A.Y. Cho, D.L. Sivco, S. Luryi, Appl. Phys. Lett. 57 (1990) 2558. [5] T.K. Higman, M.S. Hagedorn, J. Chen, K.Y. Cheng, Appl. Phys. Lett. 60 (1992) 1342.
[6] H.P. Zappe, C. Moglestue, J. Appl. Phys. 68 (1990) 2501. [7] Y.K. Chen, D.C. Radulescu, G.W. Wang, F.E. Najjar, L.F. Eastman, IEEE Electron Devices Lett. 9 (1988) 1. [8] J. Laskar, A.A. Ketterson, J.N. Baillargeon, T. Brock, I. Adesida, K.Y. Cheng, J. Kolodzey, IEEE Electron Devices Lett. 10 (1989) 528. [9] M.R. Hueschen, N. Moll, A.F.- Colbrie, Appl. Phys. Lett. 57 (1990) 386. [10] C.L. Wu, W.C. Hsu, IEEE Trans. Electron Devices 43 (1996) 207. [11] T. Sugaya, Y. Tanuma, T. Nakagawa, T. Sekiguchi, K. Yonei, Y. Sugiyama, Jpn. J. Appl. Phys. 37 (1998) 1479. [12] K. Hess, H. Morkoc, H. Shichijo, B.G. Streetman, Appl. Phys. Lett. 35 (1979) 469. [13] P.M. Menze, P.A. Garbinski, A.Y. Cho, D.L. Sivco, S. Luryi, Appl. Phys. Lett. 57 (1990) 2558. [14] N. El-Zein, V. Nair, J. Lewis, M. Deshpande, G. Kramer, M. Kyler, Proceedings of the 17th Symposium on Future Electron Devices, November 4}5, Tokyo, Japan, 1998, p. 29.
Observation of N-shaped negative di!erential resistance in ridge-type InGaAs/InAlAs quantum wire "eld-e!ect transistor S.J. Kim!,",*, T. Sugaya!, M. Ogura!, Y. Sugiyama!, K. Tomizawa# !Electrotechnical Laboratory, 1-1-4 Umezono, Tsukuba, Ibaraki 305-8568, Japan "New Energy and Industrial Technology Development Organization (NEDO), 3-1-1 Higashi-Ikebukuro, Tokyo 170-6027, Japan #Meiji University, 1-1-1 Higashimita, Taka-ku, Kawasaki 214-8571, Japan
Abstract N-shaped negative di!erential resistance (NDR) with high peak-to-valley ratio (PVR) and low onset voltage (< ) are NDR clearly observed in a 50-nm gate ridge-type InGaAs/InAlAs quantum wire "eld-e!ect transistor (QWR-FET). The NDR of low onset voltage (< ) and its dependence on the gate voltage are attributed to the real space transfer of channel NDR carriers into a barrier layer underneath the gate by "eld-assisted tunneling. The NDR characteristic of the QWR-FET is enhanced compared with that of InGaAs/InAlAs quantum well "eld-e!ect transistor (QW-FET). The narrower channel width and shorter gate length e!ectively improve the PVR and < . ( 1999 Elsevier Science B.V. All rights reserved. NDR Keywords: Quantum wire; Negative di!erential resistance; Real space transfer; FET
1. Introduction The negative di!erential resistance (NDR) phenomena based on real space transfer (RST) in heterostructures have attracted great interest for various device applications such as microwave sources [1], logic circuits [2], memory elements [3], and light-emission device [4]. The NDR devices have been reported in three terminal devices with source, drain and collector [1}6] or in d-doped "eld e!ect transistors (FET) with source, drain and gate [7}10]. In the former case, the source-collector bias induces charge injection into the collector. In the latter case, the NDR is
* Corresponding author. Tel.: #81-298-54-3389; fax: 81-29854-3357. E-mail address: [email protected] (S.J. Kim)
attributed to the real space transfer by "eld-assisted tunneling (RSTT) at a large positive gate bias. However, the NDR characteristics reported in these RST devices are not satisfactory in terms of peak-tovalley ratio (PVR) and onset voltage (< ). NDR We have incorporated short channel and lowdimensional ridge-type quantum wire (QWR) structure in the d-doped FETs for obtaining a more pronounced NDR characteristics. The electrons are e!ectively accelerated in the short channel due to the reduced scattering probability. The low-dimensional QWR buried with mesa-sidewall can e$ciently con"ne the channel electrons. An InGaAs/InAlAs quantum wire "eld-e!ect transistor (QWR-FET) with a 2 lm-long gate grown on patterned InP (1 0 0) substrate was reported previously [11]. These FETs showed good I}< characteristic with maximum g "105 mS/ . mm at < "0.6 V. DS
0921-4526/99/$ - see front matter ( 1999 Elsevier Science B.V. All rights reserved. PII: S 0 9 2 1 - 4 5 2 6 ( 9 9 ) 0 0 3 7 5 - 0
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Fig. 1. (a) Schematic diagram of QWR structure and (b) SEM image for 50 nm-gate QWR-FET.
In this paper, we demonstrate the pronounced N-shaped NDR characteristic in 50-nm gate InGaAs/InAlAs QWR-FET. The NDR characteristic of 50-nm gate quantum well "eld-e!ect transistor (QW-FET) is also compared to deduce the mechanism of NDR.
2. Experimental InP (1 0 0) substrate was patterned with 2-lm line and space along [0 1 11 ] by positive photoresist (AZ1500), it was then chemical-etched with the depth of about 1 lm by HCl : CH COOH : H O 3 2 2 (1 : 2 : 1) solution for 25 s at 153C to form a truncated-ridge structure. The sidewall of the ridge was (3 1 1) A. Two types of FET structures were grown by solid-source molecular beam epitaxy (MBE). The "rst type was an InGaAs/InAlAs quantum wire (QWR) grown on patterned InP (1 0 0) substrate. The second type was an InGaAs/InAlAs quantum well (QW) grown on non-patterned InP (1 0 0) substrate. The structures were grown at 4603C after the thermal cleaning for 5 min at 5503C. The QWR structure consists of a non-alloyed ohmic contact layer, a 15-nm i-InAlAs barrier layer, and a 5-nm i-InGaAs channel sandwiched between a 10-nm i-InAlAs spacer and a 1000-nm i-InAlAs bu!er layers, as shown in Fig. 1(a). The d-doped layer for supplying electrons into the InGaAs channel was inserted between the barrier and spacer layers. The non-alloyed ohmic contact layer
consists of a 1-nm n`-InAlAs, a 5-nm n`-InGaAs, a 1-nm n`-InGaAs, and a 1-nm n`-InAs layers. The d-doped layers were also inserted in the nonalloyed ohmic contact layer between the 15-nm i-InAlAs and 1-nm n`-InAlAs layers, and between the 5-nm n`-InGaAs and 1-nm n`-InGaAs layers to reduce the barrier height of hetero-interfaces. The width and thickness of QWR were estimated to be approximately 200 and 7 nm, respectively, by scanning electron microscopy (SEM). The thickness of InGaAs channel in the ridge-type QWR was thicker than 5 nm predicted by the growth rate of planar (1 0 0) substrate, due to the migration of group III-atoms from the (3 1 1) sidewall into the (1 0 0) plane. The (3 1 1) sidewall was very thin and had a worse morphology than that of the (1 0 0) plane, which was due to the di!erent optimum growth condition. A 10-nm i-InGaAs channel was also grown for the QW structure, while the other growth parameters remained constant. The sheet carrier of the InGaAs channel was estimated to be 5]1012 cm~2 by Hall measurement. The sidewall and bottom parts of the QWR-FET were "rstly etched down to InAlAs bu!er layer by H PO : H O : H O (3 : 1 : 50) solution for 40 s 3 4 2 2 2 at 153C. A 100-nm SiO "lm was deposited by 2 ion-beam sputtering technique. After the SiO "lm 2 was partially removed for ohmic contact, AuGe (100 nm)/Ni (30 nm)/Au (200 nm) metal "lms for the non-alloyed ohmic contact and electron-beam alignment marks were formed by conventional photolithography and lift-o! process. A Ti (30 nm)/ Pt (5 nm)/Au (30 nm) Schottky gates with the gate
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length of 50 nm were fabricated by the electronbeam exposure, self-aligned recess etching, and lifto! process. The resistance between source and drain was monitored during the recess etching. The recess etching was stopped when the source-drain resistance was saturated. The 50-nm gate across the QWR is shown in Fig. 1(b). The QW-FET with the channel width of ¸ " 8 0.5 lm was fabricated for comparison with the QWR-FET. The fabrication procedure of QWFET was same as that of QWR-FET. I}< characteristics were measured by a HP-4156A semiconductor parameter analyzer. Fig. 3. I}< characteristic for 50-nm gate QWR-FET at 60 K.
3. Experimental results Fig. 2 shows the I}< characteristic of QW-FET with the gate length of 50 nm at 28 K. The Nshaped NDR characteristic is clearly observed in the range of < "0.2}0.35 V by increasing the DS applied gate bias. Such a low onset voltage (< ) NDR has never been observed in the NDR devices previously reported. The NDR characteristic is enhanced at a large gate bias. The sharp drop of valley current is observed from < "5 V, in which G < is 0.3 V. The valley current at the large drain NDR voltage (< "0.8 V) increases with the applied DS gate bias. The measured maximum PVR is 5.8 at < "3.5 V and < "0.2 V. G DS
Fig. 2. I}< characteristic for 50-nm gate QW-FET at 28 K.
The N-shaped NDR is more distinct in the QWR-FET, as shown in Fig. 3. The sharp drop of valley current is also clearly observed from < " G 3.5 V, in which < is 0.28 V. The valley current at NDR the large drain voltage (< "0.8 V) is nearly indeDS pendent on the applied gate bias. < is depenNDR dent on the applied gate bias, similar to that of QW-FET. The measured maximum PVR is 7.7 at < "4.5 V and < "0.32 V. The observed maxG DS imum PVR is nearly consistent with the mobility ratio between the InGaAs channel and d-doped InAlAs layers, which are 12 000 cm2/V s and 1700 cm2/V s [10], respectively, at 300 K. Fig. 4 shows the NDR characteristic of the QWR-FET at elevated temperatures. The NDR is
Fig. 4. I}< characteristic of QWR-FET at elevated temperatures.
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Fig. 5. Hysteresis of NDR and source}gate current for 50-nm gate ridge-type QWR-FET. Arrows indicate the directions of the < -bias sweep. DS
observable until 140 K. < decreases with increasNDR ing temperature. The sharp descent of I above DS < is seen until NDR peak disappears. The NDR I above < was nearly "xed against temperDS NDR ature and gate voltage. Fig. 5 shows the drain-source (I }< ) and DS DS gate-source (I }< ) current characteristics of the SG DS QWR-FET in the di!erent sweep directions of < at < "1 and 4.5 V. The shift of < is small DS G NDR between both directions of the < sweep, indicatDS ing that the space charge is instantaneously balanced during the < sweep. DS The source-gate leak current was no more than 0.1 nA at a large positive gate bias. Therefore, the gate leak current is negligible against I which DS is a order of several micro ampere. The gate leak current is only detectable at the onset of the NDR. There is no gate leak current for entire sweep range of < at the gate voltage of 1V nor at < smaller DS DS than < at the gate voltage of 4.5 V. This supNDR ports the real space transfer of hot electrons toward the barrier layer under the gate.
4. Discussion The mechanisms yielding the NDR for the studied device can be attributed to (i) transfer of hot electrons from a high-mobility layer to a low-mobility layer in the real space (real space transfer:
Fig. 6. Schematic diagram of conduction-band energy for the studied device at large positive gate bias.
RST) or (ii) transfer of hot electrons from a highmobility valley to a low-mobility valley in momentum space (Gunn e!cet). The schematic representation of conductionband diagram for the studied device is illustrated in Fig. 6. The band-gap energies of In Ga As 0.53 0.47 and In Al As are 0.77 and 1.44 eV, respec0.53 0.47 tively. The Schottky barrier height is 0.87 eV. The conduction-band discontinuity between In Ga As and In Al As is *E " 0.53 0.47 0.53 0.47 # &0.5 eV. The separation energy between C and the lowest satellite valleys in In Ga As con0.53 0.47 duction band is *C "&0.55 eV. The calculated L subband levels of 7-nm thick-InGaAs QWR channel are above 56, 223, and 342 meV from the C conduction-band edge of InGaAs QWR channel for the "rst, second, and third subband level, respectively. The e!ective mass of electron in the C valley is m"0.042m . The potential drop of d-doped 0 layer calculated by the Poisson equation is about 230 meV. The calculated subband levels of the ddoped layer are above the conduction-band edge of the d-doped layer by 89, 179, and 216 meV. The "rst subband state of the d-doped layer locates above 359 meV from the C conduction-band edge of InGaAs QWR channel, which is near the third subband state of 342 meV in the InGaAs QWR channel. Therefore, the energy necessary for RSTT from the InGaAs QWR channel to the d-doped InAlAs
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layer is 286 meV corresponding to the separation energy between the "rst and the third subband state in the InGaAs QWR channel. This is nearly consistent with the observed < of 0.28 V, in which the NDR sharp drop of valley current was clearly observed. On the other hand, the "rst subband level of the 7-nm thick-InGaAs QWR channel in the L valley is above 1.3 meV from the L conduction-band edge of InGaAs QWR channel because the e!ective mass of electron in the L valley is large (m"1.98m ). The 0 onset voltage for momentum transfer is estimated to be about 495 meV which is higher than that for the real space transfer. This indicates that the RST can occur at a lower threshold "eld than the momentum space transfer (Gunn e!ect). The gateleakage current above the onset voltage of NDR also supports the real space transfer of hot electrons into the barrier layer. Conductivity of channel electrons based on the RST mechanism is determined by the ratio of electron population between the high- and low-mobility layers. The hot electrons transfer into the low-mobility layer if the momentum obtained by source-drain "eld becomes lager than the barrier height U [12]. The PVR is determined by the magnitude of the transferred hot electron density and the ratio of mobilities between the high- and lowmobility layers. The channel e!ective conductivity G can be described as follows: G"n qk #n qk , 1 1 2 2 where n and k denote the carrier density and 1 1 mobility, respectively, in the high-mobility layer. n and k denote the carrier density and mobility, 2 2 respectively, in the low-mobility layer. The total amount of carriers (n #n ) is constant under the 1 2 "xed gate bias. The observed < is much lower than 0.34 V NDR which is the lowest < reported for the InGaAs/ NDR InAlAs FET so far [13]. This is attributable to the suppression of scattering with the reduction of gate length. The source carriers in the short channel move quasi-ballistically through the channel, without loss of energy by scattering. The sharp drop of I above < in Fig. 3 is DS NDR distinct at large gate bias. While, it is less evident with smaller gate bias. We believe that these sharp descendent characteristics of I are attributed to DS
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the real space transfer by "eld-assisted tunneling (RSTT). If the subband state of the InGaAs QWR channel aligns with the quantized level of the Vshaped potential well generated by the d-doped layer inserted between the barrier and spacing InAlAs layers, the hot electrons in the InGaAs QWR channel resonantly tunnel into the V-shaped well of the d-doped layer. This phenomenon can occur at the large positive gate voltage in the studied device. The I current above < in QWR-FET has DS NDR no gate voltage dependence, contrary to that of QW-FET. It suggests that QWR has a low-mobility region in which it is insensitive to the gate potential. The existence of (3 1 1) side wall and its compositional variation on the corrugated substrate should be the only di!erence in QWR and QW, because the channel width of 200 nm does not a!ect the electron density of state. Further study on the behavior of hot electrons in a short acceleration range by Monte-Carlo simulation, identi"cation of subband level, and spatially resolved characterization of the compositional variation of ridge-type QWR should be undertaken. 5. Summary We had demonstrated the real space transfer (RST) of hot electrons in 50-nm gate ridge-type InGaAs/AlGaAs QWR-FET and QW-FET. The pronounced N-shaped NDR characteristic with high peak-to-valley ratio (PVR"&7.7) and low onset voltage (< "&0.25 V) was clearly obNDR served due to the real space transfer by "eld-assisted tunneling (RSTT). The NDR characteristic of QWR-FET was enhanced compared with that of QW-FET. Its structure is simple and performance is equivalent with more complicated combination of a resonant tunneling diode and hetero-bipolar transistor [14]. The low onset voltage of NDR is favorable for low power consumption functional high-speed circuit.
Acknowledgements The authors would like to appreciate Drs. T. Sakamoto and M. Komuro for the useful
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discussions and encouragement of this study. They also appreciate Drs. H. Hiroshima and S. Haraichi for the valuable suggestions about the electron beam exposure technique, and Mr. K. Hikosaka for PC based instrumentation. References [1] A. Katalsky, R.A. Kiehl, S. Luryi, A.C. Gossard, R. Hendel, IEEE Electron Devices Lett. 5 (1984) 321. [2] S. Luryi, P.M. Menze, M.R. Pinto, P.A. Garbinski, A.Y. Cho, D.L. Sivco, Appl. Phys. Lett. 57 (1990) 1787. [3] S. Luryi, A. Katalsky, A.C. Gossard, R. Hendel, Appl. Phys. Lett. 45 (1984) 1294. [4] P.M. Mensz, P.A. Garbinski, A.Y. Cho, D.L. Sivco, S. Luryi, Appl. Phys. Lett. 57 (1990) 2558. [5] T.K. Higman, M.S. Hagedorn, J. Chen, K.Y. Cheng, Appl. Phys. Lett. 60 (1992) 1342.
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