Parameterized and subexponential-time complexity of satisfiability problems and applications

Theoretical Computer Science 607 (2015) 282–295

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Theoretical Computer Science www.elsevier.com/locate/tcs

Parameterized and subexponential-time complexity of satisfiability problems and applications Iyad Kanj a,∗,1 , Stefan Szeider b a b

School of Computing, DePaul University, Chicago, IL, United States Vienna University of Technology, Vienna, Austria

a r t i c l e

i n f o

Article history: Received 31 March 2015 Accepted 24 August 2015 Available online 29 August 2015 Keywords: Circuit satisfiability Parameterized complexity Subexponential-time complexity

a b s t r a c t We study the parameterized and the subexponential-time complexity of the weighted and the unweighted satisfiability problems on bounded-depth normalized Boolean circuits. We establish relations between the subexponential-time complexity of the weighted and the unweighted satisfiability problems, and use them to derive relations among the subexponential-time complexity of several NP-hard problem. We then study the role of certain natural structural parameters of the circuit in characterizing the parameterized and the subexponential-time complexity of the circuit satisfiability problems under consideration. We obtain threshold functions on some circuit structural parameters, including the depth, the number of gates, the fan-in, and the maximum number of (variable) occurrences, that lead to tight characterizations of the parameterized and the subexponential-time complexity of the circuit satisfiability problems under consideration. © 2015 Elsevier B.V. All rights reserved.

1. Introduction 1.1. Motivation The NP-hardness theory suggests that NP-hard problems cannot be solved efficiently—in polynomial time. This suggestion, however, has not discouraged researchers in theoretical computer science from seeking super-polynomial time algorithms for NP-hard problems due to the practical importance of such problems. While some NP-hard problems admit subexponential-time algorithms (e.g., problems on planar graphs [1]), many NP-hard problems have resisted for decades all attempts to improve the brute-force exponential-time algorithms for solving them. A famous example of such an NP-hard problem is CNF-Satisfiability, shortly CNF-Sat, which is the canonical problem of the complexity class NP. After a tremendous amount of research work spanning several decades, the best algorithm for solving CNF-Sat remains the brute-force algorithm that enumerates every truth assignment to the variables, resulting in a 2n m O (1) running time (n is the number of variables in the input instance, and m is the instance size). Whether CNF-Sat can be solved in time 2cn m O (1) , for some constant c < 1, remains a longstanding open question. If one restricts CNF-Sat to instances in which the width of each clause is at most k, where k > 0 is an arbitrary integer constant, one obtains the k-CNF-Sat problem, which is known to be solvable in time O (2ck n ) for some constant ck < 1 that depends on k (for example, see [20]). A significant amount of research has been devoted to designing algorithms for

* 1

Corresponding author. E-mail addresses: [email protected] (I. Kanj), [email protected] (S. Szeider). The first author was supported in part by a DePaul University Competitive Research Grant (URC).

http://dx.doi.org/10.1016/j.tcs.2015.08.029 0304-3975/© 2015 Elsevier B.V. All rights reserved.

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k-CNF-Sat that achieve smaller and smaller values of ck , in particular, for k = 3 (see [2]). For an NP-hard problem that admits a 2cn m O (1) -time algorithm (n is the search space and m is the instance size) for some c < 1, such as k-CNF-Sat, a natural question is whether we can improve the exponent in the exponential term of the upper bound on the running time indefinitely, that is, whether we can solve the problem in time 2cn m O (1) for every 0 < c < 1; if this is possible, we say that the problem can be solved in subexponential time. Impagliazzo, Paturi, and Zane [21] showed that the subexponential-time solvability of the k-CNF-Sat problem (k ≥ 3), is equivalent to the subexponential-time solvability of a large class of well-known NP-hard problems; this class is closed under subexponential-time preserving reductions, called serf-reductions. This lead to the formulation of the Exponential Time Hypothesis (ETH) [21] stating that k-CNF-Sat cannot be solved in subexponential time, and ETH has become a standard hypothesis in complexity theory. On the other hand, the subexponential-time complexity of weighted satisfiability on bounded-depth circuits is closely related to the fixed-parameter tractability of the W -hierarchy in parameterized complexity theory (see the recent survey [7]). Research on parameterized complexity discovered more subtle relations between the computational complexity of NP-hard problems and the subexponential-time complexity of satisfiability problems [3,5,6, 10–12,24,26]. For example, it was shown that, for many W -hard problems, the existence of parameterized algorithms that are asymptotically more efficient than the exhaustive search approach are dependent on the subexponential-time solvability of various satisfiability problems (see for instance [3,5,6,10–12,24,26]). Due to the aforementioned research, it is now known that the classification of parameterized intractability corresponds to the exact complexity of satisfiability problems on various circuit families. This research of the structural connection between parameterized complexity and subexponential-time complexity resulted in new tools for deriving computational lower bounds. To understand the difference between the complexity of CNF-Sat and k-CNF-Sat, Calabro, Implagliazzo, and Paturi [4] studied the relation between the complexity of k-CNF-Sat and that of CNF-Sat restricted to formulas with certain structural parameters, such as density (ratio of clauses to variables), and frequency of variables (maximum number of occurrences of variables). They proved several results, under the assumption that ETH holds, including a result showing that CNF-Sat restricted to instances of any fixed density can be solved more efficiently than CNF-Sat. Under the Strong Exponential Time Hypothesis (SETH), which states that k-CNF-Sat requires time (2n ) when k approaches infinity, Cygan et al.. [14] proved equivalences among the subexponential-time complexity of several natural problems. Assuming the SETH, they showed that the existence of an algorithm that runs in time 2cn m O (1) , for some c < 1, for any of the problems in a set of problems  that includes CNF-Sat, Hitting Set, and Set Cover, would imply the existence of algorithms that run in time 2c n m O (1) ,  for some c < 1, for all the problems in this set. Patrascu and Williams [26] studied the relation between parameterized algorithms for the Dominating Set problem and algorithms for CNF-Sat. They showed that, for any k ≥ 3, a parameterized algorithm for Dominating Set that runs in time O (nk− ), for any  > 0, would lead to an algorithm for CNF-Sat that runs in time 2cn m O (1) for some c < 1. 1.2. Results In this paper, we study the parameterized and the subexponential-time complexity of the weighted and the unweighted satisfiability problems on normalized Boolean circuits of bounded depth. We focus on satisfiability problems because they are the canonical problems for the complexity class NP, and for the different levels of the W -hierarchy in parameterized complexity. By deriving relations among satisfiability problems with respect to their subexponential-time complexity, we are able to infer similar results for other natural NP-hard and W -hard problems. We start by establishing relations between the subexponential-time complexity of the weighted and the unweighted satisfiability problems, and use them to derive relations among the subexponential-time complexity of several NP-hard problem. Among others, we show the following results: (i) The weighted satisfiability, the unweighted satisfiability, the monotone (resp. antimonotone) weighted satisfiability, on circuits of depth t ≥ 2 are all equivalent modulo subexponential time solvability; that is, if any of the aforementioned problems admits a subexponential-time algorithm, then they all do. This result implies, via standard reductions, that several NP-hard problems, including Hitting Set, Red-Blue Dominating Set, and Independent Set on Hypergraphs are solvable in subexponential time if and only if CNF-Sat is. (ii) The circuit satisfiability problem for circuits of linear size, even if the depth is unbounded and the circuit is not normalized, is solvable in subexponential time if and only if ETH fails. We use this result to show that, for each level of the W -hierarchy in parameterized complexity, there exists a (circuit satisfiability) problem that is complete for this level and that is solvable in subexponential time if and only if ETH fails. We then turn our attention to studying the parameterized and the subexponential-time complexity of normalized circuit satisfiability problems with respect to structural parameters of the underlying circuit. We obtain threshold functions on structural circuit parameters including depth, circuit size (number of gates), fan-in, and the maximum number of occurrences of variables, that give tight characterizations of the parameterized and the subexponential-time complexity of the circuit satisfiability problems under consideration. Among others, we show the following results: (iii) With respect to the size of the circuit, we show that both the weighted and the unweighted satiability problems on circuits of depth t ≥ 2 and o(n) gates are solvable in subexponential time, and, unless ETH fails, are not solvable in

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Fig. 1. A circuit in the normalized form of depth 3.

subexponential time on circuits of depth t ≥ 2 and (n) gates, where n is the number of variables in the circuit. We also show that the weighted satisfiability problem is FPT on circuits of depth t ≥ 2 and O (log n) gates, and unless ETH fails, is not FPT on circuits of depth t ≥ 2 and ω(log n) gates. (iv) In terms of the maximum number of occurrences of variables in the circuit, it is easy to see that if the circuit depth is t ≥ 2 and the maximum number of occurrences is  ≥ 3, then, unless ETH fails, neither the weighted nor the unweighted satisfiability problem on such circuits is solvable in subexponential time. It is also easy to see (and is well known) that for depth t = 2 and a maximum number of occurrences  = 2 we can solve the unweighted circuit satisfiability problem in polynomial time. We show that the minimization version of the weighted satisfiability problem for depth t = 2 circuits and maximum number of occurrences  = 2 is also solvable in polynomial time, extending the results in [27]. On the other hand, we show that both the weighted and the unweighted satisfiability problems for circuits of depth t ≥ 3 and a maximum number of occurrences  = 2 are NP-complete. We also show that the weighted satisfiability problem on circuits of depth t ≥ 2 and maximum number of occurrences  ≥ 3 is W [1]-hard. 2. Preliminaries The complexity functions used in this paper are assumed to be proper complexity functions that are computable, unbounded, and nondecreasing. For a proper complexity function f : N → N, define its inverse function f −1 by f −1 (h) = max{q | f (q) ≤ h}. Since the function f is nondecreasing and unbounded, the function f −1 is also nondecreasing and unbounded, and satisfies f ( f −1 (h)) ≤ h. A circuit is a directed acyclic graph. The vertices of indegree 0 are called the input variables, and are labeled either by positive literals xi or by negative literals xi . The vertices of indegree larger than 0 are called the gates and are labeled with Boolean operators and or or. A special gate of outdegree 0 is designated as the output gate. We do not allow not gates in the circuit since, by De Morgan’s laws, a general circuit can be efficiently converted into the above circuit model. A circuit is said to be monotone (resp. antimonotone) if all its input literals are positive (resp. negative). The depth of a circuit is the maximum distance from an input variable to the output gate of the circuit. The size of a circuit C , denoted |C |, is the size of the underlying graph (i.e., number of vertices and edges). An occurrence of a variable in C is an edge from the variable or its negation to a gate in C . The fan-in of a gate is the indegree of the gate. The fan-in of a circuit is the maximum fan-in over all gates in the circuit. We consider circuits whose output gate is an and-gate and that are in the normalized form (see [15,18]). In the normalized form every gate has outdegree at most 1, and starting from the output and-gate, the gates are structured into alternating levels of ors-of-ands-of-ors. . . . Note that this alternation can be achieved by merging gates of the same type whenever one is incoming to the other. Note also that there is no restriction on the outdegree of a literal, and literals may be incoming to gates at any level in the circuit. We denote a circuit that is in the normalized form and that is of depth at most t ≥ 2 by a t circuit. See Fig. 1 for an illustration of a 3 circuit. We write t+ to denote a monotone t circuit, and t− to denote an antimonotone t circuit. The bottom fan-in of the circuit is the maximum fan-in over all gates whose inputs are only literals. t circuits naturally represent the satisfiability of t-normalized propositional formulas; that is, formulas that are products-of-sums-of-products. . . , including the canonical problem CNF-Sat. A circuit C is satisfiable if there is a truth assignment to the input variables of C that makes C evaluate to 1. The weight of an assignment τ is the number of variables assigned the value 1 by τ . A parameterized problem Q is a subset of ∗ ×N, where  is a fixed alphabet and N is the set of all non-negative integers. Each instance of the parameterized problem Q is a pair (x, k), where the second component, i.e., the non-negative integer k, is called the parameter. We say that the parameterized problem Q is fixed-parameter tractable [15], shortly FPT, if there is an algorithm that decides whether an input (x, k) is a member of Q in time f (k)|x| O (1) , where f is a computable function

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of k; we use fpt-time to denote time complexity of the form f (k)|x| O (1) , where |x| is the instance size, k is the parameter, and f is a computable function of k. Let FPT denote the class of all fixed-parameter tractable parameterized problems. (We abused the notation “FPT” above for simplicity.) A parameterized problem Q is fpt-reducible to a parameterized problem Q  if there is an algorithm that maps each instance (x, k) of Q to an instance (x , g (k)) of Q  in fpt-time, where g is a proper   complexity function of k, such that (x, k) ∈ Q if and only if (x , g (k)) ∈ Q . Based on the notion of fpt-reducibility, a hierarchy of fixed-parameter intractability, the W -hierarchy t ≥0 W [t ], where W [t ] ⊆ W [t + 1] for all t ≥ 0, is defined. The 0-th level W [0] of the W -hierarchy is the class FPT. The notions of hardness and completeness are defined for each level W [i ] of the W -hierarchy for i ≥ 1 [15]. It is commonly believed that W [1] = FPT (see [15]), and W [1]-hardness is a hypothesis for fixed-parameter intractability. For t ≥ 2, the weighted t -circuit satisfiability problem, abbreviated WSAT[t], is: Given a t -circuit C and a parameter k, decide if C has a satisfying assignment of weight k. The weighted monotone t -circuit satisfiability problem, abbreviated WSAT+ [t ], and the weighted antimonotone t -circuit satisfiability problem, abbreviated WSAT− [t ] are the WSAT[t] problems on monotone circuits and antimonotone circuits, respectively. It is known that for each even integer t ≥ 2, WSAT+ [t ] is W [t ]-complete, and for each odd integer t ≥ 2, WSAT− [t ] is W [t ]-complete; moreover, WSAT− [2] is W [1]-complete [15,18]. SAT[t] (t ≥ 2) is the satisfiability problem on t circuits. Note that SAT[2] is CNF-Sat, and SAT[2] with bottom fan-in 3 is 3-CNF-Sat. It is clear that the WSAT[t] and SAT[t] problems (t ≥ 2) are solvable in time 2n |C | O (1) , respectively, where C is the input circuit and n is the number of variables in C . We say that the WSAT[t] (resp. SAT[t]) problem is solvable in subexponential time if there exists an algorithm that solves the problem in time 2o(n) |C | O (1) . Using the results of [6,18] (see also [9]), the above definition is equivalent to the following: WSAT[t] (resp. SAT[t]) is solvable in subexponential time if there exists an algorithm that takes as input an instance (C , k) of WSAT[t] (resp. C of SAT[t]) and  ∈ N, and there exists a computable function h, such that the algorithm solves the problem in time h()2n/ |C | O (1) . We will use both equivalent notions of subexponential-time solvability interchangeably depending on which one will be more convenient for deriving the results in question. Let Q and Q  be two problems, and let μ and μ be two parameter functions defined on instances of Q and Q  , respectively. In the case of WSAT[t] or SAT[t], the μ and μ under consideration will be the number of variables in the instances of these problems. A subexponential-time reduction family [21] (see also [18]), shortly a serf-reduction, is an algorithm A that takes as input a pair ( I , ) of Q and produces an instance I  = A ( I , ) of Q  such that: (1) A runs in time f ()2μ( I )/ | I | O (1) for some proper complexity function f ; and (2) μ ( I  ) ≤ g ()(μ( I ) + log | I |). Intuitively, a serf-reduction from Q to Q  reduces an instance of Q in subexponential time to an instance of Q  such that the parameter of the produced instance of Q  is linear in the parameter of the instance of Q . A subexponential-time Turing reduction family [21] (also see [18]), shortly a Turing-serf-reduction is an algorithm A equipped with an oracle to Q  such that there are computable functions f , g : N −→ N with: (1) given a pair ( I , ) of Q , where  ∈ N, A decides I in time f ()2μ( I )/ | I | O (1) ; and (2) for all oracle queries of the form “I  ∈ Q  ” posed by A on input ( I , ), we have μ ( I  ) ≤ g ()(μ( I ) + log | I |). Hence, if Q is Turing-serf-reducible to Q  , and if Q  is solvable in subexponential time then Q is solvable in subexponential time. The optimization class SNP introduced by Papadimitriou and Yannakakis [25] consists of all search problems expressible by second-order existential formulas whose first-order part is universal. Impagliazzo, Paturi, and Zane [21] introduced the notion of completeness for the class SNP under serf-reductions, and identified a class of problems which are complete for SNP under serf-reductions/Turing-serf reductions, such that the subexponential-time solvability for any of these problems implies the subexponential-time solvability of all problems in SNP. Many well-known NP-hard problems are proved to be complete for SNP under the serf-reduction, including 3-CNF-Sat, Vertex Cover, and Independent Set, for which extensive efforts have been made in the last three decades to develop subexponential-time algorithms with no success. This fact has led to the Exponential Time Hypothesis (ETH), which is equivalent to the statement that not all SNP problems are solvable in subexponential time: Exponential-Time Hypothesis (ETH): The problem k-CNF-Sat, for any k ≥ 3, cannot be solved in time O (2o(n) ), where n is the number of variables in the input formula. Therefore, there exists a constant c > 0 such that k-CNF-Sat cannot be solved in time O (2cn ). ETH is a standard hypothesis in complexity theory. The following result is implied, using the standard technique of renaming variables, from [21, Corollary 1] and from the proof of the Sparsification Lemma [21], [17, Lemma 16.17]: Lemma 2.1. k-CNF-Sat (k ≥ 3) is solvable in 2o(n) time if and only if k-CNF-Sat with a linear number of clauses and in which the number of occurrences of each variable is at most 3 is solvable in time 2o(n) , where n is the number of variables in the formula (note that the size of an instance of k-CNF-Sat is polynomial in n). In particular, choosing k = 3 we get: 3-CNF-Sat in which every variable occurs at most 3 times, denoted 3-3-Sat, is solvable in O (2o(n) ) time if and only if ETH fails. Remark 2.2. In this paper, when we consider SAT[t] (resp. WSAT[t]) restricted to instances in which a certain parameter is ( g (n)) (resp. ω( g (n)), O ( g (n)), o( g (n))), for some proper complexity function g (n) of the number of variables n in the instance, we mean SAT[t] (resp. WSAT[t]) restricted to all the instances in which the parameter is upper bounded by a

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prespecified function that is ( g (n)) (resp. ω( g (n)), O ( g (n)), o( g (n))). For example, when we say “SAT[t] on circuits with o(n) gates is solvable in subexponential time” we mean the following: For any given proper complexity function g (n) = o(n), the problem consisting of the restriction of SAT[t] to instances in which the number of gates in the circuit is at most g (n) is solvable in subexponential time. 3. An essential lemma We dedicate this section to the following lemma, which will be useful for proving several results in the paper pertaining to instances of SAT[t] or WSAT[t] in which the number of gates in the circuit is smaller than the number of variables. We note that this lemma is true for circuits of unbounded depth as well. Lemma 3.1. For any t ≥ 2, an instance of WSAT[t] on a circuit C of n variables and s gates can be decided in time 2 O (s)n O (1) . Proof. Let (C , k) be an instance of WSAT[t] such that C has n variables and s gates. We assume that no literal in C is incoming to the output and-gate of C ; otherwise, such literal must be assigned 1 in any satisfying assignment, and we can assign it 1 and update C and k accordingly. We start by enumerating all possible truth values to the gates in C in a potential satisfying truth assignment to C of weight k; there are 2s such enumerations. Fix an enumeration to the gates in which the output gate is assigned the value 1 (we reject the other enumerations). We check the consistency of the (fixed) enumeration and reject the enumeration if it is not consistent. Checking the consistency of the enumeration can be done as follows: for each and-gate whose inputs are all gates (i.e., non-literals), we verify that all its inputs are assigned 1 by the enumeration, and for each or-gate whose inputs are all gates, we verify that at least one of its inputs is assigned 1. After checking consistency, we remove from the circuit every gate (either and-gate or or-gate) that is assigned 0 (and update the circuit); we do not care if such a gate ends up evaluating to 1—different from its value in the enumeration—in the resulting assignment because C would still be satisfied. All remaining gates at this point are assigned value 1 by the enumeration. Next, for each and-gate that has some incoming edges from literals, we assign all its incoming literals 1 and update k accordingly; if such an assignment to the literals is inconsistent (assigns some literal and its negation the same value), we reject the enumeration. After this step, which may have assigned values to some literals, we check if all inputs to some or-gate were assigned 0, and reject the enumeration in such case. Now we remove every and-gate from the circuit (because all its inputs have been assigned 1, and hence, the gate is satisfied by the enumeration), and every or-gates that has an input assigned 1. Let k be the resulting value of the parameter k at this point. What remains of the circuit (after updating it) are or-gates whose inputs are all literals that have not been assigned any values. Therefore, the resulting circuit can be modeled as a Boolean CNF-Sat formula F whose clauses correspond to the disjunction of the literals that are incoming to the remaining or-gates of C . Consequently, it is sufficient to decide if F , which consists of at most s clauses, has a weight-k satisfying assignment. We now apply the following branching algorithm to F . Choose a variable x that appears both positively and negatively in F . If all variables appear only positively or only negatively in F , then the problem can be easily reduced to a Hitting Set problem on a hypergraph of at most n vertices and s (hyper)edges (each clause corresponds to an edge), which can be solved in time 2s n O (1) using dynamic programming (see Theorem 1 in [16]). Therefore, we can assume that there exists a variable x that appears both positively and negatively in F . Now we can apply a folklore branching algorithm that branches on x by considering the two possible truth assignments of 0 and 1 to x; in the branch where x is assigned 1 the value of k is reduced by 1. We also update F appropriately following each branch. Since x appears both positively and negatively in F , each branch satisfies, and hence eliminates, at least one clause in F . If at a leaf-node in the binary search tree corresponding to this branching algorithm k = 0 and all the clauses in F are satisfied, we accept the instance; if no such leaf-node exists in the search tree we reject the instance. Since the number of clauses in F is at most s, the depth of the binary search tree corresponding to the branching algorithm is at most s, and hence the running time of this algorithm is 2 O (s) n O (1) . Since there are at most 2s enumerations to consider, the operations to the circuits can be implemented in polynomial time, and since the branching algorithm runs in time 2 O (s) n O (1) , it follows that the instance (C , k) can be decided in time 2 O (s) n O (1) . 2 4. Subexponential-time equivalences In this section we establish relations between the subexponential-time complexity of weighted and unweighted satisfiability problems. Since satisfiability problems are canonical NP-hard problems, these relations can be employed to derive similar relations among the subexponential-time complexity of other NP-hard problems, as we illustrate later in this section. We start with the following lemma: Proposition 4.1. For any t ≥ 2, WSAT[t] ∈ 2o(n) m O (1) if and only if SAT[t] ∈ 2o(n) m O (1) , where n is the number of variables in the instance and m is the instance size for both problems. Proof. Clearly, if WSAT[t] ∈ 2o(n) m O (1) then SAT[t] ∈ 2o(n) m O (1) because we can decide an instance of SAT[t] by invoking an algorithm for WSAT[t], for every possible weight between 0 and n of a satisfying truth assignment for SAT[t]; this gives a

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Turing-serf-reduction from SAT[t] to WSAT[t]. Conversely, SAT[t] ∈ 2o(n) m O (1) implies that WSAT[t] ∈ 2o(n) m O (1) because we can encode the weight (i.e., the parameter k) of a desired satisfying assignment to WSAT[t] using a linear number of 3-CNF clauses/gates (e.g., see [18]), which provides a serf-reduction from WSAT[t] to SAT[t]. 2 We can actually strengthen the above proposition to the following: Theorem 4.2. For any t ≥ 2, WSAT+ [t ] ∈ 2o(n) m O (1) if and only if SAT[t] ∈ 2o(n) m O (1) , where n is the number of variables and m is the instance size for both problems. Proof. Let t ≥ 2 be an integer. By Proposition 4.1, SAT[t] ∈ 2o(n) m O (1) implies that WSAT+ [t ] ∈ 2o(n) m O (1) because WSAT+ [t ] is a special case of WSAT[t ]. To prove the converse, suppose that WSAT+ [t ] is solvable in 2o(n) m O (1) time. Given an instance C of SAT[t], for each variable xi in C , we introduce a new variable xi , and we replace each occurrence of xi with the new (positive) literal xi . For each variable xi , we also add an and-gate whose inputs are xi and xi that feeds into the output and-gate of C . Let C  be the resulting circuit, and let k = n. Suppose that C is satisfiable, and let τ be a satisfying assignment to C . Consider the assignment τ  to C  that retains the value assigned by τ to each variable xi in C , and assigns variable xi the negation of the value assigned by τ to xi . It is easy to see that τ  is a satisfying assignment to C  of weight n. Suppose now that C  has a satisfying assignment of weight n. Since each of the n new and-gates is satisfied and has as inputs xi and xi , for each i = 1, . . . , n, exactly one of xi and xi is assigned the value 1. If we let τ be the assignment to C that assigns 1 to xi if and only if τ  does, then it is easy to see that τ is a valid (consistent) assignment that satisfies C . Since C  has 2n variables and can be constructed from C in polynomial time, the reduction that takes the instance C and produces the instance (C  , k) is a serf-reduction from SAT[t] to WSAT+ [t ]. This completes the proof. 2 Corollary 4.3. WSAT− [t ] ∈ 2o(n) m O (1) if and only if SAT[t] ∈ 2o(n) m O (1) , where n is the number of variables and m is the instance size for both problems. Proof. For an instance (C , k) of WSAT+ [t ] we associate an instance (C  , n − k) of WSAT− [t ], where C  is the circuit obtained from C by negating all input literals. It is easy to see that this association provides a polynomial-time (serf) reduction from WSAT+ [t ] to WSAT− [t ]. The same reduction serves as a serf-reduction from WSAT− [t ] to WSAT+ [t ] as well. The result now follows from Theorem 4.2. 2 Remark 4.4. Theorem 4.2 and Corollary 4.3 show that WSAT+ [t ] and WSAT− [t ] are equivalent with respect to their subexponential-time solvability, even though they differ with respect to their parameterized complexity (WSAT+ [t ] is W [t ]-complete for even t while WSAT− [t ] is W [t − 1]-complete, and WSAT− [t ] is W [t ]-complete for odd t while WSAT+ [t ] is W [t − 1]-complete)—assuming that the W -hierarchy does not collapse. This is not surprising as we will show in Corollary 4.8 at the end of this section. We now show some applications of the above results. The Red-Blue Dominating Set problem is: Given a bipartite graph whose first partition is colored red and whose second partition is colored blue, and a parameter k, decide if there is a set S of at most k red vertices such that each blue vertex is adjacent to at least one vertex in S. Corollary 4.5. Hitting Set and Red-Blue Dominating Set are solvable in time 2o(n)m O (1) if and only if CNF-Sat is solvable in time 2o(n) m O (1) , where m is the size of the instance in each of the three problems, and n is the number of vertices in Hitting Set, the number of red vertices in Red-Blue Dominating Set, and the number of variables in CNF-Sat. Proof. The results follow by simple and standard reductions, that are also serf-reductions, from the Red-Blue Dominating Set and Hitting set problems to WSAT+ [2], and vice versa, combined with Theorem 4.2. We briefly sketch these reductions, and refer the reader to [15] for more details. The reduction from Red-Blue dominating set to WSAT+ [2] corresponds to every red vertex in the bipartite graph a variable and to every blue vertex an or-gate that feeds into the output and-gate of the circuit; an edge is drawn from a variable to a gate if and only if an edge exists between the corresponding vertices in the graph. The reduction from Hitting Set to WSAT+ [2] corresponds to every vertex in the hypergraph a variable and to every hyperedge an or-gate that feeds into the output and-gate of the circuit; an edge is drawn from a variable to a gate if and only if the vertex corresponding to the variable is contained in the hyperedge corresponding to the gate. The parameter k remains unchanged in all the aforementioned reductions. It is easy to verify that the aforementioned reductions are serf-reductions. The reductions from WSAT+ [2] to Red-Blue Dominating Set and Hitting set also follow by standard reductions that are serf-reductions combined with Theorem 4.2; these reductions are basically the “inverse” reductions of the ones described above. We briefly describe these reductions next. The reduction from WSAT+ [2] to Red-Blue Dominating Set corresponds with every variable a red vertex, and with every or-gate that feeds into the output and-gate of the circuit a blue vertex; an edge exists between a red vertex and a blue vertex if and only if the variable corresponding to the red vertex is incoming to the gate corresponding to the blue vertex.

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The reduction from WSAT+ [2] to Hitting Set corresponds to every variable a vertex in the hypergraph and to every or-gate that feeds into the output and-gate of the circuit a hyperedge containing all the vertices corresponding to the variables incoming to the gate in the circuit. The parameter k remains unchanged in all the aforementioned reductions. It is easy to verify that the aforementioned reductions are serf-reductions. 2 We note that some of the results in the above corollary can be implied from the stronger results proved in [14], albeit using more involved reductions. The Red-Blue Nonblocker problem is: Given a bipartite graph with one partition colored red and the other blue, decide if there exists a set S of k red vertices such that every blue vertex has a red neighbor not in S. The Independent Set on Hypergraphs problem is the generalization of the Independent Set problem to hypergraphs: Given a hypergraph H and a parameter k, decide if there exists a set S of k vertices in H such that no hyperedge of H is contained in S. Corollary 4.6. Red-Blue Nonblocker and Independent Set on Hypergraphs are solvable in time 2o(n)m O (1) if and only if CNF-Sat is solvable in time 2o(n)m O (1) , where m is the size of the instance in each of the three problems, and n is the number of vertices in Independent Set on Hypergraphs, the number of red vertices in Red-Blue Nonblocker, and the number of variables in CNF-Sat. Proof. The results follows from Corollary 4.3 via standard reductions from Red-Blue Nonblocker and Independent Set on Hypergraphs to WSAT− [2], and vice versa, that preserve the value of n (see [15]). The reduction from Red-Blue Nonblocker to WSAT− [2] corresponds to every red vertex in the bipartite graph a variable and to every blue vertex an or-gate that feeds into the output and-gate of the circuit; an edge is drawn between a variable and a gate if and only if an edge exists between the corresponding vertices in the graph. The reduction from Independent Set on Hypergraphs to WSAT− [2] corresponds to every vertex in the hypergraph a variable and to every hyperedge an or-gate that feeds into the output and-gate of the circuit; an edge is drawn between a variable and a gate if and only if the vertex corresponding to the variable is contained in the hyperedge corresponding to the gate. The parameter k remains unchanged in all the aforementioned reductions. It is easy to verify that the aforementioned reductions are serf-reductions. The reduction from WSAT− [2] to Red-Blue Nonblocker corresponds with every variable a red vertex, and with every or-gate that feeds into the output and-gate of the circuit a blue vertex; an edge exists between a red vertex and a blue vertex if and only if the variable corresponding to the red vertex is incoming to the gate corresponding to the blue vertex. The reduction from WSAT− [2] to Independent Set on Hypergraphs corresponds to every variable a vertex in the hypergraph and to every or-gate that feeds into the output and-gate of the circuit a hyperedge containing all the vertices corresponding to the variables incoming to the gate in the circuit. The parameter k remains unchanged in all the aforementioned reductions. It is easy to verify that the aforementioned reductions are serf-reductions. 2 By Linear Circuit SAT we denote the satisfiability of Boolean circuits whose output gate is an and-gate (we do not assume that the outdegree of each gate is at most 1). Impagliazzo et al. [proof of Theorem 5 in [21]] mentioned that, using the folklore reduction from Circuit Sat to 3-cnf-Sat, any linear-size circuit can be converted into a 3-cnf-Sat circuit by introducing a linear number of new variables. The preceding statement, however, is not generally true. In particular, if the degree (resp. outdegree) of the variables (resp. gates) in the circuit is unbounded, this reduction may introduce a superlinear number of new variables. We show next that indeed there exists a Turing serf-reduction from Linear Circuit SAT to 3-cnf-Sat. Proposition 4.7. Linear Circuit SAT is solvable in subexponential time if and only if ETH fails. Proof. One direction is obvious and follows from Lemma 2.1: If Linear Circuit SAT is solvable in subexponential time then ETH fails. To prove the other direction, by the above discussion, it suffices to show that if 3-cnf-Sat is solvable in subexponential time then so is Linear Circuit SAT. We provide a Turing serf-reduction from Linear Circuit SAT to 3-cnf-Sat. Let O be an oracle for 3-cnf-Sat. We give an algorithm A equipped with O for Linear Circuit SAT. A takes as input an instance C of Linear Circuit SAT and  ∈ N. We choose a positive integer-constant d large enough so that the unique root of the polynomial xd+2 − xd+1 − 1 in the interval (1, ∞) is at most 21/2 . (The uniqueness of the root was shown in Lemma 4.1 of [8], and the fact that the root converges to 1 as d −→ ∞ can be easily verified.) The first phase of the algorithm A is a search-tree algorithm that works as follows. While there is a variable x or a gate g in C with degree (resp. outdegree for a gate) > d branch on whether or not x (resp. g) is assigned 1 in a satisfying assignment; if no such variable (resp. gate) exists in C , the first phase of the algorithm is complete. We will analyze next the branching under the assumption that x is a variable; the analysis is very similar for the case when x is a gate. In the branch where x is assigned 1, assign every or-gate (resp. and-gate) in C which x (resp. x) is incoming to the value 1, and remove x (resp. x) from every or-gate (resp. and-gate) in C which x (resp. x) is incoming to. Similarly, in the branch where x is assigned 0, assign every and-gate (resp. or-gate) in C which x (resp. x) is incoming to the value 0 (resp. 1), and remove x (resp. x) from every or-gate (resp. and-gate) in C which x (resp. x) is incoming. In each side of the branch, we update the circuit in a natural way by propagating the values of the gates that have been assigned values during this branch. In particular, if a gate g that is assigned 1 is incoming to an and-gate then we remove g, and if g is assigned 1 and is incoming to an or-gate then we assign the or-gate the value 1

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and remove g (and continue). On the other hand, if a gate g is assigned 0 and is incoming to an and-gate then we assign the and-gate 0 and remove g, and if g is assigned 0 and is incoming to an or-gate then we remove g. If a gate g has no incoming edges, then we assign it the value 0. We continue the process of propagating the values through the circuit until the process results in no changes, or the output gate is assigned a value in which we return that value as the answer to the instance. Clearly, this can be done in polynomial time. The first phase of the algorithm is complete when each remaining variable and gate in C has degree (outdegree for a gate) at most d. The above branching can be depicted by a binary search tree whose leaves correspond to all the possible outcomes from the above branching. When we branch on a variable/gate x with degree/outdegree at least d + 1, on either side of the branch we eliminate the variable/gate itself. It is easy to check that the total number of gates eliminated/assigned on both sides of the branch (regardless of how many times x appears positively and negatively, and regardless of how many or-gates and and-gates x is incoming to), is at least d + 1. Therefore, if we eliminate i ≥ 0 gates on one side of the branch, and on the other side we eliminate j ≥ 0 gates then i + j ≥ d + 1; it follows that we branch with a branch of (1 + i , 1 + j ) where i + j ≥ d + 1. It is easy to verify that the worst case happens when each branch is of the form (1, d + 2) (or (d + 2, 1)) (i.e., either i = 0 or j = 0). Since C has at most n gates and n variables, and hence a total of at most 2n gates plus variables, the number of the leaves in the search tree corresponding to (1, d + 2) branching is O (x2n 0 ), where x0 is the root of the

polynomial xd+2 − xd+1 − 1 in the interval (1, ∞). By the choice of d, the number of leaves in the search tree is O (2n/ ). Let C  be the resulting instance at a leaf of the search tree. The total number of occurrences of the variables in C  is at most dn and the total number of gates is linear. By introducing a linear number of variables c · dn, for some integer constant c, we can transform C  into an equivalent instance C  of 3-cnf-Sat using a standard gate-renaming reduction (for example, see Theorem 34.10 in [13] for the reduction from the Circuit Satisfiability problem to 3-cnf-Sat). We do this reduction to every circuit resulting from C at a leaf of the search tree. The algorithm A then queries the oracle O to decide if each C  is satisfiable. A accepts C if and only if O accepts at least one of the instances C  . The algorithm A runs in time 2n/ n O (1) . Moreover, A queries O on instances with at most c · dn variables, where c depends on d and d is a function of . Therefore, A queries O on instances of at most g ()n variables, where g is a function of  only. It follows that A is a Turing serf-reduction from Linear Circuit Sat to 3-cnf-Sat, and the proof is complete. 2 Corollary 4.8. For every t ≥ 2, there exists a W [t ]-complete problem that is solvable in subexponential time if and only if ETH fails. Proof. Consider Linear Circuit Sat. By Proposition 4.7, Linear Circuit Sat is solvable in subexponential time if and only if ETH fails. To prove the statement of the corollary, consider the W [t ]-complete problem WSAT[t] restricted to instances whose number of gates is linear with respect to the number of variables in the circuit, denoted Linear WSAT[t]. This problem is clearly in W [t ], and its W [t ]-hardness follows by an easy fpt-reduction using a padding argument from the WSAT+ [t ] problem when t is even, and from the WSAT− [t ] problem when t is odd. (For example, such a reduction from the WSAT+ [t ] problem when t is even can take an instance (C , k) of WSAT+ [t ] with n variables and m gates, adds O (m) many new variables to C that feed into a new or-gate, which, in turn, feeds into the output and-gate of C , to create a new circuit C  ; the reduction will then produce the instance (C  , k + 1) of Linear WSAT[t]. We assumed in the aforementioned reduction that m = (n); if this is not the case we can add “dummy” gates to the circuit, or split the new or-gate in the aforementioned reduction into linearly many or-gates.) A similar argument to that made in the proof of Proposition 4.1 shows that if Linear Circuit Sat is solvable in subexponential time then so is Linear WSAT[t] (by a reduction that encodes the weight). On the other hand, consider the Turing serf-reduction from 3-3-Sat to Linear WSAT[2] that iterates through all possible weights of a satisfying assignment to the instance of 3-3-Sat, and for each weight reduces the instance to an instance of Linear WSAT[2]. This reduction proves that if Linear WSAT[t], for any t ≥ 2, is solvable in subexponential time then so is 3-3-Sat, which, in turn, implies that ETH fails. 2 5. Number of gates In this section we study the subexponential-time complexity of SAT[t] and WSAT[t], and the parameterized complexity of WSAT[t], with respect to the number of gates in the circuit. Proposition 5.1. For any integer t ≥ 2, SAT[t] is solvable in 2o(n) time on circuits of o(n) gates, and unless ETH fails, SAT[t] is not solvable in 2o(n) m O (1) time on circuits of (n) gates, where n is the number of variables in the circuit and m is the instance size. The same result holds for WSAT[t]. Proof. The hardness results follow by the simple (Turing) serf-reductions from 3-3-Sat to SAT[2] and WSAT[2] (for the Turing-serf-reduction to WSAT[2], we try all possible weights) that result in instances of SAT[2] and WSAT[2] whose number of gates is linear in n. Lemma 3.1 implies that WSAT[t] is solvable in 2o(n) time on circuits of o(n) gates. The same lemma also implies that SAT[t] is solvable in 2o(n) time on circuits of o(n) gates because we can iterate over all possible weights, and for each weight we invoke the algorithm for WSAT[t], thus adding only a linear factor to running time (which gets absorbed in the term 2o(n) ) of an algorithm that decides WSAT[t] in 2o(n) time on circuits of o(n) gates. 2

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Proposition 5.2. For any integer t ≥ 2, WSAT[t] is FPT on circuits of O (log n) gates, and unless ETH fails, WSAT[t] is not FPT on circuits of ω(log n) gates, where n is the number of variables in the circuit. Proof. Lemma 3.1 implies that WSAT[t] is FPT on circuits of O (log n) gates. To prove the hardness result, let g (n) = ω(log n) be a proper complexity function. Then g (n) ≥ log n · λ(n), for some proper complexity function λ(n). We provide a reduction from 3-3-Sat to WSAT[2] on circuits of at most g (n) gates; this reduction will imply that ETH fails, assuming that WSAT[2] on circuits of at most g (n) gates is FPT. (Note that the hardness result for WSAT[2] implies the hardness result for WSAT[t] for t > 2.) Suppose that WSAT[2] is FPT on circuits of at most g (n) gates, and let A be an algorithm that decides it in time f (k) M O (1) , where f is a proper complexity function and M is the instance size. Let f −1 be the inverse function of f . Let C be an instance of 3-3-Sat on n variables and m = O (n) clauses (viewed as a circuit). We divide the n variables in C into f −1 (m) many blocks, and proceed as in the reduction described in the proof of Theorem 4.2. Let C  be the resulting −1 circuit. C  has N = 2n/ f (m) · f −1 (m) variables and O (n) + f −1 (m) gates (the f −1 (m) gates are for the enforcement circuit). Observing that if WSAT[2] is solvable in time f (k) M O (1) then it is also solvable in time h(k) M O (1) for any computable function h > f , we can choose f large enough so that f −1 (m) = o(λ(n)) (note that m = O (n)). With this choice of f , it is not difficult to verify that O (n) + f −1 (m) ≤ log N · λ( N ) ≤ g ( N ), and hence the number of gates of C  is at most g ( N ). We now use that algorithm A to decide the instance (C  , k = f −1 (m)), and hence C , in time f ( f −1 (m))( N + m) O (1) = 2o(n) . This shows that if WSAT[2] is FPT on circuits of at most g (n) gates then 3-3-Sat is solvable in 2o(n) time, a consequence that implies that ETH fails. 2 6. Circuit fan-in In this section we study the subexponential-time complexity of SAT[t] and WSAT[t], and the parameterized complexity of WSAT[t], with respect to the fan-in of the circuit. First observe that if μ(n) is the fan-in of a circuit on n variables and of depth t then μ(n) must satisfy μ(n) ≥ n1/t (otherwise, some variables will be disconnected). Proposition 6.1. For any t ≥ 2 and c > 1, the WSAT[t] problem on circuits of fan-in variables in the circuit) is W [t ]-hard if t is even and W [t − 1]-hard if t is odd.

μ(n), where μ(n) ≥ cn1/t (n is the number of

Proof. The proof is via an fpt-reduction from WSAT+ [t ], which is W [t ]-hard if t is even and W [t − 1]-hard if t is odd. Let (C , k) be an instance of WSAT+ [t ], where C has n variables and n g gates, and note that the fan-in of each gate in C is at most n + n g . We construct an instance (C  , k) of WSAT[t]. To make the fan-in in C  satisfy the upper bound stipulated by the function μ(), we construct C  as follows. We start with C and introduce (n + n g )2t new negative literals. We connect the negative literals using a layered circuit with (t − 1) layers (excluding the new variables layer) consisting of new gates of alternating types (and-of-or-of-and-. . . , or or-of-and-of-or-. . . , depending on the parity of t), such that each gate has fan-in (n + n g )2 ; this can be achieved by a top-down construction of the layered circuit (we assume that the output gate of the circuit is at the bottom), in which each gate in a layer receives its inputs from (n + n g )2 (distinct) gates (arbitrarily chosen) in the previous layer (the top layer receives its input form the negative literals). The last layer of the layered circuit consists of (n + n g )2 gates that are incoming to the output gate of C . Clearly, the construction of (C  , k) can be done in polynomial time. If C has a weight-k satisfying assignment, then C  also has weight-k satisfying assignment obtained by assigning the k positive variables in C that satisfy C the value 1 and all the remaining variables in C  the value 0. Conversely, if C  has a weight-k satisfying assignment, then by the construction of C  there must exist at most k positive variables (and also exactly k positive variables because C is monotone) that satisfy C . This proves the correctness of the fpt-reduction. Since each gate in C has fan-in at most n + n g , the output gate of C  has fan-in at most (n + n g )2 + (n + n g ), and each gate in the layered circuit has fan-in at most (n + n g )2 , C  has fan-in at most (n + n g )2 + (n + n g ). For large enough n (larger than a fixed constant that depends on t), we have (n + n g )2 + (n + n g ) ≤ c (n + n g )2 = c ((n + n g )2t )1/t ≤ cN1/t , where N = (n + n g )2t + n is the total number of variables in C  . This gives an fpt-reduction from WSAT+ [t ] to WSAT[t] on circuits of fan-in at most μ(n), where n is the number of variables in the circuit, thus completing the proof. 2 Now we turn our attention to the subexponential-time complexity of SAT[t] and WSAT[t] with respect to the fan-in of the circuit. Proposition 6.2. For any integer t ≥ 2, SAT[t] on circuits of fan-in the circuit, is solvable in 2o(n) time. The same is true for WSAT[t]. 1

1

μ(n), where μ(n) = o(n t −1 ) and n is the number of variables in

μ(n) = o(n t −1 ) then the number of gates in the circuit is o(n). By Proposition 5.1, it follows in this case that SAT[t] 1 and WSAT[t] on circuits of fan-in μ(n) = o(n t −1 ) are solvable time 2o(n) (note that in this case the size m of the circuit Proof. If is O (n)).

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7. Bottom fan-in In this section we study the subexponential-time complexity of SAT[t] and WSAT[t], and the parameterized complexity of WSAT[t], with respect to the bottom fan-in of the circuit. We assume that every gate has fan-in at least 2—and hence the bottom fan-in of the circuit is at least 2—because a gate with fan-in 1 can be merged or removed. The proposition below follows from Lemma 2.1: Proposition 7.1. For any t ≥ 2 and  ≥ 3, unless ETH fails, SAT[t] on circuits of bottom fan-in  is not solvable in 2o(n)m O (1) time, where n is the number of variables in the circuit and m is the instance size. Note that for t = 2, SAT[t] on circuits of bottom fan-in 2 is the 2-CNF-Sat problem, which is solvable in polynomial time. On the other hand, if t ≥ 3, then it is easy to see that SAT[t] on circuits of bottom fan-in 2 is not solvable in 2o(n) m O (1) time unless CNF-Sat is. The following proposition follows by the standard (polynomial-time) serf-reduction from Independent Set, which is SNP-complete under serf-reductions, to WSAT[2] of bottom fan-in 2 (see [15]): Proposition 7.2. For any t ≥ 2 and  ≥ 2, unless ETH fails, WSAT[t] on circuits of bottom fan-in  is not solvable in 2o(n)m O (1) time, where n is the number of variables in the circuit and m is the instance size. Observe that for t = 2, and for circuit of bottom fan-in 2, SAT[t] is solvable in polynomial time, whereas WSAT[t] is not solvable in subexponential-time (unless ETH fails). This does not contradict Proposition 4.1 since the proof of the proposition (one direction) relies on the ability to encode the weight of the desired assignment using 3-CNF-Sat clauses (i.e., gates of bottom fan-in 3). The following proposition characterizes the parameterized complexity of WSAT[t] with respect to the circuit bottom fan-in. The proof of the proposition follows by the standard (polynomial-time) fpt-reduction from Independent Set to (antimonotone) WSAT[2] of bottom fan-in 2 alluded to above ([15]). Proposition 7.3. For any integer t ≥ 2 and  ≥ 2, WSAT[t] on circuits with bottom fan-in  is W [1]-hard. 8. Number of occurrences In this section we study the subexponential-time complexity of SAT[t] and WSAT[t], and the parameterized complexity of WSAT[t], with respect to the maximum number of occurrences of variables in the circuit. The proposition below follows from Lemma 2.1: Proposition 8.1. For any t ≥ 2 and  ≥ 3, unless ETH fails, SAT[t] on circuits in which each variable occurs at most  times is not solvable in 2o(n) time, where n is the number of variables in the circuit. The same holds true for WSAT[t]. Consider the k-Flip Sat problem that was proved to be W [1]-hard on instances in which every variable occurs at most three times [28]: Given an instance F of CNF-Sat and a truth assignment τ to F , decide if the values of k variables assigned by τ can be flipped so that F is satisfied. By a simple fpt-reduction from k-Flip Sat to WSAT[t] (in the reduction, τ is the assignment that assigns every variable the value 0), we have: Proposition 8.2. For any t ≥ 2 and  ≥ 3, WSAT[t] on instances in which every variable occurs at most  times is W [1]-hard. We next consider the complexity of SAT[t] and WSAT[t] when the maximum number of occurrences  = 2. First, if t = 2, it is well known—and easy to see—that SAT[2] restricted to instances in which every variable occurs at most twice is solvable in polynomial time (in fact, the problem is complete for L [22]). For such instances, we can safely assign every variable that occurs only positively (resp. negatively) the value 1 (resp. 0); each remaining variable must appears exactly once positively and exactly once negatively, and now we can apply the resolution rule (repeatedly) to solve the instance. We have: Proposition 8.3. SAT[2] restricted to instances in which every variable occurs at most  = 2 times is solvable in polynomial time. We consider next the complexity of WSAT[2] restricted to instances in which every variable occurs at most  = 2 times. Note that this is the weighted CNF satisfiability problem restricted to Boolean formulas in which each variable appears at most twice. It was shown in [27] that finding a minimum weight assignment for the monotone case of this problem (i.e., monotone WSAT[2] restricted to instances in which every variable occurs at most  = 2 times) is solvable in polynomial time. We extend their results by showing that the version of WSAT[2] with  = 2 in which the question is to decide if

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there exists a satisfying assignment of weight at most k, denoted 2WSAT≤ is solvable in polynomial time, thus rendering the monotonicity requirement in [27] unnecessary: Theorem 8.4. 2WSAT≤ is solvable in time O (n4 ), and hence in polynomial time, where n is the number of variables in the instance of 2WSAT≤ . Proof. The proof is by a polynomial-time reduction to a graph matching problem defined as follows: Subset-Saturating Minimum Weight Matching (SSMWM) Given an undirected weighted graph G = ( V , E ) whose edges have nonnegative integer weights and a subset of vertices S ⊆ V (G ), compute a matching of minimum weight that saturates every vertex in S (i.e., in which every vertex in S is matched). We first show that the SSMWM problem is solvable in polynomial time by reducing it to the minimum weight perfect matching problem (compute a perfect matching of minimum weight in a given graph), which is well known to be solvable in time O (| V (G )|3 ) [23]. The reduction is very simple. An optimal solution to an instance G of SSMWM may leave a number of vertices, say p vertices, in V \ S unmatched. If p is known, then we can add exactly p new vertices to G, connect every vertex in V \ S to each of the p new vertices by an edge of weight 0, and then compute a minimum weight perfect matching in the resulting graph; clearly, this will result in an optimal solution to the original instance of SSMWM. However, p is not known in general, but we can overcome this problem by iterating over all possible values of p ∈ {0, . . . , | V (G ) \ S |}, and computing the minimum solution over all iterations; this will result in an O (n4 )-time algorithm for SSMWM. Next, we show how to reduce an instance ( F , k) of 2WSAT≤ to SSMWM, where F is a Boolean CNF formula in which each variable appears at most twice. We first need to apply some reduction rules to simplify the instance ( F , k). We start by fixing some terminology to simplify the presentation. First, we can assume, without loss of generality, that no variable in F appears only negatively as we can safely assign such a variable the value 0; therefore, each variable must appear positively at least once. We refer to a variable that appears positively and negatively as a mixed variable, to a variable that appears only once (and hence positively) as a single variable, and to a variable that appears twice positively as a double variable. If x is not a double variable, and if x appears positively with a double variable y in some clause of F , then we say that y dominates x, or x is dominated by y, and write x  y; similarly, if two double variables x and y appear in the same two clauses C and C  , then we say that x (resp. y) dominates y (resp. x). We apply the following simplification rule repeatedly as long as it is applicable: If x, y are two variables such that x  y then assign x the value 0, remove x from F , and update F . The above simplification rule can be justified as follows. Suppose that x  y, then either x, y are two variables that both appear positively together in some clause C in F such that x is not a double variable and y is, or both x and y are double variables that appear together in the same two clauses. If x is not a double variable, and if x appears outside C , then it must appear negatively outside C . Therefore, any satisfying assignment τ to F that assigns x the value 1 can be replaced by another satisfying assignment of weight at most that of τ in which y is assigned 1 and x is assigned 0. The case when x and y are two double variables that appear in the same two clauses can be argued similarly. Now we reduce ( F , k) to an instance G = ( V , E ) of SSMWM as follows. We associate with each variable x in F a vertex x in G that we call a variable-vertex, and with each clause C in F a vertex C in G that we call a clause-vertex. Moreover, for each clause C in F containing a double variable we add a special vertex C ∗ in G. (We use the same terminology in G as in F as much as possible to simplify the presentation. It should be clear from the context whether we are referring to G or to F .) We add an edge of weight 1 between C and C ∗ (if C ∗ exists). For each double variable, we add an edge of weight 1 between the two clauses containing it. For each mixed variable x, we add an edge of weight 0 between x and the clause that contains the negative occurrence of x (i.e., x), and an edge of weight 1 between x and the clause that contains the positive occurrence of x. We add an edge of weight 1 between each single variable and the clause containing it. Finally, we let S be the set of all clause-vertices in G. This completes the construction of G. Clearly G can be constructed from F in linear time in | F | = O (n) (note that the number of clauses in F is O (n)). We claim that F has a satisfying assignment of weight at most k if and only if G has a matching of weight at most k that saturates S. In effect, suppose that F has a satisfying assignment τ of weight t ≤ k. Without loss of generality, we may assume that τ does not assign two mixed variables that both appear positively in the same clause the value 1; otherwise, by an argument similar to the ones made in the simplification rules above, one (any) of these two mixed variables can be assigned the value 0 to obtain a satisfying assignment of a smaller weight than τ . We construct a matching M of G as follows. Let Z be the set of variables assigned 1 by τ and note that | Z | = t ≤ k. For each variable x ∈ Z , if x is a single or a mixed variable then include the edge (in G) between x and the clause containing it in M. If x is a double variable, let C and C  be the two clauses containing x. If none of C and C  is incident to an edge in M, then include the edge between C and C  in M; otherwise, if C (resp. C  ) is not incident to an edge in M then include the edge between C (resp. C  ) and C ∗ (resp. C  ∗ ). Finally, for each C in F such that no edge incident to C is in M yet, C must contain a negative literal x that was assigned 1 by τ ; include the edge of weight 0 between C and x in M. It is clear that the total weight of all the edges in M is at most t because, for each x ∈ Z , at most one edge of weight 1 has been added to M. To see that M is a matching, the only time we added an edge to M without checking that an endpoint of the edge is already in M is when we added an edge between a single or a mixed variable x and the only clause C that

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Fig. 2. An instance of k-MCIS consists of kN vertices partitioned into k color classes C 1 , . . . , C k each of size N. All edges are between vertices in different color classes. The edge (u s , u s ), for example, connects vertices u s and u s where s = (i − 1) N + j and s = (i  − 1) N + j  .

contains the positive occurrence of x. By the above simplification rules, C cannot contain a positive occurrence of any other variable y, and hence the edge between x and C is the only edge incident to C in M. The fact that M does not contain two edges incident to the same variable follows from the construction and the fact that τ is consistent (does not assign both a variable and its negation the value 1). Finally, to argue that M is saturating, since τ is a satisfying assignment, each clause C in F is satisfied by τ . If C is satisfied by a (positive) variable x in Z , then one edge incident on C will be added to M. (This edge is either incident on x if x is a mixed variable, is incident on C and another clause C  , or is incident on C and C ∗ .) On the other hand, if C is satisfied by a negative variable assigned 0 by τ , then an edge between C and a negative variable assigned 0 by τ will be added to M. To prove the converse, suppose that G has a matching of weight t ≤ k that saturates S. We construct a satisfying assignment τ for F of weight at most k. For each edge in M of weight 1 between a clause C and a variable x assign x the value 1 in τ . For each edge in M between two clauses C and C  assign the double variable that appears in both C and C  the value 1 in τ (note that there is exactly one such variable by the simplification rules). Suppose now that there is an edge between C and C ∗ (of weight 1) in M. From the construction of G, there must exist a double variable x that is contained in C and in some other clause C  ; we assign x the value 1 in τ . Every variable that has not been assigned a value so far gets assigned 0 in τ . Clearly, τ is a consistent assignment since it assigns a subset of variables 1, and the rest 0’s; the weight of τ is at most k. We now argue that τ satisfies F . Let C be a clause in F . Since M is saturating, there is an edge e in M that is incident on C . If e has weight 1, then from the above construction, a variable in C gets assigned 1 by τ , and τ satisfies C . On the other hand, if e has weight 0, then e must be incident on a variable that gets assigned 0 by τ , and hence, τ satisfies C . This completes the proof. 2 Theorem 8.5. For any t ≥ 3, SAT[t] and WSAT[t] restricted to instances in which every variable occurs at most  = 2 times are NP-complete. Proof. We prove the NP-completeness of SAT[t] for t ≥ 3 and  = 2, and describe at the end a similar proof that gives the NP-completeness of WSAT[t]. It is well known—and straightforward to see—that SAT[t] is in NP. Therefore, we only show the NP-hardness of the problem by giving a polynomial-time reduction from the NP-hard problem [19] k-Multi-Colored Independent Set (k-MCIS), which is defined as follows: k-MCIS Given a graph M = ( V ( M ), E ( M )) and a proper k-coloring of the vertices f : V ( M ) −→ C , where C = {1, 2, . . . , k} and each color class has the same cardinality, decide if there exists an independent set I ⊆ V ( M ) of size k such that, ∀u , v ∈ I , f (u ) = f ( v ). We refer to such an independent set as a colorful independent set. Let ( M , f ) be an instance of k-MCIS. We assume that the set C i , i = 1, . . . , k, of vertices that are mapped to color i ∈ C is of size N, and we label the vertices of M u 1 , . . . , u kN such that C i = {u (i −1) N +1 , . . . , u iN } (see Fig. 2). We describe how we construct the corresponding instance C of SAT[3], where C is a circuit in which each variable occurs at most twice (clearly this will imply the hardness of SAT[t] for t > 3 as well). We first construct an auxiliary graph G from M by replacing each vertex of M with kN vertices/copies. Each copy of a vertex v corresponds to one of the kN vertices of M, and is used to encode whether v is a neighbor of that vertex (fewer copies could have been used, but we went for the simplicity of the presentation). We construct G as follows. We j associate with every color class C i N blocks of vertices b1i , . . . , b iN such that each b i , j = 1, . . . , N, is a block of kN vertices j

j

j

u i ,1 , . . . , u i ,kN . V (G ) is then the set of all vertices u i ,s for i = 1, . . . , k, j = 1, . . . , N, and s = 1, . . . , kN. (See Fig. 3-(a).) We j j define the set E (G ) as follows: (u i ,s , u i  ,s ) is an edge in E (G ) if and only if i < i  , s = (i  − 1) N + j  , s = (i − 1) N + j, and

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j

j

j

Fig. 3. a) Associated with every color class C i are N blocks of vertices b1i , . . . , b iN , such that each block b i consists of kN vertices u i ,1 , . . . , u i ,kN . The blocks b1i , . . . , b iN

correspond to the N vertices of C i . b)

j j (u i , s , u i  , s  )

is an edge in E (G )

if and only if s = (i 

− 1) N +

j  , s

= (i − 1) N + j, and (u s , u s ) ∈ E ( M ).

(u s , u s ) ∈ E ( M ). (See Fig. 3-(b).) Basically, the edges of E (G ) are defined in such a way that if vertex u s is adjacent to u s in M, then the copy of vertex u s (in the block associated with u s ) that corresponds to vertex u s is adjacent to the copy of vertex u s (in the clock associated with u s ) that corresponds to vertex u s . From this construction, it is easy to see that each vertex in G has degree at most 1. If M has a colorful independent set I , then it is easy to verify that the k · (kN) = k2 N vertices in the k blocks corresponding to the vertices in I form an independent set in G. On the other hand, if G has an independent set consisting of k2 N vertices that are the vertices of k blocks, where each block corresponds to a vertex of M in a different color class, then clearly I has a colorful independent set. Therefore, it suffices to construct the instance C of SAT[3] with  = 2 such that C is satisfiable if and only if G has an independent set I G of k2 N vertices satisfying the properties: (a) the vertices of I G are the vertices of k blocks of vertices, and (b) these k blocks correspond to (k) vertices of M in different color classes. We construct the circuit C , whose output gate is an and-gate, as follows. For each vertex in G we associate a variable in C . We add k or-gates, g 1 , . . . , gk that feed into the output gate of C , each associated with a different color class of M. j For each block b i , j ∈ {1, . . . , N }, corresponding to a vertex in color class C i , i ∈ {1, . . . , k}, we add an and-gate that feeds j

into g i , and connect all the variables of C corresponding to the vertices in b i to the and-gate (as incoming variables). So far in the construction of C , each g i evaluates to 1 if and only if all the variables corresponding to the vertices in some j block b i are assigned 1, and the output gate of C evaluates to 1 if and only if for each color class C i , i = 1, . . . , k, the j

variables corresponding to the vertices in some block b i are all assigned 1. Finally, we add gates to ensure that no two variables corresponding to two adjacent vertices are both assigned 1. This can be done as follows. For each two variables x, x that correspond to two adjacent vertices in G, we add an or-gate whose (two) inputs are x and x that feeds into the output gate of C . Clearly, C has depth at most 3 and is an instance of SAT[3]. Moreover, each variable x in C has at most two occurrences in C : one occurrence if its corresponding vertex in G has a neighbor (recall that each vertex of G has at most one neighbor), and one occurrence resulting from connecting x to the and-gate associated with the block containing the vertex corresponding to x. From the above, it is easy to check that C is satisfiable if and only if G has an independent set I G that satisfies properties (a) and (b) above. Since C can be constructed from ( M , f ) in polynomial time, SAT[3] with  = 2 is NP-hard. Now to show the NP-hardness of WSAT[3] with  = 2, we construct C from ( M , f ) as above, and set the weight w of the desired assignment to be k2 N. We then produce the instance (C , w ) of WSAT[3]. If (C , w ) is a yes-instance of WSAT[3] then C is satisfiable, and hence ( M , f ) has a colorful independent set. On the other hand, if ( M , f ) has a colorful independent set, then C is satisfiable. From the above arguments, If C is satisfiable then a satisfying assignment τ must assign k2 N variables that correspond to k blocks from different color classes the value 1. Any additional variable to those k2 N variables that is assigned 1 by τ can be reassigned 0 without making C unsatisfiable, to obtain a satisfying truth assignment of weight exactly w. This gives a polynomial-time reduction from k-MCIS to WSAT[3] with  = 2, thus showing the NP-hardness of WSAT[3] (and of WSAT[t] for any t > 3) with  = 2. 2 Unfortunately, the reduction used in Theorem 8.5 to prove the NP-hardness of SAT[t] and WSAT[t] for t ≥ 3 and maximum number of occurrences  = 2 is not an fpt-reduction. Therefore, even though we know that k-MCIS is W [1]-hard [19], we cannot conclude that WSAT[t] for t ≥ 3 and  = 2 is W [1]-hard based on this reduction. Also, we do not know if a subexponential-time algorithm for SAT[t], for any t ≥ 3 and  = 2, would lead to the failure of ETH. 9. Concluding remarks In this paper, we characterized the parameterized and the subexponential-time complexity of the weighted and the unweighted satisfiability problems on bounded-depth normalized Boolean circuits with respect to some natural structural parameters of the circuit. In many cases, we determined a threshold function on the circuit structural parameter under consideration that tightly characterizes the parameterized and the subexponential-time complexity of these circuit satisfia-

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bility problems. We also showed applications of our results to other well-studied problems. There are several related lines of research that one can pursue. We list a couple of them: 1. Although we derived tight results on the parameterized and the subexponential-time complexity of SAT[t] and WSAT[t] with respect to several circuit structural parameters, there were some gaps left, and some cases remain undetermined. For example, the question of whether WSAT[t] for t ≥ 3 and maximum number of occurrences  = 2 is W -hard remains open, and the question of whether a subexponential-time algorithm for SAT[t] for t ≥ 3 and maximum number of occurrences  = 2 implies that ETH fails remains open as well. 2. We gave some applications of our results to well-studied problems such as Hitting Set and Independent Set on Hypergraph. It is certainly important to try to enlarge this set of problems to include other natural problems. References [1] J. Alber, H. Bodlaender, H. Ferneau, R. Niedermeier, Fixed parameter algorithms for dominating set and related problems on planar graphs, Algorithmica 33 (2002) 461–493. [2] T. Brüggemann, W. Kern, An improved deterministic local search algorithm for 3SAT, Theoret. Comput. Sci. 329 (2004) 303–313. [3] L. Cai, D. Juedes, On the existence of subexponential parameterized algorithms, J. Comput. System Sci. 67 (4) (2003) 789–807. [4] C. Calabro, R. Impagliazzo, R. Paturi, A duality between clause width and clause density for SAT, in: IEEE Conference on Computational Complexity, 2006, pp. 252–260. [5] J. Chen, B. Chor, M. Fellows, X. Huang, D. Juedes, I. Kanj, G. Xia, Tight lower bounds for certain parameterized NP-hard problems, Inf. Comput. 201 (2) (2005) 216–231. [6] J. Chen, X. Huang, I. Kanj, G. Xia, Strong computational lower bounds via parameterized complexity, J. Comput. System Sci. 72 (8) (2006) 1346–1367. [7] J. Chen, I. Kanj, Parameterized complexity and subexponential-time computability, in: The Multivariate Algorithmic Revolution and Beyond, in: Lecture Notes in Computer Science, vol. 7370, Springer, 2012, pp. 162–195. [8] J. Chen, I. Kanj, W. Jia, Vertex cover: further observations and further improvements, J. Algorithms 41 (2001) 280–301. [9] J. Chen, I. Kanj, G. Xia, On parameterized exponential time complexity, Theoret. Comput. Sci. 410 (27–29) (2009) 2641–2648. [10] Y. Chen, J. Flum, On miniaturized problems in parameterized complexity theory, Theoret. Comput. Sci. 351 (3) (2006) 314–336. [11] Y. Chen, J. Flum, Subexponential time and fixed-parameter tractability: exploiting the miniaturization mapping, J. Logic Comput. 19 (1) (2009) 89–122. [12] Y. Chen, M. Grohe, An isomorphism between subexponential and parameterized complexity theory, SIAM J. Comput. 37 (4) (2007) 1228–1258. [13] T. Cormen, C. Leiserson, R. Rivest, C. Stein, Introduction to Algorithms, 3rd edition, McGraw-Hill Book Company, Boston, MA, 2001. [14] M. Cygan, H. Dell, D. Lokshtanov, D. Marx, J. Nederlof, Y. Okamoto, R. Paturi, S. Saurabh, M. Wahlström, On problems as hard as CNF-SAT, in: IEEE Conference on Computational Complexity, IEEE, 2012, pp. 74–84. [15] R. Downey, M. Fellows, Fundamentals of Parameterized Complexity, Springer, New York, 2013. [16] H. Fernau, Edge dominating set: efficient enumeration-based exact algorithms, in: Second International Workshop on Parameterized and Exact Computation, in: Lecture Notes in Computer Science, vol. 4169, Springer, 2006. [17] J. Flum, M. Grohe, Parameterized Complexity Theory, Texts in Theoretical Computer Science. An EATCS Series, vol. XIV, Springer, Berlin, 2006. [18] J. Flüm, M. Grohe, Parameterized Complexity Theory, Springer-Verlag, Berlin, Germany, 2010. [19] S. Hartung, R. Niedermeier, Incremental list coloring of graphs, parameterized by conservation, in: TAMS’10, in: Lecture Notes in Computer Science, vol. 6108, 2010, pp. 258–270. [20] R. Impagliazzo, R. Paturi, On the complexity of k-SAT, J. Comput. System Sci. 62 (2) (2001) 367–375. [21] R. Impagliazzo, R. Paturi, F. Zane, Which problems have strongly exponential complexity? J. Comput. System Sci. 63 (4) (2001) 512–530. [22] Jan Johannsen, Satisfiability problems complete for deterministic logarithmic space, in: Diekert Volker, Michel Habib (Eds.), STACS 2004, 21st Annual Symposium on Theoretical Aspects of Computer Science, Montpellier, France, March 25–27, 2004, Proceedings, in: Lecture Notes in Computer Science, vol. 2996, Springer, 2004, pp. 317–325. [23] E. Lawler, Combinatorial Optimization: Networks and Matroids, Holt, Rinehart and Winston, New York, 1976. [24] D. Lokshtanov, D. Marx, S. Saurabh, Slightly superexponential parameterized problems, in: Proceedings of the Twenty-Second Annual ACM–SIAM Symposium on Discrete Algorithms, 2011, pp. 760–776. [25] C. Papadimitriou, M. Yannakakis, Optimization, approximation, and complexity classes, J. Comput. System Sci. 43 (1991) 425–440. [26] M. Patrascu, R. Williams, On the possibility of faster SAT algorithms, in: Proceedings of the Twenty-First Annual ACM–SIAM Symposium on Discrete Algorithms, 2010, pp. 1065–1075. [27] S. Porschen, E. Speckenmeyer, Algorithms for variable-weighted 2-SAT and dual problems, in: Proceedings of the 10th International Conference on the Theory and Applications of Satisfiability Testing, in: Lecture Notes in Computer Science, vol. 4501, Springer, 2007, pp. 173–186. [28] S. Szeider, The parameterized complexity of k-flip local search for SAT and MAX SAT, Discrete Optim. 8 (1) (2011) 139–145.