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Pattern size dependence of grain growth in Cu interconnects
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Scripta Materialia 63 (2010) 965–968 www.elsevier.com/locate/scriptamat
Pattern size dependence of grain growth in Cu interconnects Stefan Brandstetter,a,b Edgar F. Rauch,b Vincent Carreau,c Sylvain Maıˆtrejean,c Marc Verdierb and Marc Legrosa,* a
CEMES, 29 Rue Jeanne Marvig, BP 94347, 31055 Toulouse, France Universite´ de Grenoble, Lab. SIMaP (G-INP-UJF-CNRS), Domaine Univ., BP 75, 38402 St Martin d’He`res Cedex, France c CEA, LETI, MINATEC, 38054 Grenoble, France
b
Received 4 July 2010; accepted 16 July 2010 Available online 21 July 2010
Fine Cu interconnects possess small grains that increase the electrical resistivity of the interconnects. We have performed an extensive transmission electron microscopy study of the grain growth in lines of different sizes, using a recently developed automated indexing method. Different annealing processes were conducted, some with the presence of a top layer that possesses very large grains. Quantification (by crystallographic indexation and mapping) of grain growth in lines as narrow as 80 nm was achieved. We found that grain growth is clearly impeded by geometrical constraints. Ó 2010 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved. Keywords: Copper interconnects; Orientation mapping; TEM; Grain growth
The downscaling of microchips affects mainly the gate length of transistors. The width of the first metal lines connecting them is directly related to this scale. In state of the art microprocessors, interconnects are made with Cu, which has a better electrical conductivity than Al. However, the size reduction of Cu interconnects to a few hundreds of nanometers causes a strong decrease in conductivity [1–5] that is mainly related to Cu microstructure. The usual damascene production process combines the sputter deposition of a seed layer of Cu in trenches, which are then further filled by electrodeposited Cu. This leads to fine-grained Cu lines with a high ohmic resistance due to the scattering of electrons on random grain boundaries (GBs) [6] and on surfaces and interfaces [7,8]. Some models, based on empirical grain size and surface parameters, have successfully predicted interconnect conductivity [4,5]. The as-deposited grain size of Cu is usually of the order of a few tens of nanometers but grain growth can start at room temperature (RT) [9]. An annealing step could be introduced in the fabrication sequence to enhance the growth and further reduce the resistivity. In the damascene process, electrodeposited Cu is layered in thick coatings above trenches, before this excess material (the overburden layer) is polished away (chemical–mechanical polishing * Corresponding author. Fax: +33 562 25 78 42; e-mail: marc.legros@ cemes.fr
(CMP)). Recent X-ray investigations and extensive electrical measurements suggest that the grain growth in interconnects starts from or near the overburden and invades the lines below [10–12]. Annealing the Cu layer prior to CMP could therefore favor grain growth inside the interconnect lines. To reach the ultimate goal of understanding and controlling the evolution of growth and the related crystalline texture, a complete structural analysis is needed following custom heat treatments. In a previous work [1], we proposed a simple model that takes into account the electron scattering at interfaces and GBs to calculate this invasion depth. However, there is a lack of solid experimental and structural data to date to establish a complete picture and to validate or refute this model [13]. Using extensive TEM and a recently developed crystal orientation mapping (OM) technique [14], we have collected data concerning the confined grain growth processes in narrow interconnects (<100 nm) but also concerning the local orientation relationship between grains in the overburden and grains within the line. This topic is still a matter of controversy, mainly because access to these data is difficult [15–18]. From a wider perspective, this study gives quantitative information about the impact of an external dimensional constraint (the line width) on the process of grain growth. In the present work, 300 nm deep lines with three different widths (3000, 250 and 80 nm) were investigated by
1359-6462/$ - see front matter Ó 2010 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved. doi:10.1016/j.scriptamat.2010.07.017
966
S. Brandstetter et al. / Scripta Materialia 63 (2010) 965–968
Figure 1. Combined picture showing the three orientations investigated using TEM, with overlaid experimental results obtained with orientation mapping (OM). The grey and brown parts represent the substrate (including the insulators) and the overburden layer, respectively. See text for more details. (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
transmission electron microscopy (TEM) along the line and normal to the sidewalls. Three different annealing temperatures (RT, 150 and 400 °C) were also tested. Moreover, all samples were studied with and without an overburden to measure the influence of this on grain size evolution. This study encompasses quantitative measurements of nearly 90 thin foils examined by TEM. The sample preparation was carried out by tripod polishing and Ar-milling following the procedure described in Ref. [19] along three different orientations (Fig. 1). A Philips CM20 microscope as well as a specific OM tool [20] on a JEOL3000 were utilized to investigate the samples. Further details on the sample processing (interconnect deposition sequence, motive definition and sizes, nature of diffusion barriers, etc.) can be found elsewhere [21]. Figure 1 is a representation of the analyzed interconnect lines constructed from an overlay of TEM pictures and OM data from the 80 nm lines, which were self-annealed at RT for several months. It can clearly be seen that the overburden is populated with big grains, while smaller ones are found in the trenches. The border between the grains in the trenches and the overburden is indicated with a white dashed line. This dashed line fol-
lows disorientations (i.e., large-angle grain boundaries) that have been automatically measured with the OM technique between larger overburden grains and smaller in-line grains. Mean grain sizes and corresponding standard deviations from all the lines are shown in Table 1. All samples have been studied by TEM but only the 80 and 250 nm lines were investigated with the OM technique along the line and normal to the side wall after RT and 400 °C annealing. The color code corresponds to grain orientations out of the line. The main result is that the presence of the overburden during annealing enhances grain growth mainly in the wider lines. Grain growth in the small lines does not benefit as much from the overburden presence, regardless of the heat treatment. The 3 lm lines can actually be considered as a blanket film, in which the grain size is multiplied by almost 10. This would indicate that narrow trenches are an efficient obstacle to GB migration and/or grain growth. We can also point out that grain size measurements performed using the OM analysis show a slightly higher value compared to the standard bright-field TEM analysis. The difference between both techniques does not exceed 20%, which is much lower than the standard deviation (SD) in both cases. This difference could arise from artificial grains generated by incorrect indexation of boundary regions with the OM technique, or by the omission of actual small grains in conventional brightfield TEM observations. It is worth noting that a direct comparison with electron backscattering diffraction (EBSD) results, obtained in a scanning electron microscope, failed due to thermal drift inherent to the relatively long exposure time necessary to obtain sufficient signal levels. The resulting EBSD maps could not be exploited and are therefore not shown here. The OM technique also allows the contributions from the overburden and from the line to the overall crystallographic texture to be distinguished. The 80 nm lines exhibit a strong 1 1 1 texture out of the line at RT (see Fig. 2) which decreases after 400 °C annealing on account of the preferred 1 0 0 orientation. Along the line, the 1 1 0 texture slightly increases through annealing and, as a consequence, the sidewall texture evolves from a 1 1 2 towards a 1 1 0 direction (see Fig. 2). Surprisingly, the overburden exhibits the same texture along
Table 1. Average grain sizes inside the lines: (a) obtained by bright-field TEM (annealed without overburden layer); (b) obtained by bright-field TEM (annealed with overburden layer); (c) obtained by OM (annealed with overburden layer). Grain size (nm) 80 nm line width (a) (b) (c) 250 nm line width (a) (b) (c) 3000 nm line width (a) (b)
RT
SD
#
150 °C
SD
#
400 °C
SD
#
70
25
90
22 35
90 280
80
60
120
70 70 –
90 100 125
35 50 115
120 260 180
110
60
70
59 72
110 75
160
63
220
110 140 –
160 220 250
75 150 120
70 160 200
500 1000
270 400
75 50
800 1600
350 610
105 70
200
The # symbol stands for the number of grains measured. Grain sizes are rounded values at 50% of the cumulative grain size diameter statistics. OM was not performed on 3000 wide lines because their structure was similar to that of a blanket film (full grain growth).
S. Brandstetter et al. / Scripta Materialia 63 (2010) 965–968
Figure 2. Inverse pole figures corresponding to out of the line, normal to the sidewall and along the line orientations for 80 nm damascene lines before and after annealing. (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
the line and normal to the sidewall after annealing, as within the line. The same texture (1 1 1 out of the line, 1 1 0 along the line and 1 1 2 normal to the sidewall) is found in the 250 and 80 nm lines before annealing. In contrast to the narrow lines, the texture in the 250 nm lines does not change with annealing. The reliability of the texture data is ensured by the fact that the same results are obtained from TEM foils oriented along the line and normal to the sidewall. The texture measured in the 250 and 80 nm lines at RT was observed previously, and interpreted using the minimization of surface energy for wider lines [12]. In narrow lines, a 1 1 0 side component had been ascribed to a difference in the Ta barrier layer structure [22]. The complete texture along the narrowest lines after annealing presented here may also result from an elastic energy minimization during confined growth. Elastic stress fields during annealing originate from differences in thermal expansion between the Si substrate and the Cu lines, and also to geometrical constrains due to the line pattern [12]. Quantifying the invasion of the trenches requires the determination of the depth of growth of each grain of the overburden against smaller grains present in the patterned lines. Bright- and dark-field TEM images associated with microdiffraction have been used first to determine the relation between the overburden and the line grains. This determination was sometimes hindered by the presence of the TiN hard mask (black line labeled h in Figure 3c), but the major obstacle was the time needed to obtain a sufficient number of orientations and treat them statistically. The OM technique is the only way to obtain systematic and reliable data on the connectivity between upper grains (overburden) and lower ones (in the trench). The dashed line in Figure 3 represents the bottom limit of grain invasion. It is not represented for 3000 nm lines where grains extend from the top surface all the way down to the bottom as observed in Figure 3a, even without OM. In terms of invasion, this one is complete after a 400 °C annealing of these wide lines, which behave like a blanket film. Narrow lines (80 and 250 nm) are shown in Figure 3b and c, respectively. These narrow trenches are not fully invaded, and the benefit of the 400 °C annealing is limited. For the 80 nm lines, the invasion depth increases from 39% to 45%, and from
967
Figure 3. TEM micrographs taken along the lines for three different widths after 400 °C annealing with partially overlaid orientation maps (texture along the lines, see Fig. 2 for color code). The white dashed lines that separate trench and overburden grains correspond to the “invasion depth” (see text for details). The letters b and h stand for the barrier layer (TaNTa) and the hard mask (TiN), respectively.
56% to 64% in the 250 nm lines (see Table 2). Again, the constraint of the trench width is significant here as more than half the height of the 80 nm line remains unaffected, while about two-thirds of the 250 nm line is invaded. Although results are obtained from a cumulated line length of about 20 lm (which explains the high standard deviation values), these invasion depths correspond roughly to the depths calculated from electrical measurements performed on these lines [5]. In the present work, we report mainly relative invasion depths. Absolute values have to take in account the experimental geometries relevant to each interconnect, and especially the line taper and round edges (indicated in Fig. 1), which strongly influence the final microstructure. To minimize their surface energy, GBs tend to lie perpendicular to geometrical interfaces [23]. This implies that the rounding of the upper portion of the trench will influence the invasion depth. In the samples studied here, the edge rounding extends approximately 50 and 80 nm into the lines for the 80 and 250 nm wide lines, respectively. Therefore, we considered the invasion depth from the vertical end of this rounding. Since the grain connection goes much deeper into the lines, the presence of the side taper of around 2–3° might be responsible for the further growth into the lines. It Table 2. Invasion depths and grain boundary (GB) lengths (R3 and low-angle GBs). The large standard deviation (SD) associated with the OM method is mainly due to the limited line length investigated in thin TEM foils. Line widths 80 nm Invasion (nm) Depths (%) GB length R3 (%) <15° (%) 250 nm Invasion (nm) Depths (%) GB length R3 (%) <15° (%)
RT
SD
400 °C
SD
120 39
83
155 46
76
40 22 210 56 34 32
31 28 115
230 64 52 10
107
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S. Brandstetter et al. / Scripta Materialia 63 (2010) 965–968
should be mentioned that these values are averages and cover a wide range between total invasion [24] and non-connectivity of grains are present. The surface effect may also locally pin grain boundaries and preserve line grains. This might be due either to grooving on the sidewall structure or to a difference in the energy of the Cu grain–Ta barrier interface with respect to Cu grain orientation. Although the term invasion suggests that grain growth during RT annealing happens only from the top layer, some growth may initiate directly in the lines. However, the OM technique clearly allows a limit to be observed between grains that have grown in the overburden and smaller grains, with different orientations in the lines (dashed lined in Fig. 3). We can therefore demonstrate that annealing at 400 °C causes bigger grains to extend further down in the lines as seen in Figure 3. Grain growth implies a migration of boundaries that may have different mobilities, independently of geometrical constraints [25–28]. These migrations can in turn affect the line texture by promoting certain orientations. We followed the proportion of low-angle (<15°) and R3 (twin) boundaries within the line grains using the OM technique (Table 2). The RT self-annealing seems to produce similar GB types, with about 30–40% of R3, although the grain size in the wider lines is larger. Annealing at 400 °C changes the relative contributions: the 250 nm wide lines show a clear increase in the proportion of R3 boundaries to around 50% [10] and a strong reduction in the number of low-angle boundaries. In contrast, the 80 nm lines seem to have a slightly reduced content of R3 boundaries. This small decrease is probably the result of insufficient statistical data and could instead correspond to a stable population of R3 boundaries. This would indicate that grain growth, when it happens (preferably in large lines), favors the reduction of general and low-angle boundaries to the benefit of twin boundaries. Such a result confirms that the mobility of twin boundaries is relatively small. In summary, we evaluated the effect of annealing on the grain growth on different interconnect line widths. Using regular TEM and an OM tool, we precisely measured the grain morphology and its relation with the overburden layer, even in the narrowest Cu interconnects, which has never been done before. We were able to show that the overburden is related to the upper part of the interconnect lines and has a strong relation with the trench geometry. Invasion depths were precisely measured in this study and are in rough agreement with those extrapolated from electrical measurements: the thinner the line, the smaller the invasion. Other parameters, such as the line section, the intrinsic stress states and chemical contamination of Cu grains, can affect this invasion mechanism and should be investigated. From a broader perspective, the study shows that grain growth, even when stimulated by connected large grains, is strongly impeded by geometrical constraints. This work was funded by the French national research agency (ANR) through the CRISTAL project (PNANO call). The authors thank LETI’S Cu process team (A. Roule, E. Deronzier, T. Morel) for valuable help in sample processing.
[1] W. Steinhogl, G. Schindler, G. Steinlesberger, M. Engelhardt, Physical Review B 66 (7) (2002) 075414. [2] F. Chen, D. Gardner, IEEE Electron Device Letters 19 (12) (1998) 508. [3] K. Hinode, Y. Hanaoka, K. Takeda, S. Kondo, Japanese Journal of Applied Physics Part 2 – Letters 40 (10B) (2001) L1097. [4] S. Maitrejean, R. Gers, T. Mourier, A. Toffoli, G. Passemard, Microelectronic Engineering 83 (11–12) (2006) 2396. [5] V. Carreau, S. Maitrejean, Y. Brechet, M. Verdier, D. Bouchu, G. Passemard, Microelectronic Engineering 85 (10) (2008) 2133. [6] A.F. Mayadas, M. Shatzkes, J.F. Janak, Applied Physics Letters 14 (11) (1969) 345. [7] K. Fuchs, Proceedings of the Cambridge Philosophical Society 34 (1938) 100. [8] E.H. Sondheimer, Advances in Physics 1 (1) (1952) 1. [9] K. Pantleon, M.A.J. Somers, Journal of Applied Physics 100 (11) (2006) 114319. [10] Q.-T. Jiang, M. Nowell, B. Foran, A. Frank, R. Havemann, V. Parihar, R. Augur, J. Luttmer, Journal of Electronic Materials 31 (1) (2002) 10. [11] C. Lingk, M.E. Gross, Journal of Applied Physics 84 (10) (1998) 5547. [12] H. Lee, H. Han, D. Lee, Journal of Electronic Materials 34 (12) (2005) 1493. [13] K.A. Dunn, J. Rullan, R.v.d. Boom, Microscopy and Microanalysis 13 (Suppl. S02) (2007) 818. [14] E.F. Rauch, M. Veron, J. Portillo, D. Bultreys, Y. Maniette, S. Nicolopoulos, Microscopy and Analysis 93 (2008) S5. [15] D. Lee, H. Lee, Journal of Electronic Materials 32 (10) (2003) 1012. [16] P. Besser, E. Zschech, W. Blum, D. Winter, R. Ortega, S. Rose, M. Herrick, M. Gall, S. Thrasher, M. Tiner, B. Baker, G. Braeckelmann, L. Zhao, C. Simpson, C. Capasso, H. Kawasaki, E. Weitzman, Journal of Electronic Materials 30 (4) (2001) 320. [17] C. Lingk, M.E. Gross, W.L. Brown, Applied Physics Letters 74 (5) (1999) 682. [18] B. Kaouache, S. Labat, O. Thomas, S. Maitrejean, V. Carreau, Microelectronic Engineering 85 (10) (2008) 2175. [19] M. Legros, M. Cabie´, D.S. Gianola, Microscopy Research and Technique 72 (3) (2009) 270. [20] E.R. Rauch, A. Duft, Materials Science Forum 495–497 (2005) 197. [21] S. Brandstetter, V. Carreau, S. Maıˆtrejean, M. Verdier, M. Legros, Microelectronic Engineering 87 (3) (2010) 383. [22] G. Brunoldi, K.J. Kozaczek, B. Gittleman, T. Marangon, Microelectronic Engineering 83 (11–12) (2006) 2208. [23] D. Weygand, M. Verdier, J. Lepinoux, Modelling and Simulation in Materials Science and Engineering 17 (6) (2009) 064005. [24] R.J.J. van den Boom, E. Lifshin, K.A. Dunn, in: A.J. McKerrow, Y. ShachamDiamand, S. Shingubara, Y. Shimogaki (Eds.), 24th Advanced Metallization Conference, 2007 (AMC), Materials Research Society Proceeding, vol. 23, 2008, Albany, NY, 2007, p. 607. [25] C.H. Li, E.H. Edwards, J. Washburn, E.R. Parker, Acta Metallurgica 1 (2) (1953) 223. [26] D. Farkas, A. Froseth, H. Van Swygenhoven, Scripta Materialia 55 (8) (2006) 695. [27] D.A. Molodov, V.A. Ivanov, G. Gottstein, Acta Materialia 55 (5) (2007) 1843. [28] F. Mompiou, D. Caillard, M. Legros, Acta Materialia 57 (7) (2009) 2198.
Scripta Materialia 63 (2010) 965–968 www.elsevier.com/locate/scriptamat
Pattern size dependence of grain growth in Cu interconnects Stefan Brandstetter,a,b Edgar F. Rauch,b Vincent Carreau,c Sylvain Maıˆtrejean,c Marc Verdierb and Marc Legrosa,* a
CEMES, 29 Rue Jeanne Marvig, BP 94347, 31055 Toulouse, France Universite´ de Grenoble, Lab. SIMaP (G-INP-UJF-CNRS), Domaine Univ., BP 75, 38402 St Martin d’He`res Cedex, France c CEA, LETI, MINATEC, 38054 Grenoble, France
b
Received 4 July 2010; accepted 16 July 2010 Available online 21 July 2010
Fine Cu interconnects possess small grains that increase the electrical resistivity of the interconnects. We have performed an extensive transmission electron microscopy study of the grain growth in lines of different sizes, using a recently developed automated indexing method. Different annealing processes were conducted, some with the presence of a top layer that possesses very large grains. Quantification (by crystallographic indexation and mapping) of grain growth in lines as narrow as 80 nm was achieved. We found that grain growth is clearly impeded by geometrical constraints. Ó 2010 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved. Keywords: Copper interconnects; Orientation mapping; TEM; Grain growth
The downscaling of microchips affects mainly the gate length of transistors. The width of the first metal lines connecting them is directly related to this scale. In state of the art microprocessors, interconnects are made with Cu, which has a better electrical conductivity than Al. However, the size reduction of Cu interconnects to a few hundreds of nanometers causes a strong decrease in conductivity [1–5] that is mainly related to Cu microstructure. The usual damascene production process combines the sputter deposition of a seed layer of Cu in trenches, which are then further filled by electrodeposited Cu. This leads to fine-grained Cu lines with a high ohmic resistance due to the scattering of electrons on random grain boundaries (GBs) [6] and on surfaces and interfaces [7,8]. Some models, based on empirical grain size and surface parameters, have successfully predicted interconnect conductivity [4,5]. The as-deposited grain size of Cu is usually of the order of a few tens of nanometers but grain growth can start at room temperature (RT) [9]. An annealing step could be introduced in the fabrication sequence to enhance the growth and further reduce the resistivity. In the damascene process, electrodeposited Cu is layered in thick coatings above trenches, before this excess material (the overburden layer) is polished away (chemical–mechanical polishing * Corresponding author. Fax: +33 562 25 78 42; e-mail: marc.legros@ cemes.fr
(CMP)). Recent X-ray investigations and extensive electrical measurements suggest that the grain growth in interconnects starts from or near the overburden and invades the lines below [10–12]. Annealing the Cu layer prior to CMP could therefore favor grain growth inside the interconnect lines. To reach the ultimate goal of understanding and controlling the evolution of growth and the related crystalline texture, a complete structural analysis is needed following custom heat treatments. In a previous work [1], we proposed a simple model that takes into account the electron scattering at interfaces and GBs to calculate this invasion depth. However, there is a lack of solid experimental and structural data to date to establish a complete picture and to validate or refute this model [13]. Using extensive TEM and a recently developed crystal orientation mapping (OM) technique [14], we have collected data concerning the confined grain growth processes in narrow interconnects (<100 nm) but also concerning the local orientation relationship between grains in the overburden and grains within the line. This topic is still a matter of controversy, mainly because access to these data is difficult [15–18]. From a wider perspective, this study gives quantitative information about the impact of an external dimensional constraint (the line width) on the process of grain growth. In the present work, 300 nm deep lines with three different widths (3000, 250 and 80 nm) were investigated by
1359-6462/$ - see front matter Ó 2010 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved. doi:10.1016/j.scriptamat.2010.07.017
966
S. Brandstetter et al. / Scripta Materialia 63 (2010) 965–968
Figure 1. Combined picture showing the three orientations investigated using TEM, with overlaid experimental results obtained with orientation mapping (OM). The grey and brown parts represent the substrate (including the insulators) and the overburden layer, respectively. See text for more details. (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
transmission electron microscopy (TEM) along the line and normal to the sidewalls. Three different annealing temperatures (RT, 150 and 400 °C) were also tested. Moreover, all samples were studied with and without an overburden to measure the influence of this on grain size evolution. This study encompasses quantitative measurements of nearly 90 thin foils examined by TEM. The sample preparation was carried out by tripod polishing and Ar-milling following the procedure described in Ref. [19] along three different orientations (Fig. 1). A Philips CM20 microscope as well as a specific OM tool [20] on a JEOL3000 were utilized to investigate the samples. Further details on the sample processing (interconnect deposition sequence, motive definition and sizes, nature of diffusion barriers, etc.) can be found elsewhere [21]. Figure 1 is a representation of the analyzed interconnect lines constructed from an overlay of TEM pictures and OM data from the 80 nm lines, which were self-annealed at RT for several months. It can clearly be seen that the overburden is populated with big grains, while smaller ones are found in the trenches. The border between the grains in the trenches and the overburden is indicated with a white dashed line. This dashed line fol-
lows disorientations (i.e., large-angle grain boundaries) that have been automatically measured with the OM technique between larger overburden grains and smaller in-line grains. Mean grain sizes and corresponding standard deviations from all the lines are shown in Table 1. All samples have been studied by TEM but only the 80 and 250 nm lines were investigated with the OM technique along the line and normal to the side wall after RT and 400 °C annealing. The color code corresponds to grain orientations out of the line. The main result is that the presence of the overburden during annealing enhances grain growth mainly in the wider lines. Grain growth in the small lines does not benefit as much from the overburden presence, regardless of the heat treatment. The 3 lm lines can actually be considered as a blanket film, in which the grain size is multiplied by almost 10. This would indicate that narrow trenches are an efficient obstacle to GB migration and/or grain growth. We can also point out that grain size measurements performed using the OM analysis show a slightly higher value compared to the standard bright-field TEM analysis. The difference between both techniques does not exceed 20%, which is much lower than the standard deviation (SD) in both cases. This difference could arise from artificial grains generated by incorrect indexation of boundary regions with the OM technique, or by the omission of actual small grains in conventional brightfield TEM observations. It is worth noting that a direct comparison with electron backscattering diffraction (EBSD) results, obtained in a scanning electron microscope, failed due to thermal drift inherent to the relatively long exposure time necessary to obtain sufficient signal levels. The resulting EBSD maps could not be exploited and are therefore not shown here. The OM technique also allows the contributions from the overburden and from the line to the overall crystallographic texture to be distinguished. The 80 nm lines exhibit a strong 1 1 1 texture out of the line at RT (see Fig. 2) which decreases after 400 °C annealing on account of the preferred 1 0 0 orientation. Along the line, the 1 1 0 texture slightly increases through annealing and, as a consequence, the sidewall texture evolves from a 1 1 2 towards a 1 1 0 direction (see Fig. 2). Surprisingly, the overburden exhibits the same texture along
Table 1. Average grain sizes inside the lines: (a) obtained by bright-field TEM (annealed without overburden layer); (b) obtained by bright-field TEM (annealed with overburden layer); (c) obtained by OM (annealed with overburden layer). Grain size (nm) 80 nm line width (a) (b) (c) 250 nm line width (a) (b) (c) 3000 nm line width (a) (b)
RT
SD
#
150 °C
SD
#
400 °C
SD
#
70
25
90
22 35
90 280
80
60
120
70 70 –
90 100 125
35 50 115
120 260 180
110
60
70
59 72
110 75
160
63
220
110 140 –
160 220 250
75 150 120
70 160 200
500 1000
270 400
75 50
800 1600
350 610
105 70
200
The # symbol stands for the number of grains measured. Grain sizes are rounded values at 50% of the cumulative grain size diameter statistics. OM was not performed on 3000 wide lines because their structure was similar to that of a blanket film (full grain growth).
S. Brandstetter et al. / Scripta Materialia 63 (2010) 965–968
Figure 2. Inverse pole figures corresponding to out of the line, normal to the sidewall and along the line orientations for 80 nm damascene lines before and after annealing. (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
the line and normal to the sidewall after annealing, as within the line. The same texture (1 1 1 out of the line, 1 1 0 along the line and 1 1 2 normal to the sidewall) is found in the 250 and 80 nm lines before annealing. In contrast to the narrow lines, the texture in the 250 nm lines does not change with annealing. The reliability of the texture data is ensured by the fact that the same results are obtained from TEM foils oriented along the line and normal to the sidewall. The texture measured in the 250 and 80 nm lines at RT was observed previously, and interpreted using the minimization of surface energy for wider lines [12]. In narrow lines, a 1 1 0 side component had been ascribed to a difference in the Ta barrier layer structure [22]. The complete texture along the narrowest lines after annealing presented here may also result from an elastic energy minimization during confined growth. Elastic stress fields during annealing originate from differences in thermal expansion between the Si substrate and the Cu lines, and also to geometrical constrains due to the line pattern [12]. Quantifying the invasion of the trenches requires the determination of the depth of growth of each grain of the overburden against smaller grains present in the patterned lines. Bright- and dark-field TEM images associated with microdiffraction have been used first to determine the relation between the overburden and the line grains. This determination was sometimes hindered by the presence of the TiN hard mask (black line labeled h in Figure 3c), but the major obstacle was the time needed to obtain a sufficient number of orientations and treat them statistically. The OM technique is the only way to obtain systematic and reliable data on the connectivity between upper grains (overburden) and lower ones (in the trench). The dashed line in Figure 3 represents the bottom limit of grain invasion. It is not represented for 3000 nm lines where grains extend from the top surface all the way down to the bottom as observed in Figure 3a, even without OM. In terms of invasion, this one is complete after a 400 °C annealing of these wide lines, which behave like a blanket film. Narrow lines (80 and 250 nm) are shown in Figure 3b and c, respectively. These narrow trenches are not fully invaded, and the benefit of the 400 °C annealing is limited. For the 80 nm lines, the invasion depth increases from 39% to 45%, and from
967
Figure 3. TEM micrographs taken along the lines for three different widths after 400 °C annealing with partially overlaid orientation maps (texture along the lines, see Fig. 2 for color code). The white dashed lines that separate trench and overburden grains correspond to the “invasion depth” (see text for details). The letters b and h stand for the barrier layer (TaNTa) and the hard mask (TiN), respectively.
56% to 64% in the 250 nm lines (see Table 2). Again, the constraint of the trench width is significant here as more than half the height of the 80 nm line remains unaffected, while about two-thirds of the 250 nm line is invaded. Although results are obtained from a cumulated line length of about 20 lm (which explains the high standard deviation values), these invasion depths correspond roughly to the depths calculated from electrical measurements performed on these lines [5]. In the present work, we report mainly relative invasion depths. Absolute values have to take in account the experimental geometries relevant to each interconnect, and especially the line taper and round edges (indicated in Fig. 1), which strongly influence the final microstructure. To minimize their surface energy, GBs tend to lie perpendicular to geometrical interfaces [23]. This implies that the rounding of the upper portion of the trench will influence the invasion depth. In the samples studied here, the edge rounding extends approximately 50 and 80 nm into the lines for the 80 and 250 nm wide lines, respectively. Therefore, we considered the invasion depth from the vertical end of this rounding. Since the grain connection goes much deeper into the lines, the presence of the side taper of around 2–3° might be responsible for the further growth into the lines. It Table 2. Invasion depths and grain boundary (GB) lengths (R3 and low-angle GBs). The large standard deviation (SD) associated with the OM method is mainly due to the limited line length investigated in thin TEM foils. Line widths 80 nm Invasion (nm) Depths (%) GB length R3 (%) <15° (%) 250 nm Invasion (nm) Depths (%) GB length R3 (%) <15° (%)
RT
SD
400 °C
SD
120 39
83
155 46
76
40 22 210 56 34 32
31 28 115
230 64 52 10
107
968
S. Brandstetter et al. / Scripta Materialia 63 (2010) 965–968
should be mentioned that these values are averages and cover a wide range between total invasion [24] and non-connectivity of grains are present. The surface effect may also locally pin grain boundaries and preserve line grains. This might be due either to grooving on the sidewall structure or to a difference in the energy of the Cu grain–Ta barrier interface with respect to Cu grain orientation. Although the term invasion suggests that grain growth during RT annealing happens only from the top layer, some growth may initiate directly in the lines. However, the OM technique clearly allows a limit to be observed between grains that have grown in the overburden and smaller grains, with different orientations in the lines (dashed lined in Fig. 3). We can therefore demonstrate that annealing at 400 °C causes bigger grains to extend further down in the lines as seen in Figure 3. Grain growth implies a migration of boundaries that may have different mobilities, independently of geometrical constraints [25–28]. These migrations can in turn affect the line texture by promoting certain orientations. We followed the proportion of low-angle (<15°) and R3 (twin) boundaries within the line grains using the OM technique (Table 2). The RT self-annealing seems to produce similar GB types, with about 30–40% of R3, although the grain size in the wider lines is larger. Annealing at 400 °C changes the relative contributions: the 250 nm wide lines show a clear increase in the proportion of R3 boundaries to around 50% [10] and a strong reduction in the number of low-angle boundaries. In contrast, the 80 nm lines seem to have a slightly reduced content of R3 boundaries. This small decrease is probably the result of insufficient statistical data and could instead correspond to a stable population of R3 boundaries. This would indicate that grain growth, when it happens (preferably in large lines), favors the reduction of general and low-angle boundaries to the benefit of twin boundaries. Such a result confirms that the mobility of twin boundaries is relatively small. In summary, we evaluated the effect of annealing on the grain growth on different interconnect line widths. Using regular TEM and an OM tool, we precisely measured the grain morphology and its relation with the overburden layer, even in the narrowest Cu interconnects, which has never been done before. We were able to show that the overburden is related to the upper part of the interconnect lines and has a strong relation with the trench geometry. Invasion depths were precisely measured in this study and are in rough agreement with those extrapolated from electrical measurements: the thinner the line, the smaller the invasion. Other parameters, such as the line section, the intrinsic stress states and chemical contamination of Cu grains, can affect this invasion mechanism and should be investigated. From a broader perspective, the study shows that grain growth, even when stimulated by connected large grains, is strongly impeded by geometrical constraints. This work was funded by the French national research agency (ANR) through the CRISTAL project (PNANO call). The authors thank LETI’S Cu process team (A. Roule, E. Deronzier, T. Morel) for valuable help in sample processing.
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