- Email: [email protected]
Performances of two contention resolution units in optical SOA-MZI router
Optics Communications 423 (2018) 21–28
Contents lists available at ScienceDirect
Optics Communications journal homepage: www.elsevier.com/locate/optcom
Performances of two contention resolution units in optical SOA-MZI router Rim Farhat *, Amel Farhat, Mourad Menif High School of Communications of Tunis, Lab. GRESCOM, Carthage University, Ghazala Technolopark, Ariana, 2083, Tunisia
ARTICLE
INFO
Keywords: Optical router SOA-MZI Packet forwarding Contention resolution Deflection routing Wavelength conversion
ABSTRACT . We propose an optical router architecture with contention resolution unit. This router operates with asynchronous and variable length packets. FIFO technique is chosen for packet priority. The proposed router is implemented with SOA-MZI gates. The contention resolution unit is tested with two separate strategies, namely the deflection routing and the wavelength conversion. Error-free transmission up to 100 Gbps is guaranteed for both strategies with a penalty around 1 dB for wavelength conversion.
1. Introduction In recent years, the demand for high bit rate communication services (internet, telephone, voice over IP, etc.), has been steadily growing. To meet this requirement, next-generation networks have to avoid electronic systems because of their fundamental limits, e.g., huge power consumption, complex switch routers, and slow electronic buffers. Among the other technologies, photonics emerge as an attractive approach to build future packet switching systems. Therefore, all optical routers will replace conventional switches to take advantage of their high integration capabilities, scalability, low power consumption, and reduced overall cost [1–3]. Different router architectures relying on Optical Packet Switching (OPS) technology are based on label processing and packet forwarding modules. They exploit respectively the optical flip-flop and the optical switch gates. These components can be realized by using various technologies. In Refs. [3,4], an optical flip-flop based on semiconductor optical amplifier (SOA) was implemented. In Ref. [5] a wavelength selective switch (WSS) based on cascaded silicon micro-rings and SOAs was used, while in Ref. [6] an optical flip-flop and an optical switch based on polarization bistability in optical fiber were demonstrated. The optical router has different input ports. Therefore, when two or more packets arrive simultaneously and intend to reach the same port, contention occurs. No more than one packet may be forwarded to any output port at the same time. Thus, collision must be detected and resolved to avoid losing the contending packet. In OPS routers, contention resolution can exploit one or a combination of three main dimensions, namely time, space, and wavelength [7–9]. According to the adopted priority technique, one of the contending packets is forwarded to the intended output port while the collision is resolved *
for the rest. In fact, there are three contention resolution strategies, that are deflection routing, wavelength conversion, and optical buffering. The deflection routing strategy consists of routing the rest of contending packets immediately through a different output port without stored them [10,11]. While for the wavelength conversion strategy, the contending packets are forwarded to the same requested output port but at different wavelengths [12–14]. However, in the case of optical buffering strategy, an optical delay-line (ODL) is employed to store the contending packets until the output port is empty [15,16]. In this work, we suggest SOA Mach Zehnder Interferometer (MZI) optical router architecture with contention resolution unit. Two units are tested separately; the first exploits the deflection routing strategy whereas the second employs the wavelength conversion strategy. Then, a performances comparison between those two contention resolution techniques takes place. The paper is organized as follows: Section 2 demonstrates the operation principle of the router architecture and explains the two adopted contention resolution strategies. Section 3 presents the scalability of the proposed router architecture. Section 4 describes the design of different units employed for the router implementation, while Section 5 discusses the results. Finally, Section 6 concludes the manuscript. 2. Operation principles Once a packet reaches a router input port, it must be directed to the appropriate output port. This operation is called packet forwarding. In case two or more packets intend to reach the same output port at once, collision happens, and packets are then lost. To overcome this limitation, two contention resolution strategies, that are the deflection routing and
Corresponding author. E-mail address: [email protected] (R. Farhat).
https://doi.org/10.1016/j.optcom.2018.04.002 Received 9 December 2017; Received in revised form 31 March 2018; Accepted 2 April 2018 0030-4018/© 2018 Elsevier B.V. All rights reserved.
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Optics Communications 423 (2018) 21–28
the wavelength conversion, are investigated separately. First In First Out (FIFO) priority technique is employed for packet priority. Hence, the first coming packet is forwarded to the proper output port, while collision is resolved for the rest.
2.3.1. Deflection routing strategy The deflection routing strategy consists of sending packets that are contending for the same output port to different output ports. The developed deflection routing unit has 2 output ports 𝐶1 and 𝐷1 which correspond to the output port and the resolution port, respectively. Since FIFO is the priority’s technique, so, if two packets intend to go through the same output port (port 𝐶1 ), the first arriving packet is then forwarded to 𝐶1 whereas the second incoming packet is routed to 𝐷1 . In this context, two stages must be considered. First, giving the second incoming packet, the AND gate (AND6 or AND7 respectively) transmit a logical signal to reset the active flip-flop (flip-flop2 or flipflop1 respectively) and to set a second flip-flop (flip-flop4 or flip-flop3 respectively). Afterward, an extra SOA-MZI switch (SOA-MZI4 or SOAMZI3 respectively) is linked with this further flip-flop to deflect the contending packet to the resolution port (𝐷1 ).
2.1. Packet forwarding The optical packet reaches first the router’s input port (See Fig. 1(b)). Asynchronous variable length packet can be forwarded through this architecture. Consequently, and as shown in Fig. 1(a), set and reset pulses are required to indicate the beginning and the end of the packet frame, respectively. To simplify the set/reset pulses extraction, a guard time is utilized between the signaling parts and the payload part. As presented in Fig. 1(b), the extracted set/reset pulses are launched into the flip-flop unit while the payload passes to the SOA-MZI switch. An input packet with corresponding set/reset pulses will generate an ON/OFF state at the flip-flop output with duration of the payload data. The optical flip-flop output response serves as control signal for the SOAMZI switch. Thus, the packet inserted into the input port with matched set/reset pulses will be routed to the intended output port, while others are rejected. The illustrated optical packet forwarding unit does not deal with collision issue. In fact, it is implemented with a single input and output port. But actually, a router consists of M different input ports. So, two or more packets, arriving from various input ports can contend for only one output port. The incoming packets are then lost. To lift this problem, a contention detection unit as well as a contention resolution unit, are added.
2.3.2. Wavelength conversion strategy When two packets contend for the same destination output port, the second arriving will be converted to another free wavelength. Subsequently, it can still be transmitted to the same output (port 𝐶2 ). This is so-called wavelength conversion technique. Similarly to the deflecting routing, the first arriving packet is detected and forwarded to port 𝐶2 at its original wavelength (𝜆d ). While an extra flip-flop is activated and linked with the corresponding SOA-MZI switch to redirect the second coming contending packet to the wavelength converter gate. Thus, it is forwarded to the appropriate output port but at a different wavelength (𝜆c ). To ensure that only switched on flip-flop are deactivated, a flip-flop controller block is employed. It is composed of optical AND gates that are connected with the reset pulses and delayed responses of each flipflop.
2.2. Contention detection Fig. 2 illustrates the suggested optical router architecture. This architecture contains different units, namely label processing block, packet forwarding, contention detection, contention resolution, and flip-flop controller. Packet forwarding and label processing units were studied previously in Section 2.1. The contention detection unit is composed of three Optical AND gates (AND5 , AND6 , and AND7 ). An AND logical operation (realized by AND5 gate) of the flip-flop1 and flip-flop2 responses is done to identify collision as soon as it happens. Since FIFO strategy is adopted for packets priority, the first incoming packet has to be defined. Therefore, AND6 and AND7 are linked to flip-flop1 and flip-flop2 ’s delayed response, respectively, and AND5 logical response. If the first received packet is the packet at input1 (input2 respectively), the AND6 (AND7 respectively) will launch a logic pulse to reset flip-flop2 (flip-flop1 respectively) and set flip-flop4 (flip-flop3 respectively). The first arriving packet from input1 will be routed to the right output port through the packet forwarding unit composed of the SOA-MZI1 optical switch (SOA-MZI2 respectively). However, for the second incoming packet, the contention problem must be solved to avoid packet loss.
3. Router scalability Fig. 4 shows a generic form of the proposed router architecture with N input/output ports. It comprises different blocks, namely optical flipflops, SOA-MZI switches, optical splitters and combiners, contention detection, and resolution units. To aid the subsequent discussions, the architecture is divided into three stages. The first stage, stage A is where the input signal ‘‘i’’, is linked to the corresponding flip-flop_i. Optical splitter is used to split the flip-flop output response to N branches bi_j, where j ∈ [1, N]. In case there is no contention or the input packet_i is the first arriving, the bi_i is linked to SOA_i while bi_j, where j ≠ i, is introduced to the contention detection unit C-D-i_j to detect contention between the i and j input ports. The packet payload data is split in two parts Di_1 and Di_2. Di_1 is linked to the SOA_i where Di_2 is introduced to the resolution unit C-R_i. Stage B is dedicated to contention detection. To identify contention between two input ports ‘‘i’’ and ‘‘j’’ a unit called C-D-i_j is employed, where i < 𝑗 ≤ 𝑁. It has as input bi_j (blue color) and bj_i (red color) from input ports ‘‘i’’ and ‘‘j’’ respectively. The contention detection unit is described in Section 2.2. According to the first coming packet, C-D-i_j will output a logical pulse (a_i_j or a_j_i) to reset the flip-flop corresponding to the second incoming packet (flip-flop_i or flip-flop_j) and to set an extra flip-flop (flip-flop_i_2 or flip-flop_j_2 respectively). A power combiner Ai is used to collect all reset pulses a_i_j (black color) and a_i_k (blue color) coming respectively from C-D-i_j where j > 𝑖 and C-D-k_i, where k < 𝑖. In case packet_i is the second packet coming, the Ai pulse will be employed to reset the flip-flop_i and to set flip-flop_i_2 included in the contention resolution unit C-R_i at the Stage C. Afterwards, if the contention resolution is based on deflection routing strategy, then, the contending packet will be routed to an output port different from the appropriate port while if wavelength conversion strategy is employed, the contention resolution unit will route this packet to the requested output port but at a different wavelength. Finally a power combiner 𝑂i is used to assemble all packets arriving from
2.3. Contention resolution Two contention resolution units are proposed. The first unit is based on deflection routing technique (shown in Fig. 3(a)) while the second unit is exploiting wavelength conversion technique (shown in Fig. 3(b)). The contention resolution unit includes 5 input ports and 2 output ports. Port1 and port5 match flip-flop3 and flip-flop4 output windows, respectively, while port2 and port4 correspond to payload flow from input1 and input2 , respectively. Port3 is carrying the first arriving packet either from the router’s input1 or input2 . In the deflection routing unit, two SOA-MZI switches (SOA-MZI3 and SOA-MZI4 ) are used to forward the second coming packet to the resolution port. For the wavelength conversion unit an extra gate (wavelength converter) is exploited to forward the contending packet to the output port, at a different wavelength. 22
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Fig. 1. (a) Packet design. (b) Packet forwarding unit.
Fig. 2. Optical router architecture with contention resolution.
Fig. 3. Contention resolution unit based on: (a) deflection routing strategy and (b) wavelength conversion strategy.
4. Units design
different input ports (OUTPUT_k_i where 𝑘 ∈ [1, 𝑁]) and aiming to go over the output port_i. To resolve contention for an output port_k, different blocks are exploited such as contention detection units (C-D-i_j), contention resolution units (C-R_j) and flip-flop controller (FF_c_j). To implement all C-D∑ i_j; 3 N m=1 (N − m) AND gates are used. For the contention resolution, N flip-flops as well as N SOA-MZI switches are needed. In case of wavelength conversion strategy further N wavelength converters are employed. To forward the first arriving packet from different input ports N SOA-MZI switches and N flip-flops are utilized. For the implementation of flip-flop controller FF_c (described in Section 2.3), a further 2N AND gates are required.
For the proposed router’s implementation, three main gates are exploited, i.e. an optical flip-flop, an optical AND and an optical wavelength converter. As described in Fig. 5, these optical gates are based on the symmetrical integrated SOA-MZI, where each arm includes one single SOA (SOA1 or SOA2 ). 4.1. Optical flip-flop The optical flip-flop exploiting the symmetrical SOA-MZI scheme is shown in Fig. 6. Two control pulses, namely set and reset are injected correspondingly into port3 and port1 . The flip-flop’s active state is assured by the phase shift between the two MZI’s branches. 23
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Fig. 4. N×N router architecture. (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
and reduces its optical gain. The phase shifts between the two MZI arms are balanced again, and no optical power can be obtained at the output port. Consequently, the flip-flop is switched off.
4.2. Optical AND gate The described gate in Fig. 7 is used as AND logical gate as well as SOA-MZI switch. Two data traffic are introduced. The input logical signal A enters Port 5 and splits into two identical copies traveling in each arm of the interferometer and arrives at both SOA. Whereas the input logic signals B is injected at Port 1. It is then coupled into one arm of the interferometer so, it reaches only SOA1 . Signal A is acting as the probe signal whereas signal B is functioning as the control signal. If the control signal B is ZERO, the SOA-MZI is balanced and no signal emerges from Port 2. In contrast, if B is ONE, it induces a change in the phase of the signal pulse in its corresponding arm through cross-phase in that SOA. The signal pulse in the opposite arm sees no effect. Hence, a differential phase-shift is introduced to the probe signals in both arms and a logical pulse is seen at Port 2. Consequently, signal C at Port 2 is actually the result of Boolean calculation A⋅B.
Fig. 5. Schematic of a symmetrical integrated SOA-MZI.
When the set pulse is injected into port3 , it reaches only SOA2 . Consequently, it causes unbalanced phase shifts between the two MZI arms. At that time the flip-flop gate will launch a logical pulse at its output port, and is switched on. To maintain this state, a continued stream of power must be preserved in the SOA2 . Therefore, a feedback loop is used to send back a part of the output signal to SOA2 . Once the reset pulse is introduced to port1 of the flip-flop unit, it reaches SOA1 24
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Fig. 6. Optical flip-flop.
Fig. 7. Optical AND gate.
Fig. 8. Wavelength converter.
get the 100 Gbps OTDM signal. The optical pulse train is coupled into four optical branches. In each branch, a modulator (MOD) is driven by either 10 or 25 Gbps optical return to zero (RZ) data signals. The modulation format is ON–OFF Keying (OOK). Each transmitted bit of the RZ pulses is delayed at a particular time period and is then multiplexed and converted into a higher bit rate, i.e. 40 Gbps and 100 Gbps [17,18]. Two asynchronous variable length data packet flows are introduced from input1 and input2 in order to reach the output port 𝐷 (see Fig. 10(a), (b) respectively). Each flow is composed of three consecutive packets with matched set and reset pulses. The payload data from input1 and input2 are shown in Fig. 10(c), (d), respectively. The first injected packet at input1 (𝐹1.1 ), starts being forwarded to the output port 𝐷1 (see Fig. 11(a)). After a while, a packet is injected at input port2 (𝐹2.1 ). At that time, a collision occurs. Two contention resolution strategies are investigated separately to deal with this issue. The first is the deflection routing strategy. Therefore, the second arriving packet (𝐹2.1 ) (the packet at input2 ) is deflected to the resolution port 𝐶1 (see Fig. 11(b)). Similarly, Packet 3 (𝐹2.3 ) at input2 is arriving before packet 3 (𝐹1.3 ) of input1 , hence, the second incoming packet is deflected to the resolution port while the first one is forwarded to the input port. The second introduced packet at input1 (𝐹1.2 ) and input2
4.3. Wavelength converter For the wavelength conversion and as illustrated in Fig. 8, a continuous wave (CW) at the wavelength 𝜆c is introduced into the SOA-MZI scheme at port4 while the input data flow at 𝜆d is launched at port1 . The phase shift at the MZI’s arms can be controlled via the optical input power at port1 . In fact, when an input signal at the wavelength 𝜆d , is directed to the SOA1 , the SOA’s carrier density is altered. Consequently, the phase, and thereby the output power at port2 , are changed. Hence, a signal identical to the input signal at the CW’s wavelength (𝜆c ) is obtained. Wavelength conversion is then achieved. 5. Results and discussion To study the suggested router architecture with contention resolution unit, Optiwave simulations are used. In order to get higher bit rates, optical time division multiplexed (OTDM) is exploited. Fig. 9 represents the schematic design of the OTDM transmitter. The main used components are the optical pulse generator with wavelength set to 1545 nm and the modulator. To get the 40 Gbps bit rate, a base data rate of 10 Gbps is employed while a base data rate of 25 Gbps is introduced to 25
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Fig. 9. Schematic view of 4*Bit rates OTDM transmitter system.
Fig. 10. (a) Packet flow at input1 (A1). (b) Packet flow at input2 (A2). (c) Payload data from input1 (B1). (d) Payload data from input2 (B2); (A1, A2, B1 and B2 as depicted in Fig. 3).
The contention resolution unit based either on deflection routing strategy or on wavelength conversion strategy, has successfully solved the contention problem, and all incoming packets are then forwarded. Fig. 12 represents the BER of the two proposed contention resolution units. Error-free transmission (BER =10−9 ) at high bit rates up to 100 Gbps is guaranteed for both strategies. But in term of BER and hardware complexity, the deflection routing unit seems to be more appropriate compared to the wavelength conversion unit. In fact, a power penalty of around 1 dB for wavelength converted packet in comparison with deflected packet, is obtained. Besides, deflection routing technique does not require the use of any additional hardware (the wavelength converter). However, it causes the out of order arrivals. In fact, deflected packets can end up by following a longer path to their final destination.
(𝐹2.2 ) are forwarded to the output port since there is no contention (see Fig. 11(a)). For the unit using the wavelength conversion strategy, the second incoming packet (𝐹2.1 ) at 𝜆d = 1545 nm is directed to the contention resolution unit. Then, it is forwarded to the output port at 𝜆c = 1555 nm. Consequently, the two packets (𝐹1.1 and 𝐹2.1 ) are forwarded to the same output port, but at different wavelengths. Similarly, for 𝐹1.3 and 𝐹2.3 , the contending packets are going through the output port at 𝜆d = 1555 nm and 𝜆c = 1545 nm, respectively. While for 𝐹1.2 and 𝐹2.2 there is no contention, the packets are then forwarded to the output port at the original data‘s wavelength 𝜆d . The spectrum of the contending forwarded packets at the output port is described in Fig. 11(c). Clear eye diagrams are obtained for both contention resolution strategies (see Fig. 11(d)). 26
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Fig. 11. (a) Data packet at output port 𝐷1 of the router based on deflection routing strategy. (b) Data packet at resolution port 𝐶1 of the router based on deflection routing strategy. (c) Output data spectrum at output port 𝐷2 of the router based on wavelength conversion. (d) Eye diagram of the contending packets.
Fig. 12. BER curves of router architecture with deflection strategy, and router architecture with wavelength conversion strategy at 10 Gbps, 40 Gbps, and 100 Gbps.
6. Conclusion
on SOA-MZI, which makes the solution very promising in terms of stability, compactness, and power consumption. Optiwave simulations are utilized to evaluate the performances of the router. FIFO technique is chosen for packets’ priority. The proposed architecture can handle optical time division multiplexed (OTDM) packets up to 100 Gbps. For forwarding operation and contention resolution, optical flip-flop and
In this paper, we propose an optical router architecture capable of detecting and resolving contention. Two separate contention resolution units using different strategies, namely the deflection routing and the wavelength conversion, are investigated. The optical router relies 27
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optical AND gates responses are exploited to operate with asynchronous variable length packets. The scalability of the proposed router is studied and a 𝑁 × 𝑁 generic architecture is demonstrated. Error-free transmission for bit rates up to 100 Gbps, and clear eye diagrams are obtained for both contention resolution strategies. Deflection routing is proved to be the appropriate approach. In fact, it offers better BER performances in comparison with wavelength conversion. Besides, it does not need extra hardware components (wavelength converter, ODL, etc.). Nevertheless, it may cause instability due to out of order arrivals.
[6] P.Y. Bony, et al., Optical flip-flop memory and routing operation based on polarization bistability in optical fiber, in: ECOC, Cannes, France, 2014. [7] H. Lim, Number of tunable wavelength converters and internal wavelengths needed for cost-effective design of asynchronous optical packet switching system with shared or output fibre delay line buffer, IET Commun. 7 (13) (2013) 1419–1429. [8] M. Cheng, et al., Wavelength converted broadcast-selective buffering contention resolution in synchronous WDM OPS networks, J. Lightw. Technol. 28 (9) (2010) 1356–1362. [9] S. Yamano, F. Xue, S.J. Ben Yoo, Load-sensitive deflection routing for contention resolution in optical packet switched Networks, in: proc ICCCN, Dallas, TX, USA, 2003, pp. 243-248. [10] M.K. Dutta, V.K. Chaubey, Design and performance analysis of deflection routing based intelligent optical burst switched (OBS) network, in: ICDeCom, Mesra, India, 2011. [11] C.C. Lee, L.F.K. Lui, P.K.A. Wai, H.Y. Tam, 2×2 deflection routing node for optical packet-switched networks, in: CLEO/QELS, San Jose, CA, USA, 2008. [12] H.L. Liu, B. Zhang, S.L. Shi, A novel contention resolution scheme of hybrid shared wavelength conversion for optical packet switching, J. Lightw. Technol. 30 (2) (2012) 222–228. [13] C. Stamatiadis, et al., All-Optical Contention Resolution using a single optical flipflop and two stage all-optical wavelength conversion, in: OFC, San Diego, California USA, 2010. [14] M. Zheng, S. Ji, Performance Evaluation of OPS contention resolution scheme based on SPC wavelength conversion, in: ICCIS, Chengdu, China, 2010, pp. 917-919. [15] C. Porzi, All-Optical self-synchronizing scheme for contention resolution in asynchronous optical packet switched networks using continuously tunable optical delay line, in: NFOEC, Los Angeles, California USA, 2011. [16] C. Porzi, et al., Application of brillouin-based continuously tunable optical delay line to contention resolution between asynchronous optical packets, J. Lightw. Technol. 31 (17) (2013) 2888–2896. [17] T. Kaur, G. Soni, Performance analysis of OTDM link at 40 Gbps, in: ICGCIoT, Noida, India, 2015, pp. 240–243. [18] B.P.-P. Kuo, et al., Transmission of 640-Gb/s RZ-OOK channel over 100-km SSMF by wavelength-transparent conjugation, J. Lightw. Technol. 29 (4) (2011) 516–523.
Acknowledgment This research did not receive any specific grant from funding agencies in the public, commercial, or not-for-profit sectors. References [1] H. Brahmi, et al., On the fly all-optical packet switching based on hybrid WDM/OCDMA labelling scheme, Opt.Commun. 312 (2014) 175–184. [2] L. Wang, et al., All-optical flip-flop based on SOA and MZI switch, in: PIERS, Shanghai, China, 2016, pp. 8–11. [3] T. Kamidai, et al., Proposal of optical flip-flop operation between two phase states with a single SOA and a feedback loop, PS, Florence, Italy, 2015, pp. 223-225. [4] R. Farhat, A. Farhat, M. Menif, Comparison of all optical forwarding packet architectures, Proc. SPIE 9894 (2016). [5] L. Xu, et al., A hybrid optical packet and wavelength selective switching platform for high-performance data center networks, Opt. Express 19 (24) (2011) 24258–24267.
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Contents lists available at ScienceDirect
Optics Communications journal homepage: www.elsevier.com/locate/optcom
Performances of two contention resolution units in optical SOA-MZI router Rim Farhat *, Amel Farhat, Mourad Menif High School of Communications of Tunis, Lab. GRESCOM, Carthage University, Ghazala Technolopark, Ariana, 2083, Tunisia
ARTICLE
INFO
Keywords: Optical router SOA-MZI Packet forwarding Contention resolution Deflection routing Wavelength conversion
ABSTRACT . We propose an optical router architecture with contention resolution unit. This router operates with asynchronous and variable length packets. FIFO technique is chosen for packet priority. The proposed router is implemented with SOA-MZI gates. The contention resolution unit is tested with two separate strategies, namely the deflection routing and the wavelength conversion. Error-free transmission up to 100 Gbps is guaranteed for both strategies with a penalty around 1 dB for wavelength conversion.
1. Introduction In recent years, the demand for high bit rate communication services (internet, telephone, voice over IP, etc.), has been steadily growing. To meet this requirement, next-generation networks have to avoid electronic systems because of their fundamental limits, e.g., huge power consumption, complex switch routers, and slow electronic buffers. Among the other technologies, photonics emerge as an attractive approach to build future packet switching systems. Therefore, all optical routers will replace conventional switches to take advantage of their high integration capabilities, scalability, low power consumption, and reduced overall cost [1–3]. Different router architectures relying on Optical Packet Switching (OPS) technology are based on label processing and packet forwarding modules. They exploit respectively the optical flip-flop and the optical switch gates. These components can be realized by using various technologies. In Refs. [3,4], an optical flip-flop based on semiconductor optical amplifier (SOA) was implemented. In Ref. [5] a wavelength selective switch (WSS) based on cascaded silicon micro-rings and SOAs was used, while in Ref. [6] an optical flip-flop and an optical switch based on polarization bistability in optical fiber were demonstrated. The optical router has different input ports. Therefore, when two or more packets arrive simultaneously and intend to reach the same port, contention occurs. No more than one packet may be forwarded to any output port at the same time. Thus, collision must be detected and resolved to avoid losing the contending packet. In OPS routers, contention resolution can exploit one or a combination of three main dimensions, namely time, space, and wavelength [7–9]. According to the adopted priority technique, one of the contending packets is forwarded to the intended output port while the collision is resolved *
for the rest. In fact, there are three contention resolution strategies, that are deflection routing, wavelength conversion, and optical buffering. The deflection routing strategy consists of routing the rest of contending packets immediately through a different output port without stored them [10,11]. While for the wavelength conversion strategy, the contending packets are forwarded to the same requested output port but at different wavelengths [12–14]. However, in the case of optical buffering strategy, an optical delay-line (ODL) is employed to store the contending packets until the output port is empty [15,16]. In this work, we suggest SOA Mach Zehnder Interferometer (MZI) optical router architecture with contention resolution unit. Two units are tested separately; the first exploits the deflection routing strategy whereas the second employs the wavelength conversion strategy. Then, a performances comparison between those two contention resolution techniques takes place. The paper is organized as follows: Section 2 demonstrates the operation principle of the router architecture and explains the two adopted contention resolution strategies. Section 3 presents the scalability of the proposed router architecture. Section 4 describes the design of different units employed for the router implementation, while Section 5 discusses the results. Finally, Section 6 concludes the manuscript. 2. Operation principles Once a packet reaches a router input port, it must be directed to the appropriate output port. This operation is called packet forwarding. In case two or more packets intend to reach the same output port at once, collision happens, and packets are then lost. To overcome this limitation, two contention resolution strategies, that are the deflection routing and
Corresponding author. E-mail address: [email protected] (R. Farhat).
https://doi.org/10.1016/j.optcom.2018.04.002 Received 9 December 2017; Received in revised form 31 March 2018; Accepted 2 April 2018 0030-4018/© 2018 Elsevier B.V. All rights reserved.
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Optics Communications 423 (2018) 21–28
the wavelength conversion, are investigated separately. First In First Out (FIFO) priority technique is employed for packet priority. Hence, the first coming packet is forwarded to the proper output port, while collision is resolved for the rest.
2.3.1. Deflection routing strategy The deflection routing strategy consists of sending packets that are contending for the same output port to different output ports. The developed deflection routing unit has 2 output ports 𝐶1 and 𝐷1 which correspond to the output port and the resolution port, respectively. Since FIFO is the priority’s technique, so, if two packets intend to go through the same output port (port 𝐶1 ), the first arriving packet is then forwarded to 𝐶1 whereas the second incoming packet is routed to 𝐷1 . In this context, two stages must be considered. First, giving the second incoming packet, the AND gate (AND6 or AND7 respectively) transmit a logical signal to reset the active flip-flop (flip-flop2 or flipflop1 respectively) and to set a second flip-flop (flip-flop4 or flip-flop3 respectively). Afterward, an extra SOA-MZI switch (SOA-MZI4 or SOAMZI3 respectively) is linked with this further flip-flop to deflect the contending packet to the resolution port (𝐷1 ).
2.1. Packet forwarding The optical packet reaches first the router’s input port (See Fig. 1(b)). Asynchronous variable length packet can be forwarded through this architecture. Consequently, and as shown in Fig. 1(a), set and reset pulses are required to indicate the beginning and the end of the packet frame, respectively. To simplify the set/reset pulses extraction, a guard time is utilized between the signaling parts and the payload part. As presented in Fig. 1(b), the extracted set/reset pulses are launched into the flip-flop unit while the payload passes to the SOA-MZI switch. An input packet with corresponding set/reset pulses will generate an ON/OFF state at the flip-flop output with duration of the payload data. The optical flip-flop output response serves as control signal for the SOAMZI switch. Thus, the packet inserted into the input port with matched set/reset pulses will be routed to the intended output port, while others are rejected. The illustrated optical packet forwarding unit does not deal with collision issue. In fact, it is implemented with a single input and output port. But actually, a router consists of M different input ports. So, two or more packets, arriving from various input ports can contend for only one output port. The incoming packets are then lost. To lift this problem, a contention detection unit as well as a contention resolution unit, are added.
2.3.2. Wavelength conversion strategy When two packets contend for the same destination output port, the second arriving will be converted to another free wavelength. Subsequently, it can still be transmitted to the same output (port 𝐶2 ). This is so-called wavelength conversion technique. Similarly to the deflecting routing, the first arriving packet is detected and forwarded to port 𝐶2 at its original wavelength (𝜆d ). While an extra flip-flop is activated and linked with the corresponding SOA-MZI switch to redirect the second coming contending packet to the wavelength converter gate. Thus, it is forwarded to the appropriate output port but at a different wavelength (𝜆c ). To ensure that only switched on flip-flop are deactivated, a flip-flop controller block is employed. It is composed of optical AND gates that are connected with the reset pulses and delayed responses of each flipflop.
2.2. Contention detection Fig. 2 illustrates the suggested optical router architecture. This architecture contains different units, namely label processing block, packet forwarding, contention detection, contention resolution, and flip-flop controller. Packet forwarding and label processing units were studied previously in Section 2.1. The contention detection unit is composed of three Optical AND gates (AND5 , AND6 , and AND7 ). An AND logical operation (realized by AND5 gate) of the flip-flop1 and flip-flop2 responses is done to identify collision as soon as it happens. Since FIFO strategy is adopted for packets priority, the first incoming packet has to be defined. Therefore, AND6 and AND7 are linked to flip-flop1 and flip-flop2 ’s delayed response, respectively, and AND5 logical response. If the first received packet is the packet at input1 (input2 respectively), the AND6 (AND7 respectively) will launch a logic pulse to reset flip-flop2 (flip-flop1 respectively) and set flip-flop4 (flip-flop3 respectively). The first arriving packet from input1 will be routed to the right output port through the packet forwarding unit composed of the SOA-MZI1 optical switch (SOA-MZI2 respectively). However, for the second incoming packet, the contention problem must be solved to avoid packet loss.
3. Router scalability Fig. 4 shows a generic form of the proposed router architecture with N input/output ports. It comprises different blocks, namely optical flipflops, SOA-MZI switches, optical splitters and combiners, contention detection, and resolution units. To aid the subsequent discussions, the architecture is divided into three stages. The first stage, stage A is where the input signal ‘‘i’’, is linked to the corresponding flip-flop_i. Optical splitter is used to split the flip-flop output response to N branches bi_j, where j ∈ [1, N]. In case there is no contention or the input packet_i is the first arriving, the bi_i is linked to SOA_i while bi_j, where j ≠ i, is introduced to the contention detection unit C-D-i_j to detect contention between the i and j input ports. The packet payload data is split in two parts Di_1 and Di_2. Di_1 is linked to the SOA_i where Di_2 is introduced to the resolution unit C-R_i. Stage B is dedicated to contention detection. To identify contention between two input ports ‘‘i’’ and ‘‘j’’ a unit called C-D-i_j is employed, where i < 𝑗 ≤ 𝑁. It has as input bi_j (blue color) and bj_i (red color) from input ports ‘‘i’’ and ‘‘j’’ respectively. The contention detection unit is described in Section 2.2. According to the first coming packet, C-D-i_j will output a logical pulse (a_i_j or a_j_i) to reset the flip-flop corresponding to the second incoming packet (flip-flop_i or flip-flop_j) and to set an extra flip-flop (flip-flop_i_2 or flip-flop_j_2 respectively). A power combiner Ai is used to collect all reset pulses a_i_j (black color) and a_i_k (blue color) coming respectively from C-D-i_j where j > 𝑖 and C-D-k_i, where k < 𝑖. In case packet_i is the second packet coming, the Ai pulse will be employed to reset the flip-flop_i and to set flip-flop_i_2 included in the contention resolution unit C-R_i at the Stage C. Afterwards, if the contention resolution is based on deflection routing strategy, then, the contending packet will be routed to an output port different from the appropriate port while if wavelength conversion strategy is employed, the contention resolution unit will route this packet to the requested output port but at a different wavelength. Finally a power combiner 𝑂i is used to assemble all packets arriving from
2.3. Contention resolution Two contention resolution units are proposed. The first unit is based on deflection routing technique (shown in Fig. 3(a)) while the second unit is exploiting wavelength conversion technique (shown in Fig. 3(b)). The contention resolution unit includes 5 input ports and 2 output ports. Port1 and port5 match flip-flop3 and flip-flop4 output windows, respectively, while port2 and port4 correspond to payload flow from input1 and input2 , respectively. Port3 is carrying the first arriving packet either from the router’s input1 or input2 . In the deflection routing unit, two SOA-MZI switches (SOA-MZI3 and SOA-MZI4 ) are used to forward the second coming packet to the resolution port. For the wavelength conversion unit an extra gate (wavelength converter) is exploited to forward the contending packet to the output port, at a different wavelength. 22
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Fig. 1. (a) Packet design. (b) Packet forwarding unit.
Fig. 2. Optical router architecture with contention resolution.
Fig. 3. Contention resolution unit based on: (a) deflection routing strategy and (b) wavelength conversion strategy.
4. Units design
different input ports (OUTPUT_k_i where 𝑘 ∈ [1, 𝑁]) and aiming to go over the output port_i. To resolve contention for an output port_k, different blocks are exploited such as contention detection units (C-D-i_j), contention resolution units (C-R_j) and flip-flop controller (FF_c_j). To implement all C-D∑ i_j; 3 N m=1 (N − m) AND gates are used. For the contention resolution, N flip-flops as well as N SOA-MZI switches are needed. In case of wavelength conversion strategy further N wavelength converters are employed. To forward the first arriving packet from different input ports N SOA-MZI switches and N flip-flops are utilized. For the implementation of flip-flop controller FF_c (described in Section 2.3), a further 2N AND gates are required.
For the proposed router’s implementation, three main gates are exploited, i.e. an optical flip-flop, an optical AND and an optical wavelength converter. As described in Fig. 5, these optical gates are based on the symmetrical integrated SOA-MZI, where each arm includes one single SOA (SOA1 or SOA2 ). 4.1. Optical flip-flop The optical flip-flop exploiting the symmetrical SOA-MZI scheme is shown in Fig. 6. Two control pulses, namely set and reset are injected correspondingly into port3 and port1 . The flip-flop’s active state is assured by the phase shift between the two MZI’s branches. 23
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Fig. 4. N×N router architecture. (For interpretation of the references to color in this figure legend, the reader is referred to the web version of this article.)
and reduces its optical gain. The phase shifts between the two MZI arms are balanced again, and no optical power can be obtained at the output port. Consequently, the flip-flop is switched off.
4.2. Optical AND gate The described gate in Fig. 7 is used as AND logical gate as well as SOA-MZI switch. Two data traffic are introduced. The input logical signal A enters Port 5 and splits into two identical copies traveling in each arm of the interferometer and arrives at both SOA. Whereas the input logic signals B is injected at Port 1. It is then coupled into one arm of the interferometer so, it reaches only SOA1 . Signal A is acting as the probe signal whereas signal B is functioning as the control signal. If the control signal B is ZERO, the SOA-MZI is balanced and no signal emerges from Port 2. In contrast, if B is ONE, it induces a change in the phase of the signal pulse in its corresponding arm through cross-phase in that SOA. The signal pulse in the opposite arm sees no effect. Hence, a differential phase-shift is introduced to the probe signals in both arms and a logical pulse is seen at Port 2. Consequently, signal C at Port 2 is actually the result of Boolean calculation A⋅B.
Fig. 5. Schematic of a symmetrical integrated SOA-MZI.
When the set pulse is injected into port3 , it reaches only SOA2 . Consequently, it causes unbalanced phase shifts between the two MZI arms. At that time the flip-flop gate will launch a logical pulse at its output port, and is switched on. To maintain this state, a continued stream of power must be preserved in the SOA2 . Therefore, a feedback loop is used to send back a part of the output signal to SOA2 . Once the reset pulse is introduced to port1 of the flip-flop unit, it reaches SOA1 24
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Fig. 6. Optical flip-flop.
Fig. 7. Optical AND gate.
Fig. 8. Wavelength converter.
get the 100 Gbps OTDM signal. The optical pulse train is coupled into four optical branches. In each branch, a modulator (MOD) is driven by either 10 or 25 Gbps optical return to zero (RZ) data signals. The modulation format is ON–OFF Keying (OOK). Each transmitted bit of the RZ pulses is delayed at a particular time period and is then multiplexed and converted into a higher bit rate, i.e. 40 Gbps and 100 Gbps [17,18]. Two asynchronous variable length data packet flows are introduced from input1 and input2 in order to reach the output port 𝐷 (see Fig. 10(a), (b) respectively). Each flow is composed of three consecutive packets with matched set and reset pulses. The payload data from input1 and input2 are shown in Fig. 10(c), (d), respectively. The first injected packet at input1 (𝐹1.1 ), starts being forwarded to the output port 𝐷1 (see Fig. 11(a)). After a while, a packet is injected at input port2 (𝐹2.1 ). At that time, a collision occurs. Two contention resolution strategies are investigated separately to deal with this issue. The first is the deflection routing strategy. Therefore, the second arriving packet (𝐹2.1 ) (the packet at input2 ) is deflected to the resolution port 𝐶1 (see Fig. 11(b)). Similarly, Packet 3 (𝐹2.3 ) at input2 is arriving before packet 3 (𝐹1.3 ) of input1 , hence, the second incoming packet is deflected to the resolution port while the first one is forwarded to the input port. The second introduced packet at input1 (𝐹1.2 ) and input2
4.3. Wavelength converter For the wavelength conversion and as illustrated in Fig. 8, a continuous wave (CW) at the wavelength 𝜆c is introduced into the SOA-MZI scheme at port4 while the input data flow at 𝜆d is launched at port1 . The phase shift at the MZI’s arms can be controlled via the optical input power at port1 . In fact, when an input signal at the wavelength 𝜆d , is directed to the SOA1 , the SOA’s carrier density is altered. Consequently, the phase, and thereby the output power at port2 , are changed. Hence, a signal identical to the input signal at the CW’s wavelength (𝜆c ) is obtained. Wavelength conversion is then achieved. 5. Results and discussion To study the suggested router architecture with contention resolution unit, Optiwave simulations are used. In order to get higher bit rates, optical time division multiplexed (OTDM) is exploited. Fig. 9 represents the schematic design of the OTDM transmitter. The main used components are the optical pulse generator with wavelength set to 1545 nm and the modulator. To get the 40 Gbps bit rate, a base data rate of 10 Gbps is employed while a base data rate of 25 Gbps is introduced to 25
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Fig. 9. Schematic view of 4*Bit rates OTDM transmitter system.
Fig. 10. (a) Packet flow at input1 (A1). (b) Packet flow at input2 (A2). (c) Payload data from input1 (B1). (d) Payload data from input2 (B2); (A1, A2, B1 and B2 as depicted in Fig. 3).
The contention resolution unit based either on deflection routing strategy or on wavelength conversion strategy, has successfully solved the contention problem, and all incoming packets are then forwarded. Fig. 12 represents the BER of the two proposed contention resolution units. Error-free transmission (BER =10−9 ) at high bit rates up to 100 Gbps is guaranteed for both strategies. But in term of BER and hardware complexity, the deflection routing unit seems to be more appropriate compared to the wavelength conversion unit. In fact, a power penalty of around 1 dB for wavelength converted packet in comparison with deflected packet, is obtained. Besides, deflection routing technique does not require the use of any additional hardware (the wavelength converter). However, it causes the out of order arrivals. In fact, deflected packets can end up by following a longer path to their final destination.
(𝐹2.2 ) are forwarded to the output port since there is no contention (see Fig. 11(a)). For the unit using the wavelength conversion strategy, the second incoming packet (𝐹2.1 ) at 𝜆d = 1545 nm is directed to the contention resolution unit. Then, it is forwarded to the output port at 𝜆c = 1555 nm. Consequently, the two packets (𝐹1.1 and 𝐹2.1 ) are forwarded to the same output port, but at different wavelengths. Similarly, for 𝐹1.3 and 𝐹2.3 , the contending packets are going through the output port at 𝜆d = 1555 nm and 𝜆c = 1545 nm, respectively. While for 𝐹1.2 and 𝐹2.2 there is no contention, the packets are then forwarded to the output port at the original data‘s wavelength 𝜆d . The spectrum of the contending forwarded packets at the output port is described in Fig. 11(c). Clear eye diagrams are obtained for both contention resolution strategies (see Fig. 11(d)). 26
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Fig. 11. (a) Data packet at output port 𝐷1 of the router based on deflection routing strategy. (b) Data packet at resolution port 𝐶1 of the router based on deflection routing strategy. (c) Output data spectrum at output port 𝐷2 of the router based on wavelength conversion. (d) Eye diagram of the contending packets.
Fig. 12. BER curves of router architecture with deflection strategy, and router architecture with wavelength conversion strategy at 10 Gbps, 40 Gbps, and 100 Gbps.
6. Conclusion
on SOA-MZI, which makes the solution very promising in terms of stability, compactness, and power consumption. Optiwave simulations are utilized to evaluate the performances of the router. FIFO technique is chosen for packets’ priority. The proposed architecture can handle optical time division multiplexed (OTDM) packets up to 100 Gbps. For forwarding operation and contention resolution, optical flip-flop and
In this paper, we propose an optical router architecture capable of detecting and resolving contention. Two separate contention resolution units using different strategies, namely the deflection routing and the wavelength conversion, are investigated. The optical router relies 27
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optical AND gates responses are exploited to operate with asynchronous variable length packets. The scalability of the proposed router is studied and a 𝑁 × 𝑁 generic architecture is demonstrated. Error-free transmission for bit rates up to 100 Gbps, and clear eye diagrams are obtained for both contention resolution strategies. Deflection routing is proved to be the appropriate approach. In fact, it offers better BER performances in comparison with wavelength conversion. Besides, it does not need extra hardware components (wavelength converter, ODL, etc.). Nevertheless, it may cause instability due to out of order arrivals.
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Acknowledgment This research did not receive any specific grant from funding agencies in the public, commercial, or not-for-profit sectors. References [1] H. Brahmi, et al., On the fly all-optical packet switching based on hybrid WDM/OCDMA labelling scheme, Opt.Commun. 312 (2014) 175–184. [2] L. Wang, et al., All-optical flip-flop based on SOA and MZI switch, in: PIERS, Shanghai, China, 2016, pp. 8–11. [3] T. Kamidai, et al., Proposal of optical flip-flop operation between two phase states with a single SOA and a feedback loop, PS, Florence, Italy, 2015, pp. 223-225. [4] R. Farhat, A. Farhat, M. Menif, Comparison of all optical forwarding packet architectures, Proc. SPIE 9894 (2016). [5] L. Xu, et al., A hybrid optical packet and wavelength selective switching platform for high-performance data center networks, Opt. Express 19 (24) (2011) 24258–24267.
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