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Planning scheduling strategies to suppress the magnitudes of fault currents
Electrical Power and Energy Systems 61 (2014) 474–481
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Electrical Power and Energy Systems journal homepage: www.elsevier.com/locate/ijepes
Planning scheduling strategies to suppress the magnitudes of fault currents Ming-Tse Kuo a, Hao-Ting Wei a,b,⇑ a b
Department of Electrical Engineering, National Taiwan University of Science and Technology, 43, Sec. 3, Keelung Road, Taipei 106, Taiwan, ROC Department of System Operation, Taiwan Power Company, No. 242, Sec. 3, Roosevelt Rd., Taipei City 100, Taiwan, ROC
a r t i c l e
i n f o
Article history: Received 25 May 2013 Received in revised form 10 March 2014 Accepted 5 April 2014
Keywords: Circuit breaker Fault current Interrupting capability Power system dispatch Scheduling strategy Short circuit current
a b s t r a c t With traditional circuit breakers, the interrupter capacity margin is insufficient. To increase interrupting capacity, the circuit breaker can be upgraded or a device can be installed to suppress the fault current, thereby correcting the small fault current margin. In this paper, the power dispatch method is used to suppress the fault current. Simulations are performed and summarized to show the best scheduling policy for increasing the breaker capacity margin to allow for safe operation of the system. Scheduling policies take advantage of existing equipment, so there is no need for any additional purchases for the system. The proposed method will be able to significantly reduce the fault current directly and effectively compared to traditional practices. Ó 2014 Elsevier Ltd. All rights reserved.
Introduction The origin of this study is that you need to install additional FCL or replace CB with higher breaking capacity when the system planners found the fault current of a substation is too high. Because of the procurement of equipment and installation of equipment, you will be needed for buffer period about several months. This substation will bear the risk of CB which cannot interrupt the fault current when a ground fault occurs during buffer period. Therefore, the most effective method is to use planning scheduling strategies to suppress the magnitudes of fault currents in order to solve the risk of the high fault currents during this buffer period. Power load demands are rising as the worldwide population increases. Consequently, the demand for generators, the source of fault currents, is also increasing. The continuous expansion of the grid infrastructure contributes to increased system reliability, leading to a lower impedance of the overall system. Consequently, in some areas, the value of the fault current has surpassed the interrupting capacity of the circuit breakers (CB). In the event of a fault, a circuit breaker is needed to separate the fault. Therefore, sufficient interrupting capacity of the circuit breaker is necessary for safe system ⇑ Corresponding author at: Department of System Operation, Taiwan Power Company, No. 242, Sec. 3, Roosevelt Rd., Taipei City 100, Taiwan, ROC. Tel.: +886 223666630. E-mail addresses: [email protected] (M.-T. Kuo), u160895@taipower. com.tw (H.-T. Wei). http://dx.doi.org/10.1016/j.ijepes.2014.04.006 0142-0615/Ó 2014 Elsevier Ltd. All rights reserved.
operation. When reviewing the system shock, the fault current should be reviewed first. Subsequent power flow analyses and a stability review should then be carried out. The following are common solutions to excessive fault current issues: (1) Upgrade the system by replacing circuit breakers with insufficient interrupting capacity. This is a straightforward monetary solution. (2) Use superconductor circuit breakers to suppress the fault current. With the advancement of power electronics technology in recent years, more electric utilities are employing this approach. The advantage of this solution is that it the power branch does not need to be cut off to isolate the fault current. However, the disadvantage is that there will be extra losses from the added equipment costs and construction time [1–9]. (3) Use power electronic switching components to suppress the current [10,11]. (4) Use a cascading impedance or high impedance transformer to suppress the fault current. The drawback of this approach is additional cost and increased power loss [12–14]. (5) Use a non-superconductor fault current limiter [15]. The commonality among the described methods is the additional costs to purchase equipment for fault current suppression. As purchasing and equipment replacement both take time, it is
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475
Nomenclature API AG CB CHP FCL IEC
Application program interface Asynchronous generator Circuit breaker Combined heat and power Fault current limiter International Electrotechnical Commission
PSS/E Power System Simulator for Engineering SC Short circuit SG Synchronous generator SCIG squirrel cage induction generator Taipower Taiwan Power Company WRIG wound rotor induction generator
unlikely to scheduling strategies to suppress the fault current immediately. This study uses breaking power branches, or scheduling-based generator allocation, to isolate fault currents. It can even work in coordination with a main breaking transformer to increase the system impedance, thereby inhibiting the fault current. This method does not cause device overloads and increases the interruption margin of the breaker circuit at the expense of grid reliability. This paper simulates the optimal breaking branches and scheduling generator sets using the Power System Simulator for Engineering (PSS/E) [16] with Python application program interface (API). Currently, this approach is applied in the planning of operation for Taiwan’s next-month grid. Through software simulations, it is not difficult to determine which cables to break to isolate the source of the fault current and increase the system impedance as seen from the fault location.
The solution of the differential equation is:
Introduction to fault current calculation The primary purpose of fault current inspection is to determine whether the circuit breakers are powerful enough to break the fault current, isolate faults and prevent further damage to the equipment. Common failures in power systems include [17]:
! Emax xL Emax R þ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi i ¼ eLt pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi sin / tan1 2 2 2 R 2 R þx L R þ x2 L2 xt sin xt þ / tan1 R
ð2Þ
The first term of the expression represents the decaying DCcomponent and the second term is the stationary current. The DC-component is dependent on the moment the fault occurs with respect to the voltage. The DC component appears when the value of the voltage is not 0 at the moment of the sc. In a case of a 3ph sc, there will always be a DC component, in at least two phases. The damping of the DC-component is determined by the R/L ratio. The effective value of total (asymmetric) fault current consists of two components: a symmetrical AC component and a DC component that causes asymmetric phenomena, as shown in Fig. 2. The effective value of the total fault current equals the square root of the sum of the squares of the effective value of the AC component and the square of the effective value of the DC component, as shown in formula (3):
ffi qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi t 2 ðIac Þ2 þ ðIdc Þ2 ¼ ðIsy Þ2 þ ð 2Isy e s Þ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi t 2 D ¼ Isy 1 þ ð 2e s Þ ¼ DIsy
Iasy ¼ Symmetric faults (1) Three-phase short-circuit fault (positive sequence network) Asymmetric faults (2) Single-phase ground fault (positive, negative, and zero sequence network in series) (3) Phase fault (positive and negative sequence network in parallel) (4) Two-phase short-circuit ground fault (positive, negative, and zero sequence network in parallel) Although the current of a single-phase ground fault may be greater than that of a three-phase short circuit fault [18,19], there is a higher probability of three-phase short-circuit faults because, after maintenance, the restoration of the isolated ground switches is often forgotten due to human error. Therefore, the primary objective is to address three-phase short-circuit faults.
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi 2 where D ¼ 1 þ ð 2et=s Þ is called a DC effect multiplier.
Fig. 1. A Thevenin equivalent circuit in a short-circuit fault.
Calculation of three-phase short-circuit fault current In the event of a short-circuit (sc) fault in the power system, according to Thevenin’s theorem, the system can be simplified to an AC power supply in series with a resistor (R) and an inductor (L), as shown in Fig. 1. This network after fault occurrence at t = 0 can be described with the following differential equation:
L
di þ R i ¼ Emax sinðxt þ /Þ dt
ð1Þ
Fig. 2. Waveform of a short-circuit fault.
ð3Þ
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According to the current specification of circuit breakers of the Taiwan Power Company (Taipower), the rated breaking current for the circuit breakers is the value of the symmetrical fault current, and the multiplier of the asymmetric capacity must comply with the regulations of ANSI IEEE Std. C37.010-1999 [20,21]. When verifying the breaking capacity of circuit breakers, the symmetrical short-circuit current value should be calculated first. The resultant value, Isy, is then multiplied by the multiplying factor K to obtain the asymmetric short-circuit fault current, which can be used to verify the asymmetric breaking capacity of the circuit breakers. The multiplying factor K equals the DC effect multiplier D divided by the asymmetric capacity multiplier S. The formula for K in a 60 Hz system is as follows:
D K¼ ¼ S
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi t 2 qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi 377t 2 1 þ ð 2e s Þ 1 þ ð 2e X=R Þ ¼ S S
ð4Þ
The multiplying factor K can also be determined from Fig. 3. Through observation, we discovered that if the contact parting time of the circuit breaker is 4 cycles and the value of the X/R ratio is greater than 25, there will be a multiplying factor K. All simulation cases in this paper assume that the contact parting time is 4 cycles and that the asymmetric capability multiplier S = 1.1. Considering that power companies give top priority to the safety of their personnel and equipment, this study also takes the effective value of the total (asymmetrical) fault current into account. Such practices may seem conservative from the perspective of the system, but it gives the highest priority to safety considerations. Synchronous generator (SG) Synchronous generators are mainly used in combined heat and power(CHP) plants as well as small hydro stations. Due to their separated excitation system they can supply a sustained sc current. The literature provides an analytical solution to estimate the sc contribution of the synchronous generator. According to [22] when a 3ph bolted fault occurs the value of the current is:
i¼
rffiffiffi t t 2 1 1 1 1 1 T 00 T0 d þ ð d þ exp sinðxt þ /Þ Un Þexp 3 Xd X 00d X 0d X 0d X d rffiffiffi t 2 Un sinð/ÞexpT a ð5Þ 3 X 00d
Fig. 3. Three-phase fault multiplying factors including effects of AC and DC decrement.
Fig. 4. IEC SG equivalent for SG and AG.
where X 00d is the subtransient reactance, X 0d is the transient reactance, T 00d is the subtransient time constant, T 0d is the transient time constant, Ta is the aperiodic time constant, uis the phase angle of the stator voltage when the sc occurs. The dc component which depends on the time the fault occurs is given by the last term. In International Electrotechnical Commission(IEC), the generator is modeled as a voltage source behind the equivalent impedance which includes the subtransient reactance of the machine and a resistance (Fig. 4) which is not equal to the stator resistance but it is much bigger. The value of this resistance depends on the rating of the generator. It is used to calculate the peak current and takes into account the decay of the AC and DC component during the first half cycle [23]. Because instead of the subtransient voltage an equivalent voltage source is used, the impedance is corrected with a KG factor which can be calculated according to [23]. Asynchronous generator (AG) These generators are mainly used in wind farms as well as in small hydro stations. There are two types of AG, the squirrel cage induction generator (SCIG) and the wound rotor induction generator (WRIG). WRIG provides the capability to control the electrical characteristics of the machine. The main difference between AG and SG in sc behavior is that AG receives the excitation from the network, therefore in case of a 3ph fault this network excitation is lost completely. Due to constant flux theorem, AG is still able to feed a fault current for certain period of time. It contributes mainly to the peak current. However there is almost no contribution to the thermal sc current. Moreover the peak current of AG is lower than that of the SG for the same rating (Fig. 5). In sc studies, AG which are directly coupled (SCIG), are treated as big motor loads. Since the sc is supplied only during the
Fig. 5. Sc current during a 3ph bolted fault in AG/SG.
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subtransient period (after that the remaining magnetic field is lost), the dynamics of the mechanical part of generator (rotor acceleration) has nearly no influence on its an appropriate representation. Models for sc analysis can be found on [19] where it can be derived from the equivalent circuit that the sc current is:
i¼
pffiffiffi t00 t00 2U n T T s sinð/Þ ð1 rÞ sinðx t þ /Þexp r exp s X 00s
ð6Þ
where X 00s is the subtransient reactance, T 00s is the subtransient stator time constant, / is the phase angle of stator voltage when the sc occurs, r: total leakage coefficient, xs is the synchronous angular speed, T 00r is the subtransient rotor time constant. In IEC standards the locked rotor impedance behind a voltage source is used to model the machine (Fig. 4). The locked rotor impedance is acquired through the locked rotor test. The R/X ratio is depending on the size of the machine and a good approximation (if the value is not known) can be found on [23]. Methods for reducing the magnitude of fault currents using existing equipment Method I: Generator allocation through scheduling. The primary purpose of allocating generators through scheduling is to isolate the source of a fault current with breaking units. The advantage of this method is that no additional equipment is needed to suppress fault currents; its drawback is that substitution of generators may lead to high costs for power generation. Assuming that the Line X impedances of all cables in Fig. 6 are 0.05 per unit (Pu), all X sources of the generator set are 0.2 Pu, and the terminal voltage of the fault bus Bus1 is 1.0 Pu. The equivalent per unit impedance as seen from the fault terminal is shown in Fig. 7. The equivalent per unit impedance last seen from the fault location Bus1 is Zth = j0.25//j0.3 = j0.1363. The fault current prior to the scheduling allocation of generators is I = 1/j0.1363 = j7.33 Pu. To prevent system tripping, power companies use redundant generator sets as reserve operation for automatic generation control (AGC) [24–27]. If all of the 200 MW power is generated by Gen1 while Gen2 is dismissed, then Gen2 cannot supply the source of a fault current, as depicted in Fig. 8.
Gen_1
The equivalent impedance from the perspective of the fault end is shown in Fig. 9. The equivalent impedance as seen from fault location Bus1 is Zth = j0.2 + j0.05 = j0.25. Consequently, the fault current after the generator allocation through scheduling I = 1/ j0.25 = j4 Pu. The fault current was j7.33 Pu prior to the generator allocation through scheduling, and it was j4 Pu after the generator allocation. Through observation of the graphs of per unit impedance before and after generator allocation through scheduling, we may conclude that if there is a way to dispatch generators in the vicinity of the area with insufficient breaker margin, the fault current sources can be effectively reduced. For Taipower, scheduling is based on an algorithm that gives top priority to the safety of personnel, equipment, and system operations, while economic considerations are secondary. The flowchart of planning for Method I is presented in Fig. 10. Method II: Breaking the circuit to isolate the fault current. To improve system reliability, Taipower often plans for normal operation of its power system without overload, even when N-1 accidents occur. However, a grid network that is too sound may result in decreased system impedance, which leads to an incremental fault current. When the margin of the circuit breakers is insufficient, the breaking of existing power branches may be initialized to isolate the source of the fault current and increase the system impedance as seen from the fault end. The advantage of this method is that it makes use of existing CBs to isolate fault currents; its drawback is that the use rate of the power line equipment is decreased. Fig. 11 shows the system diagram in its original form, without breaking any cables. Fig. 12 depicts the equivalent per unit impedance from the perspective of the fault end. Assuming that the Line X impedances of all cables are 0.05 Pu, all X Sources of the generator set are 0.2 Pu, and that the terminal voltage of the fault bus Bus1 is 1.0 Pu, then the equivalent per unit impedance from the perspective of the fault end is Zth = (j0.2 + j0.05)//[(j0.05//
Gen_1 P = 200MW
Gen_2
P = 100MW
Cable_1
P = 100MW
Fault
Cable_2
Cable_1 Fault
Bus_1
150MW
150MW
Bus_2
Cable_3
Bus_1
Bus_2
Cable_3
50MW
Fig. 8. Diagram of generator allocation through scheduling.
50MW
Fig. 6. Diagram of a simple dual-bus with three cables.
j0.2 j0.2
j0.2
j0.05
j0.05
Fault
Bus_1
j0.05
Bus_2
Fault Bus_1
j0.05 Fig. 7. Diagram of the per unit impedance of Fig. 6.
Fig. 9. Diagram of the per unit impedance of Fig. 8.
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Gen1
Start
100MW
Identify the bus that needs to reduce the fault current.
Fault
Bus1
j0.2
100MW
Cable2
Cable1 Bus1
Bus2 50MW
Cable3 Cable4
Fig. 11. Diagram of a simple dual-bus with four cables.
j0.2
j0.2
j0.05
j0.05 Bus 1
Bus 1
Bus 2 j0.05
Fig. 14. Diagram of the per unit impedance of Fig. 13.
Gen2
100MW
j0.05
j0.05 Fault
Gen1
50MW
Fig. 13. Diagram of the system after breaking Cable 4.
j0.2
End
Bus2
Cable3
Output the data of the original and alternative units.
Fig. 10. Flowchart for optimal generator allocation through scheduling.
150MW
Cable2
150MW No
Find an alternative unit preferred to the low cost of power generation.
Fault
100MW
Cable1 Line flows overloaded and stability Yes problems?
Locate the generator that is nearest to the bus that needs to reduce the fault current.
Fault
Gen2
Bus 2
j0.05 j0.05 Fig. 12. Diagram of the per unit impedance of Fig. 10.
j0.05) + (j0.2 + j0.05)] = j0.13095. The fault current prior to the allocation of generator through scheduling is I = 1/j0.13095 = j7.636 Pu. Assuming that the system is not overloaded, we break Cable 4, as depicted in Fig. 13.
The diagram of its equivalent per unit impedance is depicted in Fig. 14. The equivalent per unit impedance as seen from the fault end is Zth = (j0.2 + j0.05)//(j0.05 + j0.2 + j0.05) = j0.25//j0.3 = j0.1363. The fault current after breaking Cable 4 is I = 1/ j0.1363 = j7.33 Pu. The fault current was j7.636 Pu prior to the breaking of the cable, and it was j7.33 Pu after breaking the cable. Observation of the graphs of the per unit impedance before and after the breaking of cable leads to a simple conclusion: if there is a way to break the cable without causing a system overload, the equivalent impedance as seen from the fault end can be increased and the fault current effectively reduced. As the example case describes only a simple dual-bus equivalent circuit, the difference in fault current reduction appears insignificant. However, on a larger electric power system, the identification of the optimal cable to break would lead to significant differences in the fault current value before and after breaking the cables. To identify the optimal cable for breaking to reduce the bus fault current, the procedure shown in Fig. 15 was followed. First, all three-phase short-circuit faults of the buses were identified using PSS/E. Then, the fault current of the bus with excessive current and an insufficient margin was identified. Using the Python application program interface (API) of PSS/E [16], all possible breaks in the cables were simulated to find the specific breaking cable that could reduce the fault current. It should be noted that during the simulation, if two cables exist between two buses, these cables should be simultaneously broken. Additionally, note that in Method II, the given example showed that the equivalent impedances from perspective of the fault location before and after breaking the cable can be incremental; it did not consider the situation in which two cables between two buses should be broken simultaneously. This study does not consider single-phase ground fault currents. However, if the positive sequence impedance from perspective of bus R1 is greater than the equivalent zero sequence impedance R0, the single-phase ground fault current will be greater than the three-phase short circuit fault current. Method II is of
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fault current suppression strategies. Additional simulations of the system’s transient and voltage stability must be carried out by all three methods introduced above to ensure stable system operation with minimal risk.
Start Line flows overloaded or Yes the occurrence of the island?
Identify the bus that needs to reduce the fault current.
Simulation results The simulation software used in this study is PSS/E. The built-in Python API was also employed for programming and simulation. An existing file that is easily accessible from the example directory of PSS/E version 32, IEEE-25 Bus.sav, was used as the original simulation file. Because the IEEE-25 Bus included in the PSS/E application contains the transformer overload related data, we made some minor adjustments to transformer ratings. Revision details are included in Appendix A.
No Identify and calculate the fault current after all lines are interrupted.
Lower the fault current?
No
Output the lines that can effectively reduce the fault current after the lines are interrupted.
Yes
End
Fig. 15. Flowchart for deciding the optimal cable for breaking.
little help in solving an excessive single-phase ground fault current problem; reduction of the transformers’ ground should be considered instead. That is, however, beyond the scope of this study. Once the cable that can effectively reduce the fault current is identified, before breaking the cable, it should be ensured that no other cables or equipment will be overloaded due to the breaking. Method III: A combination of the methods I and II. If methods I and II fail to identify which cable to break to reduce the fault current significantly, or the generator set available for scheduling allocation, or if the protection margin needs to be increased in some areas, then Method III, which combines the breaking of cables and allocation of generators through scheduling, can be used to reduce fault currents. This study seeks to avoid additional equipment purchases. However, if all of the three methods fail to find a solution to effectively reduce the fault currents, equipment capable of this should be procured immediately to protect equipment and personnel. Table 1 compares the advantages and disadvantages of various
(1) The simulation of Method I was performed to find the optimal alternative generator set. After simulating the breaking of all possible generator sets using an exhaustion-based algorithm, generator set 230 (ID = 1) was identified as the optimal generator to reduce the sources of the fault current. Generator set 180 (ID = 1) was selected to supplement power generation. Fig. 16 depicts the diagram of the simulated system of IEEE-25 Bus. A comparison of the fault currents before and after breaking is provided in Table 2. It can be seen that the original, asymmetric fault current of Bus 230, 26402 A, was reduced to 22855 A after substituting generator set 230 (ID = 1) with generator set 180 (ID = 1). Scheduling led to a total reduction of 3457 A. If you would like to reach the same effect of Method I, you need to install the additional 500 ohms reactance of FCL between cable 200 (ID1) and 230 (ID2). The result is the fault current can be suppressed to 23189 A in Bus 230. (2) The simulation of Method II was intended to find the optimal cable to break to isolate the source of the fault currents and increase the equivalent impedance as seen from the fault bus. After exhaustively simulating the breaking of cables, cables 190 and 200 were identified as giving the largest fault current reduction without overloading other cables or equipment. The fault currents before and after the breaks are compared in Table 3. It can be seen that the original asymmetric fault current of Bus 230 was 26402 A and was reduced to 24977 A after breaking Cable 190 and Cable 200; a total reduction of 1425 A. If you would like to reach
Table 1 Comparison of advantages and disadvantages of various fault current suppression strategies. Fault current suppression strategies
Advantages
Disadvantages
Relative costs
Literature studies
Cascading impedance or a high impedance transformers to suppress the fault current Power electronic switching components to suppress the current Superconductor fault current limiter
Easy installation
Reduced network power quality due to the increased source impedance and system losses Fast switching of power electronic components generates additional harmonic problems High maintenance costs to maintain a low temperature for the superconductors Replacements require blackouts
Medium – low
[12–14]
Medium
[10,11]
Medium
[1–9]
Expensive – (depending on the number of circuit breakers replaced)
Reduces system reliability
Expensive – (new installation of bus-sectionalizing circuit breakers) Free – the use of existing equipment to plan scheduling policies can suppress the fault current
Traditional method to direct replacement of CB [28,29]
Upgrade the system by replacing the circuit breaker
Bus-sectionalizing circuit breakers Power dispatch method (the proposed study)
Easy installation
Zero resistance/impedance at normal operation and an ability to withstand repetitive operation Solves the problem thoroughly
Segregates the source of the fault current No need for additional equipment purchases (no need for blackouts for replacements)
Sacrifices operation reliability
The proposed study
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M.-T. Kuo, H.-T. Wei / Electrical Power and Energy Systems 61 (2014) 474–481 Table 3 The proposed second method Iasy. Bus number
Isy
X/R
K
Install 100 X FCL
Iasy
The proposed method II Iasy
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22053 11486 18411 21117 14164 17071 12482 15367 17557 11280 24909 5894 9594
13.2 13.4 6.0 4.5 4.7 4.9 19.2 5.3 7.9 8.0 9.0 8.7 25.0 15.1 15.1 15.9 12.5 18.4 10.1 12.1 17.0 23.1 29.3 6.8 12.5
1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.02 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.01 1.06 1.00 1.00
17194 16942 9166 5747 7110 6600 11299 7814 19275 18995 13323 12640 21006 11480 18406 21091 14160 17068 12383 14991 17555 11393 24925 5894 9594
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22566 11486 18411 21117 14164 17071 12482 15367 17557 11358 26402 5894 9594
17198 16947 9120 5750 7114 6607 11300 7818 19355 19075 13413 12689 22578 11370 17305 17458 13480 16551 6668 11122 17060 11377 24977 5843 9340
Fig. 16. IEEE-25 bus. Table 4 The proposed third method Iasy.
Table 2 The proposed first method Iasy. Bus number
Isy
X/R
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22053 11486 18411 21117 14164 17071 12482 15367 17557 11280 24909 5894 9594
13.2 13.4 6.0 4.5 4.7 4.9 19.2 5.3 7.9 8.0 9.0 8.7 25.0 15.1 15.1 15.9 12.5 18.4 10.1 12.1 17.0 23.1 29.3 6.8 12.5
K 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.02 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.01 1.06 1.00 1.00
Install 500 X FCLs
Iasy
The proposed method I Iasy
17198 16947 9126 5751 7114 6607 11300 7818 19355 19075 13413 12691 22456 11387 17458 17905 13575 16625 7146 4856 17131 11338 23189 5851 9376
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22566 11486 18411 21117 14164 17071 12482 15367 17557 11358 26402 5894 9594
17194 16943 9161 5748 7111 6602 11299 7815 19297 19021 13374 12639 22542 11471 18375 21000 14144 17056 12240 14564 17542 11359 22855 5890 9580
the same effect of Method II, you need to install the additional 100 ohms reactance of FCL between cable 130 and 230. The result is the fault current can be suppressed to 24925 A in Bus 230. (3) The simulation of Method III was a combination of Methods I and II, i.e., it breaks the generator sets and cables simultaneously. Generator set 230 (ID = 1) was broken, and the power generation was supplemented by generator set 180 (ID = 1) for compensation. The fault currents before and after breaking cables 190 and 200 are listed in Table 4. It can be
Bus number
Isy
X/R
K
Install 100 X &500 X FCLs
Iasy
The proposed method III Iasy
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22053 11486 18411 21117 14164 17071 12482 15367 17557 11280 24909 5894 9594
13.2 13.4 6.0 4.5 4.7 4.9 19.2 5.3 7.9 8.0 9.0 8.7 25.0 15.1 15.1 15.9 12.5 18.4 10.1 12.1 17.0 23.1 29.3 6.8 12.5
1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.02 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.01 1.06 1.00 1.00
17193 16941 9124 5747 7110 6600 11299 7814 19275 18995 13320 12633 21002 11375 17457 17905 13575 16625 7146 4857 17131 11338 21679 5850 9372
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22566 11486 18411 21117 14164 17071 12482 15367 17557 11358 26402 5894 9594
17194 16943 9117 5748 7111 6602 11299 7815 19295 19015 13374 12615 22558 11365 17304 17457 13480 16551 6667 10326 17060 11377 21075 5842 9338
seen that the original asymmetric fault current of Bus 230 was 26402 A was reduced to 21075 A after breaking the cables for a total reduction of 5327 A. If you would like to reach the same effect of Method III, you need to install the additional 100 ohms reactance of FCL between cable 130 and 230 and install the additional 500 ohms reactance of FCL between cable 200 (ID1) and 230 (ID2). The result is the fault current can be suppressed to 21679 A in Bus 230. The size and location of FCL in this paper is not optimal. We only use scheduling method to simulate the fault current and how many reactance of the FCL can be replaced. The optimal size and location of FCL can been seen in Ref. [30].
M.-T. Kuo, H.-T. Wei / Electrical Power and Energy Systems 61 (2014) 474–481
Conclusion The main purpose of a fault current review is to determine whether the circuit breakers are capable of breaking the fault currents to isolate faults and rapidly clear the aftermath from accidents to avoid equipment damage. This paper presents a set of strategies to control the magnitude of fault currents using existing circuit breakers (CB) equipment and allocation of generators through scheduling. From the simulation results, it is clear that the methods presented in the paper can all effectively reduce fault currents. Method I is primarily intended to isolate the source of fault currents by breaking power system units. Method II primarily uses breaking power system branches to isolate fault currents. Method III uses a combination of the first two methods to reduce more fault currents and to improve the margin of safety during operation. The simulation results showed that using scheduling method can suppress fault currents in wide areas and FCL can suppress fault currents in a small area. Actually, Most of FCL can only suppress fault currents in only one bus. Electric power companies could choose the method that is most suitable for the characteristics of its electric grid or the specifications for their respective country. Appendix A 2 Winding Transformer Collect Data From Bus Number
To Bus Number
Rate A (MVA)
Rate B (MVA)
Rate C (MVA)
90 100
120 110
700 700
800 800
900 900
References [1] Lee BW, Sim J, Park KB, Oh IS. Practical application issues of superconducting fault current limiters for electric power systems. Appl Supercond, IEEE Trans 2008;18:620–3. [2] Yamaguchi H, Kataoka T. Current limiting characteristics of transformer type superconducting fault current limiter with shunt impedance and inductive load. Appl Supercond, IEEE Trans 2008;18:668–71. [3] Guk-Hyun M, Young-Min W, Kisung L, Sung-Kwan J. Fault current constrained decentralized optimal power flow incorporating superconducting fault current limiter (SFCL). Appl Supercond, IEEE Trans 2011;21:2157–60. [4] Jen-Hao T, Chan-Nan L. Optimum fault current limiter placement. In: International conference on intelligent systems applications to power systems, 2007, ISAP 2007; 2007. p. 1–6. [5] Babaei E, Kangarlu MF. Sensitive load voltage compensation against voltage sags/swells and harmonics in the grid voltage and limit downstream fault currents using DVR. Electr Power Syst Res 2012;83(2):80–90.
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[6] Branco PJC, Almeida ME, Dente JA. Proposal for an RMS thermoelectric model for a resistive-type superconducting fault current limiter (SFCL). Electr Power Syst Res 2010;80(10):1229–39. [7] Ye L, Campbell AM. Case study of HTS resistive superconducting fault current limiter in electrical distribution systems. Electr Power Syst Res 2007;77(4):534–9. [8] Elmitwally A. Proposed hybrid superconducting fault current limiter for distribution systems. Int J Electr Power Energy Syst 2009;31(11):619–25. [9] Didier G, Lévêque J. Influence of fault type on the optimal location of superconducting fault current limiter in electrical power grid. Int J Electr Power Energy Syst 2014;56(3):279–85. [10] Ok-Bae H, Jungwook S, Hye-Rim K, Kwon-Bae P, Seong-Woo Y, Il-Sung O. Reliability enhancement of the fast switch in a hybrid superconducting fault current limiter by using power electronic switches. Appl Supercond, IEEE Trans 2009;19:1843–6. [11] Weiland M, Schon A, Herold G. Application of a power electronic based fault current limiter (FCL) to reduce arc flash energy in electrical grids with high short-circuit power. In: Proceedings of the 2011-14th European conference on power electronics and applications (EPE 2011); 2011. p. 1–10. [12] Chang CS, Loh PC. Integration of fault current limiters on power systems for voltage quality improvement. Electr Power Syst Res 2001;57:83–92. [13] Baghaee HR, Mirsalim M, Sanjari MJ, Gharehpetian GB. Fault current reduction in distribution systems with distributed generation units by a new dual functional series compensator. 2008;750–757. [14] Zou J, Chen J, Dong E. Study of fast-closing switch based fault current limiter with series compensation. Int J Electr Power Energy Syst 2002;24(11):719–22. [15] Hagh MT, Abapour M. Nonsuperconducting fault current limiter with controlling the magnitudes of fault currents. Power Electron, IEEE Trans 2009;24:613–9. [16] Siemens. Application program interface for PSSE. 32 ed. Siemens Power Technologies International; 2010. [17] Glover JD, Sarma S, Overbye TJ. Power system analysis and design: Cengage. Learning 2011. [18] Shyh-Jier H, Hsing-Ho W. A method to enhance ground-fault computation. Power Syst, IEEE Trans 2010;25:1190–1. [19] Anderson PM. Analysis of faulted power systems. Iowa State University Press; 1973. [20] IEEE application guide for AC high-voltage circuit breakers rated on a symmetrical current basis. IEEE Std C37.010-1999 2000. [21] Dartawan K, Pierre CSt. Evaluating generator breakers short-circuit duty using IEEE Std. C37.010 and C37.013. In: Industrial & Commercial Power Systems Technical Conference (I&CPS), 2012 IEEE/IAS 48th; 2012. p. 1–7. [22] Grainger JJ, Stevenson WD. Power system analysis. McGraw-Hill; 1994. [23] IEC 60909-0 Calculation of currents; July-2001. [24] Yan W, Zhao RF, Zhao X, Wang C, Yu J. Review on control strategies in automatic generation control. Dianli Xitong Baohu yu Kongzhi/Power Syst Prot Control 2013;41:149–55. [25] Jaleeli N, VanSlyck LS, Ewart DN, Fink LH, Hoffmann AG. Understanding automatic generation control. IEEE Trans Power Syst 1992;7:1106–22. [26] Panda S, Yegireddy NK. Automatic generation control of multi-area power system using multi-objective non-dominated sorting genetic algorithm-II. Int J Electr Power Energy Syst 2013;53(12):54–63. [27] Saikia LC, Sahu SK. Automatic generation control of a combined cycle gas turbine plant with classical controllers using firefly algorithm. Int J Electr Power Energy Syst 2013;53(12):27–33. [28] Javadi H. Fault current limiter using a series impedance combined with bus sectionalizing circuit breaker. Int J Electr Power Energy Syst 2011;33(3):731–6. [29] S. Namchoat and N. Hoonchareon, Optimal bus splitting for short-circuit current limitation in metropolitan area. In: 2013 10th International conference on electrical engineering/electronics. Computer, telecommunications and information technology (ECTI-CON); 2013, p. 1–5. [30] Teng JH, Lu CN. Optimum fault current limiter placement with search space reduction technique. Generation, Transm Distrib, IET 2010;4:485–94.
Contents lists available at ScienceDirect
Electrical Power and Energy Systems journal homepage: www.elsevier.com/locate/ijepes
Planning scheduling strategies to suppress the magnitudes of fault currents Ming-Tse Kuo a, Hao-Ting Wei a,b,⇑ a b
Department of Electrical Engineering, National Taiwan University of Science and Technology, 43, Sec. 3, Keelung Road, Taipei 106, Taiwan, ROC Department of System Operation, Taiwan Power Company, No. 242, Sec. 3, Roosevelt Rd., Taipei City 100, Taiwan, ROC
a r t i c l e
i n f o
Article history: Received 25 May 2013 Received in revised form 10 March 2014 Accepted 5 April 2014
Keywords: Circuit breaker Fault current Interrupting capability Power system dispatch Scheduling strategy Short circuit current
a b s t r a c t With traditional circuit breakers, the interrupter capacity margin is insufficient. To increase interrupting capacity, the circuit breaker can be upgraded or a device can be installed to suppress the fault current, thereby correcting the small fault current margin. In this paper, the power dispatch method is used to suppress the fault current. Simulations are performed and summarized to show the best scheduling policy for increasing the breaker capacity margin to allow for safe operation of the system. Scheduling policies take advantage of existing equipment, so there is no need for any additional purchases for the system. The proposed method will be able to significantly reduce the fault current directly and effectively compared to traditional practices. Ó 2014 Elsevier Ltd. All rights reserved.
Introduction The origin of this study is that you need to install additional FCL or replace CB with higher breaking capacity when the system planners found the fault current of a substation is too high. Because of the procurement of equipment and installation of equipment, you will be needed for buffer period about several months. This substation will bear the risk of CB which cannot interrupt the fault current when a ground fault occurs during buffer period. Therefore, the most effective method is to use planning scheduling strategies to suppress the magnitudes of fault currents in order to solve the risk of the high fault currents during this buffer period. Power load demands are rising as the worldwide population increases. Consequently, the demand for generators, the source of fault currents, is also increasing. The continuous expansion of the grid infrastructure contributes to increased system reliability, leading to a lower impedance of the overall system. Consequently, in some areas, the value of the fault current has surpassed the interrupting capacity of the circuit breakers (CB). In the event of a fault, a circuit breaker is needed to separate the fault. Therefore, sufficient interrupting capacity of the circuit breaker is necessary for safe system ⇑ Corresponding author at: Department of System Operation, Taiwan Power Company, No. 242, Sec. 3, Roosevelt Rd., Taipei City 100, Taiwan, ROC. Tel.: +886 223666630. E-mail addresses: [email protected] (M.-T. Kuo), u160895@taipower. com.tw (H.-T. Wei). http://dx.doi.org/10.1016/j.ijepes.2014.04.006 0142-0615/Ó 2014 Elsevier Ltd. All rights reserved.
operation. When reviewing the system shock, the fault current should be reviewed first. Subsequent power flow analyses and a stability review should then be carried out. The following are common solutions to excessive fault current issues: (1) Upgrade the system by replacing circuit breakers with insufficient interrupting capacity. This is a straightforward monetary solution. (2) Use superconductor circuit breakers to suppress the fault current. With the advancement of power electronics technology in recent years, more electric utilities are employing this approach. The advantage of this solution is that it the power branch does not need to be cut off to isolate the fault current. However, the disadvantage is that there will be extra losses from the added equipment costs and construction time [1–9]. (3) Use power electronic switching components to suppress the current [10,11]. (4) Use a cascading impedance or high impedance transformer to suppress the fault current. The drawback of this approach is additional cost and increased power loss [12–14]. (5) Use a non-superconductor fault current limiter [15]. The commonality among the described methods is the additional costs to purchase equipment for fault current suppression. As purchasing and equipment replacement both take time, it is
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Nomenclature API AG CB CHP FCL IEC
Application program interface Asynchronous generator Circuit breaker Combined heat and power Fault current limiter International Electrotechnical Commission
PSS/E Power System Simulator for Engineering SC Short circuit SG Synchronous generator SCIG squirrel cage induction generator Taipower Taiwan Power Company WRIG wound rotor induction generator
unlikely to scheduling strategies to suppress the fault current immediately. This study uses breaking power branches, or scheduling-based generator allocation, to isolate fault currents. It can even work in coordination with a main breaking transformer to increase the system impedance, thereby inhibiting the fault current. This method does not cause device overloads and increases the interruption margin of the breaker circuit at the expense of grid reliability. This paper simulates the optimal breaking branches and scheduling generator sets using the Power System Simulator for Engineering (PSS/E) [16] with Python application program interface (API). Currently, this approach is applied in the planning of operation for Taiwan’s next-month grid. Through software simulations, it is not difficult to determine which cables to break to isolate the source of the fault current and increase the system impedance as seen from the fault location.
The solution of the differential equation is:
Introduction to fault current calculation The primary purpose of fault current inspection is to determine whether the circuit breakers are powerful enough to break the fault current, isolate faults and prevent further damage to the equipment. Common failures in power systems include [17]:
! Emax xL Emax R þ pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi i ¼ eLt pffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi sin / tan1 2 2 2 R 2 R þx L R þ x2 L2 xt sin xt þ / tan1 R
ð2Þ
The first term of the expression represents the decaying DCcomponent and the second term is the stationary current. The DC-component is dependent on the moment the fault occurs with respect to the voltage. The DC component appears when the value of the voltage is not 0 at the moment of the sc. In a case of a 3ph sc, there will always be a DC component, in at least two phases. The damping of the DC-component is determined by the R/L ratio. The effective value of total (asymmetric) fault current consists of two components: a symmetrical AC component and a DC component that causes asymmetric phenomena, as shown in Fig. 2. The effective value of the total fault current equals the square root of the sum of the squares of the effective value of the AC component and the square of the effective value of the DC component, as shown in formula (3):
ffi qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi t 2 ðIac Þ2 þ ðIdc Þ2 ¼ ðIsy Þ2 þ ð 2Isy e s Þ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi t 2 D ¼ Isy 1 þ ð 2e s Þ ¼ DIsy
Iasy ¼ Symmetric faults (1) Three-phase short-circuit fault (positive sequence network) Asymmetric faults (2) Single-phase ground fault (positive, negative, and zero sequence network in series) (3) Phase fault (positive and negative sequence network in parallel) (4) Two-phase short-circuit ground fault (positive, negative, and zero sequence network in parallel) Although the current of a single-phase ground fault may be greater than that of a three-phase short circuit fault [18,19], there is a higher probability of three-phase short-circuit faults because, after maintenance, the restoration of the isolated ground switches is often forgotten due to human error. Therefore, the primary objective is to address three-phase short-circuit faults.
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi 2 where D ¼ 1 þ ð 2et=s Þ is called a DC effect multiplier.
Fig. 1. A Thevenin equivalent circuit in a short-circuit fault.
Calculation of three-phase short-circuit fault current In the event of a short-circuit (sc) fault in the power system, according to Thevenin’s theorem, the system can be simplified to an AC power supply in series with a resistor (R) and an inductor (L), as shown in Fig. 1. This network after fault occurrence at t = 0 can be described with the following differential equation:
L
di þ R i ¼ Emax sinðxt þ /Þ dt
ð1Þ
Fig. 2. Waveform of a short-circuit fault.
ð3Þ
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According to the current specification of circuit breakers of the Taiwan Power Company (Taipower), the rated breaking current for the circuit breakers is the value of the symmetrical fault current, and the multiplier of the asymmetric capacity must comply with the regulations of ANSI IEEE Std. C37.010-1999 [20,21]. When verifying the breaking capacity of circuit breakers, the symmetrical short-circuit current value should be calculated first. The resultant value, Isy, is then multiplied by the multiplying factor K to obtain the asymmetric short-circuit fault current, which can be used to verify the asymmetric breaking capacity of the circuit breakers. The multiplying factor K equals the DC effect multiplier D divided by the asymmetric capacity multiplier S. The formula for K in a 60 Hz system is as follows:
D K¼ ¼ S
qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi t 2 qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi pffiffiffi 377t 2 1 þ ð 2e s Þ 1 þ ð 2e X=R Þ ¼ S S
ð4Þ
The multiplying factor K can also be determined from Fig. 3. Through observation, we discovered that if the contact parting time of the circuit breaker is 4 cycles and the value of the X/R ratio is greater than 25, there will be a multiplying factor K. All simulation cases in this paper assume that the contact parting time is 4 cycles and that the asymmetric capability multiplier S = 1.1. Considering that power companies give top priority to the safety of their personnel and equipment, this study also takes the effective value of the total (asymmetrical) fault current into account. Such practices may seem conservative from the perspective of the system, but it gives the highest priority to safety considerations. Synchronous generator (SG) Synchronous generators are mainly used in combined heat and power(CHP) plants as well as small hydro stations. Due to their separated excitation system they can supply a sustained sc current. The literature provides an analytical solution to estimate the sc contribution of the synchronous generator. According to [22] when a 3ph bolted fault occurs the value of the current is:
i¼
rffiffiffi t t 2 1 1 1 1 1 T 00 T0 d þ ð d þ exp sinðxt þ /Þ Un Þexp 3 Xd X 00d X 0d X 0d X d rffiffiffi t 2 Un sinð/ÞexpT a ð5Þ 3 X 00d
Fig. 3. Three-phase fault multiplying factors including effects of AC and DC decrement.
Fig. 4. IEC SG equivalent for SG and AG.
where X 00d is the subtransient reactance, X 0d is the transient reactance, T 00d is the subtransient time constant, T 0d is the transient time constant, Ta is the aperiodic time constant, uis the phase angle of the stator voltage when the sc occurs. The dc component which depends on the time the fault occurs is given by the last term. In International Electrotechnical Commission(IEC), the generator is modeled as a voltage source behind the equivalent impedance which includes the subtransient reactance of the machine and a resistance (Fig. 4) which is not equal to the stator resistance but it is much bigger. The value of this resistance depends on the rating of the generator. It is used to calculate the peak current and takes into account the decay of the AC and DC component during the first half cycle [23]. Because instead of the subtransient voltage an equivalent voltage source is used, the impedance is corrected with a KG factor which can be calculated according to [23]. Asynchronous generator (AG) These generators are mainly used in wind farms as well as in small hydro stations. There are two types of AG, the squirrel cage induction generator (SCIG) and the wound rotor induction generator (WRIG). WRIG provides the capability to control the electrical characteristics of the machine. The main difference between AG and SG in sc behavior is that AG receives the excitation from the network, therefore in case of a 3ph fault this network excitation is lost completely. Due to constant flux theorem, AG is still able to feed a fault current for certain period of time. It contributes mainly to the peak current. However there is almost no contribution to the thermal sc current. Moreover the peak current of AG is lower than that of the SG for the same rating (Fig. 5). In sc studies, AG which are directly coupled (SCIG), are treated as big motor loads. Since the sc is supplied only during the
Fig. 5. Sc current during a 3ph bolted fault in AG/SG.
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subtransient period (after that the remaining magnetic field is lost), the dynamics of the mechanical part of generator (rotor acceleration) has nearly no influence on its an appropriate representation. Models for sc analysis can be found on [19] where it can be derived from the equivalent circuit that the sc current is:
i¼
pffiffiffi t00 t00 2U n T T s sinð/Þ ð1 rÞ sinðx t þ /Þexp r exp s X 00s
ð6Þ
where X 00s is the subtransient reactance, T 00s is the subtransient stator time constant, / is the phase angle of stator voltage when the sc occurs, r: total leakage coefficient, xs is the synchronous angular speed, T 00r is the subtransient rotor time constant. In IEC standards the locked rotor impedance behind a voltage source is used to model the machine (Fig. 4). The locked rotor impedance is acquired through the locked rotor test. The R/X ratio is depending on the size of the machine and a good approximation (if the value is not known) can be found on [23]. Methods for reducing the magnitude of fault currents using existing equipment Method I: Generator allocation through scheduling. The primary purpose of allocating generators through scheduling is to isolate the source of a fault current with breaking units. The advantage of this method is that no additional equipment is needed to suppress fault currents; its drawback is that substitution of generators may lead to high costs for power generation. Assuming that the Line X impedances of all cables in Fig. 6 are 0.05 per unit (Pu), all X sources of the generator set are 0.2 Pu, and the terminal voltage of the fault bus Bus1 is 1.0 Pu. The equivalent per unit impedance as seen from the fault terminal is shown in Fig. 7. The equivalent per unit impedance last seen from the fault location Bus1 is Zth = j0.25//j0.3 = j0.1363. The fault current prior to the scheduling allocation of generators is I = 1/j0.1363 = j7.33 Pu. To prevent system tripping, power companies use redundant generator sets as reserve operation for automatic generation control (AGC) [24–27]. If all of the 200 MW power is generated by Gen1 while Gen2 is dismissed, then Gen2 cannot supply the source of a fault current, as depicted in Fig. 8.
Gen_1
The equivalent impedance from the perspective of the fault end is shown in Fig. 9. The equivalent impedance as seen from fault location Bus1 is Zth = j0.2 + j0.05 = j0.25. Consequently, the fault current after the generator allocation through scheduling I = 1/ j0.25 = j4 Pu. The fault current was j7.33 Pu prior to the generator allocation through scheduling, and it was j4 Pu after the generator allocation. Through observation of the graphs of per unit impedance before and after generator allocation through scheduling, we may conclude that if there is a way to dispatch generators in the vicinity of the area with insufficient breaker margin, the fault current sources can be effectively reduced. For Taipower, scheduling is based on an algorithm that gives top priority to the safety of personnel, equipment, and system operations, while economic considerations are secondary. The flowchart of planning for Method I is presented in Fig. 10. Method II: Breaking the circuit to isolate the fault current. To improve system reliability, Taipower often plans for normal operation of its power system without overload, even when N-1 accidents occur. However, a grid network that is too sound may result in decreased system impedance, which leads to an incremental fault current. When the margin of the circuit breakers is insufficient, the breaking of existing power branches may be initialized to isolate the source of the fault current and increase the system impedance as seen from the fault end. The advantage of this method is that it makes use of existing CBs to isolate fault currents; its drawback is that the use rate of the power line equipment is decreased. Fig. 11 shows the system diagram in its original form, without breaking any cables. Fig. 12 depicts the equivalent per unit impedance from the perspective of the fault end. Assuming that the Line X impedances of all cables are 0.05 Pu, all X Sources of the generator set are 0.2 Pu, and that the terminal voltage of the fault bus Bus1 is 1.0 Pu, then the equivalent per unit impedance from the perspective of the fault end is Zth = (j0.2 + j0.05)//[(j0.05//
Gen_1 P = 200MW
Gen_2
P = 100MW
Cable_1
P = 100MW
Fault
Cable_2
Cable_1 Fault
Bus_1
150MW
150MW
Bus_2
Cable_3
Bus_1
Bus_2
Cable_3
50MW
Fig. 8. Diagram of generator allocation through scheduling.
50MW
Fig. 6. Diagram of a simple dual-bus with three cables.
j0.2 j0.2
j0.2
j0.05
j0.05
Fault
Bus_1
j0.05
Bus_2
Fault Bus_1
j0.05 Fig. 7. Diagram of the per unit impedance of Fig. 6.
Fig. 9. Diagram of the per unit impedance of Fig. 8.
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Gen1
Start
100MW
Identify the bus that needs to reduce the fault current.
Fault
Bus1
j0.2
100MW
Cable2
Cable1 Bus1
Bus2 50MW
Cable3 Cable4
Fig. 11. Diagram of a simple dual-bus with four cables.
j0.2
j0.2
j0.05
j0.05 Bus 1
Bus 1
Bus 2 j0.05
Fig. 14. Diagram of the per unit impedance of Fig. 13.
Gen2
100MW
j0.05
j0.05 Fault
Gen1
50MW
Fig. 13. Diagram of the system after breaking Cable 4.
j0.2
End
Bus2
Cable3
Output the data of the original and alternative units.
Fig. 10. Flowchart for optimal generator allocation through scheduling.
150MW
Cable2
150MW No
Find an alternative unit preferred to the low cost of power generation.
Fault
100MW
Cable1 Line flows overloaded and stability Yes problems?
Locate the generator that is nearest to the bus that needs to reduce the fault current.
Fault
Gen2
Bus 2
j0.05 j0.05 Fig. 12. Diagram of the per unit impedance of Fig. 10.
j0.05) + (j0.2 + j0.05)] = j0.13095. The fault current prior to the allocation of generator through scheduling is I = 1/j0.13095 = j7.636 Pu. Assuming that the system is not overloaded, we break Cable 4, as depicted in Fig. 13.
The diagram of its equivalent per unit impedance is depicted in Fig. 14. The equivalent per unit impedance as seen from the fault end is Zth = (j0.2 + j0.05)//(j0.05 + j0.2 + j0.05) = j0.25//j0.3 = j0.1363. The fault current after breaking Cable 4 is I = 1/ j0.1363 = j7.33 Pu. The fault current was j7.636 Pu prior to the breaking of the cable, and it was j7.33 Pu after breaking the cable. Observation of the graphs of the per unit impedance before and after the breaking of cable leads to a simple conclusion: if there is a way to break the cable without causing a system overload, the equivalent impedance as seen from the fault end can be increased and the fault current effectively reduced. As the example case describes only a simple dual-bus equivalent circuit, the difference in fault current reduction appears insignificant. However, on a larger electric power system, the identification of the optimal cable to break would lead to significant differences in the fault current value before and after breaking the cables. To identify the optimal cable for breaking to reduce the bus fault current, the procedure shown in Fig. 15 was followed. First, all three-phase short-circuit faults of the buses were identified using PSS/E. Then, the fault current of the bus with excessive current and an insufficient margin was identified. Using the Python application program interface (API) of PSS/E [16], all possible breaks in the cables were simulated to find the specific breaking cable that could reduce the fault current. It should be noted that during the simulation, if two cables exist between two buses, these cables should be simultaneously broken. Additionally, note that in Method II, the given example showed that the equivalent impedances from perspective of the fault location before and after breaking the cable can be incremental; it did not consider the situation in which two cables between two buses should be broken simultaneously. This study does not consider single-phase ground fault currents. However, if the positive sequence impedance from perspective of bus R1 is greater than the equivalent zero sequence impedance R0, the single-phase ground fault current will be greater than the three-phase short circuit fault current. Method II is of
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fault current suppression strategies. Additional simulations of the system’s transient and voltage stability must be carried out by all three methods introduced above to ensure stable system operation with minimal risk.
Start Line flows overloaded or Yes the occurrence of the island?
Identify the bus that needs to reduce the fault current.
Simulation results The simulation software used in this study is PSS/E. The built-in Python API was also employed for programming and simulation. An existing file that is easily accessible from the example directory of PSS/E version 32, IEEE-25 Bus.sav, was used as the original simulation file. Because the IEEE-25 Bus included in the PSS/E application contains the transformer overload related data, we made some minor adjustments to transformer ratings. Revision details are included in Appendix A.
No Identify and calculate the fault current after all lines are interrupted.
Lower the fault current?
No
Output the lines that can effectively reduce the fault current after the lines are interrupted.
Yes
End
Fig. 15. Flowchart for deciding the optimal cable for breaking.
little help in solving an excessive single-phase ground fault current problem; reduction of the transformers’ ground should be considered instead. That is, however, beyond the scope of this study. Once the cable that can effectively reduce the fault current is identified, before breaking the cable, it should be ensured that no other cables or equipment will be overloaded due to the breaking. Method III: A combination of the methods I and II. If methods I and II fail to identify which cable to break to reduce the fault current significantly, or the generator set available for scheduling allocation, or if the protection margin needs to be increased in some areas, then Method III, which combines the breaking of cables and allocation of generators through scheduling, can be used to reduce fault currents. This study seeks to avoid additional equipment purchases. However, if all of the three methods fail to find a solution to effectively reduce the fault currents, equipment capable of this should be procured immediately to protect equipment and personnel. Table 1 compares the advantages and disadvantages of various
(1) The simulation of Method I was performed to find the optimal alternative generator set. After simulating the breaking of all possible generator sets using an exhaustion-based algorithm, generator set 230 (ID = 1) was identified as the optimal generator to reduce the sources of the fault current. Generator set 180 (ID = 1) was selected to supplement power generation. Fig. 16 depicts the diagram of the simulated system of IEEE-25 Bus. A comparison of the fault currents before and after breaking is provided in Table 2. It can be seen that the original, asymmetric fault current of Bus 230, 26402 A, was reduced to 22855 A after substituting generator set 230 (ID = 1) with generator set 180 (ID = 1). Scheduling led to a total reduction of 3457 A. If you would like to reach the same effect of Method I, you need to install the additional 500 ohms reactance of FCL between cable 200 (ID1) and 230 (ID2). The result is the fault current can be suppressed to 23189 A in Bus 230. (2) The simulation of Method II was intended to find the optimal cable to break to isolate the source of the fault currents and increase the equivalent impedance as seen from the fault bus. After exhaustively simulating the breaking of cables, cables 190 and 200 were identified as giving the largest fault current reduction without overloading other cables or equipment. The fault currents before and after the breaks are compared in Table 3. It can be seen that the original asymmetric fault current of Bus 230 was 26402 A and was reduced to 24977 A after breaking Cable 190 and Cable 200; a total reduction of 1425 A. If you would like to reach
Table 1 Comparison of advantages and disadvantages of various fault current suppression strategies. Fault current suppression strategies
Advantages
Disadvantages
Relative costs
Literature studies
Cascading impedance or a high impedance transformers to suppress the fault current Power electronic switching components to suppress the current Superconductor fault current limiter
Easy installation
Reduced network power quality due to the increased source impedance and system losses Fast switching of power electronic components generates additional harmonic problems High maintenance costs to maintain a low temperature for the superconductors Replacements require blackouts
Medium – low
[12–14]
Medium
[10,11]
Medium
[1–9]
Expensive – (depending on the number of circuit breakers replaced)
Reduces system reliability
Expensive – (new installation of bus-sectionalizing circuit breakers) Free – the use of existing equipment to plan scheduling policies can suppress the fault current
Traditional method to direct replacement of CB [28,29]
Upgrade the system by replacing the circuit breaker
Bus-sectionalizing circuit breakers Power dispatch method (the proposed study)
Easy installation
Zero resistance/impedance at normal operation and an ability to withstand repetitive operation Solves the problem thoroughly
Segregates the source of the fault current No need for additional equipment purchases (no need for blackouts for replacements)
Sacrifices operation reliability
The proposed study
480
M.-T. Kuo, H.-T. Wei / Electrical Power and Energy Systems 61 (2014) 474–481 Table 3 The proposed second method Iasy. Bus number
Isy
X/R
K
Install 100 X FCL
Iasy
The proposed method II Iasy
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22053 11486 18411 21117 14164 17071 12482 15367 17557 11280 24909 5894 9594
13.2 13.4 6.0 4.5 4.7 4.9 19.2 5.3 7.9 8.0 9.0 8.7 25.0 15.1 15.1 15.9 12.5 18.4 10.1 12.1 17.0 23.1 29.3 6.8 12.5
1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.02 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.01 1.06 1.00 1.00
17194 16942 9166 5747 7110 6600 11299 7814 19275 18995 13323 12640 21006 11480 18406 21091 14160 17068 12383 14991 17555 11393 24925 5894 9594
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22566 11486 18411 21117 14164 17071 12482 15367 17557 11358 26402 5894 9594
17198 16947 9120 5750 7114 6607 11300 7818 19355 19075 13413 12689 22578 11370 17305 17458 13480 16551 6668 11122 17060 11377 24977 5843 9340
Fig. 16. IEEE-25 bus. Table 4 The proposed third method Iasy.
Table 2 The proposed first method Iasy. Bus number
Isy
X/R
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22053 11486 18411 21117 14164 17071 12482 15367 17557 11280 24909 5894 9594
13.2 13.4 6.0 4.5 4.7 4.9 19.2 5.3 7.9 8.0 9.0 8.7 25.0 15.1 15.1 15.9 12.5 18.4 10.1 12.1 17.0 23.1 29.3 6.8 12.5
K 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.02 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.01 1.06 1.00 1.00
Install 500 X FCLs
Iasy
The proposed method I Iasy
17198 16947 9126 5751 7114 6607 11300 7818 19355 19075 13413 12691 22456 11387 17458 17905 13575 16625 7146 4856 17131 11338 23189 5851 9376
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22566 11486 18411 21117 14164 17071 12482 15367 17557 11358 26402 5894 9594
17194 16943 9161 5748 7111 6602 11299 7815 19297 19021 13374 12639 22542 11471 18375 21000 14144 17056 12240 14564 17542 11359 22855 5890 9580
the same effect of Method II, you need to install the additional 100 ohms reactance of FCL between cable 130 and 230. The result is the fault current can be suppressed to 24925 A in Bus 230. (3) The simulation of Method III was a combination of Methods I and II, i.e., it breaks the generator sets and cables simultaneously. Generator set 230 (ID = 1) was broken, and the power generation was supplemented by generator set 180 (ID = 1) for compensation. The fault currents before and after breaking cables 190 and 200 are listed in Table 4. It can be
Bus number
Isy
X/R
K
Install 100 X &500 X FCLs
Iasy
The proposed method III Iasy
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 240 250
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22053 11486 18411 21117 14164 17071 12482 15367 17557 11280 24909 5894 9594
13.2 13.4 6.0 4.5 4.7 4.9 19.2 5.3 7.9 8.0 9.0 8.7 25.0 15.1 15.1 15.9 12.5 18.4 10.1 12.1 17.0 23.1 29.3 6.8 12.5
1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.02 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.00 1.01 1.06 1.00 1.00
17193 16941 9124 5747 7110 6600 11299 7814 19275 18995 13320 12633 21002 11375 17457 17905 13575 16625 7146 4857 17131 11338 21679 5850 9372
17199 16947 9167 5750 7114 6607 11300 7818 19355 19076 13414 12703 22566 11486 18411 21117 14164 17071 12482 15367 17557 11358 26402 5894 9594
17194 16943 9117 5748 7111 6602 11299 7815 19295 19015 13374 12615 22558 11365 17304 17457 13480 16551 6667 10326 17060 11377 21075 5842 9338
seen that the original asymmetric fault current of Bus 230 was 26402 A was reduced to 21075 A after breaking the cables for a total reduction of 5327 A. If you would like to reach the same effect of Method III, you need to install the additional 100 ohms reactance of FCL between cable 130 and 230 and install the additional 500 ohms reactance of FCL between cable 200 (ID1) and 230 (ID2). The result is the fault current can be suppressed to 21679 A in Bus 230. The size and location of FCL in this paper is not optimal. We only use scheduling method to simulate the fault current and how many reactance of the FCL can be replaced. The optimal size and location of FCL can been seen in Ref. [30].
M.-T. Kuo, H.-T. Wei / Electrical Power and Energy Systems 61 (2014) 474–481
Conclusion The main purpose of a fault current review is to determine whether the circuit breakers are capable of breaking the fault currents to isolate faults and rapidly clear the aftermath from accidents to avoid equipment damage. This paper presents a set of strategies to control the magnitude of fault currents using existing circuit breakers (CB) equipment and allocation of generators through scheduling. From the simulation results, it is clear that the methods presented in the paper can all effectively reduce fault currents. Method I is primarily intended to isolate the source of fault currents by breaking power system units. Method II primarily uses breaking power system branches to isolate fault currents. Method III uses a combination of the first two methods to reduce more fault currents and to improve the margin of safety during operation. The simulation results showed that using scheduling method can suppress fault currents in wide areas and FCL can suppress fault currents in a small area. Actually, Most of FCL can only suppress fault currents in only one bus. Electric power companies could choose the method that is most suitable for the characteristics of its electric grid or the specifications for their respective country. Appendix A 2 Winding Transformer Collect Data From Bus Number
To Bus Number
Rate A (MVA)
Rate B (MVA)
Rate C (MVA)
90 100
120 110
700 700
800 800
900 900
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