Plasma etching of III–V semiconductor thin films

Plasma etching of III–V semiconductor thin films

Materials Chemistry and Physics, 32 (1992) 215 215-234 Invited Review Plasma etching of III-V semiconductor S. J. Pearton, F. Ren, and C. R. Abern...

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Materials Chemistry and Physics, 32 (1992)

215

215-234

Invited Review

Plasma etching of III-V semiconductor S. J. Pearton, F. Ren, and C. R. Abernathy AT&T

Bell Laboratories,

T. R. Fullowan,

Murray Hill, NJ 07974

A. Katz,

thin films

W. S. Hobson,

U. K. Chakrabarti

(USA)

Abstract In this paper we will describe the use of various plasma etching techniques in III-V semiconductor technology. The fabrication of a typical device involves a sequence of patterning, etching and deposition steps. The trend is toward the use of dry etching whenever possible because of the more anisotropic features and better dimensional control that can be obtained. This approach is consistent with an integrated processing concept in that plasma etching is a vacuum technique, and the dry etch reactor chamber can be coupled with other deposition, annealing or epitaxial growth chambers via load locks and transfer arms.

Dry etching

techniques

There are two basic classes of dry etching techniques - those which provide isotropic removal of material, such as the common barrel etchers or downstream strippers, and those which have a significant physical component of the etching and therefore are capable of anisotropic material removal. In the former case there is minimal ion bombardment of the sample, and etching proceeds by the formation of highly volatile products. Typically these systems are used for photoresist or dielectric film removal from the III-V semiconductor, and the gases are typically CF4/02, C$F,/ 0, or 0,. Since these mixtures do not etch IIIV materials, one obtains perfect selectivity for removal of the film from the substrate. Within the anisotropic etch techniques there are also several variants, including ion milling (which is purely a physical sputtering process, reactive ion etching (RIE) in which there is both a chemical and physical component, reactive ion beam etching (RIBE) which also utilizes a reactive plasma but with much higher ion acceleration energies than typical RIE, and chemical assisted ion beam etching (CAIBE) in which the sample is bombarded with a rare gas ion beam while simultaneously flooding the wafer with a reactive

0254-0584/92/$5.00

gas (usually CIZ). CAIBE is an attempt to have separate control of the physical and chemical etching components. In practice the high-ion energies used in RIBE make it impractical for III-V materials. RIE and its derivatives are far and away the most popular techniques for dry etching of compound semiconductors.

Ion milling A considerable body of information exists on the characteristics of ion beam etching of GaAs, due mainly to the extensive use of this technique for mesa isolation of GaAs-based electronic and photonic devices [l-4]. In short summary, it is usually observed that the etch rate goes through a maximum at an incidence angle of the ion beam of about 60”, with the sputtering yield being proportional to the ion energy [5]. These energetic ions create deep level traps which lead to significant carrier compensation at depths up to -2000 8, from the surface. At shallower depths the apparent net electron concentration in n-type GaAs can actually increase when ion energies above 400 eV are used [6]. In these samples, low-temperature (400 “C) annealing can actually lead to further degradation of the electrical quality of the GaAs.

0 1992 - Elsevier

Sequoia. All rights reserved

216

In general such low-temperature annealing leads to improvements in diode idea@ factors {n), but the &hot&y barrier height (#QJ remains below its unetched value. Pang et al. [7] showed that the ion damage depth is shallower with low energy and heavy ion species, as expected, and that the introduction of an adsorbed gas on the sample surface can act as a protective layer to further reduce ion damage effects. By sharp contrast to the situation for GaAs, very little is known about ion damage to InP surfaces. There has been one report of the introduction of deep level centers in Inf during ion beam etching wirh OS-2 keV Ar+ or Cl,+ ions 181. These levels were found to anneal out at approximately 300 “C, and to be more prevalent in the case of Ar ion beam etching than with Cl, etching under the same conditions. Electrical and structural changes in the near-surface ( - 1000 A) of InP reactively ion etched in C,H,/I-& or CCl,F,/ Oz discharges have also been reported [9]. The average mill rate normalized to the Ar+ ion beam current for InP and GaAs as a function of Art ion energy at a 45” incidence angle and a temperature of 10 “C is shown in Fig. 1. Within experime.ntal error f & 10%) in each case the etch rate depends linearly on the Ar+ ion energy, with slopes of -0.4 (8,Xrx3i11-~XmA-” cm-‘XeV-‘) and 0.8, respectively, for GaAs and InP. For GaAs this appears to be consistent with some previously reported data [l-10] in that a doubling of the ion energy lcads to an increase in mill rate of -20%. For InP the mill rate increases more rapidly than for GaAs. There is very little data available fbr the sputtering yield of compound semiconductor

targets, [4] and for the case of InP one might expect preferential removal of P relative to the much heavier In atoms. Our measured mill rates correspond to sputtering yields for InP of 0.30 atoms per ion at 200 eV Ar ’ ion energy, 0.42 atoms per ion at 500 eV, and 0.80 at 800 keV when the Ar ion currents are factored in. For GaAs the sputtering yield is 0.35 atoms per ion at 200 eV and 0.54 atoms per ion at 800 eV Ar’ ion energy. The experimentally observed mill rate dependence on the angle of incidence of the Ar ion beam for both materials at 500 eV Ar’ ion energy is shown in Fig. 2. The mill rate increases with increasing incidence angle up to -60” where the mill rate is -4O-50% higher than at normal incidence. The mill rate then decreases for high beam incidence angles, as expected from the l&car cascade theory [4]. Our data for GaAs are consistent with the previously reported angular dependence [ll]. For InP the sputtering yields were 0.36,0.45,0.49, and 0.26 atoms per ion, respectively, at O”, 45”, 60”, and 75” angles of incidence. For GaAs the corresponding values were 0.31, 0.33, 0.39, 0.44, and 0.23 atoms per ion at O”, 15”, 45”, 60” and ‘75” incidence angles. For GaAs the corresponding values were 0.31, 0.33, 0.39, 0.44, and 0.23 atoms per ion at 0”, lS”, 45”, 60’ and 75” incidence angles. Both materials show a similar angular dependence of the ion miliing rates, with the Jnf removal rate being faster at all incidence angles for this Ar’ ion energy of 500 eV [12].

1000

7

Ar+, 500 eV, 10°C

* GaAs

lOOO[

Q 1nP

Ar+, 45*, IO’C

800

GaAs Q InP l

1

0

200

_J 400

600

800

Fig. 1. Average etch rate normalized to ion current for Ar’ ion milling cm InP and GaAs, as a function of ion energy. The beam incidence angle was 45”, and the sample temperature 10 “C.

I

20

I

I

40

I

I

60

ANGLE WITH RESPECT BEAM NORMAL

81

TO

Fig. 2. Average etch rate normalized milling of InP and GaAs, as a function measured from the normal.

to ion cx~rrer~t fur Arr of beam

incidence

ion angle

217

The surface morphologies of the ion milled materials were examined on patterned samples by SEM. Figure 3 shows results for InP samples, milled at 45” incidence angle at AI-+ ion energies of 200 eV (top left and bottom left), 500 eV (top right), and 800 eV (bottom right). The surfaces are reasonably smooth except in the latter case where preferential sputtering of P during the ion milling treatment leads to In droplets remaining on the surface. In some cases, the In spills over onto the unetched regions. A useful monitor of the introduction of near surface damage into III-V semiconductors is the measurement of the total photoluminescent intensity from a sample before and after a particular treatment. If deep level, nonradiative defects associated with lattice damage are introduced as a result of a processing step then the band-to-band PL intensity from the sample will be reduced. Figure 4 shows the 300 K PL spectra from Fe-

doped InP samples both before and after ion milling at different Ar ion energies. The beam was at 45” incidence angle for each treatment. The PL intensity is reduced by approximately an order of magnitude after even the lowest ion energy (200 eV) milling treatment, and is further reduced for the higher ion energies (500 and 800 eV). These decreases are significantly greater than we have observed for reactive ion etching (RIE) of InP where the maximum ion energies are comparable to those used for the ion milling [13]. This is presumably because the etch rate is slower for ion milling relative to reactive ion etching in which there are both physical and chemical components to the etching. For ion milling therefore there is more accumulation of lattice disorder because this disordered material is not being removed as quickly as in RIE. The associated reduction in PL intensity is greater in ion milling as a result of the slower etch rates compared to plasma etching techniques. It is interesting to note that annealing at 700 “C for 30 s produced only moderate increases ( - 20%) in the PL intensity. Ion milling of InP led to surfaces to which we could not fabricate rectifying contacts. Both Hg and evaporated Au metallizations on milled InP samples showed ohmic behaviour, as evidenced by the I-I/ characteristics of Fig. 5. Similar data were observed for all ion energies (200-800 eV) and angles of incidence (O-75” from the vertical). The damaged, near-surface region was progres-

Fig. 3. SEM micrographs of features ion milled into InP at of 45 “C incidence angle of the beam with Ar+ ion energies 200 eV (top left and bottom left), 500 eV (top right-hand side) and 800 eV (bottom right-hand side).

1

100 -1 1.35

1.40 ENERY

1.45

1.5

Fig. 4. PL spectra recorded at 300 K of InP milled using 200, 500, or 800 eV Arf ions.

0 BIAS

(eV)

(Fe)

samples

ion

1 VOLTAGE

Fig. 5. I-V data from Au-InP milled, n-type InP (top) and material prior to evaporation

1 (V)

Schottky diodes fabricated on ion after removal of 390 or 945 8, of of the Au contact (bottom).

218

sively removed by wet chemical etching in lHCl:SH,O and the etch depth directly measured by Dektak stylus profilometry after masking a section of the sample with apiezon wax. Evaporated Au Schottky contacts were then deposited onto the etched surface. Figure 5 also shows I-V characteristics from samples from which 390 or 945 A of material were removed prior to deposition of the Schottky contact. Removal of 390 8, of material was not sufficient to restore the I-Vcharacteristics, while after taking off 945 A, the 1-V data was identical to that of a control sample. It was found that for 500 eV Ar+ ion milling at least 600 A of InP had to be removed by wet chemical etching to restore the initial electrical characteristics of the material as evidenced by the I-V data. Previously it has commonly been assumed that ion milling of III-V materials leads to the formation of a shallow amorphous layer in the near-surface region [l, 61. Surprisingly this is stated without supporting data and a close examination of publications dealing with crystalline quality after ion beam actually show no evidence for amorphous layer creation [7, 91. We examined a variety of InP and GaAs samples after ion milling and after subsequent annealing. Figure 6 shows ion channeling spectra from InP ion milled for 4 min at either 200 or 800 eV (45” incidence angle), and also from the latter sample after a 800 “C, 10 s anneal. These spectra were recorded by the 160” detector. We use both the minimum backscattering yield (xmin) and the area1 density calculated from the surface peaks in the 105” spectra as indicators of the crystalline quality after ion milling. The Xmin is defined as the height in the channeled spectrum divided by the height in the rotating random spectrum at the same channel number. In this case the height was measured at the point 4He --

Ion

2.275 MeV 1600

InP

MILL

200

V

-‘-Ion

MILL

800

V

-Ion

MILL

800

V + 800’110

s

where the channeled spectrum was at a minimum. Due to the differences in depth resolution, the Xminvalues obtained at 105” and 160” should not be compared directly to each other. The area1 densities give an idea of the number of displaced surface atoms. For InP only the In backscattering peak was measured, while for GaAs both the Ga and As peaks were measured due to the close proximity of the masses of Ga and As. The InP sample ion milled at 200 eV had a Xmin of 2.9% at 105” and 3.1% at 160”, similar to that of an unetched control sample. The sample etched with a 800 eV beam showed a significant level of damage in the first 200 A, with a xmin of 9.1% behind this damaged region. The crystalline quality of this sample actually became worse after a 500 “C, 10 s anneal with a Xminof 13.4% measured in the 105” spectrum. This is consistent with other reports using electrical characterization techniques [ 141. Annealing at 800 “C does produce a substantial reduction in gross lattice disorder, with the Xmin at 105” returning to 5.3%. The In surface peak returned to 1.9 X lO”j cmm2 compared to a value of 1.1 x lOI cmF2 for an unetched control sample. The sample annealed at 800 “C has less crystal damage in the upper 100 A than does the sample ion milled at 200 eV, but the disorder peak after annealing extends to N 800 A. The damaged region after a 500 “C, 10 s annealing of the 500 eV milled sample also extends to greater depths than before annealing, indicating a migration of the disorder. A similar picture for ion milling damage emerges as was postulated for dry etch damage in InP [9]. For 500 eV ion milling gross damage is detectable by ion channeling to depths of -200 A. Beyond this is a region containing point defects which alter the carrier concentration to depths of - 1000 A. Migration of near-surface (- 200 A) defects occurs during annealing, and ion channeling shows a broader disordered region. In the as-milled condition, removal of 500-600 A by wet chemical etching is enough to essentially restore the electrical characteristics of the material because this takes off the grossly disordered region and a section of the electrically compensated layer. The remaining region where there is carrier compensation is then totally within the zero bias depletion depth, and has little effect on the I-V characteristics of simple diodes.

Dry etching 0

200 CHANNEL

Fig. 6. Ion channeling from ion milled InP

400 NUMBER

spectra recorded at 160” detection before and after annealing.

angle

It is sometimes mistakenly assumed that dry etching and wet etching are direct competitors, whereas in reality virtually any device processing

219

sequence contains both types of pattern transfer or material removal. In general it is true to say that wherever there is a choice, dry etching should prevail simply because it is more amenable to automation, has more anisotropic pattern transfer, can more readily etch small features because of an absence of surface tension or wettability effects, and in principle should have smaller amounts of waste material to be disposed of. Plasma etching has a number of variants, and the reader is referred to past text-books or reviews on the subject [15-251. In this paper we will concentrate on the use of Reactive Ion Etching (RIE), which is the most common dry etching method used in III-V technology. We will not cover barrel etching which is used for resist or dielectric stripping, or for patterning of very large area features (> 50 pm). In principle a perfectly anisotropic dry etching treatment will give vertical sidewalls, with no erosion of the masking material. Figure 7 shows a comparison of features etched into an InP substrate using either a HBr/H,O,/H,O wet etch solution (at top and bottom left), or with CH,/H,/Ar dry etching (at top and bottom right). Since this wet etching process is isotropic, substantial undercut of the W metal masks occurs during formation of the 4 pm deep mesas. If this etching is not well controlled, the neck of the mesa may narrow so much that the mask falls off. Similarly, since it is difficult to achieve good uniformity with this type of etching process, adjacent mesas have different widths. This is clearly seen in the micrograph at bottom right. By contrast, the dry etched features have near-vertical sidewalls, and further processing such as deposition of a SIN conformal layer over - --

the features, followed by etch-back to leave it present only on the sidewall itself can be performed. This is illustrated in the bottom right of the figure. Mesa etching is a clear example where dry etching should be used provided it is compatible with subsequent growth or processing.

General principles

of RIE

The term RIE is generally applied to discharges contained between two parallel plates, one of which is powered at RF frequencies through a coupling capacitor. The much higher mobility of electrons in the discharge allows them to respond to the alternating field applied across the electrodes, while the massive ions cannot generally be swept to the electrodes. The metal plates will charge up to a negative potential relative to the body of the discharge. This potential will stabilize at the value where the electron and ion fluxes are equal. When one of the electrodes is smaller than the other, a large voltage is developed across the smaller sheath capacitance associated with the small electrode. A typical RIE configuration is shown in Fig. 8. Since the large electrode is usually the chamber itself, most of the potential difference between plasma and electrode is dropped across the sheath region above the small powered electrode. Since electrons are repelled from this electrode by its negative potential, there are fewer electron-gas molecule collisions and therefore less optical emission from this sheath or space-charge region. It therefore appears as a dark space relative to the more intense glow from the body of the plasma. Ions which stray near the edge of the sheath are accelerated across it and strike the small electrode at near-vertical The “11111)sample to be etched is placed onincidence. this electrode _-’ GROUNDED METAL CHAMBER

FEED GAS

--)

COUPLING

3 -

Fig. 7. Wet (top and bottom left) and dry (top and bottom etched laser mesa structures.

=

right) Fig.

8. Typical

RIE

CAPACITOR

RF GENERATOR

configuration

220

and is subjected to this ion bombardment as well as a constant flux of neutral gas atoms and molecules. The average electron temperature in the plasma is much higher than the ion temperature because of their response to the a.c. field and the fact that they cannot lose much energy in collision with the much more massive neutral gas molecules. By contrast, energy transfer between ions and neutrals is much more efficient, and so the average ion temperature is much lower than that of the electrons. At a pressure of 1 mtorr the neutral gas molecule density is 3 x 1013 cmv3, while the electron (and ion) density is usually around 101o-lO1l cmm3, and may approach 101’ cmw3 in enhanced discharges. Reactive gas atoms (eg. Cl) adsorb on the unmasked areas of the sample and form a volatile species whose removal is enhanced by the ion bombardment. In general, the reactive atoms and the physical sputtering by the ions would each individually give rise to a finite etch rate of the sample, but there is a synergism between the two which leads to an etch rate faster than the sum of the two components. At high pressures and low sheath voltages, chemical etching of the substrate is dominant, whereas at low pressure and high sheath biases, ion sputtering is dominant. The former produces lower damage but poorer anisotropy relative to the latter. Almost all RIE processes involve a trade-off of the parameters. As an example of a typical RIE process, we can examine chlorine etching of GaAs. The first step involves formation of the atomic etchant species by electron collisions with chlorine molecules, i.e. Cl, + e + 2Cl+ e. Ion formation occurs in a similar fashion, i.e. Cl*, Cl + e --) C&+, Cl+ + 2e. The atomic chlorine adsorbs on the surface, i.e. Cl + GaAs + GaAs - Cl. Ion bombardment and possible participation of electrons from the substrate may lead to a reaction on the surface to form the etch products, i.e. GaAs-Cl+ GaCl,(ADS) + AsCl,,(ADS). Etch product desorption by impinging ions then occurs, causing the removal of material, i.e. GaQ,,,, AsCl,,(,,, -, GaCl,,,,, AsCl,(,,. The values of x and y range from one to three. The exact plasma conditions, and especially the sample temperature, decide whether mono-, di- or tri-chloride species are predominant. Gas

chemistries

The most common discharges used for dry etching of III-V semiconductors are based on chlorine,

since the group III and group V fluorides are involatile. This makes patterning of dielectrics on compound semiconductors particularly simple with F-containing (CF4, SF6, NF,) plasmas. Table 1 lists some of the common chlorine-containing etchants. Normally these gases are diluted with As, He or 0 to provide more stable operation of the discharge, easier ignition of the plasma, or to better control the etch rate. All of the gases provide relatively fast etching of GaAs, although BC13 or PCl, are often favored because of their ability to getter water vapor and immediately attack the native oxide on the semiconductor so that there is a minimum incubation time before etching commences. Under ideal conditions, Clz, SiCl,, BC13 and PC13 provide equi-rate etching of GaAs and Al,Ga,_,As over the whole range of AlAs mole fractions. In practice however, the presence of even small amounts of water vapor in the system may promote oxidation of the AlGaAs with slower etch rates relative to GaAs. The use of CC&F, or any of the other chlorine-based gases with the addition of fluorine in the discharge provides a very high selectivity for etching GaAs over AlGaAs at low biases because of the formation of the relatively involatile A1F3 species on the AlGaAs surface. The advantage of separate addition of SF6 or an equivalent gas to Sic&, BC13 and so on is that the ratio of Clz to F, can be made arbitrarily large or small, depending on the application, whereas, in CC12F2 the ratio is fixed. At one time it was also though that production of Freon 12 would be stopped because of the damage it causes to the ozone layer, but it now appears as if limited but expensive quantities will be available for situations such as dry etching which largely uses up the gas during the process. As well, two replacements for C&F, namely Freon 21 (CHCI,F) and Freon 22 (CHC1F2) have similar etching characteristics to Freon 12 for III-V semiconductors [26, 271. In general, smoother more anisotropic etching is obtained with Sic& and BC13 relative to pure Cl* because of the smaller chemical etching component. While the Cl-based mixtures work well for GaAs and related compounds, the relative involatility of indium chlorides mean that these discharges are not ideal for etching InP and related materials. The relative volatilities of possible etch products from III-V materials is given in Table 2. Typical SEMS of features etched into InP using CC12F2, CCI,FP+PCl, or PCI, alone are shown in Fig. 9. The etching becomes very rough with more chlorine in the discharge because of increasing In-enrichment of the surface. One can enhance the volatility

221

TABLE

1. Typical etch mixtures for III-V semiconductors Comments

Chemistry (a) C12-based Clz, Sic&, BCI,, PC&, CC&F,

(b) CH,-based CH4/H2, CHJHe, C,H,&

Usually have additions of Ar, He Rough etching for In-based compounds Poor selectivity over photoresist Ar often added to enhance stability Heavy polymer deposition on mask at high pressure or CH, content CH, to Hz ratio must be in range 0.1-0.4 for smooth morphologies

CZH6/H2,

(c) Br,-based HBr, CF,Br, Br,

corrosive

(d) I,-based HI, CH;, I2

high rates for In-based no polymer deposition

TABLE 2. Normal boiling points and vapor pressures of the possible etch products Product

Boiling point (“C)

A&l, PC& PCl, InCl InCI, InCl, GaCl, GaCl, AlCl, AsBr, PBr, PBr, InBr, GaBr, AlBr, AsH3 PH3

PHJ AlI 8bI3

to gas lines

130 76 162 608 560 600 535 201 183 221 76 162 sublimes 279 263 -55 -88 61 360 401

compounds

of some

Vapor pressure at stated temperature (torr) 40 (50 “C) 1 (-52 “C) 1 (56 “C) 18 (250 “C) _ 0.08 (25 “C) 1 (100 “C) 1 (42 “C) 1 (8 “C) _ _ 1 760 40 40 40 40

(81 “C) (-62 “C) (- 129 “C) (16.1 “C) (265 “C) (268 “C)

of the indium chlorides by heating the sample but this above - 130 “C to promote desorption, is not always a practical solution [28]. The CH,/ H, chemistry was introduced to overcome the limitations of chlorine mixtures for In-containing compounds [29]. The role of the CH, is to remove the group III species (A) as (CH&A, type compounds, while the H2 removes the group V species (B) as BH,. This mixture etches all III-V materials at a slow rate, but with very smooth morphologies. The etch rate can be increased by replacing CH,

Fig. 9. SEM micrographs of InP etched in 1 mtorr, 250 V, 100 W (microwave) 38 CClZF2/202 (top) or 20 CClzF/7 PCI, (center) discharges, or in a 1 mtorr, 200 V, 100 W (microwave) 7 PCl, discharge (bottom).

with CzH6, C3H8 and other hydrocarbon gases, and at low biases, the addition of Ar also aids the etch rate by providing more ion-enhanced removal of the etch products. The CH4/H2 discharges are remarkably forgiving of the presence of water vapor, which actually enhances dissociation of the gases. The major drawback is the deposition of polymer within the reactor chamber. This can be

222

very heavy at high pressure ( > 20 m Torr) or high CH, flow rates. Under most conditions the polymer can be removed by O2 plasma cleaning after each etching run. The ratio of CH, to H2 must be kept between -0.1-0.4 to prevent excessive polymer deposition at the high values and preferential loss of the group V species at the low end of the range [30, 311. These effects lead to rough surface morphologies. The etch rates with CHJH, discharges are lower than with chlorine-based mixtures, as shown for some selected III-V materials in Figs. 10 and 11. The selectivity for one In-based material over another is not high with CHJI& mixtures, although

1600

7 .E E ‘9

_

19 cce,qo,

1200 -

p d

2C2H6/1SH2

0 InAeAs

0 InAeAs

0 InP

n IllP

A InGaAs

A InGaAs

- _+_+____*

6 800III : 2 9

0.85 W . cm.2 4mTorr 20 Seem

-

it can be enhanced in the case of etching InGaAs from an underlying AlInAs layer by adding SF, to the discharge. Figure 12 shows the etch depth as a function of time for InGaAs/AlInAs heterostructures in CH,/H,/Ar or CH,/H,/SF, plasmas under the same conditions of self-bias, pressure and flow rates. The major difference in the etching behaviour is the much reduced rate of removal of AlInAs when fluorine is present in the discharge. X-ray photoelectron spectroscopy showed substantial concentrations of low volatility A1F3 (boiling point = 1291 “C) and InF, (boiling point > 1200 “C) on the exposed AlInAs surface. Their presence is the cause of the reduced etch rate for this material when F is a component of the discharge. Although the F-containing compounds are relatively involatile they can be readily removed by sputtering at high biases. Figure 13 shows the time dependence of etch depth in an InGaAs/AlInAs heterostructure in a CI-LIWSF~ discharge with

,y__~_--_-_-~--_--_-.c ~‘_~‘___‘~_-_‘_--~

400 -

=l

0 0

-+ I 2

; I 4

$ I 6

a I 6

/ 10

I 12

0 14

ETCH TIME (min)

Fig. 10. Average etch rates of InP, InGaAs, and InAlAs as a function of time for either 2GH6:18H, or 19CClzF2:102 discharges.

10

20

30

TIME (min)

Fig. 12. Etch depth as a function of time for InGaAs/AiInAs structures in 10 mtorr, 190 V bias discharges of 2CH,/lBH,/lO Ar or 2CH,/18H,/10SF6.

InGaAs/AelnAs CH,/H,/SFs

2000 -1

vb(v) l 360 ml90 A 65

RIE 4 mTorr 20 scan 0.85 W . cm-2 19 CCt$F,/l .

O2

2C,Hs/18H,

G&b

0 G&b

A InSb

A InSb

n InAs

0 InAs

01

1

1

1

0

2

4

6

1 6

1

1

I

IO

12

14

ETCH TIME (min)

Fig. 11. Average etch rate of GaSb, InSb, and InAs as a function of time in C&,/H* or CCi2F2/02 discharges.

0

I

I

/

/

I

I

5

10

15

20

25

30

:

5

TIME (mln)

Fig. 13. Etch depth as a function of time and d.c. bias voltage for InCaAs-AlInAs heterostructures reactively ion etched in a 10 mtorr, 2CH4/18H2/10SF6 discharge.

223

different d.c. bias values on the sample. At a bias of 85 V, the etch rate of InGaAs is N 90 8, min- ’ and that of AlInAs is ~10 A min-‘. As the bias is increased, the etch rates of both materials increase rapidly until at 360 V there is equi-rate etching. Under these conditions, sputter-induced desorption of the etch products is the dominant factor and chemical reactions are less important

[321* Bromine-based discharges will also etch III-V semiconductors and CF,Br/Ar and HBr/Ar plasma

/’

-c &2.5-

/I

E h 0

2.0. /

6 + 1.5tu

InP-InGaAsP 10 mTorr 15OW MICROWAVE

/I / /

l.O-

. CH,/H2/Ar -300v DC n HI/H2/Ar

0.5-

-loov

,’

DC

/ / Ok 0

20

40

60

ETCH TIME

80

100

(mm)

Fig. 14. Etch depth as a function of time for CH,/H,/Ar or HI/ H,/Ar ECR-RF etching of InP-InGaAsP heterostructures.

TABLE 3. Typical etch rates of GaAs, InP, Al,,Ga,,As and InGaAs in different discharges at 4 m torr and 0.6 W cm-* Mixture

ClJAr SiCl,/Ar PCl,/Ar CC12FJ0, CH,Br/Ar HBr/Ar CH,/Hz CZH,M[Z HUHJAr

Etch rate (A min-‘) GaAs

AlGaAs

InP

InGaAs

20000 5000 3000 2000 600 600 200 250 5000

20000 5000 3000 50 400 500 160 180 4000

200 150 150 650 250 400 220 250 7000

200 350 350 1000 320 400 280 320 5000

etching has been reported [33, 341. The etch rates are slow and the morphologies quite smooth, but the Br-containing gases are very corrosive on plumbing. Iodine-containing mixtures on the other hand have proven to be very effective for etching compound semiconductors [35]. In particular the etch rates for In-based materials are a factor of 8-10 higher than for CH4/H2 discharges under the same conditions. This is illustrated in Fig. 14 for an InP-InGaAsP heterostructure etched at either - 100 V bias in a Hl/H,/Ar discharge or at -300 V in a CH,/H,/Ar plasma. The etching can be extremely anisotropic as shown in the SEM micrograph of Fig. 15. Typical etch rates for different materials in the various discharges are shown in Table 3.

Surface chemistry

Fig. 15. SEMS of deep features etched into InP using lOHI/ lOH,/5Ar, lOmtorr, -150 V, 200 W (ECR) discharge.

One of the key parameters deciding whether or not a dry etch treatment is successful is the composition of the resultant etched surface. Since subsequent growth or processing steps usually need to be performed on this surface, it is important that minimal changes have taken place. Table 4 shows the average atomic composition in the top 100 A of GaAs samples etched in various composition CCl,F,/O, discharges at different power densities. Varying amounts of F and Cl containing residues are found in all cases, and high power conditions lead to substantially more carbon deposition on the GaAs surface. Similarly, higher 0, concentrations in the discharge lead to more oxidation of the surface. Results for the surface of Al,,Ga,,As samples after RIE in CCl,F,/O, discharges are summarized in Table 5. The predominant species are Ga,O,, A1203, AlF, and GaF,, and the relative thickness

224

TABLE 4. Atomic concentrations on surface of GaAs samples after various RIE treatments, as determined by XPS. The CCI,Fr:Or etches were performed at 4 mtorr pressure for 4 min. In the table we also list the CClrF,:Or ratio in the gas mixture, and the plasma power density in W cm-’ Element

Control

Atomic Concentration (%)

As 3d Ga 3d 0 1s ClS F Is C’ 2P

13.68 15.44 36.53 34.35 0.00 0.00

19:1, 0.56 (W cm-‘)

19:1, 1.31 (W cm-‘)

614, 0.56 (W cm-‘)

12.92 10.84 34.69 35.24 4.39 1.91

4.35 2.18 21.83 47.69 17.92 6.02

11.35 15.70 41.81 23.71 5.39 2.05

TABLE 5. Depth of various components of the near-surface residue found after RIE of AlGaAs with a CClaFa discharge for 4 min at 4 mtorr (in A) A

B

C

D

none



< 10

10-20 none 60-70 none

30-40 none 60-70 40-50



< 10 < 10 20-30 20-30 90-100 50-60

Component

Control

Fluorocarbons As203

Ga2G3 GaF, A12o3

AIF

A: B: C: D:

CC12F2/02, CCl,F2, 20 CC12F2/02, CC12F2/02,

1O:lO seem, 0.85 W cmw2 seem, 0.85 W cm-’ 19:l seem, 0.85 W cme2 19:l seem, 1.3 W cm-*

TABLE 6. XPS results. Elemental composition data measured on the surface (- 100 A) of each sample and expressed in atomic percent units for the elements detecteda Sample

C

0

Cl

Ga

As

Ai

Sb

GaAs-control GaAs-SiCl,/Ar GaAs-Cl,/Ar AlAscontrol AlAs-SiCl,/Ar AlAs-C12/Ar GaSb-control GaSb-SiCl,/Ar GaSb-Cl,/Ar

29 32.4 43 27 31.8 34 40 39 36

30 31 33 35 37 48 39 38 37

0.6 1.2 0.2 0.5 1.1 6.2

18 17 13 13 14 14

23 19 9.5 18 13 3.5 -

20 18 14 -

8.2 7.9 6.8

“RIE conditions: lOSiC1,/5Ar, 50 mtorr, 100 V and 10 CI,/SAr, 50 mtorr, 100 V.

of these layers depends on the plasma conditions. Rinsing in deionized water removes -70% of the fluorinated species, while an ammonium hydroxide solution removes much of the oxides and the remainder of the fluorine [36]. Post-RIE cleaning is necessary to obtain reproducible metal Schottky

barrier heights for subsequently deposited gate contacts. Small amounts of chlorine-containing residues are present after BC&, Sic& or Cl2 RIE of Gacontaining compounds. For the three different materials there were more Cl-related residues after ClJAr RIE compared to SiCl,/Ar etching and less of the volatile group V species, but the surfaces are considerable cleaner than for CCI,F,/O, RIE [37], as shown in Table 6. As mentioned earlier, the low volatility of indium chlorides is a problem when etching In-based materials. Samples etched in bromine-or iodinebased discharges do not show any contamination with either chemical, and are much cleaner than chlorine-etched material. A comparison of surface composition data from InP, InGaAs and AlInAs samples etched in either CCl,F,/O, or cH6/H2 discharges is given in Table 7. The latter chemistry tends to produce P-deficient surfaces on InP and As-deficient surfaces on AlInAs. Chlorine residues are present on all of these materials when etched with CC12F,/02, and of course there is substantial fluorine on the AlInAs. In these materials there is no significant preferential loss of the group V element during C2H,JH2 RIE, with the surfaces being very clean and of similar composition to the control sample. For CCl,F,/O, RIE there are once again relatively high concentrations of Cl-residues on all of the surfaces. Similar results for InAs, InSb and GaSb are shown in Table 8.

Damage Electrical and optical changes to the near-surface of the dry etched semiconductor surface are of particular importance in some device structures. In other instances however such as mesa isolation etching or laser mesa fabrication where the sample is heated up to the growth temperature for regrowth of an overlayer, damage introduced during dry etching is usually not of critical importance. Damage is a term used to describe several different types of change to the semiconductor surface, including the chemical changes previously discussed. It is to be noted that this type of surface modification also affects the luminescence from the sample and parameters such as the Schottky barrier height of metals deposited on the surface. Only a complete characterization of the surface can determine whether the observed changes are due to chemical modifications or true damage by energetic ion bombardment. Ion-induced damage has been investigated for a variety of dry-etching methods using neutral ion

225

and reactive ion bombardment. The degree of damage has been found to be inversely proportional to the ion mass and directly proportional to the ion energy [38]. Sidewall damage during dry etching has also been studied [39, 401. The most obvious effect of near-surface damage is a reduction in the carrier concentration up to 1000 8, from the surface. This is considerably deeper than the total range of ions crossing the plasma sheath and is ascribed to channeling of these relatively low energy particles, and recombination-enhanced motion of defects. In at least some cases where H, is involved in the etch mixture, there appears also to be passivation of donors and acceptors by hydrogen association. This may even be a factor when hydrogen is not a specific part of the plasma due to small leaks, presence of water vapor or erosion of photoresist masks [41]. Figure 16 shows Schottky barrier heights (&) and ideality factors (n) from TiPtAu contacts on n-type GaAs etched at 50 “C in CCl,F,/O, discharges. As the plasma power density increases and hence so does the bias through which the impinging ions are accelerated, the barrier height decreases because of the introduction of generation-recombination centers, and the ideal@ factor worsens [42]. This type of etching also reduces the photoluminescence intensity from the semiconductor [43]. Near-surface carrier profiles in n-type GaAs after RIE and subsequent annealing are shown in Fig. 17. For CCl,F,/O, RIE there is a reduction in carrier concentration up to - 1500 A in depth due to the introduction of deep level defects which trap free carriers and are not thermally ionized at room temperature. These defects anneal out -300 “C under our conditions. In the case of gH,/H,IAr RIE there is an added effect of in-

1.16

- 0.72

1.00.

/ 0.4

0 PLASMA

I 06 POWER

I 1.2 DENSITY

I (W.

I 1.6

E

070

cm-*)

Fig. 16. Schottky barrier heights and ideality factors from TiPtAu Schottky diodes on n-type GaAs etched at 50 “C in a 19:l CC1,F2:02, 4 mtorr discharge, as a function of the plasma power density during the RIE treatment.

DEPLETION

DEPTH

(urn)

Fig. 17. Carrier profiles in n-type (n = 10” cmm3) GaAs etched in either a 19:l CC12F2:02 or 1:10:3 GH,:H,:Ar discharge (4 mtorr, 0.85 W cm-“), as a function of post-RIE annealing temperature. The profiles before etching were uniform at a level of lOi cmM3.

diffusion of hydrogen and passivation of dopants. This is the reason why at moderate annealing temperatures the compensation depth actually increases. These results are confirmed by secondary ion mass spectrometry profiling [44]. One approach to reducing damage introduction is to hold the sample at elevated temperatures during the etch treatment as is done in ion implantation of III-V semiconductors [45, 461. There is a significant improvement in ideality factor for RIE performed at - 150 “C. This improvement parallels the situation with elevated temperature ion implantation in GaAs, in which heating the sample to > 150 “C prevents amorphization through dynamic or in sihl annealing processes. The physical mechanism in this case is the increase in mobility of lattice interstitials and vacancies at elevated temperatures, allowing them to diffuse away to the surface and thereby prevent accumulation of damage. For RIE at temperatures above - 250 “C the electrical diode characteristics worsen due to surface roughening and polymer deposition. The reduced damage at elevated temperature is confirmed by ion channelling data which shows a lower damage peak for higher RIE temperatures. For the case of InP etched in either type of discharge, Fig. 18 shows reductions in carrier density to similar depths as for the GaAs (the selfbias is - 380 V). Reverse current-voltage characteristics show that upon RIE in C2H6/H2, Au contacts deposited on the surface did not have any rectifying behaviour due to the In-rich nature after dry etching. By contrast, CCI,F,/O, RIE produces damage which increases the reverse leakage current but the Au contact still has a rectifying nature. Ion channelling spectra from an InP sample etched in C2H6/H2 shows introduction of substantial lattice damage to a depth of -400 A, with near-complete recovery of the original crys-

226 (a) CONTROL

10’6

’ 0

I 0.1

I 0.2

DEPLETION

I 0.1 DEPTH

I 0.2

(pm)

r:

Fig. 18. Carrier profiles in uniformly doped, n-type (1.5 x 1017 cme3) InP etched in either a 1GH6:10H2 or 19CC12F,:102 dischargefor4min,asafunctionofpost-RIEannealingtemperature (30 s anneals). InP NEAR-SURFACE

<150A

2

,

e z

(b) ECR+RF

4

2 3

REGION AFTER RIE

HEAVILY DAMAGED NON-STOICHIOMETRIC (In RICH)

0 1.4

150 - 400A

HEAVILY DAMAGED STOICHIOMETRIC

400 - 1oooA

POINT DEFECTS ELECTRICAL COMPENSATION ANNEALED AT 500°C

Fig. 19. Schematic

of InP near-surface

1.8

1.6 ENERGY

2.0

(eV)

Fig. 20. Low-temperature (5 K) PL spectra from GaAs-AlGaAs MQW structure before (top) and after (bottom) exposure for 2 min to a 150 W (microwave), 300 V bias Hz plasma (10 mtorr). region after RIE.

tallinity by annealing at 400 “C. The depth of the disorder measured by channeling is much less than that determined by the electrical measurements and indicates that point defects inaccessible to ion channeling are predominantly responsible for the carrier removal. Based on these results we can postulate the picture of dry etch damage in InP shown in Fig. 19, in which the immediate surface (~50 A) is highly disordered and non-stoichiometric. Below this region there is another ranging in depth from 150-400 8, in which there is significant lattice disorder, both defect aggregates detectable by channelling and point defects which compensate the shallow dopants. This region is stoichiometric. Below this region there is point defect introduction to a depth of y 1000 A, which also compensates the doping. A novel method for non-destructively measuring damage depths has been described by Wong et al. [48] and As et al. [49]. Figure 20 shows low temperature luminescence from a multi quantum well structure before and after exposure to a Hz plasma with -300 V d.c. bias [50]. Since each line in the spectra uniquely originates from a quantum well at a known depth, the decrease in luminescence intensity can be used to plot the apparent damage depth for each different plasma condition. To gain some idea of how sensitive various device structures are to the introduction of damage during dry etching, we exposed conventional high electron mobility transistor (HEMT)

HEMT

\

O2 PLASMA 90 Seem 30 mTorr 5 ml” \

60 -

\

\ \ \

60 -

\

\ 3

\ \

\

\ \

\ \

\

\ \

1

40 -

\

\

\

\

\

ETCHED CAP . DC BIAS + MICROWAVE 20 -

UNETCHEO CAP . DC BIAS ONLY 0 DC BIAS + MICROWAVE (150 W) I

0 0

100

I

200

I

300

1 IO

DC BIAS (V)

Fig. 21. Percentage change of ZDss in HEMT structures exposed to an O2 plasma, either with or without the GaAs cap in place.

structures to oxygen plasmas either with a 410 8, GaAs capping layer in place, or with the cap removed by wet chemical etching so that the doped AlGaAs donor layer was exposed. By having source and drain ohmic contracts in place prior to the 0, plasma exposure we were able to measure the change in saturated drain-source current (I& a function of the d.c. bias on the sample during this plasma exposure. Figure 21 shows that with the GaAs cap layer in place, such as would be the case during trilevel resist pattern transfer, the

227

threshold bias for damage introduction is - 150 V. This corresponds to the approximate ion energy which causes defects to penetrate the GaAs cap layer and enter the AlGaAs donor layer, where they remove carriers from the condition process. As mentioned earlier the range of 150 eV O+ ions is far less than 410 A, and one must invoke a diffusion of defects created at the surface deep into the semiconductor. When the GaAs cap is removed, as is the case when a gate meas step is performed, the threshold ion energy for damage introduction is < 100 eV. To be on the safe side, our plasma process for HEMTs use d.c. biases of < 50 V. For extended times one can see significant degradation in IDss even at - 150 V d.c. with the cap in place. These results emphasize that overetch times must be kept short, a need which is reinforced by the fact that resist erosion must also be avoided. Heterojunction Bipolar Transistors (HBTs) require a number of patterning steps which are conveniently performed using dry etching. In particular one must etch to the base layer and also to the sub-collector in order to deposit contacts. One would expect HBTs to be less sensitive to damage introduction during dry etching because the doping in the layers is so high (typical base doping is 2 5 x 1019 crnp3 and sub-collector doping is >-3X 1018 cme3) and the layers are relatively thick compared to HEMTs. Figure 22 shows the variation of base or sub-collector resistances with d.c. bias during 5 min exposures to 0, or H, discharges. For 0, ion bombardment the collector resistance shows only minor (< 10%) increases for biases up to -200 V and more rapid increases thereafter [51]. This resistance is mostly determined by the contribution from the lightly doped

DC BIAS DURING

PLASMA

EXPOSURE

(V)

Fig. 22. Variation of base (p’ GaAs) and collector (n-GaAs) sheet resistances as a function of the d.c. bias on the sample during exposure to either an O2 or Hz discharge.

n-region ration than the n+ contact layer, and indicates that bombardment-induced defects penetrate at least 500 8, of GaAs for oxygen ion energies of > 200 eV. The base resistance displays only a minor increase (- 10%) over the preexposure value even for oxygen ion energies of 375 eV. This is a result of the very high doping in the base, which is difficult to disrupt. More significant increases in both collector and base resistances were observed for hydrogen ion (H+, HZ+) bombardment, due to the extra effect of hydrogen passivation of both acceptor and donor dopants in the structure. The introduction of deep level recombination centers was evident from the increase in the ideality factor for increasing d.c. biases on the sample during the plasma exposures. The it values increase significantly for biases above -200 V for both types of discharge. Oxygen plasma damage was more resistant to annealing than that produced by hydrogen discharges. Provided the energies of both types of ions was kept below -300 eV, annealing at 450 “C for 5 min restored most of the original conductivity. For higher ion energies irreversible damage to the GaAs was created.

Masking

materials

The choice of mask material depends on the discharge chemistry, and on the pressure and d.c. bias, all of which determine the removal rate of the mask. In the case of CHJI&Ar, where significant polymer deposition may occur on the masked areas, it is necessary to use a masking material from which this polymer can be removed (e.g. by 0, plasma cleaning). Figure 23 shows SEM micrographs from InP etched in CH,/H,/Ar with - 150 V d.c. bias on the sample. For the case of W masks, sputtering occurs for self-biases > 125, leading to micromasking and the appearance of grass on the surface. In the case of photoresist masks, substantial polymer deposition occurs, and for large etch depths ( > 2 pm) so much polymer and etch products accumulate on the photoresist that it becomes difficult to lift it off. Under these conditions, it is preferable to use SiO, as a mask because of a lesser amount of polymer deposition on this material. A common feature of mesa structures formed by dry etching of III-V semiconductors is the presence of correlations or ribbing on the mesa sidewalls. Most of this sidewall roughness results from a replication of the roughness present at the edges of the masking material on the semiconductor

[=I.

Fig. 24. SEM micrographs of photoresist profiles on a S&N., layer prior to plasma exposure (top left) and after 1 min (top right), 2 min (bottom left) or 3 min (bottom right) exposure to a 4 mtorr, -500 W d.c., CF4/02 discharge.

Fig. 23. SEM micrographs from InP etched in 5~~/l~~~Ar 1 mtorr, 150 V, 150 W (microwave) discharges with either a W (top), photoresist (center) or SiO, (bottom) mask. The masks are still in place.

An example of sidewall roughness developing during the plasma exposure is shown in Fig. 24. In this case photoresist is being used as the mask to transfer a pattern into a 3000 8, thick Si,N, underlying layer with a CFJO, (4 m torr, -500 V d.c.) discharge. The initial resist profile is shown at top left, and after 1 min plasma exposure (top right) there is no discernible change in the resist and a slight etching of the Si3N,. After 2 min of plasma exposure (bottom left) the sidewall roughness is apparent and this continues to get worse after 3 min (bottom right). This roughness is then transferred into the S&N, sidewall. The effect of mask erosion during semiconductor mesa etching may only be obvious in very narrow features. Figure 25 shows SEM micrographs of 1 pm wide feature etched into InP at - 150 V d.c. in a CH,/H,/Ar plasma, using a 3000 A SiOz mask.

Fig. 25. SEM micrographs of features etched into InP using a 1 mtorr CHJH~/Ar (1.50 W ECR, - 150 V d.c.) discharge using a SiO, mask, which is still in place.

The narrowing of the mask during the dry etch step leads not only to a sloped sidewall, but trenching at the base of the mesa due to ions which follow a glancing angle trajectory off the sidewall and are concentrated at its base. For CH,/H,-based dry etching of deep feature we have found that Al or TiAu masks display low erosion rates. For dry etching of GaAs with chlorine-based discharge metals such as Pt, Au, MO and Ni make robust masking materials. Figure 26 shows the

229 25c

‘r

10 PC13/5Ar 10 mTorr. 250 W MICROWAVE

2oc

-7 E E

15c

‘4 F d ;i 6

1oc

2

SC

I

C

100

150

200

250

300

3510

DC BIAS (V)

Fig. 26. Removal rates of various masking materials in PClJAr discharges as a function of the d.c. bias on the sample.

removal rate of various metals in PClJAr discharges as a function of the d.c. bias on the sample during the plasma exposure.

Electron cyclotron resonance

discharges

Various methods have been developed for reducing ion energies in the discharge while trying to maintain anisotropic etching. These include the so-called triode reactor in which a second plasmagenerating electrode is included within the process chamber, or the addition of magnetic fields configured to reduce electron loss from the discharge and thus to reduce the potential between it and the sample. This type of magnetically enhanced etching is generally divided into two types: magnetron RIE or ECR plasma etching. The basis of ECR discharges is the principle of synchronously coupling power into electrons confined to move along particular paths by an external magnetic field [53]. In this sense it is an advance on magnetically enhance discharges because of the addition of an external driving force which heats up the electron distribution. Magnetically enhanced discharges work on the principle that magnetic confinement of the discharge produces a greater degree of dissociation by forcing electrons away from the chamber walls and back into the plasma. The reduced loss of electrons to the walls also reduces the d.c. bias induced on the small electrode. For the case of ECR discharges the magnetic field plays an additional role. At a magnetic field strength of 87.5 G, electrons within

the plasma move in circular orbits with a rotational frequency of 2.45 GHz. If an electric field of 2.45 GHz radiation is now applied, it is synchronous with the electron velocity, obviating the need for a high collision frequency to couple in power. This resonant transfer of energy to the electrons leads to efficient operation at lower pressure than conventional discharges used in RIE and a high ionization efficiency. The resultant low energy ( < 15 eV) ions have enough energy to activate many etching processes, but not enough to create significant damage. ECR sources also offer electrodeless operation and low sheath potentials and hence no sputtering. Even though the ion energies are low, anisotropic etching is maintained because of the low pressure and the fall-off in etch rate is compensated by the higher dissociation of the ECR discharge. These highly efficient microwave plasmas can be combined with additional RF biasing of the sample position to produce a versatile dry etch system for III-V device processing. Figure 27 shows a schematic of one such system built by Plasma Therm, together with the multipolar tuned-cavity microwave source (Wavemat Model 300) described above [54, 551. The sample is transferred into the etching chamber from a load-lock and the system pumped with a 1500 1 set- ’ turbomolecular pump. The advantage of the hybrid ECR-R.F. approach over conventional RIE can be stated quite simply at any given d.c. bias, ECR-RF will provide a faster etch rate than RIE alone, because of the more dissociated plasma. Equivalently, ECR-RF will provide the same etch rate as RF (RIE) alone but at a lower d.c. bias. Hence one can still achieve practical etch rates, but at a lower bias and consequently with lower damage.

Fig. 27. Schematic system.

diagram

of multipolar

ECR

plasma-etching

230

The variation of average electron density is shown in Fig. 28 as a function of microwave power for 1 mtorr, 88 V (10 W r.f.) discharges of CH,/ H,/Ar and CC12F2/02, together with the etch rates of InP and GaAs respectively in these mixtures [.56]. The etch rates of both materials increase rapidly with increasing microwave power, as do the electron densities. This is expected since there will be a higher active density available for etching at high microwave powers. The high electron density values as compared to those for RIE are a powerful demonstration of the ability of the ECR source to enhance the etch rates at a fixed d.c. bias. Lower levels of ion-induced damage are present when microwave ECR discharges are used because of the lower ion energies relative to conventional RF plasmas. An example of the relatively benign nature of ECR etching with regard to InP is given by the forward I-T/ measurements shown in Fig. 29. Samples etched under ECR conditions with no additional biasing gave 1-V characteristics very close to those of an unetched control sample with a barrier height of 0.48 eV and ideality factor of 1.1. Our past experience with RIE of InP using the CH,/I-IJAr chemistry has been that gold deposition onto the RIE surface results in ohmic behaviour, and a rectifying characteristic is not observed until at least 100 8, has been removed from the sample by wet chemical etching prior to the Au deposition. With RIE we observe substantial In enrichment of the near-surface region, but to much greater depths than with ECR. Even with the addition of 100 V substrate bias during the ECR etching we observe only a relatively small 104

10’3

1 mTorr 10 W RF . . 5 CHqll7 H218 Ar; InP A o 28 CCl2F2/2 02, GaAs

K

.:

z z 2 5 1011.

B ii k

10’Oo

100 MICROWAVE

10 300

200 POWER

TABLE 7. XPS elemental composition data measured from the top 100 8, of each sample and expressed in atomic percent units for the elements detected Sample

C

0

F

Al

InP control InP-C,HdH, InP-CCl,F,/02 InGaAs-control InGaAs-CC1sF2/02 InAlAs-control InAlAs-q H&I2 InAlAs-CC12F,/02

42.7 30.9 45.0 45.0 44.0 40.0 20.5 40.0

24.0 38.0 24.0 27.0 26.0 26.0 49.5 24.2

2.0 9.0

-

Etch conditions:

2GH,/18H,

P

Cl Ga

17.3 4.8 16.4 6.0 17.7 8.1 -

0.85 W cm-‘,

4.3 2.1 3.0

As

In

16.0 27.3 10.3 6.7 8.9 12.4 5.6 8.6 11.7 16.4 11.6 6.9 5.4 8.9 6.8 -

4 mtorr.

: 19CCI,Fz/Oz 0.85 W cm-* 4 mtorr.

reduction of the &, to 0.44 eV, while the ideality factor shows a greater degradation, to a value of 1.6. This is a convincing demonstration of the much lower degree of disruption to the semiconductor surface using ECR discharges compared with conventional RIE [56].

+i

k 0 1012 -

E

Fig. 29. Forward current-voltage characteristics from Au-InP Schottky diodes etched in ECR 5 CHJlSHJ7Ar discharges (0 or 100 V substrate self-bias) prior to deposition of the Au contacts. The straight lines in each case are used to give the intercept and slope of the characteristic. The ECR + OV sample had forward I-Vcuwes very close to those of an unetched control sample.

(W)

Fig. 28. Average electron densities 4 cm below the ECR source baseplate for 1 mtorr, 10 W (r-f) CH4/H2/Ar or CC12F2/02 discharges (total flow rate 30 seem) and etch rates of InP and GaAs, respectively, in these discharges, as a function of microwave power.

Device processing

Heterojunction bipolar transistors based on InGaAs/AlInAs or InGaAs/InP have attracted great attention because of their outstanding high frequency performance and lower power requirements compared to GaAs/AlGaAs devices [58,59]. To achieve a reasonable scale of integration it is necessary to develop a manufacturable dry-etch, self-aligned processing technology. There have been reports of fabrication of small area (2X4 pm’) InGaAslAlInAs HBTs using CH,/H,/Ar ECR plasma etching [60, 651. A schematic of the completed device structure is shown in Fig. 30. A maximum current gain of 160 was obtained for

231 TABLE 8. XPS results. Elemental composition data measured from the surface (- 100 A) of each sample and expressed in atomic percent units for the elements detected Samole

C

0

InAs-control InAs-QH,/H2 InAs-CClZF2/02 InSb-control InSb-GH,/H, InSb-CCl,F,/02 GaSb-control GaSb-C?H,iH, GaSb-CC1,F,/OZ

40 32 48 32 36 28 40 30 44

34 39 27 44 38 45 39 44 33

I

F

Cl

Ga

As

In

Sb

-

-

-

10

16

-

-

-

-

_ 2.8

7.5 4.2 6.3

-

11 9 _ -

18 8.5 12 14 7.9 -

12 11 14.9 8.2 7.8 8.5

13 18 5.4

RIE conditions: 2GH6/18HZ, 0.85 W cm-‘, 1 02, 0.85 , W cm-*.

4 mtorr; 19CCl,F,/

TIP~A,I

p’ InGaAs

n* InGaAs InP SUBSTRATE

Fig. 30. Schematic cross-section aligned AlInAs/InGaAs HBT.

of the completed

triply self-

A self-aligned HBT processing sequence for GaAs/AlGaAs devices is shown in Fig. 32 [62]. A lift-off AuGe-based emitter metal provides a metal mask for RIE of the emitter mesa. To achieve the required sidewall profile, the emitter etch was performed with a combination of low bias (-90 V) CC12F2 RIE and AlGaAs selective wet etching (KI/I ) steps. The etching provided a fully depleted 300 A thick AlGaAs band around the perimeter of the emitter. This thin layer serves as a guard ring to reduce the surface recombination current and maintain the d.c. current gain in the device, particularly at small geometries. A somewhat similar process can be used for fabrication of pnp GaAs/AlGaAs HBTs. The layer structure grown by Metal Organic Molecular Beam Epitaxy is shown in Fig. 33. All the mesas were defined by CH,lH,/Ar ECR etching and the base mesa was self-aligned to emitter stripe by using a SIN sidewall on the emitter stripe. A series of SEM micrographs showing the pnp HBT at various stages of fabrication is shown in Fig. 34 [63]. The early voltage is > 150 V, with a collector-to-emitter breakdown voltage of -5 V. The fT is 30 GHz is 13 GHz for these devices, the highest and fn,,, reported for pnp HBTs. Comparable pnp devices PROCESS

Fig. 31. SEM micrograph etched mesas.

of AlInAs/InGaAs

FLOW OR SELF-ALIGNED GaAslAfGaAs HBT

HBT showing dry-

3 x 4 pm2 devices and up to 80 for 2 x 4 pm2 devices. Unity gain, cut-off frequency (fT) of 80 GHz and maximum frequency of oscillation (Max) of 100 GHz have been demonstrated with this process, which features triple self-alignment of the emitter and base metals, and the base mesa in order to minimize the base-collector capacitance (C,,). To prevent sputtering of the Au- based ohmic contacts which serve as dry etch masks, a thin (2000 A) layer of Ti was evaporated on top of the Au. This layer is particularly resistant to erosion by the etch mixture. The Ti can easily be subsequently removed in dilute HF. An SEM of a nearly complete device is shown in Fig. 31.

Fig. 32. Schematic sequence.

2500 i

cross-section

AeGaAs

800 fi

Ato

-- GaAs

200 i

Ato s,Gao

4%

p= 10’0

p= 3x10’9

mAs

UNDOPED

6sAs

50 i

GaAs

600 i

GaAs

rl=

3000 ii

GaAs

p= 5x 10’6

GaAs

p= 4x

5000 i

SI GaAs

HBT process

p= 4x102o

GaAs

500 ii

of self-aligned

UNDOPED 15x

10’9

1020

SUBSTRATE

Fig. 33. Layer structure

of MOMBE

grown pnp HBT

232

1 pm

Fig. 34. SEM views of dry etched mesas on GaAs/AlGaAs HBTs.

pnp

obtain high power from pseudomorphic HEMTs, short gate length and large gate periphery devices composed of multiple finger transistors are required. In order to achieve a T-gate profile, a bilayer e-beam resist system was used, which included high sensitivity resist, a copolymer of methylmethacrylate and methacrylate acid, and low sensitivity resist, polymethyl methacrylate. The gate recess etching was performed with CClzFz at pressures of l-20 mtorr and d.c. biases of - 15-50 V. Post dry etch rinsing in NH,OH solution was used to remove etch-related residues. SEMs of developed e-beam resist and lift-off T-shape gate metallization after gate recess etching are shown in Fig. 36. Extrinsic transconductances of 437 mS mm-l and output conductances of 10 mS mm-l were obtained for 0.25 pm devices, with threshold voltage uniformities of f 85 mV in comparison to -300 mV for conventional wet recess technology

WI -

Fig. 35. Cross-sectional

view of DCFL inverter.

have fT values of 53 GHz and fMAx values of 128 GHz. HEMTs are ideally suited for application of dry etching techniques since the gate recess formation involves selective removal of a GaAs contact layer from an underlying doped AlGaAs donor layer. A second application is the patterning of trilevel resist masking layers used for achieving submicron gate widths. Both enhancement and depletion mode HEMTs can be reproducibly fabricated on the same wafer using thin etch-stop layers inserted in the structure. An example of a direct-coupled FET logic inverter consisting of D-mode unsaturated resistors and E-mode HEMTs is shown schematically in Fig. 35 [64]. Control of the threshold voltage and saturation currents over the wafer was achieved by the use of two etch stop layers of A10.3Ga0.,As and pseudomorphic InO.,Ga,,As. The dry etching was performed with CC&F2 at a d.c. bias of < -50 V. The InGaAs was removed with an ammonium hydroxide solution in order to continue dry etching down to the AlGaAs etch stop. Pseudomorphic InGaAs HEMTs have demonstrated state-of-the-art millimeter wave power performance with respectable power amplification at frequencies as high as 94 GHz [65]. In order to

ECR plasma etching can also be used in the fabrication of In,,2Ga,,8As-GaAs strained quantum well self-aligned, ridge waveguide lasers [67]. The p-ohmic contact stripes are used as the dry etch masks and are not degraded by the plasma exposure provided the self-bias is kept low. This type of laser emits at 0.98 pm and they are currently being extensively investigated for application as pump lasers for Er-doped glass fibre amplifiers. Self-aligned ridge waveguide laser structures were fabricated using from 2-7 pm wide AuBe/Ti/Au p-contacts patterned by lift-off and full area Au/ An/Au n-contacts. The p-contacts were used as etch masks for a PClJAr, 1 mtorr, -80 V d.c. discharge. The etch depth increases linearly with time, and the etching is faster at higher microwave

Fig. 36. SEMS of developed e-beam resist (right, top and bottom) and lift-off T-shape gate metallization (left, to and bottom) after gate-recess etching.

233

around a central load lock enables use of an appropriate sequence of processing steps to fabricate a variety of devices. The key process that needs the most work is dry lithography. Focussed ion or electron beam writing is too slow for printing large numbers of wafers and therefore the gating item in a complete single-wafer integrated process is the fact that most of the patterning steps must be performed ex situ.

Acknowledgements

Fig. 37. SEM

views

of whispering

gallety-mode

microdisk

lasers.

power levels. Lower d.c. biases can be used at the expense of etch rate. The advantage of the lower energies in ECR etching relative to RIE is that one can stop arbitrarily close to the multiple quantum wells without degrading the light output of the laser. Threshold currents typically less than 5 mA were obtained at room temperature for small (2 pm) lasers with external quantum efficiencies of 60-70% for as-cleaved devices. These results were obtained without further chemical clean-up of the dry etched lasers, and indicates there is no significant damage introduction into the quantum wells by the ECR discharge. As a final example of the use of dry etching, Fig. 37 shows SEM cross-sectional views of small diameter, whispering gallery mode microdisk lasers fabricated by ECR CH,/H,/Ar dry etching and selective HCl wet etching of the thick InP layer under the InGaAs/InGaAsP quantum wells [68]. This highly confined optical structure nearly optimizes the overlap of small volume quantum well gain region with high reflectivity optical modes in high index contrast disks. These lasers may form the basis of efficient photonic circuits and arrays.

The authors acknowledge the help of their colleagues J. R. Lothian, R. Esagui, B. Tseng, R. Keane, P. Wisk and L. J. Oster, and the continued support and encouragement of D. V. Lang, S. S. Pei, W. C. Dautremont-Smith and V. D. Mattera, Jr.

References

9 10 11 12 13 14

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with other processes

15 16

The vacuum chambers used for plasma etching can easily be integrated with other process chambers, in particular for dielectric or metal deposition, for focused ion beam patterned implementation for semiconductor growth or for rapid thermal annealing. The clustering of multiple chambers

17 18 19

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