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Preparation and characterization of (Ba, Sr)TiO3 thin films using interdigital electrodes
Microelectronic Engineering 66 (2003) 872–879 www.elsevier.com / locate / mee
Preparation and characterization of (Ba, Sr)TiO 3 thin films using interdigital electrodes Y.L. Cheng, Y. Wang*, H.L.W. Chan, C.L. Choy Department of Applied Physics and Materials Research Center, The Hong Kong Polytechnic University, Hong Kong, P.R. China
Abstract Apart from conventional parallel plate capacitors, the coplanar capacitor is another useful structure for ferroelectric film-based devices. In this work, barium strontium titanate (BST) thin film-based interdigital capacitors were prepared under different conditions. The relative permittivity of the films were extracted using a program developed based on Gevorgian’s model. It is found that the annealing temperature has significant influence on the relative permittivity. The higher the annealing temperature, the larger the relative permittivity. Meanwhile, the relative permittivity of BST film is found to increase with the film thickness. All these phenomena are consistent with that in BST film-based parallel plate capacitors, indicating that the processing– property relationship that was obtained in ferroelectric film-based parallel plate capacitors is a good reference for the study and development of novel ferroelectric film-based coplanar devices. 2002 Elsevier Science B.V. All rights reserved. Keywords: Interdigital; Ferroelectric; Film; Barium strontium titanate
1. Introduction Compared with conventional dielectric or ferroelectric film-based parallel plate capacitors with electrode / film / electrode / substrate configuration, the coplanar-electroded capacitors with a structure of electrode / film / substrate are different in many aspects. In a coplanar device, for example, the film is grown directly on the substrate; therefore the film quality and orientation control could be better than that in a parallel plate capacitor. Moreover, when an external electrical field is applied to the sample, the field distribution in the films of a coplanar device is quite different from that in a parallel plate capacitor. These differences lead to the needs of systematic investigations on the processing– structure–property relationship in the dielectric / ferroelectric films so as to improve the overall * Corresponding author. E-mail address: [email protected] (Y. Wang). 0167-9317 / 02 / $ – see front matter 2002 Elsevier Science B.V. All rights reserved. doi:10.1016/S0167-9317(02)01014-6
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performance of the coplanar capacitors that are considered as an option, apart from regular parallel plate capacitors, for high frequency thin film microwave devices as well as for piezoelectric and pyroelectric sensors [1–6]. As a matter of fact, however, so far there has been little discussion on such issues in literature. In this paper, we prepare and characterize coplanar devices and demonstrate how the property of the film changes with the processing conditions. The samples studied in this paper all contained a dielectric layer of (Ba, Sr)TiO 3 —a material family which have been extensively studied in recent years for their potential applications in memory devices, frequency-agile components and pyroelectric sensors, etc. [7–11]. The films have a composition of (Ba 0.7 Sr 0.3 )Ti 0.95 O 3 (abbreviated as BST). It is paraelectric at room temperature with its relative permittivity (obtained from dielectric tests on parallel plate capacitors) shows little dependence on external AC field (unpublished data). The last feature is important for this work because a strong AC field dependence of relative permittivity in the film will increase the complexity in the dielectric tests. The sol-gel technique was used in the sample preparation because this method can provide a convenient way of making a large number of samples with various thickness or configurations. The BST films were deposited onto two different substrates: yttrium-stabilized ZrO 2 single crystal and ZrO 2 -buffered Si (highly doped). The relative permittivity of BST was extracted from test results and its dependence on the film annealing conditions is compared with that in Au-Cr / BST / Pt-Si parallel plate capacitors fabricated under similar conditions.
2. Experimental
2.1. Sample preparation Three groups of samples were prepared in this work.
2.1.1. Parallel plate capacitors The configuration of these samples is Au-Cr / BST / Pt-Si (100). On platinized (100) silicon (Pt-Si) substrate, BST films were deposited using the sol-gel and spin-coating techniques. The starting BST sol-gel solution (Mitsubishi Materials Co., Japan) was spin-coated onto Pt-Si substrate and then dried at 250 8C for 5 min followed by hydrolysis at 350 8C for 5 min. This process was repeated until desired thickness was obtained. The final annealing was done in flow oxygen and the annealing temperature varied from 550 to 750 8C. Top electrode of gold / chromium (Au / Cr) was deposited by dc sputtering at room temperature. The Cr layer was used to enhance the adhesion of the Au layer to the BST film. A circular electrode pattern of 50 mm diameter was obtained by photo-lithography and etching. 2.1.2. Interdigital capacitors on single crystal ( IDC-Z) The configuration of the samples is Au-Cr / BST / Yt-ZrO 2 . The yttrium-stabilized ZrO 2 substrates were obtained from MTI Inc., USA. BST was prepared by sol-gel and spin-coating which are the same as described above. Top electrodes were deposited and patterned by sputtering and photolithography followed by wet chemical etching.
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2.1.3. Interdigital capacitors on buffered silicon ( IDC-S) The configuration of the samples is Au-Cr / BST / ZrO 2 / Si. The 200 nm thick buffer layer ZrO 2 was deposited onto Si by rf sputtering in a mixture of Ar and oxygen. After deposition, the film was annealed at 800 8C for 30 min for crystallization. The films fabricated by this technique were very clean and uniform. On buffered Si, BST was prepared by the sol-gel and spin-coating processes which are the same as described above. Top electrodes were deposited and patterned by sputtering and photolithography followed by wet chemical etching. 2.2. Dielectric tests The dielectric tests were carried out at room temperature by the use of an HP 4194 impedance analyzer. For different samples, the measured capacitance contains contributions from various sources. (1) In the parallel plate capacitors, only the ferroelectric layer between the two electrodes contributes to the capacitance if interface effects are neglected, as shown in Fig. 1a. (2) In IDC-Z samples, the whole device can be regarded as three capacitors connected in parallel: (i) the air-filled, (ii) BST-filled and (iii) the substrate-filled (detail of the analysis is available in Refs. [13,14]) capacitors, as shown in Fig. 1b. The ferroelectric-filled capacitor is the major contributor
Fig. 1. Schematic for parallel capacitors. (a) Cross-section of a regular parallel plate capacitor. (b) Cross-section of a coplanar capacitor IDE / BST / ZrO 2 . (c) Cross-section of a coplanar capacitor IDE / BST / ZrO 2 / Si. (d) The interdigital electrode and electrodes 1 and 2 are the electrodes for the reference capacitor.
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because of its high relative permittivity. The extraction of the relative permittivity of the ferroelectric layer is directly available by using a program that was developed based on Gevorgian’s model [12–14]. (3) In the IDC-S sample, as shown in Fig. 1c, there are four different capacitors contributing to the capacitance of the whole device: (1) the air-filled capacitor, (2) BST-filled capacitor, (3) ZrO 2 -filled capacitor and (4) two parallel plate capacitors in series—both with layered structure of Au-Cr / BST / ZrO 2 / Si (this structure forms a capacitor because Si is a semiconductor and therefore functions as a bottom electrode). This device structure is beyond the validity of Gevorgian’s model for dielectric calculation [13]. In order to make use of Gevorgian’s model, the preparatory step that we took was to remove the capacitance of the two parallel plate capacitors in series by using a reference capacitor. The electrodes of the reference capacitor, as shown in Fig. 1d, have a large spacing so that the coplanar capacitance formed between them is negligible. As the layered structure in the reference capacitor being exactly the same as the parallel plate capacitor part of the IDC-S device, we could reasonably assume that the capacitance is proportional to the electrode area. Thus the capacitance of the parallel part of the IDC-S can be obtained by Cpal 5 Cref 3 SIDE /Sref , where SIDE is the area of the interdigital electrodes and Sref the area of the reference capacitor. Cpal and Cref are the capacitance of the parallel part of the IDC and the capacitance of the reference capacitor, respectively.
3. Results and discussion
3.1. X-ray diffraction X-ray diffraction was employed to characterize the crystallization of BST. Grown on Pt-Si and annealed at 550 8C, BST is still amorphous. When the annealing temperature is larger than 600 8C, the BST film crystallized. Typical perovskite peaks were observed in the XRD patterns. A similar trend of improved crystallinity at higher annealing temperatures is also observed in BST on the other two substrates. Fig. 2 shows the XRD patterns of the three samples. The annealing temperatures for the three samples were 650 8C.
3.2. Extraction of relative permittivity of BST in coplanar capacitors The relative permittivity of BST in the coplanar capacitors can be obtained by the use of a program that was developed based on Gevorgian’s model [14]. For an interdigital capacitor, a number of parameters are needed to precisely describe the device, such as: electrode ‘finger’ width, electrode spacing, overlapped area of adjacent two ‘fingers’, finger numbers, etc. [14]. Once the device capacitance is known and the geometrical parameters determined, the relative permittivity can be calculated using the program. In practice, we often make a series of sample by systematically changing one geometric parameter (usually the electrode spacing) and then extract an average value of the relative permittivity. As shown in Fig. 3, the curves show the calculated result of the capacitance as a function of the electrode spacing. Such dependence also changes with the relative permittivity of the film. The data points, obtained in our samples, were found to fit the curve of ´ 5 350. Thus we concluded that the relative permittivity of our BST film (150 nm thick, annealed at 650 8C) is 350.
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Fig. 2. X-ray diffraction pattern of BST samples with different configurations (all annealed at 650 8C).
3.3. The relative permittivity vs. annealing temperature Fig. 4 demonstrates the relative permittivity of BST as a function of annealing temperature. The common trend for all three groups of samples is that BST relative permittivity increases with the annealing temperature. In the parallel plate capacitor, BST annealed at 550 8C has a very low relative
Fig. 3. The capacitance dependence on the electrode spacing for BST film-based interdigital capacitors. The curves are theoretical prediction based on Gevorgian’s model and the triangles are experimental data.
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Fig. 4. The relative permittivity of BST as a function of annealing temperature.
permittivity (around 100); while after annealed at 650 8C, the relative permittivity became 370. For BST grown on ZrO 2 subjected to the same annealing temperature change, the relative permittivity increased from 240 to 380. The increase in relative permittivity with annealing temperature in our samples, as we believe, is a result of the improved crystallinity at higher temperatures. This is consistent with literature result [15]. For the same mechanism, longer annealing time is also found to give rise to increase in relative permittivity in all the samples.
3.4. The thickness effect It is often observed in BST film-based parallel plate capacitors that the relative permittivity of BST is a function of the film thickness—the thicker the film, the larger the relative permittivity. This dependence is often explained as the result of the interface effect [16]. Because of the mismatch in composition and microstructure of BST and the substrate, there is an intermediate layer formed between ‘bulk’ BST and the substrate after thermal treatment. The interface layer, having a much lower relative permittivity than the ‘bulk’ BST, is ‘connected’ with BST in series and thus leads to the decrease in the relative permittivity of the whole capacitor. The thicker the whole film, the less influential the interface layer is. A similar thickness effect has also been observed in both of our parallel plate and interdigital capacitors, as shown in Fig. 5. In the parallel plate capacitors, the relative permittivity was found to change from 280 for the 150-nm thick BST to 480 for a 300-nm thick BST. For BST / ZrO 2 , the relative permittivity was found to change from 380 for the 150-nm thick BST to 540 for a 300-nm thick BST. Nevertheless, we are not sure if both of above thickness effects are based on the same mechanism. More work on the thickness effect in the IDCs as well as structural analysis will be carried out in the future to reveal the mechanism.
4. Summary Barium strontium titanate thin film-based interdigital coplanar capacitors were prepared and characterized. The extraction of the relative permittivity of the film in the interdigital capacitors was
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Fig. 5. The influence of film thickness on the relative permittivity of BST on ZrO 2 and Pt-Si.
carried out by the use of a program based on Gevorgian’s model. The relative permittivity of BST was found to be a function of the processing conditions. The films annealed at higher temperatures showed larger relative permittivity. The relative permittivity was also found to be dependent on the film thickness. All the observations were compared with parallel plate capacitors and good consistency in both cases was found.
Acknowledgements This work was supported by the Postdoctoral Research Fellowship Scheme and the Center for the Smart Materials of the Hong Kong Polytechnic University. The authors would thank Mitsubish Materials Co., Japan for providing free BST sol-gel precursors and Mr. H. Hirakawa of Mitsubishi Materials Co. for his kind assistance.
References [1] H.D. Wu, Z.H. Zhang, F. Barnes, A. Kain, J.D. Cuchiaro, IEEE Trans. Appl. Supercond. 4 (1994) 156. [2] J.J. Bernstein, J. Bottari, K. Houston, G. Kirkos, R. Miller, B. Xu, Y. Ye, L.E. Cross, Proc. IEEE Ultrasonics Symp. 2 (1999) 1145. [3] W.C. Shih, M.S. Wu, IEEE Trans. Ultrasonics Ferro. Freq. Control 45 (1998) 305. [4] B.M. Xu, R.G. Polcawich, S. Trolier-Mckinstry, T.H. Ye, L.E. Cross, J.J. Bernstein, R. Miller, Appl. Phys. Lett. 75 (1999) 4180. [5] Y. Liu, A.S. Nagra, E.G. Erker, P. Periaswamy, T.R. Taylor, J. Speck, R.A. York, IEEE Microwave Guided Wave Lett. 10 (2000) 448. [6] S.S. Gevorgian, T. Matinsson, P.L.J. Linner, E.L. Kollberg, IEEE Trans. Microwave Technol. 44 (1994) 896. [7] L. Sengupat, S. Sengupta, Mater. Res. Innovat. 2 (1999) 278. [8] H.D. Wu, Z.H. Zhang, F. Barnes, C.M. Jackson, A. Kain, J.D. Cuchiaro, IEEE Trans. Appl. Supercond. 4 (1994) 156. [9] J.G. Cheng, J. Tang, J.H. Chu, A.J. Zhang, Appl. Phys. Lett. 77 (2000) 1035. [10] C.L. Canedy, H. Li, S.P. Alpay, L. Salamanca-Riba, A.L. Roytburd, R. Ramesh, Appl. Phys. Lett. 77 (2000) 1695. [11] A. Amin, B.M. Kulwichi, Electromechanical properties of BST for acoustic imaging arrays, in: Proc. 12th IEEE Int. Symp. Appl. Ferroelectrodes, 2001, p. 491.
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[12] S.S. Gevorgian, T. Matinsson, P.L.J. Linner, E.L. Kollberg, IEEE Trans. Microwave. Theory Tech. 44 (1996) 896. [13] S. Gevorgian, E. Carlsson, S. Rudner, L.D. Wernlund, X. Wang, U. Helmersson, IEEE Proc. Microwave Antennas Propag. 143 (1996) 397. [14] Y. Wang, N. Chong, Y.L. Cheng, H.L.W. Chan, C.L. Choy, Dependence of capacitance on electrode sizes for ferroelectric ceramics and thin films with interdigital electrodes, in: International Conference on Electronic Materials, Xi’an, China, June, 2002. [15] S.B. Majumder, M. Jain, A. Martinez, R.S. Katiyar, F.W. Van Keuls, F.A. Miranda, J. Appl. Phys. 90 (2001) 896. [16] B.T. Lee, C.S. Hwang, Appl. Phys. Lett. 77 (2000) 124.
Preparation and characterization of (Ba, Sr)TiO 3 thin films using interdigital electrodes Y.L. Cheng, Y. Wang*, H.L.W. Chan, C.L. Choy Department of Applied Physics and Materials Research Center, The Hong Kong Polytechnic University, Hong Kong, P.R. China
Abstract Apart from conventional parallel plate capacitors, the coplanar capacitor is another useful structure for ferroelectric film-based devices. In this work, barium strontium titanate (BST) thin film-based interdigital capacitors were prepared under different conditions. The relative permittivity of the films were extracted using a program developed based on Gevorgian’s model. It is found that the annealing temperature has significant influence on the relative permittivity. The higher the annealing temperature, the larger the relative permittivity. Meanwhile, the relative permittivity of BST film is found to increase with the film thickness. All these phenomena are consistent with that in BST film-based parallel plate capacitors, indicating that the processing– property relationship that was obtained in ferroelectric film-based parallel plate capacitors is a good reference for the study and development of novel ferroelectric film-based coplanar devices. 2002 Elsevier Science B.V. All rights reserved. Keywords: Interdigital; Ferroelectric; Film; Barium strontium titanate
1. Introduction Compared with conventional dielectric or ferroelectric film-based parallel plate capacitors with electrode / film / electrode / substrate configuration, the coplanar-electroded capacitors with a structure of electrode / film / substrate are different in many aspects. In a coplanar device, for example, the film is grown directly on the substrate; therefore the film quality and orientation control could be better than that in a parallel plate capacitor. Moreover, when an external electrical field is applied to the sample, the field distribution in the films of a coplanar device is quite different from that in a parallel plate capacitor. These differences lead to the needs of systematic investigations on the processing– structure–property relationship in the dielectric / ferroelectric films so as to improve the overall * Corresponding author. E-mail address: [email protected] (Y. Wang). 0167-9317 / 02 / $ – see front matter 2002 Elsevier Science B.V. All rights reserved. doi:10.1016/S0167-9317(02)01014-6
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performance of the coplanar capacitors that are considered as an option, apart from regular parallel plate capacitors, for high frequency thin film microwave devices as well as for piezoelectric and pyroelectric sensors [1–6]. As a matter of fact, however, so far there has been little discussion on such issues in literature. In this paper, we prepare and characterize coplanar devices and demonstrate how the property of the film changes with the processing conditions. The samples studied in this paper all contained a dielectric layer of (Ba, Sr)TiO 3 —a material family which have been extensively studied in recent years for their potential applications in memory devices, frequency-agile components and pyroelectric sensors, etc. [7–11]. The films have a composition of (Ba 0.7 Sr 0.3 )Ti 0.95 O 3 (abbreviated as BST). It is paraelectric at room temperature with its relative permittivity (obtained from dielectric tests on parallel plate capacitors) shows little dependence on external AC field (unpublished data). The last feature is important for this work because a strong AC field dependence of relative permittivity in the film will increase the complexity in the dielectric tests. The sol-gel technique was used in the sample preparation because this method can provide a convenient way of making a large number of samples with various thickness or configurations. The BST films were deposited onto two different substrates: yttrium-stabilized ZrO 2 single crystal and ZrO 2 -buffered Si (highly doped). The relative permittivity of BST was extracted from test results and its dependence on the film annealing conditions is compared with that in Au-Cr / BST / Pt-Si parallel plate capacitors fabricated under similar conditions.
2. Experimental
2.1. Sample preparation Three groups of samples were prepared in this work.
2.1.1. Parallel plate capacitors The configuration of these samples is Au-Cr / BST / Pt-Si (100). On platinized (100) silicon (Pt-Si) substrate, BST films were deposited using the sol-gel and spin-coating techniques. The starting BST sol-gel solution (Mitsubishi Materials Co., Japan) was spin-coated onto Pt-Si substrate and then dried at 250 8C for 5 min followed by hydrolysis at 350 8C for 5 min. This process was repeated until desired thickness was obtained. The final annealing was done in flow oxygen and the annealing temperature varied from 550 to 750 8C. Top electrode of gold / chromium (Au / Cr) was deposited by dc sputtering at room temperature. The Cr layer was used to enhance the adhesion of the Au layer to the BST film. A circular electrode pattern of 50 mm diameter was obtained by photo-lithography and etching. 2.1.2. Interdigital capacitors on single crystal ( IDC-Z) The configuration of the samples is Au-Cr / BST / Yt-ZrO 2 . The yttrium-stabilized ZrO 2 substrates were obtained from MTI Inc., USA. BST was prepared by sol-gel and spin-coating which are the same as described above. Top electrodes were deposited and patterned by sputtering and photolithography followed by wet chemical etching.
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2.1.3. Interdigital capacitors on buffered silicon ( IDC-S) The configuration of the samples is Au-Cr / BST / ZrO 2 / Si. The 200 nm thick buffer layer ZrO 2 was deposited onto Si by rf sputtering in a mixture of Ar and oxygen. After deposition, the film was annealed at 800 8C for 30 min for crystallization. The films fabricated by this technique were very clean and uniform. On buffered Si, BST was prepared by the sol-gel and spin-coating processes which are the same as described above. Top electrodes were deposited and patterned by sputtering and photolithography followed by wet chemical etching. 2.2. Dielectric tests The dielectric tests were carried out at room temperature by the use of an HP 4194 impedance analyzer. For different samples, the measured capacitance contains contributions from various sources. (1) In the parallel plate capacitors, only the ferroelectric layer between the two electrodes contributes to the capacitance if interface effects are neglected, as shown in Fig. 1a. (2) In IDC-Z samples, the whole device can be regarded as three capacitors connected in parallel: (i) the air-filled, (ii) BST-filled and (iii) the substrate-filled (detail of the analysis is available in Refs. [13,14]) capacitors, as shown in Fig. 1b. The ferroelectric-filled capacitor is the major contributor
Fig. 1. Schematic for parallel capacitors. (a) Cross-section of a regular parallel plate capacitor. (b) Cross-section of a coplanar capacitor IDE / BST / ZrO 2 . (c) Cross-section of a coplanar capacitor IDE / BST / ZrO 2 / Si. (d) The interdigital electrode and electrodes 1 and 2 are the electrodes for the reference capacitor.
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because of its high relative permittivity. The extraction of the relative permittivity of the ferroelectric layer is directly available by using a program that was developed based on Gevorgian’s model [12–14]. (3) In the IDC-S sample, as shown in Fig. 1c, there are four different capacitors contributing to the capacitance of the whole device: (1) the air-filled capacitor, (2) BST-filled capacitor, (3) ZrO 2 -filled capacitor and (4) two parallel plate capacitors in series—both with layered structure of Au-Cr / BST / ZrO 2 / Si (this structure forms a capacitor because Si is a semiconductor and therefore functions as a bottom electrode). This device structure is beyond the validity of Gevorgian’s model for dielectric calculation [13]. In order to make use of Gevorgian’s model, the preparatory step that we took was to remove the capacitance of the two parallel plate capacitors in series by using a reference capacitor. The electrodes of the reference capacitor, as shown in Fig. 1d, have a large spacing so that the coplanar capacitance formed between them is negligible. As the layered structure in the reference capacitor being exactly the same as the parallel plate capacitor part of the IDC-S device, we could reasonably assume that the capacitance is proportional to the electrode area. Thus the capacitance of the parallel part of the IDC-S can be obtained by Cpal 5 Cref 3 SIDE /Sref , where SIDE is the area of the interdigital electrodes and Sref the area of the reference capacitor. Cpal and Cref are the capacitance of the parallel part of the IDC and the capacitance of the reference capacitor, respectively.
3. Results and discussion
3.1. X-ray diffraction X-ray diffraction was employed to characterize the crystallization of BST. Grown on Pt-Si and annealed at 550 8C, BST is still amorphous. When the annealing temperature is larger than 600 8C, the BST film crystallized. Typical perovskite peaks were observed in the XRD patterns. A similar trend of improved crystallinity at higher annealing temperatures is also observed in BST on the other two substrates. Fig. 2 shows the XRD patterns of the three samples. The annealing temperatures for the three samples were 650 8C.
3.2. Extraction of relative permittivity of BST in coplanar capacitors The relative permittivity of BST in the coplanar capacitors can be obtained by the use of a program that was developed based on Gevorgian’s model [14]. For an interdigital capacitor, a number of parameters are needed to precisely describe the device, such as: electrode ‘finger’ width, electrode spacing, overlapped area of adjacent two ‘fingers’, finger numbers, etc. [14]. Once the device capacitance is known and the geometrical parameters determined, the relative permittivity can be calculated using the program. In practice, we often make a series of sample by systematically changing one geometric parameter (usually the electrode spacing) and then extract an average value of the relative permittivity. As shown in Fig. 3, the curves show the calculated result of the capacitance as a function of the electrode spacing. Such dependence also changes with the relative permittivity of the film. The data points, obtained in our samples, were found to fit the curve of ´ 5 350. Thus we concluded that the relative permittivity of our BST film (150 nm thick, annealed at 650 8C) is 350.
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Fig. 2. X-ray diffraction pattern of BST samples with different configurations (all annealed at 650 8C).
3.3. The relative permittivity vs. annealing temperature Fig. 4 demonstrates the relative permittivity of BST as a function of annealing temperature. The common trend for all three groups of samples is that BST relative permittivity increases with the annealing temperature. In the parallel plate capacitor, BST annealed at 550 8C has a very low relative
Fig. 3. The capacitance dependence on the electrode spacing for BST film-based interdigital capacitors. The curves are theoretical prediction based on Gevorgian’s model and the triangles are experimental data.
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Fig. 4. The relative permittivity of BST as a function of annealing temperature.
permittivity (around 100); while after annealed at 650 8C, the relative permittivity became 370. For BST grown on ZrO 2 subjected to the same annealing temperature change, the relative permittivity increased from 240 to 380. The increase in relative permittivity with annealing temperature in our samples, as we believe, is a result of the improved crystallinity at higher temperatures. This is consistent with literature result [15]. For the same mechanism, longer annealing time is also found to give rise to increase in relative permittivity in all the samples.
3.4. The thickness effect It is often observed in BST film-based parallel plate capacitors that the relative permittivity of BST is a function of the film thickness—the thicker the film, the larger the relative permittivity. This dependence is often explained as the result of the interface effect [16]. Because of the mismatch in composition and microstructure of BST and the substrate, there is an intermediate layer formed between ‘bulk’ BST and the substrate after thermal treatment. The interface layer, having a much lower relative permittivity than the ‘bulk’ BST, is ‘connected’ with BST in series and thus leads to the decrease in the relative permittivity of the whole capacitor. The thicker the whole film, the less influential the interface layer is. A similar thickness effect has also been observed in both of our parallel plate and interdigital capacitors, as shown in Fig. 5. In the parallel plate capacitors, the relative permittivity was found to change from 280 for the 150-nm thick BST to 480 for a 300-nm thick BST. For BST / ZrO 2 , the relative permittivity was found to change from 380 for the 150-nm thick BST to 540 for a 300-nm thick BST. Nevertheless, we are not sure if both of above thickness effects are based on the same mechanism. More work on the thickness effect in the IDCs as well as structural analysis will be carried out in the future to reveal the mechanism.
4. Summary Barium strontium titanate thin film-based interdigital coplanar capacitors were prepared and characterized. The extraction of the relative permittivity of the film in the interdigital capacitors was
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Fig. 5. The influence of film thickness on the relative permittivity of BST on ZrO 2 and Pt-Si.
carried out by the use of a program based on Gevorgian’s model. The relative permittivity of BST was found to be a function of the processing conditions. The films annealed at higher temperatures showed larger relative permittivity. The relative permittivity was also found to be dependent on the film thickness. All the observations were compared with parallel plate capacitors and good consistency in both cases was found.
Acknowledgements This work was supported by the Postdoctoral Research Fellowship Scheme and the Center for the Smart Materials of the Hong Kong Polytechnic University. The authors would thank Mitsubish Materials Co., Japan for providing free BST sol-gel precursors and Mr. H. Hirakawa of Mitsubishi Materials Co. for his kind assistance.
References [1] H.D. Wu, Z.H. Zhang, F. Barnes, A. Kain, J.D. Cuchiaro, IEEE Trans. Appl. Supercond. 4 (1994) 156. [2] J.J. Bernstein, J. Bottari, K. Houston, G. Kirkos, R. Miller, B. Xu, Y. Ye, L.E. Cross, Proc. IEEE Ultrasonics Symp. 2 (1999) 1145. [3] W.C. Shih, M.S. Wu, IEEE Trans. Ultrasonics Ferro. Freq. Control 45 (1998) 305. [4] B.M. Xu, R.G. Polcawich, S. Trolier-Mckinstry, T.H. Ye, L.E. Cross, J.J. Bernstein, R. Miller, Appl. Phys. Lett. 75 (1999) 4180. [5] Y. Liu, A.S. Nagra, E.G. Erker, P. Periaswamy, T.R. Taylor, J. Speck, R.A. York, IEEE Microwave Guided Wave Lett. 10 (2000) 448. [6] S.S. Gevorgian, T. Matinsson, P.L.J. Linner, E.L. Kollberg, IEEE Trans. Microwave Technol. 44 (1994) 896. [7] L. Sengupat, S. Sengupta, Mater. Res. Innovat. 2 (1999) 278. [8] H.D. Wu, Z.H. Zhang, F. Barnes, C.M. Jackson, A. Kain, J.D. Cuchiaro, IEEE Trans. Appl. Supercond. 4 (1994) 156. [9] J.G. Cheng, J. Tang, J.H. Chu, A.J. Zhang, Appl. Phys. Lett. 77 (2000) 1035. [10] C.L. Canedy, H. Li, S.P. Alpay, L. Salamanca-Riba, A.L. Roytburd, R. Ramesh, Appl. Phys. Lett. 77 (2000) 1695. [11] A. Amin, B.M. Kulwichi, Electromechanical properties of BST for acoustic imaging arrays, in: Proc. 12th IEEE Int. Symp. Appl. Ferroelectrodes, 2001, p. 491.
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