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Problems and solutions for low pressure, high density, inductively coupled plasma dry etch applications
Surface and Coatings Technology 97 (1997) 10–14
Problems and solutions for low pressure, high density, inductively coupled plasma dry etch applications Mark Puttock Electrotech Ltd, Littleton Upon Severn, Bristol, BS12 1NP, UK
Abstract Dry etching for mainstream microelectronics applications has undergone a shift in the past few years towards high density plasma reactor designs. Such sources operate at lower pressure which helps avoid undercutting when etching small features (<0.6 mm), however, new problems also arise, and in this paper a selection of these is aired. Results from the Electrotech OmegaA 201 inductively coupled plasma etcher are used to reach the following conclusions: for production aluminium alloy etching, selectivity to photoresist can be significantly improved by use of HBr chemistry; for production dry develop of photoresist, an SO –O mixture can be used to give zero CD loss; and for copper etching, residue-free results are achieved on test wafers at a 2 2 temperature of >240 °C. © 1997 Elsevier Science S.A. Keywords: Dry etching; Inductively coupled plasma; Aluminium alloy; Photoresist dry develop; Copper etching
The technique of dry etching has been in standard use for the fabrication of microelectronic circuits (chips) for more than 10 years. The dry etching technique has evolved in order to provide controlled removal of a material masked by photoresist. The continuing demand for more powerful chips means that the process engineer is faced with even smaller features to deal with. This inevitably leads to refinement of all process steps. In this article the focus is on the newest industry standard dry etching source-type, that of high density plasma (HDP). Continuing miniaturisation presents new challenges, and this article highlights some of the problem issues and solutions associated with Al alloy, photoresist dry develop and copper etching.
anisotropic etch profiles when feature sizes have been greater than 1 mm, however, they typically suffer undercutting for features in and below this threshold. If one were to take a reactive ion etch system and reduce the pressure to <10 mTorr, there would be a very low active species density, and the etch rates of the materials would reduce dramatically. This renders the processes too low in throughput to be commercially viable and also tends to reduce photoresist selectivity (Spr). Hence, the ion density of the plasma must be increased in order to maintain viable etch rates at low pressure. In this article all discussion of results relates to work done on one type of HDP source, the Electrotech OmegaA inductively coupled plasma (ICP) source. A schematic of the ICP reactor design is shown in Fig. 1 and is discussed in more detail elsewhere [1].
2. Background: high density plasma sources—why?
3. Problem case 1: aluminium alloy interconnect
The trend in the microelectronics industry in the 1990s has been to move away from high pressure (>80 mTorr) operation, used mostly for reactive ion etch systems, to low pressure (<10 mTorr) systems. The reason for this is simple. Gas particles at lower pressure collide less frequently and hence, are inherently more directional when incident with the material being etched. The higher pressure systems have been successfully used to produce
3.1. Problem background
1. Introduction
0257-8972/97/$17.00 © 1997 Elsevier Science S.A. All rights reserved. PII S 02 5 7 -8 9 7 2 ( 9 7 ) 0 0 28 1 - 8
Al alloys remain one of the most challenging of film types to etch successfully. A wide variety of alloy stacks are used and the etch process results can be sensitive to almost every aspect of the previous processing, i.e., alloy constituents, thicknesses, barrier type, deposition conditions and quality. This sensitivity means that although
Mark Puttock / Surface and Coatings Technology 97 (1997) 10–14
11
is that if the photoresist thickness is greater than twice the metal layer thickness, then a low Spr process will suffice. Usually the first layer of interconnect (metal 1) may fit this criterion. However, when the resist thickness is less than twice the metal thickness (i.e. for the second layer of interconnect (metal 2), or for sub 0.6 mm features), then excessive erosion of photoresist will take place. 3.2. The solution
Fig. 1. Schematic diagram of the ICP reactor design.
a general gas chemistry scheme can be used, most often ‘‘final’’ processes differ from one wafer type and origin to another. Typical interconnect structures are shown in Fig. 2. Copper and often silicon are typically added to the Al in order to reduce the effect of electromigration, and silicon can be added to help barrier strength. The presence of these alloy constituents increases the likelihood of post-etch residue and consequently alloy etch processes tend to be aggressive in nature. A common trade off with which the process engineer is faced is that of making the process aggressive enough to remove any residue and at the same time maintain high enough Spr. If the Spr is too low, severe sidewall erosion or clearing of the tops of the lines result in device areas of highest underlying topography [2]. For a small line and space of 0.6–0.18 mm, this problem is compounded because in order to resolve small features, thinner layers of resist are used (now typically less than 1 mm). A simple gas chemistry of Cl -only gives an Spr of <2:1. A low Spr 2 process can be used for some Al alloy layers where the photoresist thickness is great enough. A rule of thumb
Fig. 2. Typical Al alloy interconnect structure.
A significant improvement of the Spr can be achieved by the addition of HBr to the Cl chemistry. Fig. 3 2 shows the effect on the etch rates of Al alloy and photoresist as HBr is added to a Cl chemistry. HBr 2 has been reported [3] to deposit a thin layer on silicon dioxide surfaces. This occurs on photoresist too, thus inhibiting the etch rate of resist by Cl . The interesting 2 feature of this graph is that the photoresist etch rate reduces, and at the same time the Al alloy etch rate increases, thus leading to a significant increase in the selectivity. Fig. 4 shows the important etch characteristics and the relative effect of the parameters available to adjust for the Cl –HBr system. Examples of results 2 that can be achieved using this process scheme are shown in Fig. 5. A likely explanation is that as photoresist etching is retarded by HBr, more free chlorine species are available for the Al alloy etch. Electrotech
Fig. 3. Graph of Al alloy and photoresist etch rates as a function of HBr addition to Cl (30 sccm). Note: This graph indicates a trend for 2 the following Al alloys encountered AlSi(1%), AlCu(0.5%), AlSi(1%)Cu(0.5%), AlCu(1%). The platen temperature setting for each wafer type is in the range 25 °C to 70 °C and the exact value would be determined by factors such as residue removal and profile control for the individual sample set.
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Mark Puttock / Surface and Coatings Technology 97 (1997) 10–14
Fig. 4. Trend chart for Cl –HBr etch scheme. Note: one arrow=low dependence, two arrows=medium dependence, three arrows=strong depen2 dence. Up arrow indicates increasing parameter, down arrow indicates decreasing parameter. For example the aluminium etch rate is strongly dependent on the Cl flow, and increases with increasing flow. 2
OmegaA ICP systems have been running in chip production lines using the high photoresist selectivity approach described above for more than one year.
4. Problem case 2: photoresist dry development 4.1. Background
(a)
In order to pattern small features (<0.35 mm) photolithography techniques have kept pace by using deep UV light sources and higher numerical aperture lenses. Although this can be successful, the processing has become more complex and expensive owing to problems of limited depth of field and reflective notching. A multilayer photoresist scheme is an alternative approach. There are different types of schemes, one of which is shown schematically in Fig. 6. The dry develop task must be performed in a dry etch tool. When subjected to an O plasma, the silylated mask reacts with oxygen 2 to give silicon dioxide which then acts as a hard mask. The photoresist is etched readily in O . 2 4.2. The problems and solutions The starting point for this application was a straight O process. The simplicity of a single gas approach 2 makes it desirable. Also the etch rates are high at approximately 1.5 mm m−1. However, a straight O pro2 cess suffers from two problems:
(b) Fig. 5. Examples of Al alloy etch results using the Cl –HBr scheme (a) 2 Photoresist 1.1 mm, Ti/TiN/Ti, AlCu(0.5%), Ti/TiN/Ti on SiO 2 underlayer. The photoresist has not been stripped after etch. Process Cl –HBr, 7 mT, 50 °C. (b) TiN/AlCu(0.5%)TiN. Process Cl –HBr, 2 2 5 mT, 50 °C. The photoresist has been stripped after etch.
4.2.1. Grass-like residue A grass-like residue occurs in the etched regions when the O -only process is used. A CF containing step is 2 4 required to eliminate this effect. Experiments indicate that it is important to have the step at the start of the process rather than at the end. This suggests that the grass is caused by micromasking of a Si residue left
Mark Puttock / Surface and Coatings Technology 97 (1997) 10–14
13
Fig. 6. Schematic diagram of a multilayer photoresist scheme.
after the silylation process. The CF step must be kept 4 short, or significant etching of the oxide mask will take place. A step of the order of 10 s is appropriate for the ICP system. 4.2.2. Critical dimension (CD) loss With the O -only process a CD loss occurs. The CD 2 is measured using an in line Hitachi scanning electron microscope looking directly from above. Measurements are made on specific features on each wafer before and after the dry develop stage. The CD loss was found to be up to 0.1 mm on 0.5 mm features for the process scheme described. It is likely that this would be reduced as we approach very low powers, however, the etch rate would significantly reduce and the process would become not viable for production applications. An addition of SO provides passivation of the etch sidewall and yields 2 zero CD loss. A linear relationship was found between the amount of SO added and the CD loss, levelling off 2 at zero for about 50% SO in O mixture. As the CD 2 2 figure improves, so there is some loss of etch rate since there is less active oxygen available for the photoresist etch. Fig. 7 shows a scanning electron micrograph of a dry develop process that has been running in a production environment for over 1 year. Optical endpoint can be used at the 483 nm CO line, and a 50% overetch is required to clear areas of severe topography. It is expected that the level of dry develop process requirements will increase as the use of multilayer photoresist technology increases.
and good electromigration performance [4]. Owing to the difficulty encountered in the dry etching of Cu, the vast majority of the effort put into processing has been based on a damascene technology. Damascene technology involves chemical mechanical polishing and hence, dry etching of the Cu layers is not required. However, if dry etching was possible then this may provide an alternative approach. There have been some reports of demonstrations of dry etching of Cu but so far nothing has reached the production trial stage. 5.2. The problem and possible solution The chlorides of Cu are not very volatile. Hence, high temperature is required to successfully achieve a residuefree surface. Etching has been reported with some success [5] but not using HDP type systems. On the basis
5. Problem case 3: copper dry etching feasibility 5.1. Background For dimensions of <0.35 mm, copper is a candidate to replace aluminium alloys owing to its low resistivity
Fig. 7. SEM of dry develop process. Top resist thickness 300 nm, bottom resist thickness nominally 1.3 mm thick. Process SO 40 sccm, 2 O 40 sccm, 12 mT, 10 °C platen temperature. 2
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Mark Puttock / Surface and Coatings Technology 97 (1997) 10–14
Table 1 Copper etch rate Oxide mask remaining Mask etch rate Selectivity to mask Sidewall profile Residue Corrosion Oxide loss Throughput
200 nm m−1 140 nm 48 nmm−1 4:1 85–90° positive None None 50 nm 12 wafers h−1
that Cu technology will be used with small features (<0.35 mm) then an HDP system is likely to be required. Using the ICP system at 5 mTorr, a baseline process has been demonstrated on test samples of sputtered Cu with a silicon dioxide mask and underlayer. A survey of gas chemistries was tried, including, Cl -based, HBr2 based, HI-based, CH -based. The most promising gas 4 chemistry was that of Cl diluted in Ar. If the Cl is not 2 2 diluted, a surface reaction and expansion was seen to occur on the Cu surface upon exposure to atmosphere. The baseline process was therefore Cl –Ar, 7 mTorr, 2 platen power density, 4.8 W cm−2, ICP power 550 W, over-etch 30%, and a platen temperature of >240 °C. In order to achieve a residue free etched surface the wafer temperature during etch was unsurprisingly a critical factor. For the ICP system, it was found that during the temperature range 220 °C and 240 °C there is a transition from residue/surface reaction, to clean. Clearly photoresist cannot be used for this approach to Cu etching since high temperatures are required (a common flow limit for photoresist is 120 °C ). An endpoint signal at 325 nm (a Cu line) is used to optically endpoint the process. Table 1 and Fig. 8 give the etch
characteristics and scanning electron micrograph which shows that the oxide surface is clean of Cu residues and that the profile angle is near vertical. Although the features etched so far have been >1 mm, at this low pressure condition it is expected that the process will transfer to sub 0.35 mm features. For Cu interconnect technology it is apparent that encapsulation is required and that TiN has been used for this purpose. TiN is already etched routinely as part of the Al alloy etch scheme and so is not expected to cause difficulties. The results of Cu etching are in their early days and it remains to be seen if Cu etching becomes a viable alternative to damascene, but the results on the ICP system show that there is basic feasibility of the dry etch stage. Much more process development would be expected once more realistic structures become available to work on.
6. Conclusion The necessity and importance of HDP sources has been explained. With reference to the results obtained from one particular ICP design of an HDP system some of the problem issues of dry etch challenges have been aired: for certain Al alloy etching HBr-based chemistry can give the required increase in photoresist selectivity from 2:1 to >4:1; for photoresist dry develop an SO –O approach is required to achieve zero CD loss 2 2 and has been run in a production environment; and for Cu etching with a hard mask, the ICP system with a high wafer temperature (>240 °C ) has yielded a baseline process.
References
Fig. 8. Copper etch baseline process characteristics and SEM. Silicon dioxide mask 300 nm, Sputtered Cu 500 nm, underlying silicon dioxide 300 nm.
[1] M. Puttock, A. Iacopi, G. Powell, M. Clausen, P. Bennett, Inductively coupled plasma source for reactive ion etch applications: metal interconnect etching, in: Proc. 10th Symp. Plasma Processing, 1994, Vol 94–20, Electrochemical Society, Pennington, NJ. [2] G. Powell, M. Puttock, K. Powell, A. Iacopi, D. Tossell, C. Kuhl, Al alloy etching with high resist selectivity in an ICP with Electrostatic wafer clamping, in: Proc. 10th Int. Colloq. Plasma Processes, CIP’95, Antibes, France, p 175. [3] K. Koshino, Jpn. J. App. Phys. 32 (1993) 30. [4] J. Eble, V. De, J. Davis, J. Meindl, Optimal multilevel interconnect technologies for gigascale integration (GSI ), VMIC Conf., June 18–20, 1996, ISMIC-106/96/0040(c). [5] Y. Igarashi, T. Yamanobe, I. Toshio, Thermal stability of copper interconnects fabricated by dry-etching process, Thin Solid Films 262 (1995) 124–128.
Problems and solutions for low pressure, high density, inductively coupled plasma dry etch applications Mark Puttock Electrotech Ltd, Littleton Upon Severn, Bristol, BS12 1NP, UK
Abstract Dry etching for mainstream microelectronics applications has undergone a shift in the past few years towards high density plasma reactor designs. Such sources operate at lower pressure which helps avoid undercutting when etching small features (<0.6 mm), however, new problems also arise, and in this paper a selection of these is aired. Results from the Electrotech OmegaA 201 inductively coupled plasma etcher are used to reach the following conclusions: for production aluminium alloy etching, selectivity to photoresist can be significantly improved by use of HBr chemistry; for production dry develop of photoresist, an SO –O mixture can be used to give zero CD loss; and for copper etching, residue-free results are achieved on test wafers at a 2 2 temperature of >240 °C. © 1997 Elsevier Science S.A. Keywords: Dry etching; Inductively coupled plasma; Aluminium alloy; Photoresist dry develop; Copper etching
The technique of dry etching has been in standard use for the fabrication of microelectronic circuits (chips) for more than 10 years. The dry etching technique has evolved in order to provide controlled removal of a material masked by photoresist. The continuing demand for more powerful chips means that the process engineer is faced with even smaller features to deal with. This inevitably leads to refinement of all process steps. In this article the focus is on the newest industry standard dry etching source-type, that of high density plasma (HDP). Continuing miniaturisation presents new challenges, and this article highlights some of the problem issues and solutions associated with Al alloy, photoresist dry develop and copper etching.
anisotropic etch profiles when feature sizes have been greater than 1 mm, however, they typically suffer undercutting for features in and below this threshold. If one were to take a reactive ion etch system and reduce the pressure to <10 mTorr, there would be a very low active species density, and the etch rates of the materials would reduce dramatically. This renders the processes too low in throughput to be commercially viable and also tends to reduce photoresist selectivity (Spr). Hence, the ion density of the plasma must be increased in order to maintain viable etch rates at low pressure. In this article all discussion of results relates to work done on one type of HDP source, the Electrotech OmegaA inductively coupled plasma (ICP) source. A schematic of the ICP reactor design is shown in Fig. 1 and is discussed in more detail elsewhere [1].
2. Background: high density plasma sources—why?
3. Problem case 1: aluminium alloy interconnect
The trend in the microelectronics industry in the 1990s has been to move away from high pressure (>80 mTorr) operation, used mostly for reactive ion etch systems, to low pressure (<10 mTorr) systems. The reason for this is simple. Gas particles at lower pressure collide less frequently and hence, are inherently more directional when incident with the material being etched. The higher pressure systems have been successfully used to produce
3.1. Problem background
1. Introduction
0257-8972/97/$17.00 © 1997 Elsevier Science S.A. All rights reserved. PII S 02 5 7 -8 9 7 2 ( 9 7 ) 0 0 28 1 - 8
Al alloys remain one of the most challenging of film types to etch successfully. A wide variety of alloy stacks are used and the etch process results can be sensitive to almost every aspect of the previous processing, i.e., alloy constituents, thicknesses, barrier type, deposition conditions and quality. This sensitivity means that although
Mark Puttock / Surface and Coatings Technology 97 (1997) 10–14
11
is that if the photoresist thickness is greater than twice the metal layer thickness, then a low Spr process will suffice. Usually the first layer of interconnect (metal 1) may fit this criterion. However, when the resist thickness is less than twice the metal thickness (i.e. for the second layer of interconnect (metal 2), or for sub 0.6 mm features), then excessive erosion of photoresist will take place. 3.2. The solution
Fig. 1. Schematic diagram of the ICP reactor design.
a general gas chemistry scheme can be used, most often ‘‘final’’ processes differ from one wafer type and origin to another. Typical interconnect structures are shown in Fig. 2. Copper and often silicon are typically added to the Al in order to reduce the effect of electromigration, and silicon can be added to help barrier strength. The presence of these alloy constituents increases the likelihood of post-etch residue and consequently alloy etch processes tend to be aggressive in nature. A common trade off with which the process engineer is faced is that of making the process aggressive enough to remove any residue and at the same time maintain high enough Spr. If the Spr is too low, severe sidewall erosion or clearing of the tops of the lines result in device areas of highest underlying topography [2]. For a small line and space of 0.6–0.18 mm, this problem is compounded because in order to resolve small features, thinner layers of resist are used (now typically less than 1 mm). A simple gas chemistry of Cl -only gives an Spr of <2:1. A low Spr 2 process can be used for some Al alloy layers where the photoresist thickness is great enough. A rule of thumb
Fig. 2. Typical Al alloy interconnect structure.
A significant improvement of the Spr can be achieved by the addition of HBr to the Cl chemistry. Fig. 3 2 shows the effect on the etch rates of Al alloy and photoresist as HBr is added to a Cl chemistry. HBr 2 has been reported [3] to deposit a thin layer on silicon dioxide surfaces. This occurs on photoresist too, thus inhibiting the etch rate of resist by Cl . The interesting 2 feature of this graph is that the photoresist etch rate reduces, and at the same time the Al alloy etch rate increases, thus leading to a significant increase in the selectivity. Fig. 4 shows the important etch characteristics and the relative effect of the parameters available to adjust for the Cl –HBr system. Examples of results 2 that can be achieved using this process scheme are shown in Fig. 5. A likely explanation is that as photoresist etching is retarded by HBr, more free chlorine species are available for the Al alloy etch. Electrotech
Fig. 3. Graph of Al alloy and photoresist etch rates as a function of HBr addition to Cl (30 sccm). Note: This graph indicates a trend for 2 the following Al alloys encountered AlSi(1%), AlCu(0.5%), AlSi(1%)Cu(0.5%), AlCu(1%). The platen temperature setting for each wafer type is in the range 25 °C to 70 °C and the exact value would be determined by factors such as residue removal and profile control for the individual sample set.
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Mark Puttock / Surface and Coatings Technology 97 (1997) 10–14
Fig. 4. Trend chart for Cl –HBr etch scheme. Note: one arrow=low dependence, two arrows=medium dependence, three arrows=strong depen2 dence. Up arrow indicates increasing parameter, down arrow indicates decreasing parameter. For example the aluminium etch rate is strongly dependent on the Cl flow, and increases with increasing flow. 2
OmegaA ICP systems have been running in chip production lines using the high photoresist selectivity approach described above for more than one year.
4. Problem case 2: photoresist dry development 4.1. Background
(a)
In order to pattern small features (<0.35 mm) photolithography techniques have kept pace by using deep UV light sources and higher numerical aperture lenses. Although this can be successful, the processing has become more complex and expensive owing to problems of limited depth of field and reflective notching. A multilayer photoresist scheme is an alternative approach. There are different types of schemes, one of which is shown schematically in Fig. 6. The dry develop task must be performed in a dry etch tool. When subjected to an O plasma, the silylated mask reacts with oxygen 2 to give silicon dioxide which then acts as a hard mask. The photoresist is etched readily in O . 2 4.2. The problems and solutions The starting point for this application was a straight O process. The simplicity of a single gas approach 2 makes it desirable. Also the etch rates are high at approximately 1.5 mm m−1. However, a straight O pro2 cess suffers from two problems:
(b) Fig. 5. Examples of Al alloy etch results using the Cl –HBr scheme (a) 2 Photoresist 1.1 mm, Ti/TiN/Ti, AlCu(0.5%), Ti/TiN/Ti on SiO 2 underlayer. The photoresist has not been stripped after etch. Process Cl –HBr, 7 mT, 50 °C. (b) TiN/AlCu(0.5%)TiN. Process Cl –HBr, 2 2 5 mT, 50 °C. The photoresist has been stripped after etch.
4.2.1. Grass-like residue A grass-like residue occurs in the etched regions when the O -only process is used. A CF containing step is 2 4 required to eliminate this effect. Experiments indicate that it is important to have the step at the start of the process rather than at the end. This suggests that the grass is caused by micromasking of a Si residue left
Mark Puttock / Surface and Coatings Technology 97 (1997) 10–14
13
Fig. 6. Schematic diagram of a multilayer photoresist scheme.
after the silylation process. The CF step must be kept 4 short, or significant etching of the oxide mask will take place. A step of the order of 10 s is appropriate for the ICP system. 4.2.2. Critical dimension (CD) loss With the O -only process a CD loss occurs. The CD 2 is measured using an in line Hitachi scanning electron microscope looking directly from above. Measurements are made on specific features on each wafer before and after the dry develop stage. The CD loss was found to be up to 0.1 mm on 0.5 mm features for the process scheme described. It is likely that this would be reduced as we approach very low powers, however, the etch rate would significantly reduce and the process would become not viable for production applications. An addition of SO provides passivation of the etch sidewall and yields 2 zero CD loss. A linear relationship was found between the amount of SO added and the CD loss, levelling off 2 at zero for about 50% SO in O mixture. As the CD 2 2 figure improves, so there is some loss of etch rate since there is less active oxygen available for the photoresist etch. Fig. 7 shows a scanning electron micrograph of a dry develop process that has been running in a production environment for over 1 year. Optical endpoint can be used at the 483 nm CO line, and a 50% overetch is required to clear areas of severe topography. It is expected that the level of dry develop process requirements will increase as the use of multilayer photoresist technology increases.
and good electromigration performance [4]. Owing to the difficulty encountered in the dry etching of Cu, the vast majority of the effort put into processing has been based on a damascene technology. Damascene technology involves chemical mechanical polishing and hence, dry etching of the Cu layers is not required. However, if dry etching was possible then this may provide an alternative approach. There have been some reports of demonstrations of dry etching of Cu but so far nothing has reached the production trial stage. 5.2. The problem and possible solution The chlorides of Cu are not very volatile. Hence, high temperature is required to successfully achieve a residuefree surface. Etching has been reported with some success [5] but not using HDP type systems. On the basis
5. Problem case 3: copper dry etching feasibility 5.1. Background For dimensions of <0.35 mm, copper is a candidate to replace aluminium alloys owing to its low resistivity
Fig. 7. SEM of dry develop process. Top resist thickness 300 nm, bottom resist thickness nominally 1.3 mm thick. Process SO 40 sccm, 2 O 40 sccm, 12 mT, 10 °C platen temperature. 2
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Mark Puttock / Surface and Coatings Technology 97 (1997) 10–14
Table 1 Copper etch rate Oxide mask remaining Mask etch rate Selectivity to mask Sidewall profile Residue Corrosion Oxide loss Throughput
200 nm m−1 140 nm 48 nmm−1 4:1 85–90° positive None None 50 nm 12 wafers h−1
that Cu technology will be used with small features (<0.35 mm) then an HDP system is likely to be required. Using the ICP system at 5 mTorr, a baseline process has been demonstrated on test samples of sputtered Cu with a silicon dioxide mask and underlayer. A survey of gas chemistries was tried, including, Cl -based, HBr2 based, HI-based, CH -based. The most promising gas 4 chemistry was that of Cl diluted in Ar. If the Cl is not 2 2 diluted, a surface reaction and expansion was seen to occur on the Cu surface upon exposure to atmosphere. The baseline process was therefore Cl –Ar, 7 mTorr, 2 platen power density, 4.8 W cm−2, ICP power 550 W, over-etch 30%, and a platen temperature of >240 °C. In order to achieve a residue free etched surface the wafer temperature during etch was unsurprisingly a critical factor. For the ICP system, it was found that during the temperature range 220 °C and 240 °C there is a transition from residue/surface reaction, to clean. Clearly photoresist cannot be used for this approach to Cu etching since high temperatures are required (a common flow limit for photoresist is 120 °C ). An endpoint signal at 325 nm (a Cu line) is used to optically endpoint the process. Table 1 and Fig. 8 give the etch
characteristics and scanning electron micrograph which shows that the oxide surface is clean of Cu residues and that the profile angle is near vertical. Although the features etched so far have been >1 mm, at this low pressure condition it is expected that the process will transfer to sub 0.35 mm features. For Cu interconnect technology it is apparent that encapsulation is required and that TiN has been used for this purpose. TiN is already etched routinely as part of the Al alloy etch scheme and so is not expected to cause difficulties. The results of Cu etching are in their early days and it remains to be seen if Cu etching becomes a viable alternative to damascene, but the results on the ICP system show that there is basic feasibility of the dry etch stage. Much more process development would be expected once more realistic structures become available to work on.
6. Conclusion The necessity and importance of HDP sources has been explained. With reference to the results obtained from one particular ICP design of an HDP system some of the problem issues of dry etch challenges have been aired: for certain Al alloy etching HBr-based chemistry can give the required increase in photoresist selectivity from 2:1 to >4:1; for photoresist dry develop an SO –O approach is required to achieve zero CD loss 2 2 and has been run in a production environment; and for Cu etching with a hard mask, the ICP system with a high wafer temperature (>240 °C ) has yielded a baseline process.
References
Fig. 8. Copper etch baseline process characteristics and SEM. Silicon dioxide mask 300 nm, Sputtered Cu 500 nm, underlying silicon dioxide 300 nm.
[1] M. Puttock, A. Iacopi, G. Powell, M. Clausen, P. Bennett, Inductively coupled plasma source for reactive ion etch applications: metal interconnect etching, in: Proc. 10th Symp. Plasma Processing, 1994, Vol 94–20, Electrochemical Society, Pennington, NJ. [2] G. Powell, M. Puttock, K. Powell, A. Iacopi, D. Tossell, C. Kuhl, Al alloy etching with high resist selectivity in an ICP with Electrostatic wafer clamping, in: Proc. 10th Int. Colloq. Plasma Processes, CIP’95, Antibes, France, p 175. [3] K. Koshino, Jpn. J. App. Phys. 32 (1993) 30. [4] J. Eble, V. De, J. Davis, J. Meindl, Optimal multilevel interconnect technologies for gigascale integration (GSI ), VMIC Conf., June 18–20, 1996, ISMIC-106/96/0040(c). [5] Y. Igarashi, T. Yamanobe, I. Toshio, Thermal stability of copper interconnects fabricated by dry-etching process, Thin Solid Films 262 (1995) 124–128.