Product mix determination and capacity allocation for heterogeneous products in thin film transistor liquid crystal display manufacturing

Computers & Industrial Engineering 80 (2015) 201–211

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Computers & Industrial Engineering journal homepage: www.elsevier.com/locate/caie

Product mix determination and capacity allocation for heterogeneous products in thin film transistor liquid crystal display manufacturing q Y.T. Tai a,⇑, W.L. Pearn b, C.C. Chen b a b

Department of Information Management, Kainan University, Taoyuan, Taiwan Department of Industrial Engineering & Management, National Chiao Tung University, Taiwan

a r t i c l e

i n f o

Article history: Received 10 September 2013 Received in revised form 9 March 2014 Accepted 9 December 2014 Available online 16 December 2014 Keywords: Capacity allocation EPD Product mix TFT-LCD

a b s t r a c t In the thin-film transistor liquid crystal display (TFT-LCD) manufacturing, the development of models to determine product mix and capacity allocation for a multi-stage, multi-site, and multi-generation company is very important. As rapid advancement of the electronic-paper display (EPD) technology, it is a trend of the coexistence of heterogeneous products involving LCD and EPD products. In the case we investigated, the TFT-LCD company merged an EPD company and incorporated their electro-phoretic technologies into their company. Notably, the manufacturing processes of the EPD products do not incorporate the process steps of liquid crystal injection and attachment of color filters. Consequently, to minimize the total cost, it is essential to decide the appropriate product mix and capacity allocation with considerations of the resource consumption of LCD and EPD products simultaneously. In this paper, we present mathematical models to determine product mix and capacity allocation, which involve three subsystems for TFT-LCD process with consideration of net demand, inventory level, yield rates, cost, margin, outsourcing allocation, cycle time, and panel conversion rate. To demonstrate the applicability of the proposed models, we present a real-world case taken from a TFT-LCD company located in the Science-Based Industrial Park at Hsinchu, Taiwan and perform sensitivity analysis to investigate the effect on the optimal solution.  2014 Elsevier Ltd. All rights reserved.

1. Introduction Recently, extensive applications of thin-film transistor liquid crystal display (TFT-LCD) products have been increasing rapidly, for example, tablet PC, smart phones, monitors, and LCD TVs. The TFT-LCD manufacturing process mainly consists of three basic stages: Array, Cell, and Module. Typically, in each process stage, there are multiple production sites with multiple process generations. It should be noted that the recently developed electronicpaper (e-paper) display has become an important product in visual display terminals (VDTs) because of its advantages in flexibility, reusability, light weight, and low power consumption (Wang, Hwang, & Kuo, 2012). Since electronic-paper display (EPD) becomes more popular in the reading-intensive handheld devices, some TFT-LCD companies have merged EPD companies and incorporated their electro-phoretic technologies into TFT-LCD manufacturing factories. Consequently, an efficient product mix determination and capacity allocation planning for heterogeneous q

This manuscript was processed by Area Editor Manoj Tiwari.

⇑ Corresponding author. Tel.: +886 3 3412500 6002; fax: 886 3 3412173. E-mail address: [email protected] (Y.T. Tai). http://dx.doi.org/10.1016/j.cie.2014.12.011 0360-8352/ 2014 Elsevier Ltd. All rights reserved.

products (LCD and EPD products) is essential for the TFT-LCD industry with multi-stage, multi-site, and multi-generation. Notably, the manufacturing processes of the EPD products do not incorporate the process steps of liquid crystal injection and attachment of color filter. In other words, the front-end Cell process stage is not involved in the manufacturing process of EPD products. Consequently, to minimize total cost, it is important to decide an appropriate product mix and capacity allocation with considerations of the resource consumption of LCD and EPD products simultaneously. EPD products have various economic cutting ratios for the multi-generation factories. Based on the particular characteristic of EPD product’s properties, we consider the essential material of EPD products which is referred to as front plane laminate (FPL), which is shown in Fig. 1. Product mix determination and capacity allocation problem for heterogeneous products involving EPD and LCD products in TFTLCD companies is very complicated since it is a multi-stage, multi-site, and multi-generation manufacturing environment. To solve the problem, the net demand, inventory level, yield rates, cost, margin, outsourcing allocation, cycle time, and panel conversion rate should be considered. In this paper, due to the discussion of heterogeneous products in TFT-LCD manufacturing, four process

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stages in the TFT-LCD manufacturing involves Array, front-end Cell, back-end Cell, and Module. In each process stage, various generations exist, which can be seen in Fig. 2. In Array and Cell process stages, there are a 2.5th generation in-house factory and three outsourcing factories involving 3.5th, 5th, and 6th generations in a real-world case. In each generation, due to the difference substrate size, the number of cutting piece is different. In addition, the manufacturing capability and capacity back up are not identical. In this paper, to make decisions for proper product mix and capacity allocation, we propose three mathematical models, which involves FPL production planning model, capacity allocation models for Array and front-end Cell, back-end Cell process stages with consideration of the net demand, inventory level, yield rates, cost, margin, outsourcing allocation, cycle time, and panel conversion rate. To demonstrate the applicability of the proposed models, we present a case and perform sensitivity analysis to investigate the effect on the obtained solutions. This paper is organized as follows: Section 2 presents the existing research works and Section 3 presents the linear programming models for the problem. To demonstrate the applicability of the proposed models, we present a real-world application taken from a TFT-LCD company located in the Science-Based Industrial Park at Hsinchu, Taiwan in Section 4. Finally, Section 5 includes the conclusions.

2. Literature review The existing literature works have been shown on various critical research topics regarding the TFT-LCD manufacturing industry. Lin, Chen, and Chen (2007) investigated capacity and product mix problem for TFT Array process stage involving multi-plants. Lin, Wang, and Peng (2008) presented the simulation analysis of the Cell process in a thin-film transistor liquid crystal display (TFT-LCD) manufacturing and considered the effects of the lot release times and dispatching rules. Lin, Chen, and Lin (2009) focused on the material planning problem in the TFT-LCD manufacturing industry. They proposed a single-period and multi-period critical material planning problem as mathematical models in order to optimize purchase quantity. Tsai and Wang (2009) constructed a generic three-stage model of multi-site availableto-promise (ATP) mechanism for assemble-to-order manufacturing. However, these research works only focused on a specific TFT-LCD manufacturing stage. For multi-stage TFT-LCD manufacturing process, Jeong, Sim, Jeong, and Kim (2002) developed an ATP system for TFT-LCD manufacturing and proposed efficient heuristics for calculating unused production and for scheduling TFT-LCD module assembly processes for effective use of unutilized capacity. Lin and Chen (2007) developed a mathematical programming model considering variable time buckets, relevant constraints and characteristics for the supply network planning problem. Lin, Hong, Wu, and Wang (2010) considered several special production characteristics and

FPL product Module

TFT Array and backend Cell

TFT substrate

Fig. 1. Schematic of EPD product.

developed an ATP model to compute delivery date and quantity of products. Lin, Wu, Chen, and Shih (2011) presented a strategic capacity planning problem in TFT-LCD industry under demand uncertainties. They provided a scenario-based two-stage stochastic programming model. Although multi-stage has been considered in these researches, in some research works, theory of constraints are incorporated and the Array stage is the bottleneck stage of the TFTLCD production network. They focused on the multi-site TFT-LCD capacity planning problems in the critical manufacturing stage. However, when heterogeneous products coexist in a company and in-house and outsourcing should be considered simultaneously, the developed models may not be applied directly. Chen, Huang, and Lai (2009) proposed a distributed production planning system for a multi-tier and multi-site production system by combining agent technology with advanced planning and scheduling (APS) system. This research took the Factory Planner which is a commercial packaged software developed by i2 as discussion basis. However, some small or moderate TFT-LCD companies may not use the costly commercial packaged software. They should develop their mathematical models to cope with the product mix and capacity allocation issues. Lu, Huang, and Tseng (2013) proposed an integrated algorithm that incorporates a genetic algorithm, a corner arrangement method, and a production plan model to solve cutting stock problem in the TFT-LCD industry more efficiently. To date, no research work has been done on the product mix planning and capacity allocation for the TFT-LCD companies involving heterogeneous products (LCD and EPD products) and having the characteristics of multi-stage, multi-site, and multi-generation.

3. Mathematical programming models In this section, three mathematical programming models are proposed to obtain the appropriate product mix and capacity allocation for multi-stage, multi-site, and multi-generation involving FPL (front plane laminate) production planning, capacity allocation for Array and front-end Cell process, capacity allocation for backend Cell process stage, as shown in Fig. 3. In the proposed mathematical models, we consider two levels of demand including low season and high season. Due to the outsourcing contract limits, we set upper and lower bounds of outsourcing capacity level. That is, in the low season, company should place the contracted quantities to ensure the utilization of outsourcing factories. In the high season, the outsourcing factories need to reserve the contracted capacity for the TFT-LCD manufacturing company. In the case we investigated, the business strategies for FPL factory, Array, and front-end Cell process stages are make-to-stock. That of Module process stage is make-to-order. In Fig. 3, we obtain the demand in Module process stage based on the forecast of finished goods, order, yield, and the inventory level. To fulfill the demand of the EPD product, we propose the first mathematical model, namely, FPL production planning model which is a linear programming model used to obtain the releasing quantity and the inventory level with the objective of minimizing the inventory and shortage cost. In the successive two mathematical models, according to demands on Module process stage, inventory level, yield rates, related cost, margin, outsourcing vendor, cycle time, panel conversion rate between Array and Cell process, we construct two linear programming models for Array and front-end Cell processes and back-end Cell process. These models can obtain optimal product-mix and capacity allocation planning at each site in each planning period. In the capacity allocation model for Array and front-end Cell processes, the main purpose is to allocate the optimal production quantity and to recommend outsourcing or in-house production quantity for the EPD and LCD products at each site with the objective of minimizing the total outsourcing cost, manufacturing

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In-home

Cell 1

Array 1

Module EPD product

Cell 2

Outsourcing

Array 2

Module LCD product Cell 3

Array 3

Array 4

Cell 4

Module EPD product

Fig. 2. A multi-stage, multi-generation, multi-site TFT-LCD manufacturing.

Forecast /order of finished goods in Module process

Inventory, yield, capacity, cost, margin, outsourcing, CT, conversion rate

Demands of F/G in Module process: EPD and LCD

Adjust output target

FPL production planning model based on EPD demand No

Achieve output target? Yes Capacity allocation model for Array and front-end Cell processes Capacity allocation model for back-end Cell process

Capacity allocation model for Module process No

Achieve output target?

Yes

Execute planning results

Fig. 3. Integrated structure of product-mix determination and capacity allocation for TFT-LCD manufacturing.

cost, and capacity loss cost. In the capacity allocation model for backend Cell process, we provide a capacity-supporting mechanism for various generation plants with higher utilization by using capacity backup across each site with the objective of minimizing the manufacturing cost and storage cost in the Array and front-end Cell processes and back-end Cell process. In addition, in Module process stage, the similar modeling technology can be applied. Since the purchase lead time of the critical machine is less than three months, the capacity expansion decision of adding new machine is permitted in the planning horizon and the objective of lowest machine investment cost is required.

3.1. Front plane laminate production planning model FPL is the critical material in Module process stage for EPD products. To avoid the shortage of FPL affecting the execution of the results of capacity allocations for the other sites in the supply chain, we present the FPL production planning model. The objective of FPL production planning model is to minimize the total storage cost of inventory and shortage cost in FPL factories on the premise of satisfying the practical constraints. Before the mathematical models are presented, the indices, parameters, and variables used in the formulations are listed below. Upper indices s index for the four process stages in TFT-LCD manufacturing, in which s = 1 denoted Array process stage, s = 2 denoted front-end Cell process stage, s = 3 denoted back-end Cell process stage, and s = 4 denoted Module process stage r outsourcing factory of TFT-LCD manufacturing l process in FPL factory a high or low season, in which a = 1 denoted low season and a = 2 denoted high season p product family, in which p = 1 denoted LCD product and p = 2 denoted EPD product Lower indices i index for product type, i = 1, . . . , I g index for generation of TFT-LCD manufacturing, g = 1, 2, . . . ,G, in which g = 1 denoted 2.5 G, g = 2 denoted 3.5 G, g = 3 denoted 5 G, and g = 4 denoted 6 G f index for factory with g generation and s process, f ¼ 1; . . . ; F sg e index for outsourcing supplier with g generation and r process, e ¼ 1; 2; . . . ; Erg j index for FPL factory with various l process, j = 1, 2, . . . , Jl (continued on next page)

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index for planning horizon, t = 1, 2, . . . , T, when a = 1, t 2 {1, 2, . . . , 18} and a = 2, t 2 {19, 20, . . . , 36}

in which involves the yield rates of FPL process and Module process stage. Constraints in (7) and (8) indicate that range constraints of the l;p¼2 FX l;p¼2 that should be greater than 0. i;j;t and SLV i;t

Caplj

available capacity of process l in FPL factory

3.2. Capacity allocation model for the Array and front-end Cell process stages

alii

binary parameter, if ali;j = 1, process l in factory j

t

Parameters

can produce product i; ali;j = 0, otherwise yield of process l for EPD product i

Y l;p¼2 i SCi,j Fori,t

cutting pieces of EPD product i in factory j forecast demand of product i in period t net demand of EPD product i of process l in period t beginning inventory level of EPD product i of process l beginning short quantity level of EPD product i of process l unit storage cost of process l of product i

NDl;p¼2 i;t INV l;p¼2 i;t¼0 SLl;p¼2 i;t¼0 Inv COl;p¼2 i Margini

unit margin profit of product i in TFT-LCD inhouse factory

Decision variables inventory level of EPD product i of process l in INV l;p¼2 i;t period t short quantity at the end of period t for EPD SLl;p¼2 i;t product i of process l l;p¼2 unsatisfactory quantity of product i in period t of OffFOST i;t process l release quantity of process l in factory j for EPD FX l;p¼2 i;j;t product i in period t shortage quantity of process l for EPD product i SLV l;p¼2 i;t in period t I X T X L   X Minimize INV l;p¼2  Inv COl;p¼2 i i;t i

t

l

t

Production-related parameters available monthly capacity of process s in Capsfg factory f g s bi;f g binary parameter, if bsi;f g ¼ 1, process s in factory f g can produce product i; bsi;f g ¼ 0, UseCapRatesi; f g s

Utilizaf g UtiCapsfg ;t UpCapr;a eg LoCapr;a eg UseCapRateri;eg

I X T X L   X l;p¼2 OffFOST i;t  Margini þ i

The objective of the second model is to minimize the total cost which involves the total outsourcing cost for Array substrate, manufacturing cost, and capacity loss cost for Array and front-end Cell process stages. Table 1 presents the various cutting pieces and manufacturing capability of various generations for the Array and front-end Cell process stages. To minimize the total cost, we present a mathematical model for Array and front-end Cell process stages. The production, inventory, demand, cost related parameters, and decision variables are listed as follows:

ð1Þ

l

dri;eg

subject to l FX l;p¼2 i;j;t 6 M  ai;j I   X l FX l;p¼2 i;j;t =SC i;j 6 Capj

8i; 8t; 8j; 8l; p ¼ 2 8t; 8j; 8l; p ¼ 2

ð2Þ

SCi,g

ð3Þ

Y si

ð4Þ

Y ri;e

ð5Þ

Inventory and demand-related parameters net requirement of product i in process s in NDsi;t period t final inventory of product i in process s in INV si;t period t

i

  l;p¼2 8i; 8t; 8l; p ¼ 2 SLl;p¼2 i;t1 ¼ min 0; SLV i;t l;p¼2 þ SLl;p¼2 ¼ INV l;p¼2 INV l;p¼2 i;t1  SLV i;t i;t i;t1 þ

J X FX l;p¼2 i;j;t j

 NDl;p¼2 i;t l;p¼2 OffFOST i;t

FX l;p¼2 i;j;t

8i; 8t; 8l; p ¼ 2 ¼

SLV l;p¼2 i;t



Y l;p¼2 i



Y s¼4 i

P 0 8i; 8t; 8l; j ¼ 1; p ¼ 2

SLV l;p¼2 P 0 8i; 8t; 8l; p ¼ 2 i;t

8i; 8t; 8l; p ¼ 2

otherwise capacity consumption rate of process s in factory f g for product i upper bound of monthly capacity utilization for process s in factory f g capacity utilization for process s in factory f g in period t upper bound of monthly capacity utilization in season a for process r in outsourcing factory e g lower bound of monthly capacity utilization in season a for process r in outsourcing factory eg capacity consumption rate of process r in outsourcing factory eg for product i binary parameter, if dri;eg = 1, process r in outsourcing factory eg can produce product i; otherwise the number of sheet of product i in generation g yield of process s in TFT-LCD factory for product i yield of process r in outsourcing factory eg for product i

ð6Þ ð7Þ ð8Þ

The objective function (1) states that the total storage cost of inventory and shortage cost in FPL factories is minimized. Constraints in (2) are contingent constraints, if process l in factory j cannot be used to produce product i ðali;j ¼ 0Þ, then the release quality is 0 ðFX l;p¼2 ¼ 0Þ. Constraints in (3) ensure that the equivalent produci;j;t tion quantity does not exceed available capacity. Constraints in (4) state that the shortage cannot be postponed to next period. Constraints in (5) guarantee that the summation of final inventory and shortage adjustment is equal to the quantity that the beginning inventory add the total release quantity and minus demand quantity. Constraints in (6) are used to evaluate the shortage of FPL factory

Cost-related parameters unit variable cost of product i in process s (per VCostsi sheet) unit variable outsourcing cost of product i in VCostri;eg process r in factory eg (per sheet) s monthly fixed cost in factory fg for Array and FCostf g front-end Cell processes Decision variables release quantity of substrate for product i in ASX si;f g ;t process s in factory fg release quantity of substrate for product i in AOX ri;eg ;t process r in factory eg, g 2 {2, 3, 4}

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Y.T. Tai et al. / Computers & Industrial Engineering 80 (2015) 201–211 Table 1 The cutting pieces and manufacturing capability of various generations for Array and front-end Cell process stages. Family

LCD

EPD

Product type Size (in.)

P1 1.91

P2 2.7

P3 7

P4 8

P5 10.4

P6 5

P7 6.3

P8 9.7

In-house factory (2.5 G, 370  470 mm)

Cutting piece Manufacturing capability

100 }

80 }

9 }

6 }

4 }

12 }

10 }

4 }

Outsourcing factory 1 (3.5 G, 620  750 mm)

Cutting piece Manufacturing capability

– x

200 }

21 }

15 }

9 }

30 }

24 }

9 }

Outsourcing factory 2 (5 G, 1100  1300 mm)

Cutting piece Manufacturing capability

– x

– x

– x

– x

32 }

– x

90 }

36 x

Outsourcing factory 3 (6 G, 1500  1800 mm)

Cutting piece Manufacturing capability

– x

– x

– x

– x

54 }

– x

168 }

60 }

Note: ‘‘}’’ indicates the product types can be manufactured in the factory and ‘‘x’’ indicates the product types cannot be manufactured in the factory.

The mathematical formulation of the product-mix determination problem for the Array and front-end Cell process stages is shown in the following:

s¼4 INV s¼4 i;tþdCT 1 =5eþdCT 2 =5e ¼ INV i;tþdCT 1 =5eþdCT 2 =5e1

þ

e

I X T X Eg   X Minimize AOX ri;eg ;t  SC i;g  Y ri;e  VCostri;eg t

i

þ

e

t

þ

s¼1 g ASX i;f ;t

t

þ

t

s¼1

 Y s¼1  VCosts¼2 i i s

s



Utilizaf g  UtiCapf g ;t  FCost sfg

i

ð9Þ

8i; 8f ; 8t; s ¼ 1; g 2 f1g

ð10Þ

AOX ri;eg ;t 6 M  dri;eg 8i; 8e; 8t; r ¼ 1; g 2 f2; 3; 4g ð11Þ I   X AOX ri;eg ;t  UseCapRateri;eg 6 UpCapr;a 8t; 8e; 8a; r ¼ 1 eg i

ð12Þ I   X AOX ri;eg ;t  UseCapRateri;eg P LoCapr;a eg

8t; 8e; 8a; r ¼ 1 ð13Þ

I   X s¼1 s¼1 ASX s¼1 6 Caps¼1 f g  Utilizaf g i;f ;t  UseCapRatei;f g

8t; 8f ; s ¼ 1

i

ð14Þ UtiCapf g ;t ¼

I  X

 s¼1 s¼1 ASX s¼1 i;f g ;t  UseCapRatei;f g =Capf g

8t; 8f ; s ¼ 1

i I   X s¼1 ASX s¼1  UseCapRates¼2 i;f ;t  Y i i;f g i s¼2

6 Caps¼2 f g  Utilizaf g I  X

8t; 8f ; s 2 f1; 2g

ð16Þ 

s¼1 ASX s¼1  UseCapRates¼2 8t; 8f ; s 2 f1;2g =Caps¼2 i;f fg i;f ;t  Y i

i

ð17Þ INV s¼4 i;tþdCT 1 =5eþdCT 2 =5e1 "

Eg  X e

AOX r¼1 8i; 8e; 8t; r ¼ 1; g 2 f2; 3; 4g i;eg ;t P 0

ð20Þ

ASX s¼1 8i; 8f ; 8t; g ¼ 1; s ¼ 1 i;f g ;t P 0

ð21Þ

The objective function (9) states that the total outsourcing cost for substrate in Array and front-end Cell process stages as well as manufacturing cost and capacity loss cost for Array and frontend Cell process stages in order to minimize total cost. Constraints in (10) are contingent constraints, if process s in factory fg cannot   be used to produce product i bsi;f g ¼ 0 , then the release quality   of substrate for Array process stage is 0 ASX si;f g ;t ¼ 0 . Constraints in (11) are contingent constraints, if process r in outsourcing fac  dri;eg ¼ 0 , then the

release quality of substrate for Array process stage is 0   AOX ri;eg ;t ¼ 0 . Constraints in (12) and (13) ensure that the calculated outsourcing capacity does not exceed the upper bound of available capacity and does not be less than the lower bound of available capacity for each outsourcing factory in high or low seasons. Constraints in (14) guarantee that the planned consumption capacity does not exceed the available capacity of Array process stage. Constraints in (15) are used to collect the value of difference s¼1

ð15Þ

þ

ð19Þ

tory eg cannot be used to produce product i

i

s¼2

s¼1

8i; 8s; 8t \ t

f

ASX si;f g ;t 6 M  bsi;f g

UtiCapf g ;t ¼

!

þ dCT 1 =5e þ dCT 2 =5e 6 T max ; 8g; r ¼ 1

subject to

s¼1

 SC i;g

3 Y  Y si



f

s¼2 X T X F h X

ASX s¼1 i;f g ;t

 NDs¼4 i;tþdCT 1 =5eþdCT 2 =5e

f

I X T X F  X i

Fg X f

I X T X F   X s¼1 s¼1 g þ ASX i;f ;t  VCost i i

Eg   X r¼1 s¼3 AOX r¼1 i;eg ;t  SC i;g  Y i;e  Y i

Fg 3  X Y r¼1 s¼3 AOX r¼1  SC  Y  Y ASX s¼1 Y si þ g i;g i;e i i;e ;t i;f ;t  SC i;g  f

!#

s¼1

P NDs¼4 i;tþdCT 1 =5eþdCT 2 =5e 8i; 8s; 8t \ t þ dCT 1 =5e þ dCT 2 =5e 6 T max ; 8g; r ¼ 1 ð18Þ

s¼1

between UtiCapf g ;t and Utilizaf g in order to be a reference for the idle capacity utilization for the objective function. Constraints in (16) guarantee that the total planned consumption capacity for each product type which is processed in Array process stage does not exceed the available capacity of the front-end Cell process stage. Constraints in (17) are used to collect the value of difference s¼2

s¼2

between UtiCapf g ;t and Utilizaf g in the front-end Cell process stage in order to be a reference for the idle capacity utilization of frontend Cell process stage for the objective function. Constraints in (18) are the demand fulfillment constraint, which indicate that summation of the beginning inventory of Module process stage, the total quantities of outsourcing Array factories and in-house Array process stage that are converted into the unit of pieces with consideration of cutting ratio should be greater than the demand of the Module process stage. In the constraints, the dCT1/5e + dCT2/5e is the corresponding number of

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f 1 factory

f 1 factory

f1 factory

f n factory

f n factory

fn factory

2.5 G

backup 3.5 G

f1 factory

e1 factory

fn factory

e n factory

backup 5G

f1 factory

e 1factory

fn factory

e n factory

backup 6G

e 1 factory

f1 factory

e n factory

fn factory

Fig. 4. Capacity backup for various generations in back-end Cell process stage.

period, in which CT1 denotes that manufacturing cycle time of Array and front-end Cell process stages and CT2 is the manufacturing cycle time of back-end Cell process stage. Constraints in (19) indicate that the final inventory of Module process stage is equal to the summation of the beginning inventory of Module process stage and total quantity of in-house and outsourcing factories with consideration of cutting ratio and minus the demand quantity of Module process stage. Constraints in (20) and (21) r¼1 s¼1 indicate that range constraints of the AOX i;e g ;t and ASX i;f g ;t that should be greater than 0. 3.3. Capacity allocation model for the back-end Cell process stages In the back-end Cell process stage, it should be noted that the process backup capability among various generations is a critical characteristic. In our investigated TFT-LCD manufacturing factory, the one-drop-fill (ODF) technology can largely reduce the liquid crystal filling up time than the conventional injection method. For example, with the conventional injection method it takes 2 days to fill up a 22-in. panel, but with the ODF method this task can be completed within 2 h only (Fan, Chen, Wang, & Pan, 2008). Thus, in the investigated factory, cutting operation is the bottleneck operation of back-end Cell process stage rather than the operation of liquid crystal injection. Cutting machines are usually designed with specific cutting plants for some process generations. In in-plant applications, cutting machines with higher generation capability can backup processes with lower ones. The machine capability backup relationships are shown in Fig. 4. In Fig. 4, 6 G cutting machines mainly used to cut the substrate of the sixth generation. However, they also can backup to cut substrates of the fifth generation. When the characteristic is considered, the capacity can be utilized fully and efficiently. In addition, the storage cost of the back-end Cell process is incurred when work in processes (WIPs) receiving from in-house and outsourcing factories in front-end Cell process stage are not released in the process stage. In the paper, we consider the capability backup and storage cost in the following mathematical models. The related parameters and decision variables are listed in the following: Production-related parameters binary binary, if /si;f g ;g 0 ¼ 1, process s in /s¼3 i;f g ;g 0 ;t factory f g can produce product i of generation g0 in period t; /si;f g ;g 0 ¼ 0, otherwise, " (g, g0 ), g – g0 , g > g0

Xs¼3 i;g  ;t

ClXs¼3 i;g  ;t

total receipt quantity of various generations g⁄ in back-end Cell process stage which are collected from various generations of product i for front-end Cell process stage, g⁄ 2 G planned release quantity based on the

SCaps¼3;a g i;f ;g

receipt quantity Xs¼3 i;g  ;t available monthly capacity of product i of same generation g for cutting process s(s = 3) in factory fg in season a

GenSurs¼3 i;f g ;g 0

binary parameter, if GenSur s¼3 i;f g ;g 0 ¼ 1, factory fg can produce product i of generation g0 ; g otherwise, GenSur s¼3 i;f ;g 0 ¼ 0

SupportCaps¼3;a g i;f ;g 0

available monthly support capacity of product i of generation g0 in process s(s = 3) in factory fg in season a, g > g0

Inventory and demand-related parameters final inventory of product i in various INV si;t process in period t beginning inventory of semi-product of BeINVOsi product i in process s final inventory of semi-product of product i BeINV si;t in process s in period t final inventory of product i of generation g BeScINV s¼3 i;g;t before cutting process s (s = 3) in period t Cost-related parameters total in-house variable cost of product i in TVCostsi;t process s in period t total outsourcing variable cost of product i TVCostri;t in process r in period t s¼3 unit storage cost before cutting processing BefScInv COi;g for product i of generation g (per substrate) unit storage cost after cutting processing ScInv COs¼3 i for product i of generation g (per panel) Decision variables for back-end Cell process stages release quantity of substrate for product i of CSX s¼3 i;f g ;g;t generation g in period t in process s (s = 3) in factory fg release quantity of substrate due to support g SupportCSX s¼3 i;f ;g 0 ;t for product i of generation g0 in period t in process s(s = 3) in factory fg, "(g, g0 ), g – g0 , g > g0

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binary variable, if /si;f g ;g 0 ;t ¼ 1, process s in

g /s¼3 i;f ;g 0 ;t

s¼3 ClXs¼3 i;g  ;t þ BeScINV i;g¼g  ;t1 P

factory fg can produce product i of generation g0 in period t; /si;f g ;g 0 ;t = 0,

F X CSX s¼3 i;f g ;g¼g  ;t f

F X G X þ SupportCSX s¼3 i;f g ;g 0 ¼g  ;t

otherwise, "(g, g0 ), g – g0 , g > g0

8i; 8t; 8ðg; gÞ;

g

f

s ¼ 3; g – g 0 ; g  2 G Minimize

I X G X T  X

þ

I X T  X

"

t

s¼3 INV s¼3 i;t  ScInv COi

INV s¼3 i;t1



s CSX s¼3 i;f g ;g;t  SC i;g  VCost i

g

f

P NDs¼3 i;t



s¼3 CSX s¼3 i;f g ;g;t 6 M  bi;g

6

GenSursi;f g ;g0

8i; 8f ; 8g; 8t; s ¼ 3

ð23Þ

8i; 8f ; 8ðg; g 0 Þ; 8t; s ¼ 3; g – g 0

s SupportCSX s¼3 i;f g ;g 0 ;t 6 M  /i;f g ;g 0 ;t

ð24Þ

8i; 8f ; 8ðg; g 0 Þ; 8t; s ¼ 3; g – g 0 ð25Þ

I  I   X  X s¼3 s¼3;a s¼3;a g CSX i;f SupportCSX s¼3 þ i;f g ;g 0 ;t =SupportCapi;f g ;g 0 ;g;t =SCapi;f g ;g i

6

Xs¼3 i;g  ;t

8t; 8f ; 8ðg; g 0 Þ; s ¼ 3; g – g 0

f

 SC i;g0



#

ðg;g 0 Þ

8i; 8t; 8ðg; g 0 Þ; s ¼ 3; g – g 0

ð29Þ

s¼1

f

8i; 8t \ t  dCT 1 =5e P 1; 8g; g  2 G; s 2 f1; 2; 3g; r ¼ 1 ð27Þ

e 1 factory

Panned release for each product

IC 1 *1 IC 2 *1

P2

IC 1 *1 IC 2 *1

P3

IC 2 *1 IC 4 *2

Machine group 1

P4

IC 2 *2 IC 3 *1

Machine group 2

P5

IC 4 *1 IC 5*1

Machine group 3

P8

IC 3 *1 IC 6 *3

Machine group 2

Machine group 3

LCD

Product type Size (in.) Cutting piece

P1 1.91 100

EPD P2 2.7 80

P3 7 9

P4 8 6

P5 10.4 4

P6 5 12

P7 6.3 10

P8 9.7 4

Glass substrate 2.5 G

}

}

}

}

}

}

}

x

3.5 G

2.5 G 3.5 G

} x

} }

} }

} }

} }

} }

} }

x }

5G

2.5 G 3.5 G 5G

} x x

} } x

} } x

} } x

} } }

} } x

} } }

x } x

6G

2.5 G 3.5 G 5G 6G

} x x x

} } x x

} } x x

} } x x

} } } }

} } x x

} } } }

x } x }

Note: ‘‘}’’ represents the product type can be manufactured in the factory. ‘‘x’’ represents the product type cannot be manufactured in the factory.

Demanded IC IC beginning amount inventory Item*amount

P1

Machine group 1

Family

2.5 G

ð26Þ

( !) E F 2 X X Y r s¼1 s ¼ AOX i;eg ;g¼g ;tdCT 1 =5e þ ASX i;f g ;g¼g ;tdCT 1 =5e  Y i e

g

SupportCSX s¼3 i;f g ;g 0 ;t

Equipment

i s¼3 Utilizaf g

 SC i;g þ

Fg X G  X

Table 2 The manufacturing capability of various generations and cutting pieces for back-end Cell process stage.

subject to

/si;f g ;g0 ;t



ð22Þ

ðg;g 0 Þ t

f

CSX s¼3 i;f g ;g;t

t

I X Fg X G X T   X s SupportCSX s¼3 i;f g ;g 0 ;t  SC i;g 0  VCost i i

þ

Fg X G  X f

I X Fg X G X T  X i

þ

g

t

i

þ

s¼3

BeScINV s¼3 i;g;t  BefScInv COi;g

i

ð28Þ



IC Planned receipts

e n factory

Fig. 5. Capacity allocation and calculating logic for ICs in Module process stage.

208

Y.T. Tai et al. / Computers & Industrial Engineering 80 (2015) 201–211

s¼3 s¼3 s¼3 BeScINV i;g¼g  ;t ¼ BeScINV i;g¼g  ;t1 þ Xi;g  ;t s¼3 i;g  ;t

8i; 8t; 8g; g

 ClX

Table 5 Outsourcing costs in Array and front-end Cell process factories.



2 G; s ¼ 3 INV s¼3 i;t

¼

INV s¼3 i;t1

ð30Þ

" g F X G   X þ CSX s¼3 i;f g ;g;t  SC i;g f

g

Fg X G   X þ SupportCSX s¼3 i;f g ;g 0 ;t  SC i;g 0 f



#

Product family (p)

Factory (r)

Glass substrate

Outsourcing cost/   Sub VCostri;eg

LCD (10.4 in.)

A B C

620  750 mm2 1100  1300 mm2 1500  1800 mm2

330/ 3.5 G Sub 800/ 3.5 G Sub 1200/ 3.5 G Sub

9 28 

EPD (6.3 in.)

A B C

620  750 mm2 1100  1300 mm2 1500  1800 mm2

280/ 3.5 G Sub  1100/3.5 G Sub

24 90 168

ðg;g 0 Þ

NDs¼3 i;t

CSX s¼3 i;f g ;g;t P 0;

8i; 8t; 8ðg; g 0 Þ; s ¼ 3; g – g 0

ð31Þ

8i; 8f ; 8g; 8t; s ¼ 3

SupportCSX s¼3 i;f g ;g 0 ;t P 0;

ð32Þ

8i; 8f ; 8ðg; g 0 Þ; 8t; s ¼ 3; g – g 0

Note:  represents the cost of the product are hidden.

Table 6 Forecast demand for each product type (unit: thousand pieces).

ð33Þ

Table 3 The manufacturing capability of various factories for Module process stage. Family

LCD

Product type Size (in.) Cutting piece

P1 1.91 100

EPD P2 2.7 80

P3 7 9

P4 8 6

P5 10.4 4

P6 5 12

P7 6.3 10

P8 9.7 4

Factory

Glass substrate

100

80

9

6

4

12

10

4

F1

MG1 MG2 MG3 MG4

} } x x

} } x x

} } x x

x } } x

x } } x

x x } x

x x } x

x x } x

F2

MG1 MG2 MG3 MG4

x } x x

x } x x

x } x x

x } } x

x } } x

x x } }

x x } }

x x } }

Note: ‘‘}’’ represents the product type can be manufactured in the factory. ‘‘x’’ represents the product type cannot be manufactured in the factory. ‘‘MG’’ represents machine group.

Table 4 Variable costs in the in-house factory of TFT-LCD process stages. Product family (p) Product type (i)

LCD product

EPD product

P1

P2

P3

P4

P5

P6

P7

P8

Size (in.) Cutting piece (SCi,j) Price/pcs Variable cost in Module/pcs   VCostsi Variable cost in back-end Cell/pcs   VCostsi Variable cost in front-end Cell/sub   VCostsi Variable cost in Array/sub   VCostsi Variable cost in Array and front-end Cell/panel Unit margin (Margini)

1.91 100

2.7 80

7 9

8 6

10.4 4

5 12

6.3 10

9.7 4

19 5

26 6.8

63 10.5

79.5 11.5

120 18

46 11

 15

112 20

0.20

0.25

2.20

3.20

4.20

0.40

0.50

1.05

27

27

27

27

27







60

60

60

60

60

70





0.98

1.22

10.86

16.3

24.44

6.14



18.41

12.4

17.2

38.5

47.4

71.6

28





Note:  represents the cost of the product are hidden.

Cutting pieces

Low season (Fori,t) High season (Fori,t)

Product family (p) Product type (i)

LCD product P1

P2

P3

P4

P5

P6

P7

P8

Size (in.) Cutting piece (SCi,j) Month 1 Month 2

1.91 100

2.7 80

7 9

8 6

10.4 4

5 12

6.3 10

9.7 4

200 210

300 310

200 220

100 140

100 130

100 120

1500 1600

500 550

Month Month Month Month

250 250 390 390

330 390 400 405

250 350 400 420

150 165 190 200

150 160 180 190

130 150 180 200

1800 2000 2500 3000

600 790 870 950

3 4 5 6

EPD product

Table 7 Planning results for release quantity and inventory in FPL manufacturing. FPL mfg. Period

18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

Release quantity Product

Inventory

P6

P7

P8

P6

P7

P8

18,871 18,871 18,871 18,871 18,871 18,871 22,645 22,645 22,645 22,645 183,346 305,365 234,096 69,783 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

289,352 289,352 289,352 289,352 289,352 289,352 308,642 308,642 308,642 308,642 308,642 308,642 347,223 347,223 347,223 347,223 694,446 0 385,803 385,803 385,803 385,803 385,803 385,803 482,254 482,254 482,254 482,254 482,254 482,254 578,704 578,704 578,704 578,704 578,704 578,704

98,643 98,643 98,643 98,643 98,643 98,643 108,507 108,507 108,507 108,507 108,507 108,507 118,372 185,591 214,139 214,139 40,527 387,750 194,849 194,849 194,849 194,849 194,849 194,849 146,623 146,623 146,623 146,623 146,623 146,623 98,398 98,398 98,398 98,398 98,398 98,398

0 0 0 0 0 0 0 0 0 0 160,701 443,421 652,984 698,234 673,701 649,168 624,635 600,102 571,795 543,488 515,181 486,874 458,567 430,260 396,292 362,324 328,356 294,388 260,420 226,452 188,710 150,968 113,226 75,484 37,742 0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 347,223 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 0 67,219 162,986 258,752 180,907 450,285 489,278 528,270 567,263 606,255 645,248 684,240 659,224 634,208 609,192 584,176 559,160 534,144 445,120 356,096 267,072 178,048 89,024 0

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Y.T. Tai et al. / Computers & Industrial Engineering 80 (2015) 201–211

The objective function (22) states that the total storage cost of surplus inventory in Array and front-end Cell process stage and storage cost of back-end Cell process substrate as well as manufacturing cost in order to minimize total cost. Constraints in (23) are contingent constraints, if process s in factory fg cannot be used to   produce product i bsi;f g ¼ 0 , then the release quality of substrate   for back-end Cell process stage is 0 CSX s¼3 i;f g ;g;t ¼ 0 . Constraints in

(29) denote that the total release quantities are greater than the demand of the back-end Cell process stage. Constraints in (30) indicate the relationships of the semi-product. That is, the final inventory level of process before cutting for the back-end Cell process is equal that the summation of the beginning inventory level adds the receipt quantity and subtracts the planned release quantity. Constraints in (31) indicate the relationships of the final products. In other words, the final inventory of back-end Cell process is equal to the summation of the beginning inventory and the release quantity collected from the outsourcing and in-house factories and subtract the demand of back-end Cell process. Constraints in (32)

(24) are also contingent constraints which are used to indicate the support capability for various generations. If the factory fg cannot be used to support the generation g0 for product i   then the related binary variable is 0 GenSurs¼3 i;f g ;g 0 ¼ 0 ,   s¼3 /i;f g ;g0 ;t ¼ 0 . Constraints in (25) are used to ensure that if the fac-

and

(33)

indicate

that

constraints

of

the

CSX s¼3 i;f g ;g;t

and

SupportCSX s¼3 i;f g ;g 0 ;t

that should be greater than 0. In the section, three mathematical models are presented. However, in Module process stage, the similar modeling techniques can be applied to formulate other mathematical model for the stage. It is noted that the chip on glass (COG) bonder is the critical machine for both EPD and LCD products. FPL and related ICs are essential materials in the stage. The objective function of Module process stage can be set to minimize the investment of new-added machine since manufacturing capability is the main constraint in this process stage. In addition, as the purchase lead time of essential IC is one month, to obtain the purchase quantity and time of ICs, bill of material of IC, related purchase lead time, beginning inventory, planned receipts of IC, and release quantity of each

tory fg cannot be used to support the generation g0 for product i in   period t /s¼3 i;f g ;g 0 ;t ¼ 0 , then the release quantity for support is 0. Constraints in (26) guarantee that the total capacity load of the release quantity does not exceed the designated upper bound of monthly utilization. Constraints in (27) indicate that the summation of receipt quantity of various generations in back-end Cell process stage is equal to the outsourcing quantity and in-house quantity. Constraints in (28) indicate that the summation quantity of planned release quantity and the inventory of the semi-product before cutting process are greater than and equal to the total release quantity of the back-end Cell process stage. Constraints in

Table 8 Capacity allocation for outsourcing factories in Array and front-end Cell process stages. Family

LCD product

Outsourcing factory

3.5 G Factory A Product

6G Factory C

3.5 G Factory A

3.5 G Factory A

P4

P5

P6

P7

1257 1257 1257 1257 1257 512 0 0 0 0 0 0 0 0 0 0 0 0 4148 0 2092 0 0 5783 0 0 5106 0 0 7062 0 0 1951 2327 2327 2327

342 3045 0 0 0 0 0 0 0 1847 0 0 0 1539 0 0 6157 0 0 0 0 0 0 0 0 0 0 5747 0 0 0 0 0 0 0 0

591 591 591 591 591 6378 0 0 0 0 0 0 0 0 1535 0 768 768 886 886 886 1772 0 3012 0 0 5433 0 0 0 0 1181 1181 1181 1181 1181

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10,000 10,000 4115 10,000 8819 7193 6880 6880 0

Period

16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

EPD product 5G Factory B

6G Factory C

7500 7500 7500 7,500 7500 7500 7500 7500 7500 7500 7500 7500 7500 7500 7500 7500 7500 7500 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5211 10,000 10,000 10,000 10,000 10,000 10,000 10,000 0

3.5 G Factory A

6G Factory C

P8 5862 5862 5862 5862 5862 696 7500 7500 7500 7500 7500 7500 7500 7500 5965 7500 6732 6732 5657 9114 7371 8228 10,000 2169 10,000 10,000 312 0 0 0 0 0 0 0 0 6880

7215 4963 7500 7500 7500 7500 7500 7500 7500 5961 7500 7500 7500 6217 7500 7500 2369 7500 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 10,000 0 0 0 0 0 0 0 0 10,000

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Y.T. Tai et al. / Computers & Industrial Engineering 80 (2015) 201–211

factory are considered. Fig. 5 presents the calculating logic for Module process stage.

4. Model application and industrial practice To demonstrate the applicability of the proposed mathematical models, we consider a TFT-LCD company and its headquarter is located in the Science-Based Industrial Park at Hsinchu, Taiwan. In the investigated TFT-LCD manufacturing company, multi-stage, multi-site, and multi-generation TFT-LCD and FPL manufacturing processes are considered. There are two in-house factories of 2.5 G (370  470 mm2 substrate) for Array and front-end Cell process stages. The other capacity of Array and front-end Cell process stages are contracted from three various generations of outsourcing factories involving 3.5 G (620  750 mm2 substrate), 5 G (1100  1300 mm2 substrate), and 6 G (1500  1800 mm2 substrate). In addition, one back-end Cell process factory and one Module process factory are located in China. One FPL process factory is located in USA. In the TFT-LCD and the FPL factories, there are eight product types are clustered into two product families (LCD and EPD) in which there are five LCD product types and three EPD product types. In Table 2, we present the manufacturing capability and the associated cutting pieces for various product types and generations in back-end Cell process stage. Table 3 shows the manufacturing capability and machine groups in two Module factories. In addition, the manufacturing capability in the other process stages, upper bound and lower bound of outsourcing capacity, and yield for the multi-product and multi-generation are known.

4.3. Computational results To obtain the optimal planning solutions for the FPL manufacturing, Array, Cell, and Module process stages, we apply our developed mathematical models, which are implemented using a commercial software package. In the mathematical model of FPL manufacturing we investigated, the model contains 968 variables and 789 equations. The minimal cost involving storage cost and shortage cost is 114,226 and the computational time is 2 CPU seconds. The release quantity for each period and planned inventory are shown in Table 7. The planning results can satisfy the demand of Module process stage. In the following, we apply the proposed models and obtain the product mix and release quantity. Tables 8 and 9 show the results of capacity allocation for the Array and front-end Cell process stages which include two kinds of factories: in-house and outsourcing. In the model, it contains 1840 variables and 3742 equations. The minimal cost involving outsourcing cost, manufacturing cost and loss cost of the in-house factory is 697,589,600 and the computational time is 12 CPU seconds. The capacity allocations for the multi-stage, multi-site, multi-generation, and multi-product for each period are shown in Tables 8 and 9. In Table 8, it can be seen that the integrated allocation results are obtained for heterogeneous products (LCD and EPD products) in the three outsourcing factories with various manufacturing capability.

Table 9 Capacity allocation for the in-house factory in Array and front-end Cell process stages. In-house factory

4.1. Cost information It is noted that the objective function in the three models for product mix determination and capacity allocation are cost based. Thus, the cost information and evaluation are very essential. In the paper, the cost structure of TFT-LCD involves variable cost, fixed cost, variable overhead, and fixed overhead. According the accounting rules in Taiwan, the cost of idle capacity should be regarded as expenses. Thus, in the paper, if the capacity load is too low, then the difference between the planned and actual capacity utilization should be converted to the cost regarding idle capacity. Table 4 shows the sales variable cost in the in-house factory in Array and front-end Cell process stages. Table 5 presents outsourcing cost required for two outsourcing products including 10.4 in. LCD product and 6.3 in. EPD product in the three outsourcing factories we involved in the case for Array and front-end Cell process stages. In addition, storage costs for FPL and TFT-LCD manufacturing are also considered in the case.

4.2. Production information In the paper, the planning horizon is set to six months and time bucket is five days. Thus, there are thirty-six planning periods in whole planning horizon and six periods in one month. The forecast demand is presented in Table 6. In Table 6, the six-month planning horizon involves low season and high season. We first convert the monthly demand shown in Table 6 into the periodical demand. For example, P7 requires the 1500K pieces in the first month. We assume the first month is labeled as from period 20 to period 25. Thus, when the cycle time, yield, inventory are considered, the demand in Module process stage is equal to 260,417 pieces in period 19.

Period

16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

Array process stage

Front-end Cell process stage

LCD product Product

LCD product

P1

P2

P3

P4

P1

P2

P3

P4

377 377 377 377 377 377 1583 0 0 0 1734 0 0 0 471 471 471 1131 0 1979 0 0 2055 0 0 735 735 735 735 735 735 735 735 735 735 735

5434 5434 5434 5434 0 0 8417 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 27 0 0 0 0 0 0 0 0 0 0

4189 4189 4189 4189 9623 3362 0 5602 5602 2619 6851 2364 5236 8578 1893 7740 4817 4157 10,000 8021 10,000 294 7330 7330 10,000 9238 9265 9265 4119 8377 9265 9265 7858 8796 8796 8796

0 0 0 0 0 6261 0 4398 4398 7381 1415 7636 4764 1422 7635 1789 4712 4712 0 0 0 9706 615 2670 0 0 0 0 5146 888 0 0 1407 469 469 469

373 373 373 373 373 373 1567 0 0 0 1717 0 0 0 466 466 466 1120 0 1959 0 0 2034 0 0 728 728 728 728 728 728 728 728 728 728 728

5380 5380 5380 5380 0 0 8333 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 27 0 0 0 0 0 0 0 0 0 0

4147 4147 4147 4147 9527 3328 0 5546 5546 2593 6782 2340 5184 8492 1874 7663 4769 4115 9900 7941 9900 291 7257 7257 9900 9146 9172 9172 4078 8293 9172 9172 7779 8708 8708 8708

0 0 0 0 0 6198 0 4354 4354 7307 1401 7560 4716 1408 7559 1771 4665 4665 0 0 0 9609 609 2643 0 0 0 0 5095 879 0 0 1393 464 464 464

211

Y.T. Tai et al. / Computers & Industrial Engineering 80 (2015) 201–211 Table 10 Aggregative capacity allocation from period 18 to period 25 for various generation and products (unit: thousand piece). Aggregative allocation

Same generation

Different generation support

Equipment in various generation

Product family

LCD product

Product type Size (in.)

P1 1.91

3.5 G 5G 6G 2.5 G

3.5 G substrate 5 G substrate 6 G substrate 2.5 G substrate

3.5 G 5G 6G

2.5 G substrate 3.5 G substrate 3.5 G substrate 5 G substrate

Additionally, we also can obtain the results of capacity allocation for the back-end Cell process stage. To simply the result presentation, we show the aggregative capacity allocation from period 18 to period 25 in Table 10. It can be found that different generation equipments can fully support the other generation substrates. In Module process stage, the capacity allocation, suggested number of new added machine and purchase quantity of the required IC are also can be obtained using the developed model. 4.4. Discussion To increase the flexibility of the product mix determination and capacity allocation, we perform a sensitivity analysis to investigate the changes of outsourcing price in the Array and front-end Cell process stages. Since heterogeneous products (EPD and LCD products) are involved in the cases, we note that the manufacturing process of EPD products does not include the front-end Cell process stage. Consequently, the changes of outsourcing price mainly affect the allocation quantity of in-house and outsourcing factories. It   should be noted that the outsourcing price VCostri;eg is shown in the objective function of the mathematical model for capacity allocation in Array and front-end Cell process stages. We identify the allowable objective coefficient range for the outsourcing price applying a sensitivity analysis. In our analysis, we observe the P7 product which is an EPD product family in a specific planning period. P7 product can be produced in 3.5 G, 5 G, and 6 G outsourcing factories. However, in the 3.5 G and 6 G factories, the allowable increase and decrease in the objective coefficient ranges are 0. It can be said that the optimal  outsourcing quantity AOX ri;eg ;t should be reallocated when the current outsourcing prices in the 3.5 G and 6 G factories change. In addition, in the 5 G factory, the allowable increase and decrease of objective coefficient ranges are 117.7 and 712.8, respectively. Thus, when the outsourcing prices of P7 product in the 5 G factory fall in the allowable range, the current optimal outsourcing quantity remains optimal. Consequently, it is a useful reference point to determine the allowable range of outsourcing price to stay optimal. 5. Conclusions This paper tackled the product mix determination and capacity allocation problem for multi-stage, multi-site, and multi-generation thin-film transistor liquid crystal display (TFT-LCD) manufacturing, which has many real-world applications. In the TFT-LCD company we investigated, heterogeneous products coexist which

P2 2.7

EPD product P3 7

P4 8

P5 10.4

5206

P6 5

P7 6.3

4862

P8 9.7 16,071

18,577 2882 2932

3439

18,600

2485

2037

14,385

11,053

9166

1279 4979

include typical LCD products and new merged electronic-paper display (EPD) products. In this paper, to ensure the supply of key material for EPD products, we presented a front plane laminate production planning mathematical model. In addition, to minimize the total cost, the product mix determination and capacity allocation problem is formulated as linear programming models for Array, Cell, and Module process stages in TFT-LCD manufacturing considering net demand, inventory level, yield rates, cost, margin, outsourcing allocation, cycle time, and panel conversion rate. To demonstrate the applicability of the proposed models, a real-world application taken from a TFT-LCD company is solved to obtain the proper product mix and capacity allocation within a few CPU seconds. To increase the flexibility of the product mix determination and capacity allocation for the varied manufacturing environments, sensitivity analysis is also provided. References Chen, W. L., Huang, C. Y., & Lai, Y. C. (2009). Multi-tier and multi-site collaborative production: Illustrated by a case example of TFT-LCD manufacturing. Computers & Industrial Engineering, 57(1), 61–72. Fan, K. C., Chen, J. Y., Wang, C. H., & Pan, W. C. (2008). Development of a drop-ondemand droplet generator for one-drop-fill technology. Sensors and Actuators A: Physical, 147, 649–655. Jeong, B., Sim, S. B., Jeong, H. S., & Kim, S. W. (2002). An available-to-promise system for TFT-LCD manufacturing in supply chain. Computers & Industrial Engineering, 43, 191–212. Lin, J. T., & Chen, Y. Y. (2007). A multi-site supply network planning problem considering variable time buckets – A TFT-LCD industry case. International Journal of Advanced Manufacturing Technology, 33, 1031–1044. Lin, J. T., Chen, T. L., & Chen, W. J. (2007). Capacity and product mix planning problem for TFT array multi-plant. Journal of the Chinese Institute of Industrial Engineers, 24(6), 489–505. Lin, J. T., Chen, T. L., & Lin, Y. T. (2009). Critical material planning for TFT-LCD production industry. International Journal of Production Economics, 122, 639–655. Lin, J. T., Hong, I. H., Wu, C. H., & Wang, K. S. (2010). A model for batch available-to promise in order fulfillment processes for TFT-LCD production chains. Computers & Industrial Engineering, 59, 720–729. Lin, J. T., Wang, F. K., & Peng, C. C. (2008). Lot release times and dispatching rule for a TFT-LCD cell process. Robotics and Computer-Integrated Manufacturing International, 24, 228–238. Lin, J. T., Wu, C. H., Chen, T. L., & Shih, S. H. (2011). A stochastic programming model for strategic capacity planning in thin film transistor-liquid crystal display (TFTLCD) industry. Computers & Operations Research, 38, 992–1007. Lu, H. C., Huang, Y. H., & Tseng, K. A. (2013). An integrated algorithm for cutting stock problems in the thin-film transistor liquid crystal display industry. Computers & Industrial Engineering, 64, 1084–1092. Tsai, K. M., & Wang, S. C. (2009). Multi-site available-to-promise modeling for assemble-to-order manufacturing – An illustration on TFT-LCD manufacturing. International Journal of Production Economics, 117, 174–184. Wang, A. H., Hwang, S. L., & Kuo, H. T. (2012). Effects of bending curvature and ambient illuminance on the visual performance of young and elderly participants using simulated electronic paper displays. Displays, 33(1), 36–41.