Programmable Logic Controller for Embedded Implementation of Input-Constrained Systems*

The International Federation of Congress Automatic Control Proceedings of 20th Proceedings of the the 20th World World The International Federation of Congress Automatic Control Toulouse, France, July 2017 The Federation of Automatic Control Proceedings of the 20th9-14, World The International International Federation of Congress Automatic Control Toulouse, France, July 9-14, 2017 Available online at www.sciencedirect.com Toulouse, France, July 9-14, 2017 The International of Automatic Control Toulouse, France,Federation July 9-14, 2017 Toulouse, France, July 9-14, 2017

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IFAC PapersOnLine 50-1 (2017) 14412–14417 Programmable Logic Controller for Programmable Logic Controller for Programmable Logic Controller for Programmable Logic Controller for Embedded Implementation of Programmable Logic Controller for Embedded Implementation of Embedded Implementation of  Embedded Implementation of Input-Constrained Systems Embedded Implementation of  Input-Constrained Systems Input-Constrained Systems Input-Constrained Systems  Input-Constrained Systems Richard M. Levenson ∗∗ Zachary E. Nelson ∗∗ ∗∗

Richard M. Levenson ∗ Zachary E. ∗∗ ∗ Nelson ∗ Adegbege Richard Levenson Zachary Ambrose A. ∗ Nelson Richard M. M. Levenson Zachary E. E. Nelson ∗∗ Ambrose A. ∗ Adegbege ∗∗ ∗ Richard M. Levenson Zachary E. ∗ Nelson Ambrose A. Adegbege Adegbege Ambrose A. ∗ ∗ Ambrose A. Adegbege ∗ Department of Electrical and Computer Engineering, The College of ∗ Department of Electrical and Computer Engineering, The College of ∗ Department of and Engineering, The New Jersey, Ewing, NJ 08628-0718, USA (e-mail: [email protected], Department of Electrical Electrical and Computer Computer Engineering, The College College of of New Jersey, Ewing, NJ 08628-0718, USA (e-mail: [email protected], ∗ Department of Electrical and Computer Engineering, The College of New Jersey, Ewing, NJ 08628-0718, USA (e-mail: [email protected], [email protected]). New Jersey, Ewing, NJ 08628-0718, USA (e-mail: [email protected], [email protected]). ∗∗ Jersey, Ewing, NJ 08628-0718, New USA (e-mail: [email protected], [email protected]). and Computer Engineering, The Johns ∗∗ Department of Electrical [email protected]). and Engineering, The ∗∗ Department of Electrical [email protected]). ∗∗ Department of Electrical Electrical and Computer Computer Engineering, The Johns Johns Hopkins University, Baltimore, MD 21218, USA (e-mail: Department of and Computer Engineering, The Johns Hopkins University, Baltimore, MD 21218, USA (e-mail: ∗∗ Department of Electrical and Computer Engineering, The Johns Hopkins Baltimore, MD 21218, USA (e-mail: [email protected]). Hopkins University, University, Baltimore, MD 21218, USA (e-mail: Hopkins University,[email protected]). Baltimore, MD 21218, USA (e-mail: [email protected]). [email protected]). [email protected]). Abstract: Programmable logic controllers (PLCs) have the benefit of being able to withstand Abstract: Programmable Programmable logic logic controllers controllers (PLCs) (PLCs) have have the the benefit benefit of of being being able able to to withstand withstand Abstract: a variety of environments while maintaining high reliability compared to computers and other Abstract: Programmable logic controllers (PLCs) have the benefit of being able to withstand a variety of environments while maintaining high reliability compared to computers and other Abstract: Programmable logic controllers (PLCs) have the benefit of being able to withstand a variety of environments while maintaining high reliability compared to computers and other controllers. Traditionally, PLCs have been used for simple ON-OFF control schemes or for acontrollers. variety of Traditionally, environments while maintaining high reliability compared to computers and or other PLCs have been used for simple ON-OFF control schemes for a variety of environments while maintaining high reliability compared to computers and other controllers. Traditionally, PLCs PLCs(PID) have control. been used used for simple simple ON-OFF control schemes or or for proportional-integral-derivative However, recent developments in technology have controllers. Traditionally, have been for ON-OFF control schemes for proportional-integral-derivative (PID) control. However, recent developments in technology have controllers. Traditionally, PLCs have control. beenmore used for simple ON-OFF control schemes or for proportional-integral-derivative (PID) However, recent developments in have allowed even low-cost PLCs to implement advanced and efficient algorithms. This paper proportional-integral-derivative (PID) control. However, recent in technology technology have allowed even even low-cost low-cost PLCs PLCs to to implement implement more advanced and developments efficient algorithms. algorithms. This paper paper proportional-integral-derivative (PID) control. However, recent developments in technology have allowed more advanced and efficient This investigates a PLC implementation of the specialized Projected Gauss-Seidel (PGS) algorithm. allowed evena low-cost PLCs to implement more advanced and efficient algorithms. paper investigates PLC implementation of the specialized specialized Projected Gauss-Seidel (PGS)This algorithm. allowed even PLCs to implement more advanced andboth efficient algorithms. This paper investigates a PLC of Projected Gauss-Seidel (PGS) algorithm. The PGS algorithm is able to quickly and efficiently solve symmetric and asymmetric investigates a low-cost PLC implementation implementation of the the specialized Projected Gauss-Seidel (PGS) algorithm. The PGS algorithm is able to quickly and efficiently solve both symmetric and asymmetric investigates a PLC implementation of the specialized Projected Gauss-Seidel (PGS) algorithm. The PGS algorithm algorithm is able able to to quickly and efficiently solve both symmetric and asymmetric mathematical programming problems. The algorithm can be further utilized to solve more The PGS is quickly and efficiently solve both symmetric and asymmetric mathematical programming problems. The algorithm solve can be be further utilizedand to asymmetric solve more more The PGS algorithm issuch able as to quicklypredictive and efficiently both symmetric mathematical programming problems. The algorithm can further utilized to solve complicated problems model control (MPC). The focus of this paper is to mathematical programming problems. The algorithm can be further utilized to solve more complicated problems such as model predictive control (MPC). The focus of this paper is to to mathematical programming problems. The algorithm can betofurther utilized to paper solve more complicated problems such as model predictive control (MPC). The focus of this is solve a general constrained optimization problem on a PLC and expand the capability to solve complicated problems such as model predictive control (MPC). The focus of this paper is to solve a general constrained optimization problem on a PLC and to expand the capability to solve complicated problems suchoptimization as model predictive control (MPC). focus this paper is to solve a constrained problem on aexploited PLC and to expand the to a MPC example. The DirectLogic Do-More PLC is for computational efficiency solve a general general constrained optimization problem PLC andboth to The expand theofcapability capability to solve solve a MPC MPC example. The DirectLogic DirectLogic Do-More PLCon is aaexploited exploited both for computational computational efficiency solve a general constrained optimization problem on PLC andboth to expand the capabilityefficiency to solve a example. The Do-More PLC is for for memory utilization. aand MPC example. The DirectLogic Do-More PLC is exploited both for computational efficiency and for memory memory utilization. a MPC example.utilization. The DirectLogic Do-More PLC is exploited both for computational efficiency and for and for IFAC memory utilization. © 2017, (International Federation of Automatic Control) Hosting by Elsevier Ltd. All rights reserved. and for memory utilization. Keywords: Projected Gauss-Seidel, Programmable Logic Controller, Input-Constrained Keywords: Projected Gauss-Seidel, Programmable Logic Controller, Input-Constrained Keywords: Projected Gauss-Seidel, Programmable Logic Logic Controller, Controller, Input-Constrained Input-Constrained Systems, Model Predictive Control Keywords: Projected Gauss-Seidel, Programmable Systems, Model Predictive Control Keywords: Projected Gauss-Seidel, Programmable Logic Controller, Input-Constrained Systems, Model Predictive Control Systems, Model Predictive Control Systems, Model Predictive Control 1. INTRODUCTION Code generation requires the handling of libraries for linear 1. INTRODUCTION INTRODUCTION Code generation requires the handling of libraries for linear 1. Code generation requires the handling of libraries for linear algebra which must also be embedded on the hardware. 1. INTRODUCTION Code generation requires the handling of libraries for linear algebra which must also be embedded on the hardware. 1. INTRODUCTION Code generation requires the handling of libraries for linear algebra which must also be embedded on the hardware. Programmable Logic Controllers (PLC) are the de-facto algebra which must also be embedded on the hardware. Programmable Logic Logic Controllers Controllers (PLC) (PLC) are are the the de-facto de-facto In this work, we take aa be different approach by exploring algebra which must also embedded on the hardware. Programmable In this work, we take different approach by exploring industrial platform for implementing control algorithms. Programmable LogicforControllers (PLC) are the de-facto In this work, take aa different approach by industrial platform platform implementing control algorithms. the traditional programming for In this work, we weIEC take61131-3 different approach standard by exploring exploring Programmable Logicfor (PLC) are the de-facto industrial forControllers implementing control algorithms. the traditional IEC 61131-3 programming standard for Due to their limited storage and computational capaindustrial platform implementing control algorithms. In this work, we take a different approach by exploring the traditional IEC 61131-3 programming standard for Due to their limited storage and computational capaimplementing advanced control algorithms on low-cost, the traditional IEC 61131-3 programming standard for industrial platform for implementing control algorithms. Due to PLCs their limited limited storage andfor computational capaimplementing advanced control algorithms on low-cost, bilities, are often relegated implementing simDue to their storage and computational capathe traditional IEC 61131-3 programming standard for implementing advanced control algorithms on low-cost, bilities, PLCs are often relegated for implementing simlow-end PLCs. Specifically, we employ a combination of implementing advanced control algorithms on low-cost, Due to their limited storage and computational capabilities, PLCs are often relegated for implementing simlow-end PLCs. Specifically, we employ a combination of ple ON-OFF and proportional-integral-derivative bilities, PLCscontrol are often relegated for implementing sim- ladder implementing advanced control algorithms on low-cost, low-end PLCs. Specifically, we employ a combination of ple ON-OFF control and proportional-integral-derivative logic and function blocks to implement a fast low-end PLCs. Specifically, we employ a combination of bilities, PLCs are often relegated for implementing simple ON-OFF control and proportional-integral-derivative ladder logic and function blocks to implement a fast (PID) controls. However, recent advances both in algople ON-OFF control and proportional-integral-derivative low-end PLCs. Specifically, we employ a combination of ladder logic and function blocks to implement a fast (PID) controls. However, recent advances both in algoalgorithm for application in MPC. The algorithm is based ladder logic and function blocks to implement a fast ple ON-OFF control and proportional-integral-derivative (PID) controls. However, recent advances both in algoalgorithm for application in MPC. The algorithm is based rithms and in hardware for embedded control technology (PID) controls. However,forrecent advances both in algo- ladder logic and function blocks to implement a fast algorithm for application in MPC. The algorithm is based rithms and in hardware embedded control technology on a recently developed Projected Gauss-Seidel method for application in MPC. The algorithm is based (PID) controls. However, advances both in algo- algorithm rithms and and in hardware hardware forrecent embedded control technology on a recently developed Projected Gauss-Seidel method (e.g. Wang Boyd (2008); Wills et al. (2010); Adegbege rithms and in for embedded for application in MPC. The algorithmthat is based on developed Projected Gauss-Seidel method (e.g. Wang Wang and Boyd (2008); (2008); Wills et et al. al.control (2010);technology Adegbege algorithm (Adegbege and Nelson, 2016). We demonstrate this on aa recently recently developed Projected Gauss-Seidel method rithms and in hardware for embedded control technology (e.g. and Boyd Wills (2010); Adegbege (Adegbege and Nelson, 2016). We demonstrate that this and Nelson (2016)) have allowed the deployment of PLCs (e.g. Wang and Boydhave (2008); Willsthe et deployment al. (2010); Adegbege on a recently developed Projected Gauss-Seidel method (Adegbege and Nelson, 2016). We demonstrate that and Nelson (2016)) allowed of PLCs algorithm is particularly suitable for PLC implementation (Adegbege and Nelson, 2016). We demonstrate that this this (e.g. Wang and Boyd (2008); Wills et al. (2010); Adegbege and Nelson (2016)) have allowed the deployment of PLCs algorithm is particularly suitable for PLC implementation for advanced control applications such as model predictive and Nelson (2016)) allowed the of PLCs (Adegbege Nelson, 2016). We demonstrate that this algorithm is particularly suitable for PLC for advanced advanced controlhave applications suchdeployment as model model predictive predictive since the mode of its execution is sequential. algorithm isand particularly suitable for PLC implementation implementation and Nelson (2016)) have allowed the deployment of PLCs for control applications such as since the mode of its execution is sequential. control (MPC) (Pereira et al., 2015). for advanced control applications such as model predictive algorithm is particularly suitableisfor PLC implementation since the mode of its execution sequential. control (MPC) (Pereira et al., al., 2015). 2015). for advanced control applications such as model predictive since the mode of its execution is sequential. control (MPC) (Pereira et control (MPC) (Pereira et al.,approximate 2015). since the mode of its execution is sequential. In real-time applications, an solution of the control (MPC) (Pereira et an al.,approximate 2015). 2. PROBLEM SETUP In real-time real-time applications, solution of of the the 2. PROBLEM SETUP In applications, an approximate approximate solution MPC or an associated optimization problem must be In real-time applications, an solution of the 2. PROBLEM SETUP MPC or an associated optimization problem must be 2. PROBLEM SETUP In real-time applications, an approximate solution of the MPC or an associated optimization problem must be obtained quickly during each PLC scan time. 2. PROBLEM SETUPproblem (LCP) of MPC or relatively an associated optimization problem must be We consider the linear obtained relatively quickly during each PLC scan time. complementarity MPC or an associated optimization problem must be obtained relatively quickly during each PLC scan time. We consider the linear complementarity problem (LCP) of The computational burden and storage requirements for m m m obtained relatively quickly during each PLC scan time. We consider consider theulinear linear complementarity problem (LCP) of The computational computational burden and and storage requirements for We ,, 00 ≤ w ∈ R 00 ≤ vv ∈ R finding vectors ∈ R m complementarity m andproblem m such the (LCP) of obtained relatively quickly during each PLC scan time. The burden storage requirements for ≤ w ∈ R and ≤ ∈ R such finding vectors u ∈ R such problems can still be challenging and often times m m m The computational burden and storage requirements for that: We consider theu linear (LCP) of m complementarity m andproblem m such ,, 00 ≤ w ∈ R 00 ≤ vv ∈ R finding vectors ∈ R such problems can still be challenging and often times ≤ w ∈ R and ≤ ∈ R such finding vectors u ∈ R The computational and storage requirements for that: such problems can burden still of be many challenging and often times beyond the capabilities low-end PLCs. m m m such problems can still be challenging and oftenRecent times , 0 ≤ w ∈ R and 0 ≤ v ∈ R such finding vectors u ∈ R that: beyond the capabilities of many low-end PLCs. Recent Hu + qq = w − v, (1a) such problems can high-level still of be many challenging often times that: beyond thefavored capabilities of many low-endand PLCs. Recent works have code generation for high-end beyond the capabilities low-end PLCs. Recent Hu + = w − v, (1a) that: works have have favored high-level code generation generation for high-end high-end Hu + q = w − v, (1a) beyond the capabilities of many low-end PLCs. Recent works favored high-level code for PLCs which allows for incorporating C code as part of the u ≤ u ≤ u (1b) Hu + q = w − v, (1a) works have favored high-level code generation for high-end PLCs which which allows high-level for incorporating incorporating C code code as asfor part of the the u ≤ u u w − v, (1b) Hu + q≤ =u (1a) works have favored code generation high-end PLCs allows for C part of ≤ u ≤ (1b) u PLC program (Kufoalor et al., 2014; Bonne et al., 2017). T PLCs which allows for incorporating CBonne code as part of the u ≤−uu)≤T w u = 0; w ≥ 0, (1b) (u (1c) PLC program (Kufoalor et al., 2014; et al., 2017). (u − u) w = 0; w ≥ 0, (1c) PLCs which allows for incorporating code as of the u ≤−uu)≤TT w u = 0; w ≥ 0, (1b) PLC program (Kufoalor et al., al.,referred 2014;CBonne Bonne et part al., 2017). 2017). Such high-end PLCs are often to as programmable PLC program (Kufoalor et 2014; et al., (u (1c) T Such high-end PLCs are often referred to as programmable (u − u) w = 0; w ≥ 0, (1c) v = 0; v ≥ 0, (1d) PLC program (Kufoalor et al., 2014; Bonne et al., 2017). T Such high-end PLCs are often referred to as programmable automation controllers (PACs) (Kufoalor et al., 2014). vv = (1d) Such high-end PLCs are often referred to as programmable (u − u) u)TT w = 0; 0; vvw≥ ≥0, 0, (1c) automation controllers (PACs) (Kufoalor et al., 2014). (u − = 0; ≥ 0, (1d) Such high-end PLCs are often referred to as programmable m×m automation controllers (PACs) (Kufoalor et al., 2014). (u − u) v = 0; v ≥ 0, (1d)  This work began where H ∈ R is a positive definite matrix (not necesautomation controllers (PACs) (Kufoalor et al., 2014). T m×m while Zachary Nelson was a student of the  This work began v ≥ 0, matrix (notmneces(1d) where H ∈R is−aa u) positive definite m×m(u while Zachary Nelson was a et student of the automation controllers (PACs) (Kufoalor al., 2014). m v = 0;  where H positive matrix (not sarily symmetric), qqis input vector, u ∈ R (free) Department Electrical and Computer Engineering at The College This began while Zachary Nelson was of m is an definite mneces where H∈ ∈R Rm×m is∈ aR positive definite matrix (not necesThis work workof began while Zachary Nelson was a a student student of the the sarily symmetric), ∈ R is an input vector, u ∈ R (free) m×m Department of Electrical and Computer Engineering at The College m m  where H ∈ R variable positive matrix (not necesmparticular mm sarily symmetric), qqis∈ is input vector, u ∈ R (free) is the primal of w ∈ and of New Jersey. Department Electrical and Computer Engineering at This workof while Zachary Nelson was a student of the m sarily symmetric), ∈a R R is an an definite inputinterest, vector, u ∈ RR Department ofbegan Electrical and Computer Engineering at The The College College is the primal variable of interest, w ∈ R and of New Jersey. mparticular mm(free) sarily symmetric), q ∈ R is an input vector, u ∈ R m(free) is the primal variable of particular interest, w ∈ R of New Jersey. Department of Electrical and Computer Engineering at The College is the primal variable of particular interest, w ∈ Rm and and of New Jersey. is the primal variable of particular interest, w ∈ R and of New Jersey. Copyright © 2017 IFAC 14977 Copyright © 2017, 2017 IFAC 14977 2405-8963 © IFAC (International Federation of Automatic Control) Hosting by Elsevier Ltd. All rights reserved. Copyright 14977 Copyright © © 2017 2017 IFAC IFAC 14977 Peer review under responsibility of International Federation of Automatic Control. Copyright © 2017 IFAC 14977 10.1016/j.ifacol.2017.08.2031

Proceedings of the 20th IFAC World Congress Toulouse, France, July 9-14, 2017 Richard M. Levenson et al. / IFAC PapersOnLine 50-1 (2017) 14412–14417

v ∈ Rm (restricted) are internal variables also known as multipliers. The vectors u and u are respectively the lower and the upper bounds on variable u. The LCP problem (1) Algorithm 1 Projected Gauss-Seidel (PGS) Algorithm 1: 2: 3: 4: 5: 6: 7: 8: 9:

Let u0 ∈ [u, u]  Setting a starting point k=0 do for i = 1 to   m do ∆ui = [HL (uk+1 − uk )]i + [Huk + q)]i /Hii uk+1 = φ(uki − α∆ui ) i end for k =k+1 while |uk+1 − uki | > tol & k < maxItrs i

has widespread application in the solution of quadratic programs and variational inequalities (Robinson et al., 2013). In particular, when H is symmetric and positive definite, the LCP (1) describes exactly the Karush-KuhnTucker (KKT) optimality conditions for the strictly convex quadratic program: 1 T u Hu + uT q 2 subject to u ≤ u ≤ u.

u∗ = arg min u

(2a) (2b)

It follows that if u∗ is the unique solution for (2), then there exist non-negative vectors w∗ and v ∗ such that (u∗ , w∗ , v ∗ ) solves the LCP problem (1). There are very efficient iterative algorithms with light computational footprints and very attractive convergence properties for solving the LCP problem (1). In fact, there is a very large class of matrices H for which the LCP is guaranteed to be solvable with unique solutions. However, when H is asymmetric, the link between the LCP (1) and the QP (2) is broken as (1) ceases to be the KKT conditions for (2). Quadratic programs with simple bounds as in (2) occur frequently in input-constrained control applications such as in anti-windup control and in model predictive control (Adegbege and Heath, 2015). The LCP formulation provides an attractive framework for addressing the computational aspects of these constrained systems. Recent interests have been on developing fast gradient-based algorithms with proven convergence bounds for embedded control applications. We discuss in section 3 one of such algorithms and in sections 4 and 5, we discuss how the algorithm can be efficiently implemented on a low-end, low-cost PLC using the IEC 61131-3 programming standard. Finally, we discuss in section 6 the computational and storage implications for model predictive control on a low-end, low-cost PLC. 3. PROJECTED GAUSS-SEIDEL ALGORITHM Earlier methods for solving the LCP problem are finitemethods capable of attaining a solution in a finite number of arithmetic operations, often with pivots (Cottle et al., 2009). Such methods are known not to preserve sparsity and are usually employed for small-size problems. On the other hand, iterative methods are capable of preserving sparsity and are generally deployed for large-size problems especially where approximate solutions must be

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computed relatively fast. Due to these features, projected iterative methods such as Projected Gauss-Seidel (PGS) and Projected Successive Over Relaxation (PSOR) have become popular for solving large constrained optimization problems (Robinson et al., 2013; Morales et al., 2008). In Adegbege and Nelson (2016), we exploited the structure and the convergence properties of the PGS for applications in input-constrained systems. We develop here a version of the PGS algorithm optimized for PLC implementation. Associated with problem (1) or (2) are the gradient equation Hu + q = 0 (3) and the projection operation  ui if ui ≥ ui , φi (ui ) = ui if ui < ui < ui , (4)  ui if ui ≤ ui . By applying the matrix splitting H = HL + HD + HU (5) where HL is the strictly lower triangular matrix part of H, HD is the diagonal part of H, and HU is the strictly upper triangular part of H to (3) and combining with (4) gives the PGS iterative method stated in Algorithm 1. Note that the PGS formulation does not require the symmetry of H, but the diagonal entries of H must be positive. This is always true since by assumption, H is positive definite. Hence the computation in step 5 of Algorithm 1 is welldefined. Also the matrix-vector multiplications in this step are carried out in sequential fashion due to the structure of the matrix splitting. This sequential manner of solution updates makes the PGS algorithm suitable for efficient PLC implementation where program execution also takes place sequentially. In addition, the projection in step 6 is easy to carry out and hence, the computational burden of the PGS is expected to be light for the category of problems in the form of (1) or (2). The algorithm will terminate when a certain tolerance is met or a maximum number of iterations is exceeded. Note that every iterate is a feasible solution, so the algorithm can be terminated prematurely. 4. PROGRAMMABLE LOGIC CONTROLLER 4.1 PLC Set-Up We used the DirectLogic Do-More PLC for our implementation. A general configuration of this PLC is shown in Fig. 1. The base unit consists of the power wiring connections, CPU slot, and removable I/O modules. We used an 8channel analog input module and 2-channel analog output module. The set-up of the PLC starts with running a system task called $FirstScan. As the name implies, this task runs whenever the PLC goes from the STOP mode to RUN mode. A memory clear function named MEMCLEAR is then called to clear all the elements of memory to ensure that no data is left over from a previous program installed on the PLC. The next function in the $FirstScan task is to initialize data with the INIT function to input the problem parameters. The input parameters for the problem include:

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(1) Hessian matrix H

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Table 2. PLC Memory Configuration Memory Locations R0-R661503 R61504-R61751 R61752-R61999 R62000-R62247 R62248 R62249 R62250 R62251 R62252 R62253 R62254-R62501 R62502 R62503 V0 V1 C0 C1 CT0-CT2 WX0-WX247 WY0-WY247

Fig. 1. General PLC Base Unit Configuration (2) (3) (4) (5) (6)

constraint limits u and u relaxation parameter α maximum number of iterations stopping tolerance problem dimension m

Based on these input parameters, the task calculates how much memory it will need to use for the given problem size.

Data Hessian Matrix H Lower Constraints u Upper Constraints u Temporary Values of v ∆v v + ∆v Lower Constraint Index Upper Constraint Index Relaxation Parameter α Maximum Number of Iterations Allowed Previous value of v Error Tolerance Number of Elements Problem Dimension Saturation Indicator Repeat Indicator Counters Analog Input u Analog Output v Memory Utilization

100

Free Memory Used Memory

90

4.2 Memory Requirements Percentage of Memory

80

The DirectLogic Do-More PLC has up to 262.1 kilobytes of memory. The low amount of memory on the PLC is one of the major differences between a PLC and a PC and is why many PLCs can be purchased at a much lower cost than a PC. In order to better understand the memory requirements, Table 1 shows the important memory blocks that were used for this program.

Data Type Floating Point Unsigned Word Bit Signed Word Signed Word Counter structure

60 50 40 30 20 10 0

10

25

50

100

150

200

248

Problem Dimension

Table 1. PLC Memory Blocks Used Memory Block R V C WX WY CT

70

Fig. 2. PLC Memory Requirments for Solving PGS

Size (Bytes) 250016 4 4 496 496 24

A memory block is called in the ladder logic by writing the memory block followed by the location within the block. Table 2 shows the memory configuration for the PLC that we used.

1

Memory Clear R0-R62503

2

Input Problem Parameters

3

V1=V0-1

Fig. 3. First Scan Ladder Logic

It can be derived from Table 2 that the PLC is able to solve a quadratic program of form (2) with problem dimension up to m = 248. Fig. 2 shows the percentage of free and used memory versus the problem dimension.

systems are more comfortable with ladder logic than highlevel programming. Therefore, the authors believe that using ladder logic to solve complex control problems offers a unique and practical look on the role of PLCs in control.

5. LADDER LOGIC IMPLEMENTATION

The ladder logic program for the PGS algorithm consists of three modules: the $FirstScan system task, the $Main system task, and a program called PGS. As previously discussed, the $FirstScan task is used to input all of the problem parameters. The $Main system task is the ladder logic that gets executed during every scan. Lastly, the program PGS is called by $Main to run the PGS algorithm. A description of $Main and the PGS program will now be given.

The ladder logic for the DiretLogic Do-more Designer PLC was developed in the Do-more Designer 1.4.1 software environment. This software does not fully support the IEC 61131-1 programming standard, but does support ladder logic and function blocks. While there are high-end PLCs that support more powerful languages such as C and C++, many of the preexistent PLCs implemented in industrial controls systems do not have this ability. Additionally, many of the technicians that work with industrial control

There is only one rung of ladder logic in $Main and it is only executed when a change is detected in one of

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Proceedings of the 20th IFAC World Congress Toulouse, France, July 9-14, 2017 Richard M. Levenson et al. / IFAC PapersOnLine 50-1 (2017) 14412–14417

1

Input Change

14415

Initialize R62000-R62247=0 Scale Input Voltages Run PGS Algorithm

Initialize C1=1, CT0=0

1

Move Memory R[62000+V0:62000]=R[62254+V0:62254]

2

Fig. 4. Main Scan Ladder Logic

While C1

the analog inputs WX0-WX247. There are three types of function blocks used on this rung:

Increment CT0=CT0+1

3

(1) INIT: sets the discrete solution v as 0 (2) SCALE: scales the analog inputs into discrete values (3) RUN: calls the PGS algorithm

Move Memory R[62000+V0:62000]=R[62254+V0:62254]

4 For CT1=0, CT1
The PGS program starts off by setting the iteration counter (CT0) to 1 and saturation indicator (C0) to 0. The program then uses a function called WHILE to loop through the code until the stopping condition is met. We let this loop run until a maximum number of iterations is reached or until a desired tolerance condition is met. Note that including the tolerance stopping condition requires more memory and thus reduces the maximum problem size that can be solved on the PLC. The next step was to calculate the next iteration value v k+1 by using two FOR loops. Multiple loops were needed because the PLC is not capable of performing vector multiplication and instead must performed the operation element-by-element. Within the outer FOR loop, the ladder logic projects the solution onto the saturation region and turns on the saturation bit if saturation has occurred. The FOR loop function stops looping when the NEXT function is executed. The last step of the PGS program is to use the SCALE function to convert the discrete output values into analog ones. The program then exits and waits for another change in an analog input value. Details of the ladder logic implementation of the PGS algorithm are shown in Fig. 5.

5

6

R62248=0

For CT2=0, CT2
R62248=R62248+(R[(CT1*247)+CT2]*WX[CT2])

8

R62248=R62248-(R[(CT1*247)+ CT2]*R[62000+CT2]) End For Loop R62248=R62248/R[(CT1*247)+CT1]

9

R62249=R[62000+CT1]+(R62252*R62248) C0=0 R62250=R[61504+CT1] R62251=R[61752+CT1] 10

R62249
R[CT1+62000]=R62250 C0=1 R[62254+CT1]=R[62000+CT1]-R[62254+CT1]

11

R62249>R62251

R[CT1+62000]=R62251 C0=1

6. COMPUTATIONAL EXAMPLES

R[62254+CT1]=R[62000+CT1]-R[62254+CT1] C0==0

12

6.1 Linear Complementarity Problems In order to demonstrate the trade-off between number of iterations, speed, and accuracy, we solve several problems on the PLC and in Matlab using the PGS algorithm. The following tridiagonal matrix taken from literature was used for the symmetric feedback gain testing (Byong-Hun, 1983):   6 −1 −1 6 −1    . . .  . . . H= (6) . . . .  −1 6 −1 −1 6 The following tridiagonal matrix was used for the asymmetric feedback gain testing:   4 −2 1 4 −2   . . .   H =  .. .. .. (7) .  1 4 −2 1 4

R[CT1+62000]=R62249 R[62254+CT1]=R62249-R[62254+CT1]

13 End For Loop

Max Across Range of Values R62502=MAXR(R62254,V0)

14 15

CT0>=R62253

C1=0

R62502<62503

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End While Loop

17

For CT1=0, CT2
18

WY[CT1]=R[62000+CT1]

End For Loop 20

Fig. 5. PGS Algorithm Ladder Logic

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Table 3. Number of Iterations for Symmetric vs. Asymmetric Cases m 2 3 4

Symmetric Iterations 2 3 3

Asymmetric Iterations 3 4 4

Output u∗   0.999 0.433 0.999 0.466   0.999 0.433 0.999   0.999 0.466

results confirmed that the PGS algorithm implemented on the PLC is capable of solving constrained control problems for cases when H is either symmetric or asymmetric, so long as H is positive definite. 6.2 Application to Model Predictive Control (MPC) We consider linear MPC with quadratic cost function and linear constraints of the form:   N −1 N u −1  1  T  T  xt+k Qxt+k + ut+k Rut+k (8a) min 2 k=0 k=0 U,xt   1  + xT P x k+N 2 t+N subject to xt+k+1 = Axt+k + But+k , k = 0 · · · N − 1(8b)

(8c) umin ≤ ut+k ≤ umax , k = 0 · · · Nu − 1 where xt ∈ Rn and ut ∈ Rm are the state and the input respectively. The weighting matrices are such that Q = QT ≥ 0, R = RT > 0 and P is the solution of the discrete algebraic Riccati equation P = AT P A − AT P B(B T P B − R)−1 B T P A + Q. (9) The prediction and control horizons denoted as N and Nu respectively with N ≥ Nu . We assume that the state xt is accessible (or can be observed) for control.

By condensing, the linear MPC problem (8) can be expressed as the following quadratic program (e.g. see Bemporad et al. (2002); Adegbege and Nelson (2016)) 1 T U M U − U T M F xt (10a) U 2 subject to U ≤ U ≤ U (10b) T  T T and the implemented where U = ut · · · ut+Nu −1 control law at current instant is obtained as (11) u∗t = [I 0 · · · 0] U ∗ = EU ∗ . U ∗ = arg min

PLC Simulator Time Matlab Time

10 1

10 0

CPU Time (seconds)

Both of the resulting problems using matrices (6) and (7) in (1) with u = −1 and u = 1 were successfully solved using the PGS algorithm in both Matlab and ladder logic. The results were additionally verified using the Matlab quadprog function for the symmetric case and a Matlab implementation of the Lemke algorithm for the asymmetric case. For the PLC hardware implementation, the problem dimension for each case was limited to four in order to keep the number of power source inputs feasible in the laboratory environment. The number of PGS iterations required to reach a solution with error tolerance 10−5 on the PLC hardware for each of the cases is noted in Table 3. The input vectors, q (m) , for this example were T T set as q (2) = [1.2 0.5] , q (3) = [1.2 0.5 1.2] , and q (4) = T [1.2 0.5 1.2 0.5] . As expected, the asymmetric case required more iterations to reach an optimal solution than the symmetric case for similar problem dimensions. The

10 -1

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10 -4 10 25

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Problem Dimension

Fig. 6. MPC Computation Time In this case, we consider a system with     0.7326 −0.0861 0.0609 A= ,B = , C = [0 1.4142] . 0.1722 0.9909 0.0064 The input is constrained as −1 ≤ ut+k ≤ 1, k = 0 . . . Nu . The above problem can be reformulated into the form of (10). Following Bemporad et al. (2002), we set the control parameters as follows: Q = I, R = 0.01 and an initial condition of xt = [1 1]T . The prediction and the control horizons were set equal to each other for all implementations. In order to use the PLC to solve this MPC problem, the PLC memory configuration needed to be modified to allow storage for the additional matrix F and the solution of the multiplication of that matrix with the state xt . The PGS Algorithm ladder logic of Fig. 5 also needed to be appended with an additional program to compute this matrix multiplication prior to running the rest of the algorithm. With the resulting memory configurations, the maximum calculated MPC horizon and thus problem dimension was determined to be 246. The matrices M and F were pre-calculated in Matlab from the problem data and were loaded on to the PLC via the Do-more Designer software. The problem (10) was solved using the PGS algorithm in the Do-More Designer PLC Simulator, on Matlab running on a 3.3 GHz processor, and on the DirectLogic Do-More H2DM1 PLC hardware. A comparison of computation times for the Do-More Designer PLC Simulator and Matlab PGS implementations is shown in Fig. 6. The H2-DM1 hardware was unable to process the computation for the MPC problem with a horizon greater than 25 within its maximum scan time, but the Do-More Designer PLC Simulator, limited to the same amount of memory as the hardware, was able to show that a horizon of 246 is possible within the 262.1 kilobyte memory limitation. A DirectLogic Do-More H2-DM1 PLC hardware implementation setup is shown in Fig. 7. Here, a two-channel DC power supply was used to supply the input voltage corresponding to the initial state of the MPC problem. The computation time of the PLC is measured separately through an external computer running the the Do-More Designer software. The Do-More H2-DM1 PLC extends its scan-time to allow the entire ladder logic program to complete in one scan. Thus, the computation time was attained by viewing the scan-time of the PLC as it solved

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space optimization (Robinson et al., 2013). The authors also have plans to implement the algorithm on other forms of hardware, such as field-programmable gate arrays, to make it feasible for use in faster systems. ACKNOWLEDGEMENTS The authors would like to thank Automation Direct for providing the Do-More PLC for this research. REFERENCES

Fig. 7. PLC Hardware Testing Setup 1

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Memory Usage (%)

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Fig. 8. PLC Hardware Computation Time and Memory Usage the MPC problem at different problem dimensions. Results demonstrating the computation time and memory usage for problem dimensions between 2 and 25 are shown in Fig. 8. This example demonstrates that PLCs have the capacity to solve model predictive control problems. 7. CONCLUSION This paper has demonstrated that a low-cost PLC with limited computational capacity has the ability to solve complex control problems. Despite the limited amount of memory, the PGS algorithm was efficiently implemented in ladder logic and executed in simulation for MPC problems with problem dimensions up to 246. Running on the H2DM1 PLC hardware, the PGS algorithm was able to solve MPC problems with problem dimensions up to 25 in less than one second. The ladder logic implementation of this algorithm is especially noteworthy because the standard is still used in many industrial control systems. These industrial controllers are often used for controlling slow systems where a time constant on the order of one second would be feasible. Further work includes using a PLC to control a quadruple coupled tank system and making modifications to improve upon the convergence rate of the PGS algorithm. An improved convergence rate may be possible by incorporating adaptive step length computation (Mor´e and Toraldo, 1989) or by incorporating sub-

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