- Email: [email protected]
RAM, ROM, PROM circuits for simple image processing
20
World Abstracts on Microelectronics and Reliability
encourage quality managers and engineers to re-examine the economics of their present program of lot sampling, process sampling and audits.
Reliability criteria for experimental programs. R. J. ALLEN. PrOC. Reliability and Maintainability Symposium. 28-30 January, 1975. Washington D.C.p. 98. This paper proposes reliability guidelines/criteria to be used on Experimental Programs. These guidelines and recommendations are based on the work of several, but in particular, two Reliability Programs: (1) The Minuteman Missile System, a large design, development and production Program; and, (2) The Integrated Propulsion Control System (IPCS), an Exploratory Research Program. Experimental Programs should have many of the same reliability criteria by which large programs are controlled. The requirements should be exacting, but specifically defined within the specialized needs of the program and encompass only those elements necessary to justify the dollar cost of reliability. The objectives of an Experimental Program may never be accomplished or at best be compromised if the Experimental System is not highly reliable. On IPCS, criteria were developed, in addition to those imposed by contract, to provide a theoretically, high reliability system.
Elimination of fault sources, an efficient aid to quality ~lbtrov~lltelllk W. ROMMERSKIRCH. Feinwerktechnik & Messtechnik 83, 212 (1975). (In German). The quality standards demanded nowadays cannot be secured any more with the conventional types of quality control. Instead, comprehensive measures vouching for high q~ a1~ty are needed at all phases of production. Nor c,~'.J the necessary degree of quality be achieved and maintained by a few single steps, for it calls for an entire range of interacting activities. A measure is described in this paper which has been adopted successfully in a Swiss company making high-precision machine tools.
A case study approach to the reliability of shipborne electronic systems. P. L. SHOVE and I. E. G. GILROY. Microelectron. and Reliab. 14, 57 (1975). This case study compares the variability between several reliability prediction techniques and failure rate lists. The results were compared against Fleet experience taking into account the anomalies of the reporting system. Maintainability is also predicted and the accuracy of the results compared with Fleet data. The study indicates that standard prediction techniques should be used for both reliability and maintainability and recommends, for reliability, the one which produces the minimum error related to the Fleet environment. The case study concludes by a comparison of the resultant availabilities.
4. M I C R O E L E C T R O N I C S - - G E N E R A L
Recent SOS technology, advances and applications. RAN. S. RONEN and FRANK B. MICHELETTI. Solid State Technology. August 1975. Current SOS technology is described and several significant developments in the past five years are highlighted. Recent interest in SOS has been high both for conventional commercial applications, such as high performance CMOS switching circuits and memories, and for many special requirements that cannot be filled by other technologies, particularly in military systems. The latter applications include radiation hardened MOS and MNOS computer electronics, and linear systems such as amplifiers and power supplies. They also include high-performance signal-processing systems utilizing high speed digital electronics or analog high-frequency Surface Acoustic Wave (SAW) Programmable Tapped Delay Lines (PTDL's) e.g. matched filters, in the commercial area, SOS circuits are mostly advocated for high speed, high performance applications. However, some projections indicate that SOS technology can be cost competitive with equivalent bulk silicon technology, due to increased packing density, easier processing, and significantly simpler topography in specific applications due to the inherent dielectric isolation. However, this has yet 5. M I C R O E L E C T R O N I C S The bipolar LSI breakthrough, Part 1: Rethinking the problem. HORST H. I BERGER and SIEGFRIED K. WIEDMANN. Electronics p~, 89 (Sept. 1975). Complex processing, extravagent use of space and excessive power dissipation impeded the bipolar transistor's move into LSI: basic redesign eliminates large resistors, simplifies gate structure, needs only four-mask process. The bipolar LSI breakthrough, Part 2: ExtendiLg the limits. HORST H. BERGER and SIEGFRIEDK. W1EDMANN. Electronics p. 99 (Oct. 1975). Now that they have the basic structure of merged-transistor logic well in hand, designers are looking for ways of boosting performance to the highest levels without complicating the process too much.
to be demonstrated. Progress in the SOS area depends heavily on improvement in the material, rather than invention of novel circuit concepts or new process technologies. Specific circuits that illustrate current applica tions at Rockwell are discussed, together with the major process technologies involved. Extensive reference material is cited.
Monoliffiics mature, passives improve. LUCINDA MAqq'ERA. Electronics. p. 116. (October, 1975). As in many areas, the major developments in components of late are due largely to improvements in integrated-circuit technology. There is, for example--to cite probably the most notable achievement of the past year---the first complete monolithic analog-to-digital converter. Without ion implantation and other refinements in IC technology, this component would not be available. To a great extent the same is true of other data converters, as well as opera~ tional amplifiers, resistor networks, and virtually the whole gamut of active and passive components. Whatever the driving technology may be. today's state of the art in components is impressive DESIGN
AND
CONSTRUCTION
Logic network synthesis using digital-summation threshold-logic gates. S. L. HURST. MicroeIectronics 6. 42 1975). The recently-developed digital-summanon threshold-logic (DSTL) gate will be introduced, and lib advantages and disadvantages briefly discussed in comparison with previous analogne-type threshold-logic gates. Some typical applications will be shown indicating package and pin savings in random-logxc networks. Consideration of optimum universal package specifications for random-logic work will be mentioned. RAM, ROM, PROM dreuits for simple imao,e processing. M. J. D. WILSON and I. ALEKSANDER.Microelectronics 6, 30 (1975). Image processing is a field which has always suffered from being technologically ahead of its time.
World Abstracts on Microelectronics and Reliability Cellular arrays are used to detect the properties of twodimensional (binary) data fields. Unger's contributions with the ltliac II1 concept required highly specialized and, at that time, expensive cells. Duff has grasped the nettle by designing cells which can make use of present-day microelectronic technology which are, nevertheless, specialized. The contention here is that conventional Random Access Memory, Read Only Memory and Programmeable Read Only Memory devices are good candidates for the cells of an image processing system, and this is illustrated in this paper by a simple example. Essentially. the RAM can be used in adaptive arrays where this device provides a universally adaptable logic function. Once the logic has been firmly settled, the content of the RAM's can be programmed into a similarly connected circuit of ROM's. PROM's find their place in applications where the programming or adaptation is not likely to be required as often as in RAM arrays and where non-volatility is important.
Automated metal etch system for IC-manutaeture. HOI.GER MORITZ. Solid State Technology August 1975. p. 54. In integrated circuit manufacture, the subtractive etch process is widely used to provide the metal wiring lines. A uniform metal film is vacuum-evaporated and subsequently, unwanted metal is etched away. To account for various possible process variations a considerable overetch time is necessary. In effect this limits circuit density. An automated etch system is described, which etches one wafer at a time. Etch time is variable and controlled by an etch end-point detector. This results in optimized etching of each single wafer and high product yields. Wafer Testing. HERBERT F. MATARE. Solid State Technology. August 1975. p. 58. A survey of the principal methods available for wafer testing is presented. Diagnostic techniques are discussed which are used in connection with the identification of dopant profiles, materials composition, crystal perfection, oxygen content, vacancy clusters. swirls, striations and voids. Among the most important methods available are scattered light measurements, capacitance measurements, infrared microscopy, electroreflectance, spreading resistance, and photoelectric scanning. Photoelectric scanning has promise as a technique for rapid and nondestructive wafer testing. Automatic out-of-contact mask alignment. KENNETH G. CLARK. Solid State Technology. August 1975. p. 47. Mask alignment relies on the ability of an operator to position a photomask over a patterned wafer, and micropositioning control while viewing through a split field microscope. Accurate alignment is thus subject to the operator's skill and judgement which in turn depend on emotional state, eye strain and fatigue. Consistent accuracy and repeatability of alignment, with a consequent reduction in wafer alignment rejects, can be achieved by the use of an automatic alignment system. Equipment in current use however makes contact between the photoresist surface and the photomask during exposure thus increasing the possibilities of damage to both photoresist film and the expensive target-carrying photomask. Considerable die yield improvement and greatly increased mask lifetime is achieved by manufacturers using out-of-contact wafer alignment techniques. By combining this technology with automatic alignment, die yield losses can be reduced to a minimum with the additional advantage of much increased mask usage. This type of system may represent the ultimate in alignment techniques. Void reduction in large-area bonding of IC components. WILLARD D. BASCOM and JACK L. BITNER, Solid State Technology. September 1975. p. 37. A technique for nearly complete elimination of gas voids in the solder
21
bonding of microelectronic devices is described. The procedure, originally developed for adhesive bonding with resin-based structural adhesives, was shown to reduce the void area from greater than 50 per cent to less than 10 per cent in bonds of silicon to alumina and in the bonding of alumina plates to each other.
Advances in epoxy die-attach. DR. R. F. S. DAVID. Solid State Technology September, 1975. p. 4l). The use of epoxies for die-attach formerly was viewed with suspicion by many users. But recent developments in materials, testing methods, and application techniques have resulted in superior performance even in the most demanding applications. Over o n e million epoxy-attached dice are performing successfully in military and space systems. This article examines optimum evaluation and control testing of materials, defines proper application methods, and summarizes the performance of epoxy die-attach with particular reference to its uses in hybrid circuits. A few common pitfalls and methods for avoiding them are given. Proforma on preforms. C. E. T. WHITE and H. C. SOHL. Solid State Technology September 1975. p. 45. The use of preforms is discussed in the particular context of semiconductor device fabrication. The general groupings covered are Die-Attach, Solder, Doping and Closure preforms, as well as special applications involving multilayer preforms and preformed evaporation charges. Tables are included for each grouping showing recommended alloy compositions with liquidus and solidus temperatures. Suggestions on dimensional and weight specifications are given. Microprocessor controls fully automatic wafer prober. T. ROLAND FREDRICKSEN. Solid State Technology September 1975. p. 49. A technique for automatic wafer probing is described. Three major phases of microprocessor control are discussed: (1) The problems to be solved causing a microprocessor to be selected; (2) A specific technical discussion of microprocessor application with respect to design and development; (3) Bonus benefits from microprocessors beyond automation. A micro-contacting spider to test wafers for integrated circuits. L. BOTZENHARDT. Feinwerktechnik & Messtechnik. 83, 342 (1975). (In German.) This paper describes a new type of measuring spider designed to test circuits prior to assembly. The essential difference between this spider and conventional systems is constituted by the flat-type design of the contact lugs which are shaped to suit the pellet configuration by means of photo-resistive methods.
Improved techniques for proximity mask alignment. K. G. CLARK and K. OKUTSU. Microelectronics 6, 51 (1975). A great deal of the new semiconductor business is of SLI and is requiring the semiconductor manufacturer to evaluate systems for increasing device yield and reducing the burden of the photomask making department in producing large quantities of low defect masks. Until recently out of contact mask alignment has been mainly restricted to projection printing due to the very small gaps offered by proximity printers (typically to 10/zm) and the necessity to use hard surface masks. Recent improvement of illumination systems and viewing microscopes have allowed for larger separation gaps to be used whilst still obtaining fine line widths in the range of 2.0 ~m to 3.0/xm and allowing for photomasks of many technologies to be used with proximity mask alignment.
World Abstracts on Microelectronics and Reliability
encourage quality managers and engineers to re-examine the economics of their present program of lot sampling, process sampling and audits.
Reliability criteria for experimental programs. R. J. ALLEN. PrOC. Reliability and Maintainability Symposium. 28-30 January, 1975. Washington D.C.p. 98. This paper proposes reliability guidelines/criteria to be used on Experimental Programs. These guidelines and recommendations are based on the work of several, but in particular, two Reliability Programs: (1) The Minuteman Missile System, a large design, development and production Program; and, (2) The Integrated Propulsion Control System (IPCS), an Exploratory Research Program. Experimental Programs should have many of the same reliability criteria by which large programs are controlled. The requirements should be exacting, but specifically defined within the specialized needs of the program and encompass only those elements necessary to justify the dollar cost of reliability. The objectives of an Experimental Program may never be accomplished or at best be compromised if the Experimental System is not highly reliable. On IPCS, criteria were developed, in addition to those imposed by contract, to provide a theoretically, high reliability system.
Elimination of fault sources, an efficient aid to quality ~lbtrov~lltelllk W. ROMMERSKIRCH. Feinwerktechnik & Messtechnik 83, 212 (1975). (In German). The quality standards demanded nowadays cannot be secured any more with the conventional types of quality control. Instead, comprehensive measures vouching for high q~ a1~ty are needed at all phases of production. Nor c,~'.J the necessary degree of quality be achieved and maintained by a few single steps, for it calls for an entire range of interacting activities. A measure is described in this paper which has been adopted successfully in a Swiss company making high-precision machine tools.
A case study approach to the reliability of shipborne electronic systems. P. L. SHOVE and I. E. G. GILROY. Microelectron. and Reliab. 14, 57 (1975). This case study compares the variability between several reliability prediction techniques and failure rate lists. The results were compared against Fleet experience taking into account the anomalies of the reporting system. Maintainability is also predicted and the accuracy of the results compared with Fleet data. The study indicates that standard prediction techniques should be used for both reliability and maintainability and recommends, for reliability, the one which produces the minimum error related to the Fleet environment. The case study concludes by a comparison of the resultant availabilities.
4. M I C R O E L E C T R O N I C S - - G E N E R A L
Recent SOS technology, advances and applications. RAN. S. RONEN and FRANK B. MICHELETTI. Solid State Technology. August 1975. Current SOS technology is described and several significant developments in the past five years are highlighted. Recent interest in SOS has been high both for conventional commercial applications, such as high performance CMOS switching circuits and memories, and for many special requirements that cannot be filled by other technologies, particularly in military systems. The latter applications include radiation hardened MOS and MNOS computer electronics, and linear systems such as amplifiers and power supplies. They also include high-performance signal-processing systems utilizing high speed digital electronics or analog high-frequency Surface Acoustic Wave (SAW) Programmable Tapped Delay Lines (PTDL's) e.g. matched filters, in the commercial area, SOS circuits are mostly advocated for high speed, high performance applications. However, some projections indicate that SOS technology can be cost competitive with equivalent bulk silicon technology, due to increased packing density, easier processing, and significantly simpler topography in specific applications due to the inherent dielectric isolation. However, this has yet 5. M I C R O E L E C T R O N I C S The bipolar LSI breakthrough, Part 1: Rethinking the problem. HORST H. I BERGER and SIEGFRIED K. WIEDMANN. Electronics p~, 89 (Sept. 1975). Complex processing, extravagent use of space and excessive power dissipation impeded the bipolar transistor's move into LSI: basic redesign eliminates large resistors, simplifies gate structure, needs only four-mask process. The bipolar LSI breakthrough, Part 2: ExtendiLg the limits. HORST H. BERGER and SIEGFRIEDK. W1EDMANN. Electronics p. 99 (Oct. 1975). Now that they have the basic structure of merged-transistor logic well in hand, designers are looking for ways of boosting performance to the highest levels without complicating the process too much.
to be demonstrated. Progress in the SOS area depends heavily on improvement in the material, rather than invention of novel circuit concepts or new process technologies. Specific circuits that illustrate current applica tions at Rockwell are discussed, together with the major process technologies involved. Extensive reference material is cited.
Monoliffiics mature, passives improve. LUCINDA MAqq'ERA. Electronics. p. 116. (October, 1975). As in many areas, the major developments in components of late are due largely to improvements in integrated-circuit technology. There is, for example--to cite probably the most notable achievement of the past year---the first complete monolithic analog-to-digital converter. Without ion implantation and other refinements in IC technology, this component would not be available. To a great extent the same is true of other data converters, as well as opera~ tional amplifiers, resistor networks, and virtually the whole gamut of active and passive components. Whatever the driving technology may be. today's state of the art in components is impressive DESIGN
AND
CONSTRUCTION
Logic network synthesis using digital-summation threshold-logic gates. S. L. HURST. MicroeIectronics 6. 42 1975). The recently-developed digital-summanon threshold-logic (DSTL) gate will be introduced, and lib advantages and disadvantages briefly discussed in comparison with previous analogne-type threshold-logic gates. Some typical applications will be shown indicating package and pin savings in random-logxc networks. Consideration of optimum universal package specifications for random-logic work will be mentioned. RAM, ROM, PROM dreuits for simple imao,e processing. M. J. D. WILSON and I. ALEKSANDER.Microelectronics 6, 30 (1975). Image processing is a field which has always suffered from being technologically ahead of its time.
World Abstracts on Microelectronics and Reliability Cellular arrays are used to detect the properties of twodimensional (binary) data fields. Unger's contributions with the ltliac II1 concept required highly specialized and, at that time, expensive cells. Duff has grasped the nettle by designing cells which can make use of present-day microelectronic technology which are, nevertheless, specialized. The contention here is that conventional Random Access Memory, Read Only Memory and Programmeable Read Only Memory devices are good candidates for the cells of an image processing system, and this is illustrated in this paper by a simple example. Essentially. the RAM can be used in adaptive arrays where this device provides a universally adaptable logic function. Once the logic has been firmly settled, the content of the RAM's can be programmed into a similarly connected circuit of ROM's. PROM's find their place in applications where the programming or adaptation is not likely to be required as often as in RAM arrays and where non-volatility is important.
Automated metal etch system for IC-manutaeture. HOI.GER MORITZ. Solid State Technology August 1975. p. 54. In integrated circuit manufacture, the subtractive etch process is widely used to provide the metal wiring lines. A uniform metal film is vacuum-evaporated and subsequently, unwanted metal is etched away. To account for various possible process variations a considerable overetch time is necessary. In effect this limits circuit density. An automated etch system is described, which etches one wafer at a time. Etch time is variable and controlled by an etch end-point detector. This results in optimized etching of each single wafer and high product yields. Wafer Testing. HERBERT F. MATARE. Solid State Technology. August 1975. p. 58. A survey of the principal methods available for wafer testing is presented. Diagnostic techniques are discussed which are used in connection with the identification of dopant profiles, materials composition, crystal perfection, oxygen content, vacancy clusters. swirls, striations and voids. Among the most important methods available are scattered light measurements, capacitance measurements, infrared microscopy, electroreflectance, spreading resistance, and photoelectric scanning. Photoelectric scanning has promise as a technique for rapid and nondestructive wafer testing. Automatic out-of-contact mask alignment. KENNETH G. CLARK. Solid State Technology. August 1975. p. 47. Mask alignment relies on the ability of an operator to position a photomask over a patterned wafer, and micropositioning control while viewing through a split field microscope. Accurate alignment is thus subject to the operator's skill and judgement which in turn depend on emotional state, eye strain and fatigue. Consistent accuracy and repeatability of alignment, with a consequent reduction in wafer alignment rejects, can be achieved by the use of an automatic alignment system. Equipment in current use however makes contact between the photoresist surface and the photomask during exposure thus increasing the possibilities of damage to both photoresist film and the expensive target-carrying photomask. Considerable die yield improvement and greatly increased mask lifetime is achieved by manufacturers using out-of-contact wafer alignment techniques. By combining this technology with automatic alignment, die yield losses can be reduced to a minimum with the additional advantage of much increased mask usage. This type of system may represent the ultimate in alignment techniques. Void reduction in large-area bonding of IC components. WILLARD D. BASCOM and JACK L. BITNER, Solid State Technology. September 1975. p. 37. A technique for nearly complete elimination of gas voids in the solder
21
bonding of microelectronic devices is described. The procedure, originally developed for adhesive bonding with resin-based structural adhesives, was shown to reduce the void area from greater than 50 per cent to less than 10 per cent in bonds of silicon to alumina and in the bonding of alumina plates to each other.
Advances in epoxy die-attach. DR. R. F. S. DAVID. Solid State Technology September, 1975. p. 4l). The use of epoxies for die-attach formerly was viewed with suspicion by many users. But recent developments in materials, testing methods, and application techniques have resulted in superior performance even in the most demanding applications. Over o n e million epoxy-attached dice are performing successfully in military and space systems. This article examines optimum evaluation and control testing of materials, defines proper application methods, and summarizes the performance of epoxy die-attach with particular reference to its uses in hybrid circuits. A few common pitfalls and methods for avoiding them are given. Proforma on preforms. C. E. T. WHITE and H. C. SOHL. Solid State Technology September 1975. p. 45. The use of preforms is discussed in the particular context of semiconductor device fabrication. The general groupings covered are Die-Attach, Solder, Doping and Closure preforms, as well as special applications involving multilayer preforms and preformed evaporation charges. Tables are included for each grouping showing recommended alloy compositions with liquidus and solidus temperatures. Suggestions on dimensional and weight specifications are given. Microprocessor controls fully automatic wafer prober. T. ROLAND FREDRICKSEN. Solid State Technology September 1975. p. 49. A technique for automatic wafer probing is described. Three major phases of microprocessor control are discussed: (1) The problems to be solved causing a microprocessor to be selected; (2) A specific technical discussion of microprocessor application with respect to design and development; (3) Bonus benefits from microprocessors beyond automation. A micro-contacting spider to test wafers for integrated circuits. L. BOTZENHARDT. Feinwerktechnik & Messtechnik. 83, 342 (1975). (In German.) This paper describes a new type of measuring spider designed to test circuits prior to assembly. The essential difference between this spider and conventional systems is constituted by the flat-type design of the contact lugs which are shaped to suit the pellet configuration by means of photo-resistive methods.
Improved techniques for proximity mask alignment. K. G. CLARK and K. OKUTSU. Microelectronics 6, 51 (1975). A great deal of the new semiconductor business is of SLI and is requiring the semiconductor manufacturer to evaluate systems for increasing device yield and reducing the burden of the photomask making department in producing large quantities of low defect masks. Until recently out of contact mask alignment has been mainly restricted to projection printing due to the very small gaps offered by proximity printers (typically to 10/zm) and the necessity to use hard surface masks. Recent improvement of illumination systems and viewing microscopes have allowed for larger separation gaps to be used whilst still obtaining fine line widths in the range of 2.0 ~m to 3.0/xm and allowing for photomasks of many technologies to be used with proximity mask alignment.