Real time implementation of PI and fuzzy logic controller based 3-phase 4-wire interleaved buck active power filter for mitigation of harmonics with id–iq control strategy

Electrical Power and Energy Systems 59 (2014) 66–78

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Electrical Power and Energy Systems journal homepage: www.elsevier.com/locate/ijepes

Real time implementation of PI and fuzzy logic controller based 3-phase 4-wire interleaved buck active power filter for mitigation of harmonics with id–iq control strategy Ranjeeta Patel 1, Anup Kumar Panda ⇑ Department of Electrical Engineering, National Institute of Technology Rourkela, Rourkela 769008, Odisha, India

a r t i c l e

i n f o

Article history: Received 20 April 2013 Received in revised form 31 December 2013 Accepted 16 January 2014 Available online 3 March 2014 Keywords: Shoot-through Interleaved buck (IB) switch cell Active power filter Harmonic compensation id–iq Control strategy PI and fuzzy logic controller

a b s t r a c t The ‘‘shoot-through’’ failure, one of the most hazardous failure modes encountered in conventional inverter circuit which is used as the main circuit of the active power filter (APF). Shoot-through phenomenon has few distinct disadvantages like; it introduces typical ringing, increases temperature rise in power switches, causes higher Electromagnetic Interference (EMI) and reduces the efficiency of the circuit. To avert the ‘‘shoot-through’’, dead time control could be added but it deteriorates the harmonic compensation level. A novel 3-phase 4-wire active power filter (APF) based on interleaved buck (IB) DC-to-AC converter with the instantaneous active and reactive current component (id–iq) control strategy is proposed here to mitigate the harmonics having PI and fuzzy logic (FLC) controllers. This interleaved buck (IB) DCto-AC converter is an augmented version of the conventional phase leg configuration and is innately immune to ‘‘shoot-through’’ phenomenon, with the elimination of special protection features required in conventional inverter circuits. Here in this paper, a comparison has been made between the compensation capabilities of the 3-phase IB-APF with the PI and fuzzy logic controller (FLC) used by id–iq control strategy under different supply voltage conditions. The performance of the control strategies have been evaluated in terms of harmonic mitigation and DC link voltage regulation. Extensive simulations have been carried out in the MATLAB / SIMULINK environment and also implemented using Real-Time Digital Simulator Hardware (RTDS-Hardware). Ó 2014 Elsevier Ltd. All rights reserved.

1. Introduction In recent years, with the proliferation of power electronic equipment, the problems of harmonics are most serious. The importance of active power filter has grown over the years because of better compensation capabilities and finds attention of researches for its outstanding performance. Active power filters can be alienated into single phase active power filters (APFs) and three phase active power filters (APFs).Three phase active power filters (APFs) would attract more attention as compared to single phase version because single phase versions are limited to low power applications except for electric traction or rolling stock [2]. Particularly, voltage harmonics and power distribution equipment problems are the result of current harmonics produced by power electronic equipment. Again, in 3-phase 4-wire system some prominent issues always

⇑ Corresponding author. Tel.: +91 9437369341; fax: +91 661 2462401. E-mail addresses: [email protected] (R. Patel), [email protected] (A.K. Panda). 1 Tel.: +91 8658822422. http://dx.doi.org/10.1016/j.ijepes.2014.01.021 0142-0615/Ó 2014 Elsevier Ltd. All rights reserved.

arise as a result of excessive harmonic current flowing through the neutral wire. It is known that neutral wire may cause a fire due to overheating. Thus a consummate filter is required to avert the negative consequences of the harmonics [1–7]. In general, the main circuit of active power filter (APF) is a conventional voltage source inverter (VSI), but it encounters one of the most dangerous mode; the ‘‘shoot-through’’. Shoot-through failure occurs when two power switches in the same phase leg are inadvertently turned on simultaneously, causing the flow of extremely high currents that destroy the device. According to several researchers, dead time introduction is a good solution to kill shoot-through, but still it is not satisfied for good harmonic compensation performance. Interleaved buck (IB) inverter topology is special and it has received more attention since its proposal in [8–16] to eliminate shoot-through with good harmonic compensation performance. These issues became the primary motivation of the presented paper. In recent years, various control strategies have been proposed like p-q theory, id–iq [17] theory for extraction of reference current. However, it is observed that both the methods are completely frequency independent, still the performance of the active filter with

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p-q theory is unsatisfactory under unbalanced and distorted source voltage conditions. The id–iq control method eliminates many synchronization problems with unbalanced and non-sinusoidal voltage conditions and a truly frequency independent filter is achieved avoiding PLL. Therefore, this particular control strategy is chosen for the novel 3-phase 4-wire interleaved buck based active power filter (IB-APF). The id–iq control scheme needs controllers to regulate the DC link voltage. Out of which, the PI controller design needs precise linear mathematical models which are tough to get and may not give suitable results under parameter variations, load disturbances, etc. [18–20]. Only just, fuzzy logic controllers have acknowledged a great deal of attention in regards to their application to active power filters (APFs). The advantages of fuzzy logic controllers over PI controllers are that they do not necessitate any precise linear mathematical models, can handle non-linearity with inaccurate inputs, and are more robust. Out of Sugeno and Mamdani types of fuzzy controllers, the Mamdani type controller gives a better result for the control of an active power filter (APF), but it has the drawback of a large number of fuzzy sets and rules [21–23]. In this paper, a novel 3-phase 4 wire interleaved buck based active power filter (IB-APF) with id–iq control strategy is presented with an end to the ‘‘shoot-through’’ phenomenon. So present paper mainly focuses on the ‘‘shoot-through’’ phenomenon abolition in the proposed APF with id–iq control strategy by using two controllers i.e. PI and fuzzy along with harmonic compensation as per IEEE-519 standard. The performances of the proposed filter are analyzed under different main voltage conditions in terms of harmonic mitigation and DC link voltage regulation having no ‘‘shoot-through’’ phenomenon. On observing the performances of id–iq method with the FLC, it is concluded that, under unbalanced and distorted supply it presents better results. To validate the observations, extensive simulations and experiments using RTDS hardware were performed and verified.

2. Shunt active filter configuration

empowered at the same time. Therefore, a time delay has to be added between the turn off time of one power switch in a limb of an inverter, and the corresponding turn on time of the another power switch in the same limb to reduce the short circuit or shoot-through currents as shown in Fig. 1b. Dead time introduction has also some limitation, cannot go for too long or too short. Too short dead time can cause shoot-through and it again gives complexity. The inclusion of the dead time state creates an innate nonlinearity in the output voltage and current and this behavior does not give good harmonic compensation. In other words, the conventional phase leg can be divided into the high side power switch and low side power switch according to the direction of inductor current with the respective diodes as shown in Fig. 1c. So a novel three phase in which the conventional inverter two switch leg is replaced by one switch bridge leg is proposed here to eliminate the ‘‘shoot-through’’ phenomenon with no dead time introduction is shown in Fig. 2. So, the elimination of ‘‘shoot-through’’ is found in the proposed topology. Now, the combinational circuit works on the principle of simple buck converters and the shoot-through di/dt is limited by the series connected interleaved inductor [10–12]. 2.2. Three phase four wire interleaved buck based active power filter An active power filter is implemented to draw /supply the compensating current in order to make the source current sinusoidal, which flows from/to the load by removing the higher order harmonics than the fundamental with the injection of same but opposite in phase harmonic components as shown in Fig. 3. Here the shunt active power filter acts as a current source injecting the harmonic components generated by the load with a phase shift of 180°. This principle is valid for all non-linear load which generates harmonic components. So, in the interleaved buck cell, there are two inductor channels for each phase, one for positive and another for negative current. The sum of inductor currents is the compensating current. The expression for ic1, ic2, and ic3 are as follows:

ic1 ¼ iL1 þ iL2

2.1. Interleaved buck circuit description

ic2 ¼ iL3 þ iL4 The conventional inverter phase limb is shown in Fig. 1a [11,12]. The power switches in a limb are normally operated in a proper sequence with the assumption that each MOSFET conducts for the duration, its switching pulse is present and is commutated as soon as this pulse is removed. For an inductive load, the load current cannot change immediately with the output voltage. If S1 is turned off, the load current continues to flow through D1 and similarly, when S2 is turned off, the load current flows through D2. When diode D1 or D2 conducts, energy is fed back to the DC source and these diodes are known as feedback diodes. So, in the conventional inverter phase limb has an integral fault path with a heavy short circuit current when both switches are

(a)

(b)

ð1Þ

ic3 ¼ iL5 þ iL6 The three phase interleaved buck converter with split capacitor configuration suffers from following shortcomings:  The control circuit is somewhat complex due to the split capacitor configuration.  The voltages of the two capacitors of a split capacitor need to be properly balanced.  3-Phase interleaved inductor needs discrete diodes whereas the conventional inverter has the diodes assimilated with the switches and also it needs more output inductors as compared to conventional.

(c)

Fig. 1. (a) Conventional inverter phase limb. (b) Dead time effect. (c) Equivalent circuit cells of conventional inverter phase limb.

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Fig. 2. Three-phase half bridge interleaved buck converter.

Fig. 3. Three-phase interleaved buck active power filter.

3. Instantaneous active and reactive current (id–iq) theory

iLa, iLb, iL0 is therefore expressed by the following Eq. (2) for three phase four wire system.

In the instantaneous active and reactive current control method, the three phase load current and source voltage have been tracked for the generation of compensating reference current. Here, the non-linear load current has to perform two stage transformations that are from a-b-c to a-b or stationary reference frame and then to d-q or synchronous reference frame. As the synchronous reference frame came into the picture, the voltage and current vectors are rotating at a synchronous speed x. The transformation equation giving the new currents iLd, iLq, iL0 in terms

2

iLd

3

2

cos h

sin h

0

3 2

iLa

3

6 7 6 7 6 7 4 iLq 5 ¼ 4  sin h cos h 0 5  4 iLb 5; h ¼ tan1 0 0 1 iL0 iL0



vb va

 ð2Þ

where h signifies the instantaneous voltage vector angle and is attained from the voltage vector. The a-b transformation of the actual supply voltage va, vb, vc and non-linear load current iLa, iLb, iLc can be expressed in the matrix form as follows.

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2

v a  pffiffiffiffiffiffiffiffi  1 ¼ 2=3  vb 0

2

3

va  1=2 1=2 6 7 pffiffiffi pffiffiffi  4 vb 5 3=2  3=2 vc

2 3 2 3 1 1=2 1=2 iLa p ffiffiffiffiffiffiffiffi p ffiffiffi p ffiffiffi 6 7 6 7 6 7 3=2 3=2 5  4 iLb 5 4 iLb 5 ¼ 2=3  4 0 pffiffiffi pffiffiffi pffiffiffi 1= 2 1= 2 1= 2 iL0 iLc iLa

ð3Þ

3

ð4Þ

The Eq. (2) can be rewritten in terms of va and vb with the value qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi  dq j ¼ jv  ab j ¼ v 2a þ v 2b and q of direct voltage component as v d ¼ jv axis voltage being always zero.

2

iLd

3

2

va vb 6 v v b a 6

6i 7 1 6 Lq 7 6 7 ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi  6 4 iL0 5 2 v a þ v 2b 4 0

0

0

3 2

iLa

3

7 6i 7 7 6 Lb 7 76 7 v ab 5 4 iL0 5 0

ð5Þ

The d-q load current iLd and iLq has an average value or DC component and an oscillating value or ac component and is given in equation as:

iLd ¼ iLd þ ~iLd and iLq ¼ iLq þ ~iLq

ð6Þ

Under ideal sinusoidal voltage source condition, the average terms solely consist of the first harmonic current of positive sequence and all higher order harmonics including first harmonic of negative sequence current comes under oscillating part which has to be compensated by shunt active power filter [17]. The inverse park’s transformation follows by the compensating reference current equation,

2



ic a

3

2

va

6v 1 6 b 6 i 7 4 cb 5 ¼ qffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi  6 2 40 2  va þ vb ic0

v b

va 0

 3 icd 7 6 i 7 7 6 cq 7 76 7 v ab 5 4 ic0 5

0 0

3 2

2 pffiffiffi 3 2  3  3 i ica 1 0 1= 2 pffiffiffi pffiffiffi 7 6 ca 7 6  7 pffiffiffiffiffiffiffiffi 6 icb 5  4 icb 5 ¼ 2=3  4 1=2 5 4 3=2 1= 2 pffiffiffi pffiffiffi   icc ic0 1=2  3=2 1= 2

ð7Þ

2

ð8Þ

The reference signals thus obtained from the above equation are compared with the compensating current in a hysteresis comparator as shown in Fig. 4, where the actual compensating current is forced to follow the reference and the APF provides instantaneous harmonic compensation. The main advantages of this are its easy

Fig. 4. Current control method for shunt current compensation based on id–iq theory.

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the shunt active power filter depend mainly on the method implemented to generate the compensating reference currents. In order to maintain DC link voltage constant, a PI or FLC branch is added to the d-axis in d-q frame to control the active current component. The PI or FLC controls this small amount of active current and then the current controller regulates this current to maintain the DC link capacitor voltage. The working principle constructional details of PI and fuzzy logic controllers are as follows. 4.1. PI controller

Fig. 5. Instantaneous current and voltage vectors.

implementation and its quick response to fast current transitions. This consequently provides the switching signals to the MOSFETS present in the interleaved buck (IB) inverter. Ultimately, the filter provides the harmonic compensation to the source current. Fig. 5 shows the voltage and current vectors in the stationary and rotating reference frames. The transformation angle ‘h’ is sensible for all voltage harmonics and unbalanced voltages as a result dh/dt may not be constant. Here on this method, the angle ‘h’ is calculated directly from the main voltages avoiding PLL which is one of the advantages, making this method frequency independent. Consequently, the synchronizing problems with the unbalanced and distorted conditions of the main voltages are also avoided. After the load currents id and iq are obtained from the Park’s transformation, the currents are allowed to pass through high pass filter to eliminate the dc components in the non-linear load currents. Here an alternative high pass filter (AHPF) is used to reduce the influence of high pass filter. This can be obtained through a low pass filter (LPF) of the same order as that of high pass filter and cutoff frequency simply by calculating the difference between the input signal and the filtered one. The Butterworth filters used in the harmonic compensation circuit have a cut-off frequency equal to one half of the main frequency (fc = f/2).

4. DC link voltage regulation For regulating and maintaining the DC link capacitor voltage constant, the active power flowing into the active filter needs to be controlled. If the active power flowing into the filter can be controlled equal to the losses inside the filter, the DC link voltage can be maintained at the desired value. The quality and performance of

The internal structure of the control circuit with PI controller is shown in Fig. 6. The peak value of the reference current is estimated by adjusting the DC link voltage. The actual capacitor voltage value is compared with the set reference DC voltage value. The error signal is processed through a PI controller which contributes to the zero steady state error in tracking the reference current signal. The output of the PI controller is considered as the first harmonic active current id1h+ of positive sequence [17] and is responsible for the active power flow control to the active power filter and thus the DC link voltage regulation. Inside the reference current generator module, the d-q component of load current is passed through the AHPF to eliminate the average or DC component of iLd and iLq to get the oscillating or non-DC quantity of load current which has to be compensated by the APF and is called as reference compensating currents. These estimated reference compensating currents and the actual sensed compensating currents are compared in a hysteresis band, which gives the error signal for the modulation technique. This error signal decides the operation of the IB converter switches. In this current control circuit configuration, the actual compensating current Icabc are made to follow the generated reference compensating current Icabc , within a fixed hysteretic band. 4.2. Fuzzy logic controller Figs. 7 and 8 shows the internal structure of the control circuit along with reference compensating current generation using fuzzy logic controller. The peak value of the reference current is estimated by adjusting the DC link voltage. The actual capacitor voltage is compared with the set reference DC voltage. The error signal is then processed through a fuzzy controller, which contributes to the zero steady state error in tracking the reference current signal. A fuzzy controller converts a linguistic control strategy into an automatic control strategy, and fuzzy rules are constructed either by expert or with a knowledge database. At first, the input error (E) and change in error (DE) have been placed with the angular velocity to be used as input variables of the fuzzy logic controller.

Fig. 6. Conventional PI controller.

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Fig. 7. Fuzzy logic controller.

Fig. 8. Reference current extraction with id–iq method with fuzzy logic controller.

(a)

(b)

Fig. 9. (a) Triangular membership function. (b) Input variable error ‘E’ triangular membership function.

Then the output variable of the fuzzy logic controller is current. The following seven fuzzy levels or sets are chosen for better result: NB (negative big), NM (negative medium), NS (negative small), ZE (zero), PS (positive small), PM (positive medium), and PB (positive big) as can be seen in Fig. 9. The fuzzy inference system is a popular computing framework based on the concepts of fuzzy set theory. Rule base: The elements of this rule base table are determined based on the theory that in the transient state, large errors need coarse control, which requires coarse input/output variables, while

Table 1 Rule base. E

NB NM NS Z PS PM PB

in the steady state, small errors need fine control which requires fine input/output variables. Based on this, the elements of the rule table are obtained as shown in Table 1. 4.3. Triangular membership function A MF is a curve that defines how the values of a fuzzy variable in a certain region are mapped to a membership value or (degree of membership) between 0 and 1. An MF can have different shapes and out of them, triangular MF is simplest and most commonly used. The triangular [16] curve is a function of a vector, x, and depends on three scalar parameters a, b, and c, as given by



lA ðxÞ ¼ max min

DE NB

NM

NS

Z

PS

PM

PB

NB NB NB NB NM NS Z

NB NB NB NM NS Z PS

NB NB NM NS Z PS PM

NB NM NS Z PS PM PB

NM NS Z PS PM PB PB

NS Z PS PM PB PB PB

Z PS PM PB PB PB PB

x  a c  x  ; ;0 ba cb

ð9Þ

5. Generation of gating signals to the devices of IB-APF A variety of approaches, such as hysteresis-based current control, PWM current or voltage control, deadbeat control, sliding mode of current control, PI controller, fuzzy-based current control, and Neural network-based current control, can be

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Fig. 10. Hysteresis PWM, current control and switching logic.

Fig. 11a. OP5142 Reconfigurable Board and OP5142 stacked over the Backplane Adapter.

Ethernet Link

(a)

P r o b e s L i n k

(b) (a) OPAL-RT LAB command station (b) OPAL-RT simulator (c) TPS 2014 Tektronix DSO

(c) Fig. 11b. OPAL-RT LAB Setup.

implemented, either through hardware or software to obtain the control signals for the switching devices of the APF. Out of all these approaches we have considered, hysteresis-based current control, Proportional-Integral (PI) controller and Fuzzy logic controller.

The hysteresis band current control is characterized by unconditioned stability, very fast response, and good accuracy. However, this control scheme exhibits several demerits, such as variable switching frequency, possible to generate resonances and difficult to design the passive filter system. This unpredictable switching

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Switch current (Amps)

100 80 60 40 20 0 -20 0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

Time (sec) Fig. 12. Switch current of the conventional inverter.

function affects the active filter efficiency and reliability. It may well be said that fuzzy logic systems [21] resolve most of the problems faced by existing methods. The hysteresis band current control idea used for the control of active power filter line current is demonstrated in Fig. 10. The actual compensating currents are monitored instantaneously, and then compared to the reference currents generated by the proposed algorithm. In order to get accurate control, switching on MOSFET device should be such that the error signal should approach zero, thus provides quick response. For this reason, the hysteresis current controller with a fixed band for generation of switching signals for the switches of the VSI is used.

Switch current (Amps)

100 80

6. Real time digital simulator (RTDS) hardware

60 40 20 0 0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

Time (sec) Fig. 13. Switch current of the interleaved buck inverter.

(a)

0.5

Now a day, major studies on modern power system needs very fast, flexible and scalable real time simulators. The latest real time simulator works with the field programmable gate array (FPGA) integrated circuit. Based on this OPAL-RT is designed and is defined as the open real-time simulation software environment which has modernised the way model-based design is performed and is fully incorporated with MATLAB/Simulink.This OPAL-RT simulator permits real-time simulations of simulink models with hardware

(b)

(c)

Fig. 14. 3-ph 4-wire IB-APF using id–iq control strategy response with PI controller under: (a) Balanced sinusoidal. (b) Unbalanced sinusoidal. (c) Balanced non-sinusoidal.

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(a)

(b)

(c)

Fig. 15. 3-ph 4-wire IB-APF using id–iq control strategy response with fuzzy logic controller under: (a) Balanced sinusoidal. (b) Unbalanced sinusoidal. (c) Balanced nonsinusoidal.

Fig. 16. THD of source current for id–iq method with PI and fuzzy logic controllers comprising both simulation and RTDS hardware result.

in the loop in a very fast response at a low cost. It is flexible enough to handle most complex simulink model either, it is a real time hardware in the loop or to speed up model execution, control, and test.

6.1. OP5142 PCIe reconfigurable platform The OP5142 (Fig. 11a) is the key building blocks in the modular OP5000 I/O system from OPAL-RT Technologies. The Field

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Fig. 17. 3-ph 4-wire IB-APF using id–iq control strategy response with PI controller under: (a) Balanced sinusoidal. (b) Unbalanced sinusoidal. (c) Balanced non-sinusoidal.

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Fig. 18. 3-ph 4-wire IB-APF using id–iq control strategy response with fuzzy logic controller under: (a) Balanced sinusoidal. (b) Unbalanced sinusoidal. (c) Balanced nonsinusoidal.

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programmable gate array (FPGA) technology is incorporated in RTLAB simulation cluster for distributed execution of hardware description language (HDL) functions and high speed, high density digital I/O in real time models. Based on the highest density Xilinx Spartan-3 FPGAs, the OP5142 can be attached to the backplane of an I/O module of either a Wanda 3U or Wanda 4U-based OPAL-RT simulation system. It communicates with the target PC via a Peripheral Component Interconnect (PCI)-Express ultralow-latency real time bus interface.

Table 2 System parameter. Parameter

Value

Supply voltage Supply frequency Boost inductor DC link capacitance DC link voltage Load resistance Load inductance Hysteresis band

Vs = 230 V RMS fs = 50 Hz Lb = 500 lH Cdc = 1000 lF Vdc = 600 V RL = 10 X LL = 50 mH ±0.2 A

6.2. Technical specification of OPAL-RT  Digital I/O No. of channels-256 input/output configurable in 1 to 32 bit groups, compatibility- 3.3 V, power on state- high impedance.

Table 3 THD result. Supply voltage condition

 FPGA Device- Xilinx Spartan 3, I/O package- fg676, Embedded RAM available- 216 Kbytes, Clock- 100 MHz, Platform optionsXC3S5000, Logic slices- 33,280, Equivalent Logic cells- 74880, available I/o Lines- 489.  Bus Dimensions (not including connectors) - PCI Express x1, Data transfer-2.5 Gbit/s. As shown in Fig. 11b, the Simulink model is performed on the personal computer (PC) with OPAL-RT software loaded. The PC is connected to the OPAL-RT simulator via Ethernet and the output result is taken by the Data Storage Oscilloscope (DSO) connected to the simulator. 7. Simulation results See Figs. 12–15. 8. Experimental results See Figs. 17 and 18. 9. System performance and result discussion The proposed IB-APF has been implemented in MATLAB simulation and real time verification (Fig. 11b) with id–iq control strategy by using PI and fuzzy logic controllers. Investigations are carried out under different supply voltage conditions i.e. balanced sinusoidal, un-balanced sinusoidal and non-sinusoidal. As the load is highly inductive, the current drawn by the load is rich in harmonics. Else this, extensive simulations were also done on conventional inverter and IB inverter to acquire the shoot-through result. Shootthrough current in the conventional inverter circuit is very difficult to measure because this fault current persist for only a few ns, hence the added inductance in current probe drastically affects the shoot-through waveform. The detailed parameters used by the Simulink models are showcased on Table 2. The degree of three phase IB-APF is measured in terms of degree of compensation with PI and fuzzy logic controllers. The simulation and OPAL-RT output result gives details about the source voltage, source current, load current, compensating current, DC link voltage and finally the THD results. Figs. 12 and 13 represents the simulation results for conventional and IB inverter switch current and concluded the elimination of shoot-through current

Balanced sinusoidal Un-balanced sinusoidal Non-sinusoidal

MATLAB simulation (% THD)

RTDS hardware (% THD)

PI (%)

FLC (%)

FLC (%)

FLC (%)

3.39 4.39 5.88

2.57 3.42 4.11

3.57 4.60 6.13

2.76 3.63 4.36

Figs. 14a and 17a represent the simulation and RTDS hardware result under balanced sinusoidal source voltage condition with a THD of 3.39% and 3.57% for id–iq method by using PI controller respectively and similarly, Figs. 15a and 18a represent a THD of 2.57% and 2.76% for id–iq with FLC. Figs. 14b and 17b represent the simulation and RTDS hardware result under unbalanced sinusoidal source voltage condition with a THD of 4.39% and 4.60% for id–iq method by using PI controller respectively and similarly, Figs. 15b and 18b represent a THD of 3.42% and 3.63% for id–iq with FLC. Figs. 14c and 17c represent the simulation and RTDS hardware result under balanced non-sinusoidal source voltage condition with a THD of 5.88% and 6.13% for id–iq method by using PI controller respectively and similarly, Figs. 15c and 18c represents a THD of 4.11% and 4.36% for id–iq with FLC. The results presented confirm the superior performance of the fuzzy controller. Initially the system performance is analyzed under balanced sinusoidal conditions in which the PI and fuzzy controller are good enough to mitigate the harmonics and THD results about 3.39% and 2.57% respectively. However, under un-balanced and non-sinusoidal conditions the fuzzy controller gives superior performance over the PI controller. With the PI controller the THD is 4.39% and 5.88% while with the fuzzy controller they are about 3.42% and 4.11% respectively for un-balanced and nonsinusoidal voltage conditions. By the use of PI and fuzzy logic controllers DC link voltage is maintained constant. Finally, the shoot-through is eliminated with a good harmonic compensation. The source current THD are listed in Table 3. Fig. 16 gives THD comparison of source currents for id–iq control strategies with PI and fuzzy logic controllers using MATLAB simulation and OPAL-RT hardware result. However, the fuzzy controller shows outstanding performance under any supply voltage condition but it has also some drawbacks like redundancy and iteration problems. 10. Conclusion In the present paper, an extensive simulation and RTDS hardware analysis of novel 3-phase 4-wire IB-APF has been done focusing on the inherent elimination of shoot-through current with a good harmonic compensation to the disturbances generated by the non-linear loads. The proposed module contributes the elimination of shoot-through path to improving the reliability of the

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system. Even though both of the presented controllers are capable to compensate the harmonics, it is concluded that FLC has a better dynamic performance over PI controller. Under the sinusoidal supply voltage condition, both the controllers can provide good compensation but in non-sinusoidal supply voltage condition PI fails to have that much of good compensation. Simulation results show that the ‘‘shoot-through’’ problem does not exist and dead time can be eliminated. Additionally, as compared to other control strategies, the id–iq method enables a frequency independent operation as a result a large number of synchronization problems can be avoided. The THD of the source current has been too limited to within IEEE-519 standard. Recommendations on harmonic limits and FLC are found to be superior to the PI controller under un-balanced and non-sinusoidal voltage condition. Thus some of the important features of the proposed active filter include:  The shoot-through phenomenon gets eliminated in the interleaved buck converter.  As the shoot-through phenomenon is being eliminated, the reliability of the converter circuit gets increased.  As there is no short circuit current between the two series connected phase switches, the voltage and current stresses get reduced in the particular switch.  As the voltage and current stresses get reduced, the cost of the devices gets reduced and also the cost of snubber circuit/ power circuit get reduced.  Further the THD of the source current has been maintained within IEEE-519 standard.

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